From 21c0fd9e8f0743ac2a8036c50c43331bf053ab5b Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Wed, 10 Aug 2005 17:37:53 +0000 Subject: [PATCH] Fix an oversight that may be causing PR617. llvm-svn: 22753 --- llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 17 +++++++++++++---- 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index c2d5de841efd..549b48042f9f 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -626,12 +626,21 @@ SDOperand SelectionDAG::SimplifySetCC(MVT::ValueType VT, SDOperand N1, if (N2.getOpcode() == ISD::ADD || N2.getOpcode() == ISD::SUB || N2.getOpcode() == ISD::XOR) { // Simplify X == (X+Z) --> Z == 0 - if (N2.getOperand(0) == N1) + if (N2.getOperand(0) == N1) { return getSetCC(VT, N2.getOperand(1), getConstant(0, N2.getValueType()), Cond); - else if (N2.getOperand(1) == N1) - return getSetCC(VT, N2.getOperand(0), getConstant(0, N2.getValueType()), - Cond); + } else if (N2.getOperand(1) == N1) { + if (isCommutativeBinOp(N2.getOpcode())) { + return getSetCC(VT, N2.getOperand(0), + getConstant(0, N2.getValueType()), Cond); + } else { + assert(N2.getOpcode() == ISD::SUB && "Unexpected operation!"); + // X == (Z-X) --> X<<1 == Z + return getSetCC(VT, getNode(ISD::SHL, N2.getValueType(), N1, + getConstant(1, TLI.getShiftAmountTy())), + N2.getOperand(0), Cond); + } + } } } -- GitLab