diff --git a/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp b/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp index ef6ba2871815163614f959b17a3fc55b2b69782f..42980d61749721bfeac7b32457cb8942618d72d8 100644 --- a/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp +++ b/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp @@ -830,7 +830,7 @@ SystemZAsmParser::parseRegister(OperandVector &Operands, RegisterKind Kind) { } // Handle register names of the form % - if (Parser.getTok().is(AsmToken::Percent)) { + if (isParsingATT() && Parser.getTok().is(AsmToken::Percent)) { if (parseRegister(Reg)) return MatchOperand_ParseFail; @@ -912,6 +912,9 @@ SystemZAsmParser::parseAnyRegister(OperandVector &Operands) { Operands.push_back(SystemZOperand::createImm(Register, StartLoc, EndLoc)); } else { + if (isParsingHLASM()) + return MatchOperand_NoMatch; + Register Reg; if (parseRegister(Reg)) return MatchOperand_ParseFail; @@ -1019,7 +1022,7 @@ bool SystemZAsmParser::parseAddress(bool &HaveReg1, Register &Reg1, if (getLexer().is(AsmToken::LParen)) { Parser.Lex(); - if (getLexer().is(AsmToken::Percent)) { + if (isParsingATT() && getLexer().is(AsmToken::Percent)) { // Parse the first register. HaveReg1 = true; if (parseRegister(Reg1)) @@ -1062,7 +1065,7 @@ bool SystemZAsmParser::parseAddress(bool &HaveReg1, Register &Reg1, if (parseIntegerRegister(Reg2, RegGR)) return true; } else { - if (parseRegister(Reg2)) + if (isParsingATT() && parseRegister(Reg2)) return true; } } @@ -1419,7 +1422,7 @@ bool SystemZAsmParser::parseOperand(OperandVector &Operands, // a context-dependent parse routine, which gives the required register // class. The code is here to mop up other cases, like those where // the instruction isn't recognized. - if (Parser.getTok().is(AsmToken::Percent)) { + if (isParsingATT() && Parser.getTok().is(AsmToken::Percent)) { Register Reg; if (parseRegister(Reg)) return true;