From 3ed6a6f6cdea9777d0e0175e22cea04e2c0c6d43 Mon Sep 17 00:00:00 2001 From: Anirudh Prasad Date: Mon, 3 May 2021 11:42:39 -0400 Subject: [PATCH] [SystemZ][z/OS] Enforce prefix-less registers in SystemZAsmParser for the HLASM dialect. - Previously, https://reviews.llvm.org/D101308 removed prefixes from register while printing them out. This was especially needed for inline asm statements which used input/output operands. - However, the backend SystemZAsmParser, accepts both prefixed registers and prefix-less registers as part of its implementation - This patch aims to change that by ensuring that prefixed registers are only allowed for the ATT dialect. Reviewed By: uweigand Differential Revision: https://reviews.llvm.org/D101665 --- .../lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp b/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp index ef6ba2871815..42980d617497 100644 --- a/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp +++ b/llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp @@ -830,7 +830,7 @@ SystemZAsmParser::parseRegister(OperandVector &Operands, RegisterKind Kind) { } // Handle register names of the form % - if (Parser.getTok().is(AsmToken::Percent)) { + if (isParsingATT() && Parser.getTok().is(AsmToken::Percent)) { if (parseRegister(Reg)) return MatchOperand_ParseFail; @@ -912,6 +912,9 @@ SystemZAsmParser::parseAnyRegister(OperandVector &Operands) { Operands.push_back(SystemZOperand::createImm(Register, StartLoc, EndLoc)); } else { + if (isParsingHLASM()) + return MatchOperand_NoMatch; + Register Reg; if (parseRegister(Reg)) return MatchOperand_ParseFail; @@ -1019,7 +1022,7 @@ bool SystemZAsmParser::parseAddress(bool &HaveReg1, Register &Reg1, if (getLexer().is(AsmToken::LParen)) { Parser.Lex(); - if (getLexer().is(AsmToken::Percent)) { + if (isParsingATT() && getLexer().is(AsmToken::Percent)) { // Parse the first register. HaveReg1 = true; if (parseRegister(Reg1)) @@ -1062,7 +1065,7 @@ bool SystemZAsmParser::parseAddress(bool &HaveReg1, Register &Reg1, if (parseIntegerRegister(Reg2, RegGR)) return true; } else { - if (parseRegister(Reg2)) + if (isParsingATT() && parseRegister(Reg2)) return true; } } @@ -1419,7 +1422,7 @@ bool SystemZAsmParser::parseOperand(OperandVector &Operands, // a context-dependent parse routine, which gives the required register // class. The code is here to mop up other cases, like those where // the instruction isn't recognized. - if (Parser.getTok().is(AsmToken::Percent)) { + if (isParsingATT() && Parser.getTok().is(AsmToken::Percent)) { Register Reg; if (parseRegister(Reg)) return true; -- GitLab