diff --git a/llvm/lib/Target/CellSPU/SPUInstrFormats.td b/llvm/lib/Target/CellSPU/SPUInstrFormats.td
index 2ef79ba4981dd63ac2e4a2abecdde02dc95bb8cc..7221ab2dc8ed660ec1e24b0d758a258fa2af5d2b 100644
--- a/llvm/lib/Target/CellSPU/SPUInstrFormats.td
+++ b/llvm/lib/Target/CellSPU/SPUInstrFormats.td
@@ -18,7 +18,6 @@ class I<dag OOL, dag IOL, string asmstr, InstrItinClass itin>
         : Instruction {
   field bits<32> Inst;
 
-  let Name = "";
   let Namespace = "SPU";
   let OutOperandList = OOL;
   let InOperandList = IOL;
diff --git a/llvm/lib/Target/PowerPC/PPCInstrFormats.td b/llvm/lib/Target/PowerPC/PPCInstrFormats.td
index 5958e1cb9a148b2e13965f6b722f8142b00ce047..0355d950ded7d64d1c1c3e2ca1d5273282df5642 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrFormats.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrFormats.td
@@ -17,7 +17,6 @@ class I<bits<6> opcode, dag OOL, dag IOL, string asmstr, InstrItinClass itin>
 
   bit PPC64 = 0;  // Default value, override with isPPC64
 
-  let Name = "";
   let Namespace = "PPC";
   let Inst{0-5} = opcode;
   let OutOperandList = OOL;