From 7706107e6f6e17dfa8e1f2d85c44cd7430c32e52 Mon Sep 17 00:00:00 2001 From: Justin Holewinski Date: Tue, 21 Jan 2014 14:40:05 +0000 Subject: [PATCH] [NVPTX] Add missing patterns for div.approx with immediate denominator llvm-svn: 199746 --- llvm/lib/Target/NVPTX/NVPTXInstrInfo.td | 12 ++++++++++++ llvm/test/CodeGen/NVPTX/div-ri.ll | 8 ++++++++ 2 files changed, 20 insertions(+) create mode 100644 llvm/test/CodeGen/NVPTX/div-ri.ll diff --git a/llvm/lib/Target/NVPTX/NVPTXInstrInfo.td b/llvm/lib/Target/NVPTX/NVPTXInstrInfo.td index b23f1e4b458d..fbcd0e4a358f 100644 --- a/llvm/lib/Target/NVPTX/NVPTXInstrInfo.td +++ b/llvm/lib/Target/NVPTX/NVPTXInstrInfo.td @@ -689,12 +689,24 @@ def FDIV32approxrr_ftz : NVPTXInst<(outs Float32Regs:$dst), [(set Float32Regs:$dst, (fdiv Float32Regs:$a, Float32Regs:$b))]>, Requires<[do_DIVF32_APPROX, doF32FTZ]>; +def FDIV32approxri_ftz : NVPTXInst<(outs Float32Regs:$dst), + (ins Float32Regs:$a, f32imm:$b), + "div.approx.ftz.f32 \t$dst, $a, $b;", + [(set Float32Regs:$dst, + (fdiv Float32Regs:$a, fpimm:$b))]>, + Requires<[do_DIVF32_APPROX, doF32FTZ]>; def FDIV32approxrr : NVPTXInst<(outs Float32Regs:$dst), (ins Float32Regs:$a, Float32Regs:$b), "div.approx.f32 \t$dst, $a, $b;", [(set Float32Regs:$dst, (fdiv Float32Regs:$a, Float32Regs:$b))]>, Requires<[do_DIVF32_APPROX]>; +def FDIV32approxri : NVPTXInst<(outs Float32Regs:$dst), + (ins Float32Regs:$a, f32imm:$b), + "div.approx.f32 \t$dst, $a, $b;", + [(set Float32Regs:$dst, + (fdiv Float32Regs:$a, fpimm:$b))]>, + Requires<[do_DIVF32_APPROX]>; // // F32 Semi-accurate reciprocal // diff --git a/llvm/test/CodeGen/NVPTX/div-ri.ll b/llvm/test/CodeGen/NVPTX/div-ri.ll new file mode 100644 index 000000000000..7f796e0239fc --- /dev/null +++ b/llvm/test/CodeGen/NVPTX/div-ri.ll @@ -0,0 +1,8 @@ +; RUN: llc < %s -march=nvptx -mcpu=sm_20 -nvptx-prec-divf32=0 | FileCheck %s + +define float @foo(float %a) { +; CHECK: div.approx.f32 + %div = fdiv float %a, 13.0 + ret float %div +} + -- GitLab