From c54c5cbe67a26065923d013f19ce094dc0f7eddc Mon Sep 17 00:00:00 2001 From: Coby Tayree Date: Mon, 21 Aug 2017 07:50:15 +0000 Subject: [PATCH] [X86] Allow xacquire/xrelease prefixes Allow those prefixes on assembly code Differential Revision: https://reviews.llvm.org/D36845 llvm-svn: 311309 --- .../lib/Target/X86/AsmParser/X86AsmParser.cpp | 20 ++++++++++++++----- llvm/lib/Target/X86/X86InstrInfo.td | 4 ++++ llvm/test/MC/X86/intel-syntax-encoding.s | 9 +++++++++ llvm/test/MC/X86/x86-64.s | 15 ++++++++++++++ 4 files changed, 43 insertions(+), 5 deletions(-) diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp index 881d35eb892e..d9eeeece1d91 100644 --- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp +++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp @@ -2457,11 +2457,21 @@ bool X86AsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name, Operands.push_back(X86Operand::CreateToken(PatchedName, NameLoc)); // Determine whether this is an instruction prefix. - bool isPrefix = - Name == "lock" || Name == "rep" || - Name == "repe" || Name == "repz" || - Name == "repne" || Name == "repnz" || - Name == "rex64" || Name == "data16" || Name == "data32"; + // FIXME: + // Enhace prefixes integrity robustness. for example, following forms + // are currently tolerated: + // repz repnz ; GAS errors for the use of two similar prefixes + // lock addq %rax, %rbx ; Destination operand must be of memory type + // xacquire ; xacquire must be accompanied by 'lock' + bool isPrefix = StringSwitch(Name) + .Cases("lock", + "rep", "repe", + "repz", "repne", + "repnz", "rex64", + "data32", "data16", true) + .Cases("xacquire", "xrelease", true) + .Cases("acquire", "release", isParsingIntelSyntax()) + .Default(false); bool CurlyAsEndOfStatement = false; // This does the actual operand parsing. Don't parse any more if we have a diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 1fc174750c79..2972de2e4483 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -2848,6 +2848,10 @@ def : MnemonicAlias<"smovq", "movsq", "att">; def : MnemonicAlias<"ud2a", "ud2", "att">; def : MnemonicAlias<"verrw", "verr", "att">; +// MS recognizes 'xacquire'/'xrelease' as 'acquire'/'release' +def : MnemonicAlias<"acquire", "xacquire", "intel">; +def : MnemonicAlias<"release", "xrelease", "intel">; + // System instruction aliases. def : MnemonicAlias<"iret", "iretw", "att">, Requires<[In16BitMode]>; def : MnemonicAlias<"iret", "iretl", "att">, Requires<[Not16BitMode]>; diff --git a/llvm/test/MC/X86/intel-syntax-encoding.s b/llvm/test/MC/X86/intel-syntax-encoding.s index 9907cfe6f75d..e6ddc87f5581 100644 --- a/llvm/test/MC/X86/intel-syntax-encoding.s +++ b/llvm/test/MC/X86/intel-syntax-encoding.s @@ -52,6 +52,15 @@ // CHECK: encoding: [0x48,0x83,0xf8,0xf4] cmp rax, -12 + acquire lock add [rax], rax +// CHECK: encoding: [0xf2] +// CHECK: encoding: [0xf0] +// CHECK: encoding: [0x48,0x01,0x00] + release lock add [rax], rax +// CHECK: encoding: [0xf3] +// CHECK: encoding: [0xf0] +// CHECK: encoding: [0x48,0x01,0x00] + LBB0_3: // CHECK: encoding: [0xeb,A] jmp LBB0_3 diff --git a/llvm/test/MC/X86/x86-64.s b/llvm/test/MC/X86/x86-64.s index 3d7ab87f5eac..1fe17831e7ea 100644 --- a/llvm/test/MC/X86/x86-64.s +++ b/llvm/test/MC/X86/x86-64.s @@ -930,6 +930,21 @@ lock xorq %rsi, (%rdi) // CHECK: xorq %rsi, (%rdi) // CHECK: encoding: [0x48,0x31,0x37] +xacquire lock addq %rax, (%rax) +// CHECK: xacquire +// CHECK: encoding: [0xf2] +// CHECK: lock +// CHECK: encoding: [0xf0] +// CHECK: addq %rax, (%rax) +// CHECK: encoding: [0x48,0x01,0x00] + +xrelease lock addq %rax, (%rax) +// CHECK: xrelease +// CHECK: encoding: [0xf3] +// CHECK: lock +// CHECK: encoding: [0xf0] +// CHECK: addq %rax, (%rax) +// CHECK: encoding: [0x48,0x01,0x00] // rdar://8033482 rep movsl -- GitLab