From e20b07b021e7a83208ab5ea92cff0dfd3644d144 Mon Sep 17 00:00:00 2001 From: Victor Huang Date: Thu, 23 Apr 2020 10:24:38 -0500 Subject: [PATCH] [PowerPC][Future] Add missing changes for PC Realtive addressing 1. Use Subtarget.isUsingPCRelativeCalls() in LowerConstantPool to check if using PCRelative addressing. 2. Change MO_GOT_FLAG = 32 to MO_GOT_FLAG = 8 in PPC.h to use consecutive bits. Differential Revision: https://reviews.llvm.org/D78406 --- llvm/lib/Target/PowerPC/PPC.h | 2 +- llvm/lib/Target/PowerPC/PPCISelLowering.cpp | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/PowerPC/PPC.h b/llvm/lib/Target/PowerPC/PPC.h index 815c67286a2c..7e0aa2c6061d 100644 --- a/llvm/lib/Target/PowerPC/PPC.h +++ b/llvm/lib/Target/PowerPC/PPC.h @@ -105,7 +105,7 @@ namespace llvm { /// MO_GOT_FLAG - If this bit is set the symbol reference is to be computed /// via the GOT. For example when combined with the MO_PCREL_FLAG it should /// produce the relocation @got@pcrel. Fixup is VK_PPC_GOT_PCREL. - MO_GOT_FLAG = 32, + MO_GOT_FLAG = 8, /// The next are not flags but distinct values. MO_ACCESS_MASK = 0xf00, diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp index 2922d90472ec..7df040776cfc 100644 --- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp @@ -2814,7 +2814,7 @@ SDValue PPCTargetLowering::LowerConstantPool(SDValue Op, // 64-bit SVR4 ABI and AIX ABI code are always position-independent. // The actual address of the GlobalValue is stored in the TOC. if (Subtarget.is64BitELFABI() || Subtarget.isAIXABI()) { - if (Subtarget.hasPCRelativeMemops()) { + if (Subtarget.isUsingPCRelativeCalls()) { SDLoc DL(CP); EVT Ty = getPointerTy(DAG.getDataLayout()); SDValue ConstPool = DAG.getTargetConstantPool(C, Ty, -- GitLab