diff --git a/llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp b/llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
index 6aebcb5f8417d0da076611fe6b46bf76a457f6f1..26424ef7e107985fcf207051bc840e2b813bf736 100644
--- a/llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
+++ b/llvm/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp
@@ -26,6 +26,7 @@
 #include "RegAllocCommon.h"
 #include "RegClass.h"
 #include "../LiveVar/FunctionLiveVarInfo.h"
+#include "../SparcV9InstrInfo.h"
 #include "llvm/Constants.h"
 #include "llvm/DerivedTypes.h"
 #include "llvm/iPHINode.h"
@@ -550,7 +551,7 @@ void PhyRegAlloc::updateMachineCode()
               // instruction out of the delay slot). On cond2 we need
               // to insert a nop in place of the moved instruction
               if (cond2) {
-                MBB.insert(MII, BuildMI(TM.getInstrInfo()->getNOPOpCode(),1));
+                MBB.insert(MII, BuildMI(V9::NOP, 1));
               }
             }
           else {
diff --git a/llvm/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp b/llvm/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp
index d80a543b476c9495755d6547619f4f3d6d8ccc99..0b7baabb8d34cbe90cb1599c655851f8238eb935 100644
--- a/llvm/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp
+++ b/llvm/lib/Target/SparcV9/SparcV9PeepholeOpts.cpp
@@ -39,7 +39,7 @@ DeleteInstruction(MachineBasicBlock& mvec,
         // to update the I-I maps.
         // 
         assert(ndelay == 1 && "Not yet handling multiple-delay-slot targets");
-        BBI->replace(mii.getNOPOpCode(), 0);
+        BBI->replace(V9::NOP, 0);
         return;
       }
   }