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//===-- LiveIntervalAnalysis.cpp - Live Interval Analysis -----------------===//
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//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
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//
//===----------------------------------------------------------------------===//
//
// This file implements the LiveInterval analysis pass which is used
// by the Linear Scan Register allocator. This pass linearizes the
// basic blocks of the function in DFS order and uses the
// LiveVariables pass to conservatively compute live intervals for
// each virtual and physical register.
//
//===----------------------------------------------------------------------===//
#define DEBUG_TYPE "liveintervals"
#include "llvm/CodeGen/LiveIntervalAnalysis.h"
#include "VirtRegMap.h"
#include "llvm/Value.h"
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#include "llvm/Analysis/AliasAnalysis.h"
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#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/ADT/STLExtras.h"
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using namespace llvm;
// Hidden options for help debugging.
static cl::opt<bool> DisableReMat("disable-rematerialization",
cl::init(false), cl::Hidden);
static cl::opt<bool> SplitAtBB("split-intervals-at-bb",
cl::init(true), cl::Hidden);
static cl::opt<int> SplitLimit("split-limit",
cl::init(-1), cl::Hidden);
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static cl::opt<bool> EnableAggressiveRemat("aggressive-remat", cl::Hidden);
static cl::opt<bool> EnableFastSpilling("fast-spill",
cl::init(false), cl::Hidden);
STATISTIC(numIntervals, "Number of original intervals");
STATISTIC(numFolds , "Number of loads/stores folded into instructions");
STATISTIC(numSplits , "Number of intervals split");
static RegisterPass<LiveIntervals> X("liveintervals", "Live Interval Analysis");
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void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<AliasAnalysis>();
AU.addPreserved<AliasAnalysis>();
AU.addPreserved<LiveVariables>();
AU.addPreservedID(MachineLoopInfoID);
AU.addPreservedID(MachineDominatorsID);
if (!StrongPHIElim) {
AU.addPreservedID(PHIEliminationID);
AU.addRequiredID(PHIEliminationID);
}
AU.addRequiredID(TwoAddressInstructionPassID);
MachineFunctionPass::getAnalysisUsage(AU);
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}
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void LiveIntervals::releaseMemory() {
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// Free the live intervals themselves.
for (DenseMap<unsigned, LiveInterval*>::iterator I = r2iMap_.begin(),
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E = r2iMap_.end(); I != E; ++I)
delete I->second;
mi2iMap_.clear();
i2miMap_.clear();
r2iMap_.clear();
// Release VNInfo memroy regions after all VNInfo objects are dtor'd.
VNInfoAllocator.Reset();
while (!ClonedMIs.empty()) {
MachineInstr *MI = ClonedMIs.back();
ClonedMIs.pop_back();
mf_->DeleteMachineInstr(MI);
}
}
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void LiveIntervals::computeNumbering() {
Index2MiMap OldI2MI = i2miMap_;
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std::vector<IdxMBBPair> OldI2MBB = Idx2MBBMap;
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Idx2MBBMap.clear();
MBB2IdxMap.clear();
mi2iMap_.clear();
i2miMap_.clear();
FunctionSize = 0;
// Number MachineInstrs and MachineBasicBlocks.
// Initialize MBB indexes to a sentinal.
MBB2IdxMap.resize(mf_->getNumBlockIDs(), std::make_pair(~0U,~0U));
unsigned MIIndex = 0;
for (MachineFunction::iterator MBB = mf_->begin(), E = mf_->end();
MBB != E; ++MBB) {
unsigned StartIdx = MIIndex;
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// Insert an empty slot at the beginning of each block.
MIIndex += InstrSlots::NUM;
i2miMap_.push_back(0);
for (MachineBasicBlock::iterator I = MBB->begin(), E = MBB->end();
I != E; ++I) {
bool inserted = mi2iMap_.insert(std::make_pair(I, MIIndex)).second;
assert(inserted && "multiple MachineInstr -> index mappings");
i2miMap_.push_back(I);
MIIndex += InstrSlots::NUM;
FunctionSize++;
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// Insert max(1, numdefs) empty slots after every instruction.
unsigned Slots = I->getDesc().getNumDefs();
if (Slots == 0)
Slots = 1;
MIIndex += InstrSlots::NUM * Slots;
while (Slots--)
i2miMap_.push_back(0);
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// Set the MBB2IdxMap entry for this MBB.
MBB2IdxMap[MBB->getNumber()] = std::make_pair(StartIdx, MIIndex - 1);
Idx2MBBMap.push_back(std::make_pair(StartIdx, MBB));
}
std::sort(Idx2MBBMap.begin(), Idx2MBBMap.end(), Idx2MBBCompare());
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if (!OldI2MI.empty())
for (iterator OI = begin(), OE = end(); OI != OE; ++OI) {
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for (LiveInterval::iterator LI = OI->second->begin(),
LE = OI->second->end(); LI != LE; ++LI) {
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// Remap the start index of the live range to the corresponding new
// number, or our best guess at what it _should_ correspond to if the
// original instruction has been erased. This is either the following
// instruction or its predecessor.
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unsigned index = LI->start / InstrSlots::NUM;
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unsigned offset = LI->start % InstrSlots::NUM;
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if (offset == InstrSlots::LOAD) {
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std::vector<IdxMBBPair>::const_iterator I =
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std::lower_bound(OldI2MBB.begin(), OldI2MBB.end(), LI->start);
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// Take the pair containing the index
std::vector<IdxMBBPair>::const_iterator J =
(I == OldI2MBB.end() && OldI2MBB.size()>0) ? (I-1): I;
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LI->start = getMBBStartIdx(J->second);
} else {
LI->start = mi2iMap_[OldI2MI[index]] + offset;
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}
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// Remap the ending index in the same way that we remapped the start,
// except for the final step where we always map to the immediately
// following instruction.
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index = (LI->end - 1) / InstrSlots::NUM;
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offset = LI->end % InstrSlots::NUM;
if (offset == InstrSlots::LOAD) {
// VReg dies at end of block.
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std::vector<IdxMBBPair>::const_iterator I =
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std::lower_bound(OldI2MBB.begin(), OldI2MBB.end(), LI->end);
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LI->end = getMBBEndIdx(I->second) + 1;
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} else {
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unsigned idx = index;
while (index < OldI2MI.size() && !OldI2MI[index]) ++index;
if (index != OldI2MI.size())
LI->end = mi2iMap_[OldI2MI[index]] + (idx == index ? offset : 0);
else
LI->end = InstrSlots::NUM * i2miMap_.size();
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}
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for (LiveInterval::vni_iterator VNI = OI->second->vni_begin(),
VNE = OI->second->vni_end(); VNI != VNE; ++VNI) {
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// Remap the VNInfo def index, which works the same as the
// start indices above. VN's with special sentinel defs
// don't need to be remapped.
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