From 388fc4d9fb47fa0625840612136f92397f49d8f2 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 17 Mar 2006 17:27:47 +0000 Subject: [PATCH] Disable x86 fastcc from passing args in registers llvm-svn: 26824 --- llvm/lib/Target/X86/X86ISelLowering.cpp | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 7374855c4abc..c17795f39439 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -639,12 +639,24 @@ static unsigned AddLiveIn(MachineFunction &MF, unsigned PReg, return VReg; } -enum { - // FASTCC_NUM_INT_ARGS_INREGS - This is the max number of integer arguments - // to pass in registers. 0 is none, 1 is is "use EAX", 2 is "use EAX and - // EDX". Anything more is illegal. - FASTCC_NUM_INT_ARGS_INREGS = 2 -}; +// FASTCC_NUM_INT_ARGS_INREGS - This is the max number of integer arguments +// to pass in registers. 0 is none, 1 is is "use EAX", 2 is "use EAX and +// EDX". Anything more is illegal. +// +// FIXME: The linscan register allocator currently has problem with +// coallescing. At the time of this writing, whenever it decides to coallesce +// a physreg with a virtreg, this increases the size of the physreg's live +// range, and the live range cannot ever be reduced. This causes problems if +// too many physregs are coalleced with virtregs, which can cause the register +// allocator to wedge itself. +// +// This code triggers this problem more often if we pass args in registers, +// so disable it until this is fixed. +// +// NOTE: this isn't marked const, so that GCC doesn't emit annoying warnings +// about code being dead. +// +static unsigned FASTCC_NUM_INT_ARGS_INREGS = 0; std::vector -- GitLab