diff --git a/llvm/lib/Target/Sparc/Makefile b/llvm/lib/Target/Sparc/Makefile index cff2c0c5b121c071b644eebd8adf811727c1d0a8..c530fa6f22fad1cce4e3e637033555448ccb781e 100644 --- a/llvm/lib/Target/Sparc/Makefile +++ b/llvm/lib/Target/Sparc/Makefile @@ -48,7 +48,7 @@ TARGET_NAME := SparcV9 TABLEGEN_FILES := $(wildcard *.td) -$(TARGET_NAME)CodeEmitter.inc: $(TABLEGEN_FILES) $(TBLGEN) +$(TARGET_NAME)CodeEmitter.inc:: $(TABLEGEN_FILES) $(TBLGEN) $(TBLGEN) $(TARGET_NAME).td -gen-emitter -o $@ clean:: diff --git a/llvm/lib/Target/X86/Makefile b/llvm/lib/Target/X86/Makefile index ee4cf8c85cc8a908a8529d9983fceebf11dcf765..a6bd3000d8530fa84294fe5def1b114f0303eb22 100644 --- a/llvm/lib/Target/X86/Makefile +++ b/llvm/lib/Target/X86/Makefile @@ -7,22 +7,22 @@ $(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \ X86GenRegisterInfo.inc X86GenInstrNames.inc \ X86GenInstrInfo.inc X86GenInstrSelector.inc -X86GenRegisterNames.inc: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN) +X86GenRegisterNames.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN) $(TBLGEN) $< -gen-register-enums -o $@ -X86GenRegisterInfo.h.inc: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN) +X86GenRegisterInfo.h.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN) $(TBLGEN) $< -gen-register-desc-header -o $@ -X86GenRegisterInfo.inc: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN) +X86GenRegisterInfo.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN) $(TBLGEN) $< -gen-register-desc -o $@ -X86GenInstrNames.inc: X86.td X86InstrInfo.td ../Target.td $(TBLGEN) +X86GenInstrNames.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN) $(TBLGEN) $< -gen-instr-enums -o $@ -X86GenInstrInfo.inc: X86.td X86InstrInfo.td ../Target.td $(TBLGEN) +X86GenInstrInfo.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN) $(TBLGEN) $< -gen-instr-desc -o $@ -X86GenInstrSelector.inc: X86.td X86InstrInfo.td ../Target.td $(TBLGEN) +X86GenInstrSelector.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN) $(TBLGEN) $< -gen-instr-selector -o $@ clean::