From 43450cb07558f4e743d828d8685b0b3c9f25da59 Mon Sep 17 00:00:00 2001
From: Chris Lattner <sabre@nondot.org>
Date: Thu, 21 Aug 2003 20:37:17 +0000
Subject: [PATCH] Change all #include'd files to be :: rules instead of : rules

llvm-svn: 8019
---
 llvm/lib/Target/Sparc/Makefile |  2 +-
 llvm/lib/Target/X86/Makefile   | 12 ++++++------
 2 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/llvm/lib/Target/Sparc/Makefile b/llvm/lib/Target/Sparc/Makefile
index cff2c0c5b121..c530fa6f22fa 100644
--- a/llvm/lib/Target/Sparc/Makefile
+++ b/llvm/lib/Target/Sparc/Makefile
@@ -48,7 +48,7 @@ TARGET_NAME := SparcV9
 
 TABLEGEN_FILES := $(wildcard *.td)
 
-$(TARGET_NAME)CodeEmitter.inc: $(TABLEGEN_FILES) $(TBLGEN)
+$(TARGET_NAME)CodeEmitter.inc:: $(TABLEGEN_FILES) $(TBLGEN)
 	$(TBLGEN) $(TARGET_NAME).td -gen-emitter -o $@
 
 clean::
diff --git a/llvm/lib/Target/X86/Makefile b/llvm/lib/Target/X86/Makefile
index ee4cf8c85cc8..a6bd3000d853 100644
--- a/llvm/lib/Target/X86/Makefile
+++ b/llvm/lib/Target/X86/Makefile
@@ -7,22 +7,22 @@ $(SourceDepend): X86GenRegisterInfo.h.inc X86GenRegisterNames.inc \
                  X86GenRegisterInfo.inc X86GenInstrNames.inc \
                  X86GenInstrInfo.inc X86GenInstrSelector.inc
 
-X86GenRegisterNames.inc:  X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
+X86GenRegisterNames.inc::  X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
 	$(TBLGEN) $< -gen-register-enums -o $@
 
-X86GenRegisterInfo.h.inc: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
+X86GenRegisterInfo.h.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
 	$(TBLGEN) $< -gen-register-desc-header -o $@
 
-X86GenRegisterInfo.inc: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
+X86GenRegisterInfo.inc:: X86.td X86RegisterInfo.td ../Target.td $(TBLGEN)
 	$(TBLGEN) $< -gen-register-desc -o $@
 
-X86GenInstrNames.inc: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
+X86GenInstrNames.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
 	$(TBLGEN) $< -gen-instr-enums -o $@
 
-X86GenInstrInfo.inc: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
+X86GenInstrInfo.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
 	$(TBLGEN) $< -gen-instr-desc -o $@
 
-X86GenInstrSelector.inc: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
+X86GenInstrSelector.inc:: X86.td X86InstrInfo.td ../Target.td $(TBLGEN)
 	$(TBLGEN) $< -gen-instr-selector -o $@
 
 clean::
-- 
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