From 4aff52bf3d6710759a6053a75eaad39acdf9afae Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Tue, 17 Apr 2007 22:53:02 +0000 Subject: [PATCH] Fix a bug in my previous patch, grabbing the shift amount width from the wrong operand. llvm-svn: 36223 --- llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp index 3da06f997498..ff27b123180d 100644 --- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp @@ -581,7 +581,7 @@ bool TargetLowering::SimplifyDemandedBits(SDOperand Op, uint64_t DemandedMask, } SDOperand NewSA = - TLO.DAG.getConstant(ShAmt-C1, Op.getOperand(0).getValueType()); + TLO.DAG.getConstant(ShAmt-C1, Op.getOperand(1).getValueType()); MVT::ValueType VT = Op.getValueType(); return TLO.CombineTo(Op, TLO.DAG.getNode(ISD::SRL, VT, InOp.getOperand(0), NewSA)); @@ -619,7 +619,7 @@ bool TargetLowering::SimplifyDemandedBits(SDOperand Op, uint64_t DemandedMask, } SDOperand NewSA = - TLO.DAG.getConstant(Diff, Op.getOperand(0).getValueType()); + TLO.DAG.getConstant(Diff, Op.getOperand(1).getValueType()); return TLO.CombineTo(Op, TLO.DAG.getNode(Opc, VT, InOp.getOperand(0), NewSA)); } -- GitLab