diff --git a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
index ddf445d7a94c7ee1ba8efb2e91b170f1673f6f56..02d07fa08c6177a52c18da9811c9351e87636379 100644
--- a/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
+++ b/llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
@@ -362,6 +362,7 @@ void ScheduleDAGInstrs::addVRegDefDeps(SUnit *SU, unsigned OperIdx) {
   unsigned Reg = MI->getOperand(OperIdx).getReg();
 
   // SSA defs do not have output/anti dependencies.
+  // The current operand is a def, so we have at least one.
   if (llvm::next(MRI.def_begin(Reg)) == MRI.def_end())
     return;