diff --git a/llvm/lib/Target/Mips/MipsRegisterInfo.cpp b/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
index 94e84d764de4200da93b0e97bbab2982f6c8d570..c12b3560ee6319bdcfd536f9b946699f74db549d 100644
--- a/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsRegisterInfo.cpp
@@ -132,11 +132,6 @@ getReservedRegs(const MachineFunction &MF) const {
   Reserved.set(Mips::F31);
   Reserved.set(Mips::D15);
 
-  // SRV4 requires that odd register can't be used.
-  if (!Subtarget.isSingleFloat() && !Subtarget.isMips32())
-    for (unsigned FReg=(Mips::F0)+1; FReg < Mips::F30; FReg+=2)
-      Reserved.set(FReg);
-
   return Reserved;
 }