From 9d5f9278e3777b35f700bacfc59dcd70ca5036fd Mon Sep 17 00:00:00 2001 From: Akira Hatanaka Date: Fri, 9 Sep 2011 21:31:46 +0000 Subject: [PATCH] Mips32 does not reserve even-numbered floating point registers. llvm-svn: 139412 --- llvm/lib/Target/Mips/MipsRegisterInfo.cpp | 5 ----- 1 file changed, 5 deletions(-) diff --git a/llvm/lib/Target/Mips/MipsRegisterInfo.cpp b/llvm/lib/Target/Mips/MipsRegisterInfo.cpp index 94e84d764de4..c12b3560ee63 100644 --- a/llvm/lib/Target/Mips/MipsRegisterInfo.cpp +++ b/llvm/lib/Target/Mips/MipsRegisterInfo.cpp @@ -132,11 +132,6 @@ getReservedRegs(const MachineFunction &MF) const { Reserved.set(Mips::F31); Reserved.set(Mips::D15); - // SRV4 requires that odd register can't be used. - if (!Subtarget.isSingleFloat() && !Subtarget.isMips32()) - for (unsigned FReg=(Mips::F0)+1; FReg < Mips::F30; FReg+=2) - Reserved.set(FReg); - return Reserved; } -- GitLab