diff --git a/llvm/lib/CodeGen/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter.cpp index 5bbcaee339bc24d93fb7dd4ad6b4de59b7118e28..3f4bfd774d044a9aa62230c8a2a42491e72d78fa 100644 --- a/llvm/lib/CodeGen/AsmPrinter.cpp +++ b/llvm/lib/CodeGen/AsmPrinter.cpp @@ -607,7 +607,7 @@ void AsmPrinter::EmitGlobalConstant(const Constant *CV) { << "\t" << TAI->getCommentString() << " float " << Val << "\n"; return; } - } else if (CV->getType() == Type::ULongTy || CV->getType() == Type::LongTy) { + } else if (CV->getType() == Type::Int64Ty) { if (const ConstantInt *CI = dyn_cast(CV)) { uint64_t Val = CI->getZExtValue(); @@ -918,10 +918,10 @@ void AsmPrinter::printDataDirective(const Type *type) { const TargetData *TD = TM.getTargetData(); switch (type->getTypeID()) { case Type::BoolTyID: - case Type::UByteTyID: case Type::SByteTyID: + case Type::Int8TyID: O << TAI->getData8bitsDirective(); break; - case Type::UShortTyID: case Type::ShortTyID: + case Type::Int16TyID: O << TAI->getData16bitsDirective(); break; case Type::PointerTyID: @@ -932,10 +932,10 @@ void AsmPrinter::printDataDirective(const Type *type) { break; } //Fall through for pointer size == int size - case Type::UIntTyID: case Type::IntTyID: + case Type::Int32TyID: O << TAI->getData32bitsDirective(); break; - case Type::ULongTyID: case Type::LongTyID: + case Type::Int64TyID: assert(TAI->getData64bitsDirective() && "Target cannot handle 64-bit constant exprs!"); O << TAI->getData64bitsDirective(); diff --git a/llvm/lib/CodeGen/IntrinsicLowering.cpp b/llvm/lib/CodeGen/IntrinsicLowering.cpp index d6c79ad19ba6c04389bee35b0a88b0b728ac0115..41d48d947e5d977a32ab21f175841dae58e95e72 100644 --- a/llvm/lib/CodeGen/IntrinsicLowering.cpp +++ b/llvm/lib/CodeGen/IntrinsicLowering.cpp @@ -95,7 +95,7 @@ void IntrinsicLowering::AddPrototypes(Module &M) { default: break; case Intrinsic::setjmp: EnsureFunctionExists(M, "setjmp", I->arg_begin(), I->arg_end(), - Type::IntTy); + Type::Int32Ty); break; case Intrinsic::longjmp: EnsureFunctionExists(M, "longjmp", I->arg_begin(), I->arg_end(), @@ -117,9 +117,9 @@ void IntrinsicLowering::AddPrototypes(Module &M) { break; case Intrinsic::memset_i32: case Intrinsic::memset_i64: - M.getOrInsertFunction("memset", PointerType::get(Type::SByteTy), - PointerType::get(Type::SByteTy), - Type::IntTy, (--(--I->arg_end()))->getType(), + M.getOrInsertFunction("memset", PointerType::get(Type::Int8Ty), + PointerType::get(Type::Int8Ty), + Type::Int32Ty, (--(--I->arg_end()))->getType(), (Type *)0); break; case Intrinsic::isunordered_f32: @@ -150,26 +150,26 @@ static Value *LowerBSWAP(Value *V, Instruction *IP) { default: assert(0 && "Unhandled type size of value to byteswap!"); case 16: { Value *Tmp1 = new ShiftInst(Instruction::Shl, V, - ConstantInt::get(Type::UByteTy,8),"bswap.2",IP); + ConstantInt::get(Type::Int8Ty,8),"bswap.2",IP); Value *Tmp2 = new ShiftInst(Instruction::LShr, V, - ConstantInt::get(Type::UByteTy,8),"bswap.1",IP); + ConstantInt::get(Type::Int8Ty,8),"bswap.1",IP); V = BinaryOperator::createOr(Tmp1, Tmp2, "bswap.i16", IP); break; } case 32: { Value *Tmp4 = new ShiftInst(Instruction::Shl, V, - ConstantInt::get(Type::UByteTy,24),"bswap.4", IP); + ConstantInt::get(Type::Int8Ty,24),"bswap.4", IP); Value *Tmp3 = new ShiftInst(Instruction::Shl, V, - ConstantInt::get(Type::UByteTy,8),"bswap.3",IP); + ConstantInt::get(Type::Int8Ty,8),"bswap.3",IP); Value *Tmp2 = new ShiftInst(Instruction::LShr, V, - ConstantInt::get(Type::UByteTy,8),"bswap.2",IP); + ConstantInt::get(Type::Int8Ty,8),"bswap.2",IP); Value *Tmp1 = new ShiftInst(Instruction::LShr, V, - ConstantInt::get(Type::UByteTy,24),"bswap.1", IP); + ConstantInt::get(Type::Int8Ty,24),"bswap.1", IP); Tmp3 = BinaryOperator::createAnd(Tmp3, - ConstantInt::get(Type::UIntTy, 0xFF0000), + ConstantInt::get(Type::Int32Ty, 0xFF0000), "bswap.and3", IP); Tmp2 = BinaryOperator::createAnd(Tmp2, - ConstantInt::get(Type::UIntTy, 0xFF00), + ConstantInt::get(Type::Int32Ty, 0xFF00), "bswap.and2", IP); Tmp4 = BinaryOperator::createOr(Tmp4, Tmp3, "bswap.or1", IP); Tmp2 = BinaryOperator::createOr(Tmp2, Tmp1, "bswap.or2", IP); @@ -178,39 +178,39 @@ static Value *LowerBSWAP(Value *V, Instruction *IP) { } case 64: { Value *Tmp8 = new ShiftInst(Instruction::Shl, V, - ConstantInt::get(Type::UByteTy,56),"bswap.8", IP); + ConstantInt::get(Type::Int8Ty,56),"bswap.8", IP); Value *Tmp7 = new ShiftInst(Instruction::Shl, V, - ConstantInt::get(Type::UByteTy,40),"bswap.7", IP); + ConstantInt::get(Type::Int8Ty,40),"bswap.7", IP); Value *Tmp6 = new ShiftInst(Instruction::Shl, V, - ConstantInt::get(Type::UByteTy,24),"bswap.6", IP); + ConstantInt::get(Type::Int8Ty,24),"bswap.6", IP); Value *Tmp5 = new ShiftInst(Instruction::Shl, V, - ConstantInt::get(Type::UByteTy,8),"bswap.5", IP); + ConstantInt::get(Type::Int8Ty,8),"bswap.5", IP); Value* Tmp4 = new ShiftInst(Instruction::LShr, V, - ConstantInt::get(Type::UByteTy,8),"bswap.4", IP); + ConstantInt::get(Type::Int8Ty,8),"bswap.4", IP); Value* Tmp3 = new ShiftInst(Instruction::LShr, V, - ConstantInt::get(Type::UByteTy,24),"bswap.3", IP); + ConstantInt::get(Type::Int8Ty,24),"bswap.3", IP); Value* Tmp2 = new ShiftInst(Instruction::LShr, V, - ConstantInt::get(Type::UByteTy,40),"bswap.2", IP); + ConstantInt::get(Type::Int8Ty,40),"bswap.2", IP); Value* Tmp1 = new ShiftInst(Instruction::LShr, V, - ConstantInt::get(Type::UByteTy,56),"bswap.1", IP); + ConstantInt::get(Type::Int8Ty,56),"bswap.1", IP); Tmp7 = BinaryOperator::createAnd(Tmp7, - ConstantInt::get(Type::ULongTy, + ConstantInt::get(Type::Int64Ty, 0xFF000000000000ULL), "bswap.and7", IP); Tmp6 = BinaryOperator::createAnd(Tmp6, - ConstantInt::get(Type::ULongTy, 0xFF0000000000ULL), + ConstantInt::get(Type::Int64Ty, 0xFF0000000000ULL), "bswap.and6", IP); Tmp5 = BinaryOperator::createAnd(Tmp5, - ConstantInt::get(Type::ULongTy, 0xFF00000000ULL), + ConstantInt::get(Type::Int64Ty, 0xFF00000000ULL), "bswap.and5", IP); Tmp4 = BinaryOperator::createAnd(Tmp4, - ConstantInt::get(Type::ULongTy, 0xFF000000ULL), + ConstantInt::get(Type::Int64Ty, 0xFF000000ULL), "bswap.and4", IP); Tmp3 = BinaryOperator::createAnd(Tmp3, - ConstantInt::get(Type::ULongTy, 0xFF0000ULL), + ConstantInt::get(Type::Int64Ty, 0xFF0000ULL), "bswap.and3", IP); Tmp2 = BinaryOperator::createAnd(Tmp2, - ConstantInt::get(Type::ULongTy, 0xFF00ULL), + ConstantInt::get(Type::Int64Ty, 0xFF00ULL), "bswap.and2", IP); Tmp8 = BinaryOperator::createOr(Tmp8, Tmp7, "bswap.or1", IP); Tmp6 = BinaryOperator::createOr(Tmp6, Tmp5, "bswap.or2", IP); @@ -242,7 +242,7 @@ static Value *LowerCTPOP(Value *V, Instruction *IP) { Value *MaskCst = ConstantInt::get(V->getType(), MaskValues[ct]); Value *LHS = BinaryOperator::createAnd(V, MaskCst, "cppop.and1", IP); Value *VShift = new ShiftInst(Instruction::LShr, V, - ConstantInt::get(Type::UByteTy, i), "ctpop.sh", IP); + ConstantInt::get(Type::Int8Ty, i), "ctpop.sh", IP); Value *RHS = BinaryOperator::createAnd(VShift, MaskCst, "cppop.and2", IP); V = BinaryOperator::createAdd(LHS, RHS, "ctpop.step", IP); } @@ -256,7 +256,7 @@ static Value *LowerCTLZ(Value *V, Instruction *IP) { unsigned BitSize = V->getType()->getPrimitiveSizeInBits(); for (unsigned i = 1; i != BitSize; i <<= 1) { - Value *ShVal = ConstantInt::get(Type::UByteTy, i); + Value *ShVal = ConstantInt::get(Type::Int8Ty, i); ShVal = new ShiftInst(Instruction::LShr, V, ShVal, "ctlz.sh", IP); V = BinaryOperator::createOr(V, ShVal, "ctlz.step", IP); } @@ -289,7 +289,7 @@ void IntrinsicLowering::LowerIntrinsicCall(CallInst *CI) { static Function *SetjmpFCache = 0; static const unsigned castOpcodes[] = { Instruction::BitCast }; Value *V = ReplaceCallWith("setjmp", CI, CI->op_begin()+1, CI->op_end(), - castOpcodes, Type::IntTy, SetjmpFCache); + castOpcodes, Type::Int32Ty, SetjmpFCache); if (CI->getType() != Type::VoidTy) CI->replaceAllUsesWith(V); break; @@ -381,7 +381,7 @@ void IntrinsicLowering::LowerIntrinsicCall(CallInst *CI) { case Intrinsic::readcyclecounter: { cerr << "WARNING: this target does not support the llvm.readcyclecoun" << "ter intrinsic. It is being lowered to a constant 0\n"; - CI->replaceAllUsesWith(ConstantInt::get(Type::ULongTy, 0)); + CI->replaceAllUsesWith(ConstantInt::get(Type::Int64Ty, 0)); break; } diff --git a/llvm/lib/CodeGen/MachOWriter.cpp b/llvm/lib/CodeGen/MachOWriter.cpp index 924ef916423739b60f6bcb3540dc4038575156d0..d4addf2a382856b308f38ca2c3eb8617310543c7 100644 --- a/llvm/lib/CodeGen/MachOWriter.cpp +++ b/llvm/lib/CodeGen/MachOWriter.cpp @@ -730,20 +730,17 @@ void MachOWriter::InitMem(const Constant *C, void *Addr, intptr_t Offset, switch (PC->getType()->getTypeID()) { case Type::BoolTyID: - case Type::UByteTyID: - case Type::SByteTyID: + case Type::Int8TyID: ptr[0] = cast(PC)->getZExtValue(); break; - case Type::UShortTyID: - case Type::ShortTyID: + case Type::Int16TyID: val = cast(PC)->getZExtValue(); if (TD->isBigEndian()) val = ByteSwap_16(val); ptr[0] = val; ptr[1] = val >> 8; break; - case Type::UIntTyID: - case Type::IntTyID: + case Type::Int32TyID: case Type::FloatTyID: if (PC->getType()->getTypeID() == Type::FloatTyID) { val = FloatToBits(cast(PC)->getValue()); @@ -758,8 +755,7 @@ void MachOWriter::InitMem(const Constant *C, void *Addr, intptr_t Offset, ptr[3] = val >> 24; break; case Type::DoubleTyID: - case Type::ULongTyID: - case Type::LongTyID: + case Type::Int64TyID: if (PC->getType()->getTypeID() == Type::DoubleTyID) { val = DoubleToBits(cast(PC)->getValue()); } else { diff --git a/llvm/lib/CodeGen/MachineDebugInfo.cpp b/llvm/lib/CodeGen/MachineDebugInfo.cpp index d3b6ecb4699efee899863d23a0a22b8b70d2126c..2708ceccfc066d4d6e0bcf459ee36f667f2952b9 100644 --- a/llvm/lib/CodeGen/MachineDebugInfo.cpp +++ b/llvm/lib/CodeGen/MachineDebugInfo.cpp @@ -55,8 +55,8 @@ getGlobalVariablesUsing(Module &M, const std::string &RootName) { std::vector Result; // GlobalVariables matching criteria. std::vector FieldTypes; - FieldTypes.push_back(Type::UIntTy); - FieldTypes.push_back(Type::UIntTy); + FieldTypes.push_back(Type::Int32Ty); + FieldTypes.push_back(Type::Int32Ty); // Get the GlobalVariable root. GlobalVariable *UseRoot = M.getGlobalVariable(RootName, @@ -264,16 +264,16 @@ public: /// Apply - Set the value of each of the fields. /// virtual void Apply(int &Field) { - Elements.push_back(ConstantInt::get(Type::IntTy, int32_t(Field))); + Elements.push_back(ConstantInt::get(Type::Int32Ty, int32_t(Field))); } virtual void Apply(unsigned &Field) { - Elements.push_back(ConstantInt::get(Type::UIntTy, uint32_t(Field))); + Elements.push_back(ConstantInt::get(Type::Int32Ty, uint32_t(Field))); } virtual void Apply(int64_t &Field) { - Elements.push_back(ConstantInt::get(Type::LongTy, int64_t(Field))); + Elements.push_back(ConstantInt::get(Type::Int64Ty, int64_t(Field))); } virtual void Apply(uint64_t &Field) { - Elements.push_back(ConstantInt::get(Type::ULongTy, uint64_t(Field))); + Elements.push_back(ConstantInt::get(Type::Int64Ty, uint64_t(Field))); } virtual void Apply(bool &Field) { Elements.push_back(ConstantBool::get(Field)); @@ -351,16 +351,16 @@ public: /// Apply - Set the value of each of the fields. /// virtual void Apply(int &Field) { - Fields.push_back(Type::IntTy); + Fields.push_back(Type::Int32Ty); } virtual void Apply(unsigned &Field) { - Fields.push_back(Type::UIntTy); + Fields.push_back(Type::Int32Ty); } virtual void Apply(int64_t &Field) { - Fields.push_back(Type::LongTy); + Fields.push_back(Type::Int64Ty); } virtual void Apply(uint64_t &Field) { - Fields.push_back(Type::ULongTy); + Fields.push_back(Type::Int64Ty); } virtual void Apply(bool &Field) { Fields.push_back(Type::BoolTy); @@ -1259,7 +1259,7 @@ const PointerType *DISerializer::getStrPtrType() { // If not already defined. if (!StrPtrTy) { // Construct the pointer to signed bytes. - StrPtrTy = PointerType::get(Type::SByteTy); + StrPtrTy = PointerType::get(Type::Int8Ty); } return StrPtrTy; diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 1b3e8d7d1dcd3512976764b7de48471264b41197..f0b1ec35b89024d5fff7265e596fd88a3d09a36b 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -186,7 +186,7 @@ private: SDOperand CreateStackTemporary(MVT::ValueType VT); - SDOperand ExpandLibCall(const char *Name, SDNode *Node, + SDOperand ExpandLibCall(const char *Name, SDNode *Node, bool isSigned, SDOperand &Hi); SDOperand ExpandIntToFP(bool isSigned, MVT::ValueType DestTy, SDOperand Source); @@ -2122,33 +2122,42 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { // operation to an explicit libcall as appropriate. MVT::ValueType IntPtr = TLI.getPointerTy(); const Type *IntPtrTy = TLI.getTargetData()->getIntPtrType(); - std::vector > Args; + TargetLowering::ArgListTy Args; + TargetLowering::ArgListEntry Entry; const char *FnName = 0; if (Node->getOpcode() == ISD::MEMSET) { - Args.push_back(std::make_pair(Tmp2, IntPtrTy)); + Entry.Node = Tmp2; + Entry.Ty = IntPtrTy; + Entry.isSigned = false; + Args.push_back(Entry); // Extend the (previously legalized) ubyte argument to be an int value // for the call. if (Tmp3.getValueType() > MVT::i32) Tmp3 = DAG.getNode(ISD::TRUNCATE, MVT::i32, Tmp3); else Tmp3 = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Tmp3); - Args.push_back(std::make_pair(Tmp3, Type::IntTy)); - Args.push_back(std::make_pair(Tmp4, IntPtrTy)); + Entry.Node = Tmp3; Entry.Ty = Type::Int32Ty; Entry.isSigned = true; + Args.push_back(Entry); + Entry.Node = Tmp4; Entry.Ty = IntPtrTy; Entry.isSigned = false; + Args.push_back(Entry); FnName = "memset"; } else if (Node->getOpcode() == ISD::MEMCPY || Node->getOpcode() == ISD::MEMMOVE) { - Args.push_back(std::make_pair(Tmp2, IntPtrTy)); - Args.push_back(std::make_pair(Tmp3, IntPtrTy)); - Args.push_back(std::make_pair(Tmp4, IntPtrTy)); + Entry.Node = Tmp2; Entry.Ty = IntPtrTy; Entry.isSigned = false; + Args.push_back(Entry); + Entry.Node = Tmp3; Entry.Ty = IntPtrTy; Entry.isSigned = false; + Args.push_back(Entry); + Entry.Node = Tmp4; Entry.Ty = IntPtrTy; Entry.isSigned = false; + Args.push_back(Entry); FnName = Node->getOpcode() == ISD::MEMMOVE ? "memmove" : "memcpy"; } else { assert(0 && "Unknown op!"); } std::pair CallResult = - TLI.LowerCallTo(Tmp1, Type::VoidTy, false, CallingConv::C, false, + TLI.LowerCallTo(Tmp1, Type::VoidTy, false, false, CallingConv::C, false, DAG.getExternalSymbol(FnName, IntPtr), Args, DAG); Result = CallResult.second; break; @@ -2243,7 +2252,8 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { const char *FnName = Node->getOpcode() == ISD::UDIV ? "__udivsi3" : "__divsi3"; SDOperand Dummy; - Result = ExpandLibCall(FnName, Node, Dummy); + bool isSigned = Node->getOpcode() == ISD::SDIV; + Result = ExpandLibCall(FnName, Node, isSigned, Dummy); }; break; } @@ -2346,7 +2356,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { DAG.getNode(ISD::FP_EXTEND, MVT::f64, Tmp2)); } SDOperand Dummy; - Result = ExpandLibCall(FnName, Node, Dummy); + Result = ExpandLibCall(FnName, Node, false, Dummy); break; } break; @@ -2419,6 +2429,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { break; case TargetLowering::Expand: unsigned DivOpc= (Node->getOpcode() == ISD::UREM) ? ISD::UDIV : ISD::SDIV; + bool isSigned = DivOpc == ISD::SDIV; if (MVT::isInteger(Node->getValueType(0))) { if (TLI.getOperationAction(DivOpc, Node->getValueType(0)) == TargetLowering::Legal) { @@ -2433,13 +2444,13 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { const char *FnName = Node->getOpcode() == ISD::UREM ? "__umodsi3" : "__modsi3"; SDOperand Dummy; - Result = ExpandLibCall(FnName, Node, Dummy); + Result = ExpandLibCall(FnName, Node, isSigned, Dummy); } } else { // Floating point mod -> fmod libcall. const char *FnName = Node->getValueType(0) == MVT::f32 ? "fmodf":"fmod"; SDOperand Dummy; - Result = ExpandLibCall(FnName, Node, Dummy); + Result = ExpandLibCall(FnName, Node, false, Dummy); } break; } @@ -2688,7 +2699,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { default: assert(0 && "Unreachable!"); } SDOperand Dummy; - Result = ExpandLibCall(FnName, Node, Dummy); + Result = ExpandLibCall(FnName, Node, false, Dummy); break; } } @@ -2700,7 +2711,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { const char *FnName = Node->getValueType(0) == MVT::f32 ? "__powisf2" : "__powidf2"; SDOperand Dummy; - Result = ExpandLibCall(FnName, Node, Dummy); + Result = ExpandLibCall(FnName, Node, false, Dummy); break; } case ISD::BIT_CONVERT: @@ -2886,7 +2897,7 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) { default: assert(0 && "Unreachable!"); } SDOperand Dummy; - Result = ExpandLibCall(FnName, Node, Dummy); + Result = ExpandLibCall(FnName, Node, false, Dummy); break; } case Promote: @@ -3609,13 +3620,15 @@ void SelectionDAGLegalize::LegalizeSetCCOperands(SDOperand &LHS, SDOperand Dummy; Tmp1 = ExpandLibCall(FnName1, - DAG.getNode(ISD::MERGE_VALUES, VT, LHS, RHS).Val, Dummy); + DAG.getNode(ISD::MERGE_VALUES, VT, LHS, RHS).Val, + false, Dummy); Tmp2 = DAG.getConstant(0, MVT::i32); CC = DAG.getCondCode(CC1); if (FnName2) { Tmp1 = DAG.getNode(ISD::SETCC, TLI.getSetCCResultTy(), Tmp1, Tmp2, CC); LHS = ExpandLibCall(FnName2, - DAG.getNode(ISD::MERGE_VALUES, VT, LHS, RHS).Val, Dummy); + DAG.getNode(ISD::MERGE_VALUES, VT, LHS, RHS).Val, + false, Dummy); Tmp2 = DAG.getNode(ISD::SETCC, TLI.getSetCCResultTy(), LHS, Tmp2, DAG.getCondCode(CC2)); Tmp1 = DAG.getNode(ISD::OR, Tmp1.getValueType(), Tmp1, Tmp2); @@ -4051,7 +4064,7 @@ bool SelectionDAGLegalize::ExpandShift(unsigned Opc, SDOperand Op,SDOperand Amt, // by-reg argument. If it does fit into a single register, return the result // and leave the Hi part unset. SDOperand SelectionDAGLegalize::ExpandLibCall(const char *Name, SDNode *Node, - SDOperand &Hi) { + bool isSigned, SDOperand &Hi) { assert(!IsLegalizingCall && "Cannot overlap legalization of calls!"); // The input chain to this libcall is the entry node of the function. // Legalizing the call will automatically add the previous call to the @@ -4059,17 +4072,20 @@ SDOperand SelectionDAGLegalize::ExpandLibCall(const char *Name, SDNode *Node, SDOperand InChain = DAG.getEntryNode(); TargetLowering::ArgListTy Args; + TargetLowering::ArgListEntry Entry; for (unsigned i = 0, e = Node->getNumOperands(); i != e; ++i) { MVT::ValueType ArgVT = Node->getOperand(i).getValueType(); const Type *ArgTy = MVT::getTypeForValueType(ArgVT); - Args.push_back(std::make_pair(Node->getOperand(i), ArgTy)); + Entry.Node = Node->getOperand(i); Entry.Ty = ArgTy; + Entry.isSigned = isSigned; + Args.push_back(Entry); } SDOperand Callee = DAG.getExternalSymbol(Name, TLI.getPointerTy()); // Splice the libcall in wherever FindInputOutputChains tells us to. const Type *RetTy = MVT::getTypeForValueType(Node->getValueType(0)); std::pair CallInfo = - TLI.LowerCallTo(InChain, RetTy, false, CallingConv::C, false, + TLI.LowerCallTo(InChain, RetTy, isSigned, false, CallingConv::C, false, Callee, Args, DAG); // Legalize the call sequence, starting with the chain. This will advance @@ -4121,7 +4137,7 @@ ExpandIntToFP(bool isSigned, MVT::ValueType DestTy, SDOperand Source) { SignSet, Four, Zero); uint64_t FF = 0x5f800000ULL; if (TLI.isLittleEndian()) FF <<= 32; - static Constant *FudgeFactor = ConstantInt::get(Type::ULongTy, FF); + static Constant *FudgeFactor = ConstantInt::get(Type::Int64Ty, FF); SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy()); CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset); @@ -4167,7 +4183,7 @@ ExpandIntToFP(bool isSigned, MVT::ValueType DestTy, SDOperand Source) { Source = DAG.getNode(ISD::SINT_TO_FP, DestTy, Source); SDOperand UnusedHiPart; - return ExpandLibCall(FnName, Source.Val, UnusedHiPart); + return ExpandLibCall(FnName, Source.Val, isSigned, UnusedHiPart); } /// ExpandLegalINT_TO_FP - This function is responsible for legalizing a @@ -4252,7 +4268,7 @@ SDOperand SelectionDAGLegalize::ExpandLegalINT_TO_FP(bool isSigned, case MVT::i64: FF = 0x5F800000ULL; break; // 2^64 (as a float) } if (TLI.isLittleEndian()) FF <<= 32; - static Constant *FudgeFactor = ConstantInt::get(Type::ULongTy, FF); + static Constant *FudgeFactor = ConstantInt::get(Type::Int64Ty, FF); SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy()); CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset); @@ -4820,9 +4836,9 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ } if (Node->getOperand(0).getValueType() == MVT::f32) - Lo = ExpandLibCall("__fixsfdi", Node, Hi); + Lo = ExpandLibCall("__fixsfdi", Node, false, Hi); else - Lo = ExpandLibCall("__fixdfdi", Node, Hi); + Lo = ExpandLibCall("__fixdfdi", Node, false, Hi); break; case ISD::FP_TO_UINT: @@ -4844,9 +4860,9 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ } if (Node->getOperand(0).getValueType() == MVT::f32) - Lo = ExpandLibCall("__fixunssfdi", Node, Hi); + Lo = ExpandLibCall("__fixunssfdi", Node, false, Hi); else - Lo = ExpandLibCall("__fixunsdfdi", Node, Hi); + Lo = ExpandLibCall("__fixunsdfdi", Node, false, Hi); break; case ISD::SHL: { @@ -4895,7 +4911,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ } // Otherwise, emit a libcall. - Lo = ExpandLibCall("__ashldi3", Node, Hi); + Lo = ExpandLibCall("__ashldi3", Node, false, Hi); break; } @@ -4927,7 +4943,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ } // Otherwise, emit a libcall. - Lo = ExpandLibCall("__ashrdi3", Node, Hi); + Lo = ExpandLibCall("__ashrdi3", Node, true, Hi); break; } @@ -4959,7 +4975,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ } // Otherwise, emit a libcall. - Lo = ExpandLibCall("__lshrdi3", Node, Hi); + Lo = ExpandLibCall("__lshrdi3", Node, false, Hi); break; } @@ -5046,31 +5062,35 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ } } - Lo = ExpandLibCall("__muldi3" , Node, Hi); + Lo = ExpandLibCall("__muldi3" , Node, false, Hi); break; } - case ISD::SDIV: Lo = ExpandLibCall("__divdi3" , Node, Hi); break; - case ISD::UDIV: Lo = ExpandLibCall("__udivdi3", Node, Hi); break; - case ISD::SREM: Lo = ExpandLibCall("__moddi3" , Node, Hi); break; - case ISD::UREM: Lo = ExpandLibCall("__umoddi3", Node, Hi); break; + case ISD::SDIV: Lo = ExpandLibCall("__divdi3" , Node, true, Hi); break; + case ISD::UDIV: Lo = ExpandLibCall("__udivdi3", Node, false, Hi); break; + case ISD::SREM: Lo = ExpandLibCall("__moddi3" , Node, true, Hi); break; + case ISD::UREM: Lo = ExpandLibCall("__umoddi3", Node, false, Hi); break; case ISD::FADD: - Lo = ExpandLibCall(((VT == MVT::f32) ? "__addsf3" : "__adddf3"), Node, Hi); + Lo = ExpandLibCall(((VT == MVT::f32) ? "__addsf3" : "__adddf3"), Node, + false, Hi); break; case ISD::FSUB: - Lo = ExpandLibCall(((VT == MVT::f32) ? "__subsf3" : "__subdf3"), Node, Hi); + Lo = ExpandLibCall(((VT == MVT::f32) ? "__subsf3" : "__subdf3"), Node, + false, Hi); break; case ISD::FMUL: - Lo = ExpandLibCall(((VT == MVT::f32) ? "__mulsf3" : "__muldf3"), Node, Hi); + Lo = ExpandLibCall(((VT == MVT::f32) ? "__mulsf3" : "__muldf3"), Node, + false, Hi); break; case ISD::FDIV: - Lo = ExpandLibCall(((VT == MVT::f32) ? "__divsf3" : "__divdf3"), Node, Hi); + Lo = ExpandLibCall(((VT == MVT::f32) ? "__divsf3" : "__divdf3"), Node, + false, Hi); break; case ISD::FP_EXTEND: - Lo = ExpandLibCall("__extendsfdf2", Node, Hi); + Lo = ExpandLibCall("__extendsfdf2", Node, false, Hi); break; case ISD::FP_ROUND: - Lo = ExpandLibCall("__truncdfsf2", Node, Hi); + Lo = ExpandLibCall("__truncdfsf2", Node, false, Hi); break; case ISD::FSQRT: case ISD::FSIN: @@ -5082,7 +5102,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ case ISD::FCOS: FnName = (VT == MVT::f32) ? "cosf" : "cos"; break; default: assert(0 && "Unreachable!"); } - Lo = ExpandLibCall(FnName, Node, Hi); + Lo = ExpandLibCall(FnName, Node, false, Hi); break; } case ISD::FABS: { @@ -5133,7 +5153,7 @@ void SelectionDAGLegalize::ExpandOp(SDOperand Op, SDOperand &Lo, SDOperand &Hi){ : DAG.getZeroExtendInReg(Tmp, SrcVT); Node = DAG.UpdateNodeOperands(Op, Tmp).Val; } - Lo = ExpandLibCall(FnName, Node, Hi); + Lo = ExpandLibCall(FnName, Node, isSigned, Hi); break; } } diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index 911f326ee033b58b26154fc2b7d6ad9fc347f16f..8a597da7f75894e8ee49f06135e432d394ec5e26 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -396,13 +396,9 @@ class SelectionDAGLowering { /// The comparison function for sorting Case values. struct CaseCmp { bool operator () (const Case& C1, const Case& C2) { - if (const ConstantInt* I1 = dyn_cast(C1.first)) - if (I1->getType()->isUnsigned()) - return I1->getZExtValue() < - cast(C2.first)->getZExtValue(); - - return cast(C1.first)->getSExtValue() < - cast(C2.first)->getSExtValue(); + assert(isa(C1.first) && isa(C2.first)); + return cast(C1.first)->getZExtValue() < + cast(C2.first)->getZExtValue(); } }; @@ -756,7 +752,6 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) { NewValues.push_back(getRoot()); for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) { SDOperand RetOp = getValue(I.getOperand(i)); - bool isSigned = I.getOperand(i)->getType()->isSigned(); // If this is an integer return value, we need to promote it ourselves to // the full width of a register, since LegalizeOp will use ANY_EXTEND rather @@ -770,14 +765,14 @@ void SelectionDAGLowering::visitRet(ReturnInst &I) { TmpVT = TLI.getTypeToTransformTo(MVT::i32); else TmpVT = MVT::i32; - - if (isSigned) - RetOp = DAG.getNode(ISD::SIGN_EXTEND, TmpVT, RetOp); - else - RetOp = DAG.getNode(ISD::ZERO_EXTEND, TmpVT, RetOp); + const FunctionType *FTy = I.getParent()->getParent()->getFunctionType(); + ISD::NodeType ExtendKind = ISD::SIGN_EXTEND; + if (FTy->paramHasAttr(0, FunctionType::ZExtAttribute)) + ExtendKind = ISD::ZERO_EXTEND; + RetOp = DAG.getNode(ExtendKind, TmpVT, RetOp); } NewValues.push_back(RetOp); - NewValues.push_back(DAG.getConstant(isSigned, MVT::i32)); + NewValues.push_back(DAG.getConstant(false, MVT::i32)); } DAG.setRoot(DAG.getNode(ISD::RET, MVT::Other, &NewValues[0], NewValues.size())); @@ -1383,7 +1378,7 @@ void SelectionDAGLowering::visitSwitch(SwitchInst &I) { // Create a CaseBlock record representing a conditional branch to // the LHS node if the value being switched on SV is less than C. // Otherwise, branch to LHS. - ISD::CondCode CC = C->getType()->isSigned() ? ISD::SETLT : ISD::SETULT; + ISD::CondCode CC = ISD::SETULT; SelectionDAGISel::CaseBlock CB(CC, SV, C, TrueBB, FalseBB, CR.CaseBB); if (CR.CaseBB == CurMBB) @@ -1705,12 +1700,7 @@ void SelectionDAGLowering::visitGetElementPtr(User &I) { // If this is a constant subscript, handle it quickly. if (ConstantInt *CI = dyn_cast(Idx)) { if (CI->getZExtValue() == 0) continue; - uint64_t Offs; - if (CI->getType()->isSigned()) - Offs = (int64_t) - TD->getTypeSize(Ty)*cast(CI)->getSExtValue(); - else - Offs = + uint64_t Offs = TD->getTypeSize(Ty)*cast(CI)->getZExtValue(); N = DAG.getNode(ISD::ADD, N.getValueType(), N, getIntPtrConstant(Offs)); continue; @@ -1723,10 +1713,7 @@ void SelectionDAGLowering::visitGetElementPtr(User &I) { // If the index is smaller or larger than intptr_t, truncate or extend // it. if (IdxN.getValueType() < N.getValueType()) { - if (Idx->getType()->isSigned()) - IdxN = DAG.getNode(ISD::SIGN_EXTEND, N.getValueType(), IdxN); - else - IdxN = DAG.getNode(ISD::ZERO_EXTEND, N.getValueType(), IdxN); + IdxN = DAG.getNode(ISD::SIGN_EXTEND, N.getValueType(), IdxN); } else if (IdxN.getValueType() > N.getValueType()) IdxN = DAG.getNode(ISD::TRUNCATE, N.getValueType(), IdxN); @@ -2185,25 +2172,30 @@ void SelectionDAGLowering::visitCall(CallInst &I) { return; } + const PointerType *PT = cast(I.getCalledValue()->getType()); + const FunctionType *FTy = cast(PT->getElementType()); + SDOperand Callee; if (!RenameFn) Callee = getValue(I.getOperand(0)); else Callee = DAG.getExternalSymbol(RenameFn, TLI.getPointerTy()); - std::vector > Args; + TargetLowering::ArgListTy Args; + TargetLowering::ArgListEntry Entry; Args.reserve(I.getNumOperands()); for (unsigned i = 1, e = I.getNumOperands(); i != e; ++i) { Value *Arg = I.getOperand(i); SDOperand ArgNode = getValue(Arg); - Args.push_back(std::make_pair(ArgNode, Arg->getType())); + Entry.Node = ArgNode; Entry.Ty = Arg->getType(); + Entry.isSigned = FTy->paramHasAttr(i, FunctionType::SExtAttribute); + Args.push_back(Entry); } - const PointerType *PT = cast(I.getCalledValue()->getType()); - const FunctionType *FTy = cast(PT->getElementType()); - std::pair Result = - TLI.LowerCallTo(getRoot(), I.getType(), FTy->isVarArg(), I.getCallingConv(), - I.isTailCall(), Callee, Args, DAG); + TLI.LowerCallTo(getRoot(), I.getType(), + FTy->paramHasAttr(0,FunctionType::SExtAttribute), + FTy->isVarArg(), I.getCallingConv(), I.isTailCall(), + Callee, Args, DAG); if (I.getType() != Type::VoidTy) setValue(&I, Result.first); DAG.setRoot(Result.second); @@ -2785,11 +2777,15 @@ void SelectionDAGLowering::visitMalloc(MallocInst &I) { Src = DAG.getNode(ISD::MUL, Src.getValueType(), Src, getIntPtrConstant(ElementSize)); - std::vector > Args; - Args.push_back(std::make_pair(Src, TLI.getTargetData()->getIntPtrType())); + TargetLowering::ArgListTy Args; + TargetLowering::ArgListEntry Entry; + Entry.Node = Src; + Entry.Ty = TLI.getTargetData()->getIntPtrType(); + Entry.isSigned = false; + Args.push_back(Entry); std::pair Result = - TLI.LowerCallTo(getRoot(), I.getType(), false, CallingConv::C, true, + TLI.LowerCallTo(getRoot(), I.getType(), false, false, CallingConv::C, true, DAG.getExternalSymbol("malloc", IntPtr), Args, DAG); setValue(&I, Result.first); // Pointers always fit in registers @@ -2797,12 +2793,15 @@ void SelectionDAGLowering::visitMalloc(MallocInst &I) { } void SelectionDAGLowering::visitFree(FreeInst &I) { - std::vector > Args; - Args.push_back(std::make_pair(getValue(I.getOperand(0)), - TLI.getTargetData()->getIntPtrType())); + TargetLowering::ArgListTy Args; + TargetLowering::ArgListEntry Entry; + Entry.Node = getValue(I.getOperand(0)); + Entry.Ty = TLI.getTargetData()->getIntPtrType(); + Entry.isSigned = false; + Args.push_back(Entry); MVT::ValueType IntPtr = TLI.getPointerTy(); std::pair Result = - TLI.LowerCallTo(getRoot(), Type::VoidTy, false, CallingConv::C, true, + TLI.LowerCallTo(getRoot(), Type::VoidTy, false, false, CallingConv::C, true, DAG.getExternalSymbol("free", IntPtr), Args, DAG); DAG.setRoot(Result.second); } @@ -2939,8 +2938,11 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { // Set up the return result vector. Ops.clear(); + const FunctionType *FTy = F.getFunctionType(); unsigned i = 0; - for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E; ++I) { + unsigned Idx = 1; + for (Function::arg_iterator I = F.arg_begin(), E = F.arg_end(); I != E; + ++I, ++Idx) { MVT::ValueType VT = getValueType(I->getType()); switch (getTypeAction(VT)) { @@ -2951,8 +2953,9 @@ TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { case Promote: { SDOperand Op(Result, i++); if (MVT::isInteger(VT)) { - unsigned AssertOp = I->getType()->isSigned() ? ISD::AssertSext - : ISD::AssertZext; + unsigned AssertOp = ISD::AssertSext; + if (FTy->paramHasAttr(Idx, FunctionType::ZExtAttribute)) + AssertOp = ISD::AssertZext; Op = DAG.getNode(AssertOp, Op.getValueType(), Op, DAG.getValueType(VT)); Op = DAG.getNode(ISD::TRUNCATE, VT, Op); } else { @@ -3035,7 +3038,8 @@ static void ExpandScalarCallArgs(MVT::ValueType VT, SDOperand Arg, /// lowered by the target to something concrete. FIXME: When all targets are /// migrated to using ISD::CALL, this hook should be integrated into SDISel. std::pair -TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg, +TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, + bool RetTyIsSigned, bool isVarArg, unsigned CallingConv, bool isTailCall, SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG) { @@ -3048,9 +3052,9 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg, // Handle all of the outgoing arguments. for (unsigned i = 0, e = Args.size(); i != e; ++i) { - MVT::ValueType VT = getValueType(Args[i].second); - SDOperand Op = Args[i].first; - bool isSigned = Args[i].second->isSigned(); + MVT::ValueType VT = getValueType(Args[i].Ty); + SDOperand Op = Args[i].Node; + bool isSigned = Args[i].isSigned; switch (getTypeAction(VT)) { default: assert(0 && "Unknown type action!"); case Legal: @@ -3077,7 +3081,7 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg, } else { // Otherwise, this is a vector type. We only support legal vectors // right now. - const PackedType *PTy = cast(Args[i].second); + const PackedType *PTy = cast(Args[i].Ty); unsigned NumElems = PTy->getNumElements(); const Type *EltTy = PTy->getElementType(); @@ -3177,8 +3181,9 @@ TargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg, abort(); } } else if (MVT::isInteger(VT)) { - unsigned AssertOp = RetTy->isSigned() ? - ISD::AssertSext : ISD::AssertZext; + unsigned AssertOp = ISD::AssertSext; + if (!RetTyIsSigned) + AssertOp = ISD::AssertZext; ResVal = DAG.getNode(AssertOp, ResVal.getValueType(), ResVal, DAG.getValueType(VT)); ResVal = DAG.getNode(ISD::TRUNCATE, VT, ResVal); @@ -3673,10 +3678,7 @@ static bool OptimizeGEPExpression(GetElementPtrInst *GEPI, // Handle constant subscripts. if (ConstantInt *CI = dyn_cast(Idx)) { if (CI->getZExtValue() == 0) continue; - if (CI->getType()->isSigned()) - ConstantOffset += (int64_t)TD->getTypeSize(Ty)*CI->getSExtValue(); - else - ConstantOffset += TD->getTypeSize(Ty)*CI->getZExtValue(); + ConstantOffset += (int64_t)TD->getTypeSize(Ty)*CI->getSExtValue(); continue; } diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp index 59b84193e0d9bc67bfa294dc529c481a8aa38aca..3a8bfdb5005ea644740f2b0e855a27187644a6ad 100644 --- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp +++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp @@ -915,7 +915,7 @@ bool ARMDAGToDAGISel::SelectAddrMode1(SDOperand Op, SDOperand C = CurDAG->getTargetConstant(~val, MVT::i32); n = CurDAG->getTargetNode(ARM::MVN, MVT::i32, C, Z, Z); } else { - Constant *C = ConstantInt::get(Type::UIntTy, val); + Constant *C = ConstantInt::get(Type::Int32Ty, val); int alignment = 2; SDOperand Addr = CurDAG->getTargetConstantPool(C, MVT::i32, alignment); n = CurDAG->getTargetNode(ARM::LDR, MVT::i32, Addr, Z); diff --git a/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp b/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp index 14790456599dff6bfc8892e09eb657f827212564..9881ac3405fcc3fce1f11e71429327787133792f 100644 --- a/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp +++ b/llvm/lib/Target/Alpha/AlphaISelDAGToDAG.cpp @@ -322,7 +322,7 @@ SDNode *AlphaDAGToDAGISel::Select(SDOperand Op) { // val32 >= IMM_LOW + IMM_LOW * IMM_MULT) //always true break; //(zext (LDAH (LDA))) //Else use the constant pool - ConstantInt *C = ConstantInt::get(Type::ULongTy, uval); + ConstantInt *C = ConstantInt::get(Type::Int64Ty, uval); SDOperand CPI = CurDAG->getTargetConstantPool(C, MVT::i64); SDNode *Tmp = CurDAG->getTargetNode(Alpha::LDAHr, MVT::i64, CPI, getGlobalBaseReg()); diff --git a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp index 3ea4e88ac4b7b6e7bb85aff04b34ec4d665a0c98..623ef5c13eb31c12b10d5e96156aaaaac315a006 100644 --- a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp +++ b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp @@ -317,8 +317,8 @@ static SDOperand LowerRET(SDOperand Op, SelectionDAG &DAG) { } std::pair -AlphaTargetLowering::LowerCallTo(SDOperand Chain, - const Type *RetTy, bool isVarArg, +AlphaTargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, + bool RetTyIsSigned, bool isVarArg, unsigned CallingConv, bool isTailCall, SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG) { @@ -331,7 +331,7 @@ AlphaTargetLowering::LowerCallTo(SDOperand Chain, std::vector args_to_use; for (unsigned i = 0, e = Args.size(); i != e; ++i) { - switch (getValueType(Args[i].second)) { + switch (getValueType(Args[i].Ty)) { default: assert(0 && "Unexpected ValueType for argument!"); case MVT::i1: case MVT::i8: @@ -339,17 +339,17 @@ AlphaTargetLowering::LowerCallTo(SDOperand Chain, case MVT::i32: // Promote the integer to 64 bits. If the input type is signed use a // sign extend, otherwise use a zero extend. - if (Args[i].second->isSigned()) - Args[i].first = DAG.getNode(ISD::SIGN_EXTEND, MVT::i64, Args[i].first); + if (Args[i].isSigned) + Args[i].Node = DAG.getNode(ISD::SIGN_EXTEND, MVT::i64, Args[i].Node); else - Args[i].first = DAG.getNode(ISD::ZERO_EXTEND, MVT::i64, Args[i].first); + Args[i].Node = DAG.getNode(ISD::ZERO_EXTEND, MVT::i64, Args[i].Node); break; case MVT::i64: case MVT::f64: case MVT::f32: break; } - args_to_use.push_back(Args[i].first); + args_to_use.push_back(Args[i].Node); } std::vector RetVals; @@ -373,7 +373,7 @@ AlphaTargetLowering::LowerCallTo(SDOperand Chain, SDOperand RetVal = TheCall; if (RetTyVT != ActualRetTyVT) { - RetVal = DAG.getNode(RetTy->isSigned() ? ISD::AssertSext : ISD::AssertZext, + RetVal = DAG.getNode(RetTyIsSigned ? ISD::AssertSext : ISD::AssertZext, MVT::i64, RetVal, DAG.getValueType(RetTyVT)); RetVal = DAG.getNode(ISD::TRUNCATE, RetTyVT, RetVal); } diff --git a/llvm/lib/Target/Alpha/AlphaISelLowering.h b/llvm/lib/Target/Alpha/AlphaISelLowering.h index 0c1db073ee9afdbc77aa68d244b7c4a0b660c14a..d74b348d24a82d0fa3391752f98dba95694b9f2d 100644 --- a/llvm/lib/Target/Alpha/AlphaISelLowering.h +++ b/llvm/lib/Target/Alpha/AlphaISelLowering.h @@ -77,9 +77,9 @@ namespace llvm { /// LowerCallTo - This hook lowers an abstract call to a function into an /// actual call. virtual std::pair - LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg, unsigned CC, - bool isTailCall, SDOperand Callee, ArgListTy &Args, - SelectionDAG &DAG); + LowerCallTo(SDOperand Chain, const Type *RetTy, bool RetTyIsSigned, + bool isVarArg, unsigned CC, bool isTailCall, SDOperand Callee, + ArgListTy &Args, SelectionDAG &DAG); ConstraintType getConstraintType(char ConstraintLetter) const; diff --git a/llvm/lib/Target/CBackend/Writer.cpp b/llvm/lib/Target/CBackend/Writer.cpp index af56e26f9eab0afdfd1e21953474f74aee5a9e83..bb9f801b8af1aa1de889cab6bfb6a21415842702 100644 --- a/llvm/lib/Target/CBackend/Writer.cpp +++ b/llvm/lib/Target/CBackend/Writer.cpp @@ -365,17 +365,13 @@ CWriter::printPrimitiveType(std::ostream &Out, const Type *Ty, bool isSigned, switch (Ty->getTypeID()) { case Type::VoidTyID: return Out << "void " << NameSoFar; case Type::BoolTyID: return Out << "bool " << NameSoFar; - case Type::UByteTyID: - case Type::SByteTyID: + case Type::Int8TyID: return Out << (isSigned?"signed":"unsigned") << " char " << NameSoFar; - case Type::UShortTyID: - case Type::ShortTyID: + case Type::Int16TyID: return Out << (isSigned?"signed":"unsigned") << " short " << NameSoFar; - case Type::UIntTyID: - case Type::IntTyID: + case Type::Int32TyID: return Out << (isSigned?"signed":"unsigned") << " int " << NameSoFar; - case Type::ULongTyID: - case Type::LongTyID: + case Type::Int64TyID: return Out << (isSigned?"signed":"unsigned") << " long long " << NameSoFar; case Type::FloatTyID: return Out << "float " << NameSoFar; case Type::DoubleTyID: return Out << "double " << NameSoFar; @@ -488,7 +484,7 @@ void CWriter::printConstantArray(ConstantArray *CPA) { // ubytes or an array of sbytes with positive values. // const Type *ETy = CPA->getType()->getElementType(); - bool isString = (ETy == Type::SByteTy || ETy == Type::UByteTy); + bool isString = (ETy == Type::Int8Ty || ETy == Type::Int8Ty); // Make sure the last character is a null char, as automatically added by C if (isString && (CPA->getNumOperands() == 0 || @@ -810,50 +806,19 @@ void CWriter::printConstant(Constant *CPV) { case Type::BoolTyID: Out << (cast(CPV)->getValue() ? '1' : '0'); break; - case Type::SByteTyID: - case Type::UByteTyID: + case Type::Int8TyID: Out << "((char)" << cast(CPV)->getSExtValue() << ")"; break; - case Type::ShortTyID: - case Type::UShortTyID: + case Type::Int16TyID: Out << "((short)" << cast(CPV)->getSExtValue() << ")"; break; - case Type::IntTyID: - case Type::UIntTyID: + case Type::Int32TyID: Out << "((int)" << cast(CPV)->getSExtValue() << ")"; break; - case Type::LongTyID: - case Type::ULongTyID: + case Type::Int64TyID: Out << "((long long)" << cast(CPV)->getSExtValue() << "ll)"; break; -#if 0 - case Type::IntTyID: - if ((int)cast(CPV)->getSExtValue() == (int)0x80000000) - Out << "((int)0x80000000U)"; // Handle MININT specially to avoid warning - else - Out << cast(CPV)->getSExtValue(); - break; - - case Type::LongTyID: - if (cast(CPV)->isMinValue(true)) - Out << "(/*INT64_MIN*/(-9223372036854775807LL)-1)"; - else - Out << cast(CPV)->getSExtValue() << "ll"; - break; - - case Type::UByteTyID: - case Type::UShortTyID: - Out << cast(CPV)->getZExtValue(); - break; - case Type::UIntTyID: - Out << cast(CPV)->getZExtValue() << 'u'; - break; - case Type::ULongTyID: - Out << cast(CPV)->getZExtValue() << "ull"; - break; -#endif - case Type::FloatTyID: case Type::DoubleTyID: { ConstantFP *FPC = cast(CPV); @@ -1627,10 +1592,8 @@ void CWriter::printFloatingPointConstants(Function &F) { void CWriter::printModuleTypes(const SymbolTable &ST) { Out << "/* Helper union for bitcasts */\n"; Out << "typedef union {\n"; - Out << " unsigned int UInt;\n"; - Out << " signed int SInt;\n"; - Out << " unsigned long long ULong;\n"; - Out << " signed long long SLong;\n"; + Out << " unsigned int Int32;\n"; + Out << " unsigned long long Int64;\n"; Out << " float Float;\n"; Out << " double Double;\n"; Out << "} llvmBitCastUnion;\n"; @@ -2060,8 +2023,7 @@ void CWriter::visitBinaryOperator(Instruction &I) { // We must cast the results of binary operations which might be promoted. bool needsCast = false; - if ((I.getType() == Type::UByteTy) || (I.getType() == Type::SByteTy) - || (I.getType() == Type::UShortTy) || (I.getType() == Type::ShortTy) + if ((I.getType() == Type::Int8Ty) || (I.getType() == Type::Int16Ty) || (I.getType() == Type::FloatTy)) { needsCast = true; Out << "(("; @@ -2192,12 +2154,10 @@ void CWriter::visitFCmpInst(FCmpInst &I) { static const char * getFloatBitCastField(const Type *Ty) { switch (Ty->getTypeID()) { default: assert(0 && "Invalid Type"); - case Type::FloatTyID: return "Float"; - case Type::UIntTyID: return "UInt"; - case Type::IntTyID: return "SInt"; - case Type::DoubleTyID:return "Double"; - case Type::ULongTyID: return "ULong"; - case Type::LongTyID: return "SLong"; + case Type::FloatTyID: return "Float"; + case Type::Int32TyID: return "Int32"; + case Type::DoubleTyID: return "Double"; + case Type::Int64TyID: return "Int64"; } } diff --git a/llvm/lib/Target/IA64/IA64ISelLowering.cpp b/llvm/lib/Target/IA64/IA64ISelLowering.cpp index 3bc58041192925c049a6479251b6072c7b43781b..6fddb37367569a54496854f4d91f38ac737ca8b7 100644 --- a/llvm/lib/Target/IA64/IA64ISelLowering.cpp +++ b/llvm/lib/Target/IA64/IA64ISelLowering.cpp @@ -290,10 +290,10 @@ IA64TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { std::pair IA64TargetLowering::LowerCallTo(SDOperand Chain, - const Type *RetTy, bool isVarArg, - unsigned CallingConv, bool isTailCall, - SDOperand Callee, ArgListTy &Args, - SelectionDAG &DAG) { + const Type *RetTy, bool RetTyIsSigned, + bool isVarArg, unsigned CallingConv, + bool isTailCall, SDOperand Callee, + ArgListTy &Args, SelectionDAG &DAG) { MachineFunction &MF = DAG.getMachineFunction(); @@ -315,7 +315,8 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain, std::max(outRegsUsed, MF.getInfo()->outRegsUsed); // keep stack frame 16-byte aligned - //assert(NumBytes==((NumBytes+15) & ~15) && "stack frame not 16-byte aligned!"); + // assert(NumBytes==((NumBytes+15) & ~15) && + // "stack frame not 16-byte aligned!"); NumBytes = (NumBytes+15) & ~15; Chain = DAG.getCALLSEQ_START(Chain,DAG.getConstant(NumBytes, getPointerTy())); @@ -328,7 +329,7 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain, for (unsigned i = 0, e = Args.size(); i != e; ++i) { - SDOperand Val = Args[i].first; + SDOperand Val = Args[i].Node; MVT::ValueType ObjectVT = Val.getValueType(); SDOperand ValToStore(0, 0), ValToConvert(0, 0); unsigned ObjSize=8; @@ -337,14 +338,15 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain, case MVT::i1: case MVT::i8: case MVT::i16: - case MVT::i32: + case MVT::i32: { //promote to 64-bits, sign/zero extending based on type //of the argument - if(Args[i].second->isSigned()) - Val = DAG.getNode(ISD::SIGN_EXTEND, MVT::i64, Val); - else - Val = DAG.getNode(ISD::ZERO_EXTEND, MVT::i64, Val); + ISD::NodeType ExtendKind = ISD::ZERO_EXTEND; + if (Args[i].isSigned) + ExtendKind = ISD::SIGN_EXTEND; + Val = DAG.getNode(ExtendKind, MVT::i64, Val); // XXX: fall through + } case MVT::i64: //ObjSize = 8; if(RegValuesToPass.size() >= 8) { @@ -422,7 +424,8 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain, unsigned seenConverts = 0; for (unsigned i = 0, e = RegValuesToPass.size(); i != e; ++i) { if(MVT::isFloatingPoint(RegValuesToPass[i].getValueType())) { - Chain = DAG.getCopyToReg(Chain, IntArgRegs[i], Converts[seenConverts++], InFlag); + Chain = DAG.getCopyToReg(Chain, IntArgRegs[i], Converts[seenConverts++], + InFlag); InFlag = Chain.getValue(1); } } @@ -432,8 +435,7 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain, for (unsigned i = 0, e = RegValuesToPass.size(); i != e; ++i) { Chain = DAG.getCopyToReg(Chain, MVT::isInteger(RegValuesToPass[i].getValueType()) ? - IntArgRegs[i] : FPArgRegs[usedFPArgs++], - RegValuesToPass[i], InFlag); + IntArgRegs[i] : FPArgRegs[usedFPArgs++], RegValuesToPass[i], InFlag); InFlag = Chain.getValue(1); } @@ -483,7 +485,7 @@ IA64TargetLowering::LowerCallTo(SDOperand Chain, case MVT::i1: { // bools are just like other integers (returned in r8) // we *could* fall through to the truncate below, but this saves a // few redundant predicate ops - SDOperand boolInR8 = DAG.getCopyFromReg(Chain, IA64::r8, MVT::i64, InFlag); + SDOperand boolInR8 = DAG.getCopyFromReg(Chain, IA64::r8, MVT::i64,InFlag); InFlag = boolInR8.getValue(2); Chain = boolInR8.getValue(1); SDOperand zeroReg = DAG.getCopyFromReg(Chain, IA64::r0, MVT::i64, InFlag); diff --git a/llvm/lib/Target/IA64/IA64ISelLowering.h b/llvm/lib/Target/IA64/IA64ISelLowering.h index 704e358930110e1d00b77dba18456ffda0d6ee22..9918c4bfe38d87886ab160c7e569c58f7bfdbe3d 100644 --- a/llvm/lib/Target/IA64/IA64ISelLowering.h +++ b/llvm/lib/Target/IA64/IA64ISelLowering.h @@ -58,10 +58,9 @@ namespace llvm { /// LowerCallTo - This hook lowers an abstract call to a function into an /// actual call. virtual std::pair - LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg, - unsigned CC, - bool isTailCall, SDOperand Callee, ArgListTy &Args, - SelectionDAG &DAG); + LowerCallTo(SDOperand Chain, const Type *RetTy, bool RetTyIsSigned, + bool isVarArg, unsigned CC, bool isTailCall, + SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG); /// LowerOperation - for custom lowering specific ops /// (currently, only "ret void") diff --git a/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp b/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp index e5e9b4463ca66533a3c1b37ac1fda79f585a9eee..43059ea9ee56c496be9c3002ea5479b30d756a6a 100644 --- a/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp +++ b/llvm/lib/Target/Sparc/SparcISelDAGToDAG.cpp @@ -117,10 +117,9 @@ namespace { virtual std::vector LowerArguments(Function &F, SelectionDAG &DAG); virtual std::pair - LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg, - unsigned CC, - bool isTailCall, SDOperand Callee, ArgListTy &Args, - SelectionDAG &DAG); + LowerCallTo(SDOperand Chain, const Type *RetTy, bool RetTyIsSigned, + bool isVarArg, unsigned CC, bool isTailCall, SDOperand Callee, + ArgListTy &Args, SelectionDAG &DAG); virtual MachineBasicBlock *InsertAtEndOfBasicBlock(MachineInstr *MI, MachineBasicBlock *MBB); @@ -318,8 +317,7 @@ SparcTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { MF.addLiveIn(*CurArgReg++, VReg); SDOperand Arg = DAG.getCopyFromReg(Root, VReg, MVT::i32); if (ObjectVT != MVT::i32) { - unsigned AssertOp = I->getType()->isSigned() ? ISD::AssertSext - : ISD::AssertZext; + unsigned AssertOp = ISD::AssertSext; Arg = DAG.getNode(AssertOp, MVT::i32, Arg, DAG.getValueType(ObjectVT)); Arg = DAG.getNode(ISD::TRUNCATE, ObjectVT, Arg); @@ -332,8 +330,7 @@ SparcTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { if (ObjectVT == MVT::i32) { Load = DAG.getLoad(MVT::i32, Root, FIPtr, NULL, 0); } else { - ISD::LoadExtType LoadOp = - I->getType()->isSigned() ? ISD::SEXTLOAD : ISD::ZEXTLOAD; + ISD::LoadExtType LoadOp = ISD::SEXTLOAD; // Sparc is big endian, so add an offset based on the ObjectVT. unsigned Offset = 4-std::max(1U, MVT::getSizeInBits(ObjectVT)/8); @@ -472,13 +469,13 @@ SparcTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { std::pair SparcTargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, - bool isVarArg, unsigned CC, + bool RetTyIsSigned, bool isVarArg, unsigned CC, bool isTailCall, SDOperand Callee, ArgListTy &Args, SelectionDAG &DAG) { // Count the size of the outgoing arguments. unsigned ArgsSize = 0; for (unsigned i = 0, e = Args.size(); i != e; ++i) { - switch (getValueType(Args[i].second)) { + switch (getValueType(Args[i].Ty)) { default: assert(0 && "Unknown value type!"); case MVT::i1: case MVT::i8: @@ -508,7 +505,7 @@ SparcTargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, std::vector RegValuesToPass; unsigned ArgOffset = 68; for (unsigned i = 0, e = Args.size(); i != e; ++i) { - SDOperand Val = Args[i].first; + SDOperand Val = Args[i].Node; MVT::ValueType ObjectVT = Val.getValueType(); SDOperand ValToStore(0, 0); unsigned ObjSize; @@ -516,14 +513,15 @@ SparcTargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, default: assert(0 && "Unhandled argument type!"); case MVT::i1: case MVT::i8: - case MVT::i16: + case MVT::i16: { // Promote the integer to 32-bits. If the input type is signed, use a // sign extend, otherwise use a zero extend. - if (Args[i].second->isSigned()) - Val = DAG.getNode(ISD::SIGN_EXTEND, MVT::i32, Val); - else - Val = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Val); + ISD::NodeType ExtendKind = ISD::ZERO_EXTEND; + if (Args[i].isSigned) + ExtendKind = ISD::SIGN_EXTEND; + Val = DAG.getNode(ExtendKind, MVT::i32, Val); // FALL THROUGH + } case MVT::i32: ObjSize = 4; @@ -629,15 +627,19 @@ SparcTargetLowering::LowerCallTo(SDOperand Chain, const Type *RetTy, default: assert(0 && "Unknown value type to return!"); case MVT::i1: case MVT::i8: - case MVT::i16: + case MVT::i16: { RetVal = DAG.getCopyFromReg(Chain, SP::O0, MVT::i32, InFlag); Chain = RetVal.getValue(1); // Add a note to keep track of whether it is sign or zero extended. - RetVal = DAG.getNode(RetTy->isSigned() ? ISD::AssertSext :ISD::AssertZext, - MVT::i32, RetVal, DAG.getValueType(RetTyVT)); + ISD::NodeType AssertKind = ISD::AssertZext; + if (RetTyIsSigned) + AssertKind = ISD::AssertSext; + RetVal = DAG.getNode(AssertKind, MVT::i32, RetVal, + DAG.getValueType(RetTyVT)); RetVal = DAG.getNode(ISD::TRUNCATE, RetTyVT, RetVal); break; + } case MVT::i32: RetVal = DAG.getCopyFromReg(Chain, SP::O0, MVT::i32, InFlag); Chain = RetVal.getValue(1); diff --git a/llvm/lib/Target/TargetData.cpp b/llvm/lib/Target/TargetData.cpp index 6dfeefde5f7f103fda270a2bb539211674ede94c..db0ea2cb4c6f4e9624c5a3d3da579e1f20b6a3ed 100644 --- a/llvm/lib/Target/TargetData.cpp +++ b/llvm/lib/Target/TargetData.cpp @@ -243,14 +243,10 @@ static inline void getTypeInfo(const Type *Ty, const TargetData *TD, switch (Ty->getTypeID()) { case Type::BoolTyID: Size = 1; Alignment = TD->getBoolAlignment(); return; case Type::VoidTyID: - case Type::UByteTyID: - case Type::SByteTyID: Size = 1; Alignment = TD->getByteAlignment(); return; - case Type::UShortTyID: - case Type::ShortTyID: Size = 2; Alignment = TD->getShortAlignment(); return; - case Type::UIntTyID: - case Type::IntTyID: Size = 4; Alignment = TD->getIntAlignment(); return; - case Type::ULongTyID: - case Type::LongTyID: Size = 8; Alignment = TD->getLongAlignment(); return; + case Type::Int8TyID: Size = 1; Alignment = TD->getByteAlignment(); return; + case Type::Int16TyID: Size = 2; Alignment = TD->getShortAlignment(); return; + case Type::Int32TyID: Size = 4; Alignment = TD->getIntAlignment(); return; + case Type::Int64TyID: Size = 8; Alignment = TD->getLongAlignment(); return; case Type::FloatTyID: Size = 4; Alignment = TD->getFloatAlignment(); return; case Type::DoubleTyID: Size = 8; Alignment = TD->getDoubleAlignment(); return; case Type::LabelTyID: @@ -312,9 +308,9 @@ unsigned char TargetData::getTypeAlignmentShift(const Type *Ty) const { const Type *TargetData::getIntPtrType() const { switch (getPointerSize()) { default: assert(0 && "Unknown pointer size!"); - case 2: return Type::UShortTy; - case 4: return Type::UIntTy; - case 8: return Type::ULongTy; + case 2: return Type::Int16Ty; + case 4: return Type::Int32Ty; + case 8: return Type::Int64Ty; } } @@ -329,7 +325,7 @@ uint64_t TargetData::getIndexedOffset(const Type *ptrTy, TI = gep_type_begin(ptrTy, Idx.begin(), Idx.end()); for (unsigned CurIDX = 0; CurIDX != Idx.size(); ++CurIDX, ++TI) { if (const StructType *STy = dyn_cast(*TI)) { - assert(Idx[CurIDX]->getType() == Type::UIntTy && "Illegal struct idx"); + assert(Idx[CurIDX]->getType() == Type::Int32Ty && "Illegal struct idx"); unsigned FieldNo = cast(Idx[CurIDX])->getZExtValue(); // Get structure layout information... diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index d92c699012b82726a002a30e05d5faadeaaa929d..ac1b708e885b2201063c50b9665573f78fc03b2a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -4447,14 +4447,21 @@ SDOperand X86TargetLowering::LowerMEMSET(SDOperand Op, SelectionDAG &DAG) { (I && I->getValue() < Subtarget->getMinRepStrSizeThreshold())) { MVT::ValueType IntPtr = getPointerTy(); const Type *IntPtrTy = getTargetData()->getIntPtrType(); - std::vector > Args; - Args.push_back(std::make_pair(Op.getOperand(1), IntPtrTy)); + TargetLowering::ArgListTy Args; + TargetLowering::ArgListEntry Entry; + Entry.Node = Op.getOperand(1); + Entry.Ty = IntPtrTy; + Entry.isSigned = false; + Args.push_back(Entry); // Extend the ubyte argument to be an int value for the call. - SDOperand Val = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Op.getOperand(2)); - Args.push_back(std::make_pair(Val, IntPtrTy)); - Args.push_back(std::make_pair(Op.getOperand(3), IntPtrTy)); + Entry.Node = DAG.getNode(ISD::ZERO_EXTEND, MVT::i32, Op.getOperand(2)); + Entry.Ty = IntPtrTy; + Entry.isSigned = false; + Args.push_back(Entry); + Entry.Node = Op.getOperand(3); + Args.push_back(Entry); std::pair CallResult = - LowerCallTo(Chain, Type::VoidTy, false, CallingConv::C, false, + LowerCallTo(Chain, Type::VoidTy, false, false, CallingConv::C, false, DAG.getExternalSymbol("memset", IntPtr), Args, DAG); return CallResult.second; } @@ -4601,13 +4608,14 @@ SDOperand X86TargetLowering::LowerMEMCPY(SDOperand Op, SelectionDAG &DAG) { if ((Align & 3) != 0 || (I && I->getValue() < Subtarget->getMinRepStrSizeThreshold())) { MVT::ValueType IntPtr = getPointerTy(); - const Type *IntPtrTy = getTargetData()->getIntPtrType(); - std::vector > Args; - Args.push_back(std::make_pair(Op.getOperand(1), IntPtrTy)); - Args.push_back(std::make_pair(Op.getOperand(2), IntPtrTy)); - Args.push_back(std::make_pair(Op.getOperand(3), IntPtrTy)); + TargetLowering::ArgListTy Args; + TargetLowering::ArgListEntry Entry; + Entry.Ty = getTargetData()->getIntPtrType(); Entry.isSigned = false; + Entry.Node = Op.getOperand(1); Args.push_back(Entry); + Entry.Node = Op.getOperand(2); Args.push_back(Entry); + Entry.Node = Op.getOperand(3); Args.push_back(Entry); std::pair CallResult = - LowerCallTo(Chain, Type::VoidTy, false, CallingConv::C, false, + LowerCallTo(Chain, Type::VoidTy, false, false, CallingConv::C, false, DAG.getExternalSymbol("memcpy", IntPtr), Args, DAG); return CallResult.second; } diff --git a/llvm/lib/Target/X86/X86TargetAsmInfo.cpp b/llvm/lib/Target/X86/X86TargetAsmInfo.cpp index 71640380348cdd521e9420127596ce5c6f5ebd92..e25e2690af438f1f32a3fa314da12cd7a0944ddf 100644 --- a/llvm/lib/Target/X86/X86TargetAsmInfo.cpp +++ b/llvm/lib/Target/X86/X86TargetAsmInfo.cpp @@ -172,13 +172,13 @@ bool X86TargetAsmInfo::LowerToBSwap(CallInst *CI) const { !CI->getType()->isInteger()) return false; - const Type *Ty = CI->getType()->getUnsignedVersion(); + const Type *Ty = CI->getType(); const char *IntName; switch (Ty->getTypeID()) { default: return false; - case Type::UShortTyID: IntName = "llvm.bswap.i16"; break; - case Type::UIntTyID: IntName = "llvm.bswap.i32"; break; - case Type::ULongTyID: IntName = "llvm.bswap.i64"; break; + case Type::Int16TyID: IntName = "llvm.bswap.i16"; break; + case Type::Int32TyID: IntName = "llvm.bswap.i32"; break; + case Type::Int64TyID: IntName = "llvm.bswap.i64"; break; } // Okay, we can do this xform, do so now. @@ -226,7 +226,7 @@ bool X86TargetAsmInfo::ExpandInlineAsm(CallInst *CI) const { } break; case 3: - if (CI->getType() == Type::ULongTy && Constraints.size() >= 2 && + if (CI->getType() == Type::Int64Ty && Constraints.size() >= 2 && Constraints[0].Codes.size() == 1 && Constraints[0].Codes[0] == "A" && Constraints[1].Codes.size() == 1 && Constraints[1].Codes[0] == "0") { // bswap %eax / bswap %edx / xchgl %eax, %edx -> llvm.bswap.i64