llvm-svn: 138831

llvm-svn: 138830

llvm-svn: 138829

disabled.

llvm-svn: 138826

In the case of EDInstInfo, this would actually cause a bug when -1 became 255
and was then compared >=0 in llvm-mc/Disassembler.cpp.

llvm-svn: 138825

sure that all of the CXXConversionDecls go into the same
bucket. Otherwise, name lookup might not find them all. Fixes
<rdar://problem/10041960>.

llvm-svn: 138824

llvm-svn: 138823

llvm-svn: 138822

This makes the code duplication of implicit special member handling even worse,
but the cleanup will have to come later. For now, this works.
Follow-up with tests for explicit defaulting and enabling the __has_feature
flag to come.

llvm-svn: 138821

Patch by Sanjoy Das.

llvm-svn: 138820

llvm-svn: 138819

code is inserted to first check if the current stacklet has enough
space. If so, space is allocated by simply decrementing the stack
pointer. Otherwise a runtime routine (__morestack_allocate_stack_space
in libgcc) is called which allocates the required memory from the
heap.

Patch by Sanjoy Das.

llvm-svn: 138818

Remove
  -setClassInterface
  -setNextClassCategory
  -insertNextClassCategory

and combine them in the Create function.

llvm-svn: 138817

Empty lookups can occur in the DeclContext map when we are chaining PCHs, where
the empty lookup indicates that we already looked in ExternalASTSource.

llvm-svn: 138816

llvm-svn: 138815

from DYNAMIC_STACKALLOC.

Two new pseudo instructions (SEG_ALLOCA_32 and SEG_ALLOCA_64) which
will match X86SegAlloca (based on word size) are also added.  They
will be custom emitted to inject the actual stack handling code.

Patch by Sanjoy Das.

llvm-svn: 138814

llvm-svn: 138813

X86. Modify the pass added in the previous patch to call this new
code.

This new prologues generated will call a libgcc routine (__morestack)
to allocate more stack space from the heap when required

Patch by Sanjoy Das.

llvm-svn: 138812

-segmented-stacks.
Patch by Sanjoy Das!

llvm-svn: 138811

Add a instruction flag: hasPostISelHook which tells the pre-RA scheduler to
call a target hook to adjust the instruction. For ARM, this is used to
adjust instructions which may be setting the 's' flag. ADC, SBC, RSB, and RSC
instructions have implicit def of CPSR (required since it now uses CPSR physical
register dependency rather than "glue"). If the carry flag is used, then the
target hook will *fill in* the optional operand with CPSR. Otherwise, the hook
will remove the CPSR implicit def from the MachineInstr.

llvm-svn: 138810

When walking backwards to eliminate final stores to allocas at the end of a function, encountering an unrelated store should not cause us to give up like encountering a load does.

llvm-svn: 138809

llvm-svn: 138807

llvm-svn: 138806

Eli added this in revision 132695.

llvm-svn: 138805

This is useful for testing a build a temporarily hand instrumented
build.
Patch by arrowdodger!

llvm-svn: 138804

objective-c containers due to recent changes to objc decl 
contexts. // rdar://10041908

llvm-svn: 138803

arguments as before), unset CR1EQ otherwise.

llvm-svn: 138802

Patch supplied by Liu (projlc@gmail.com)

llvm-svn: 138799

Patch supplied by Liu (projlc@gmail.com)

llvm-svn: 138798

Patch supplied by Liu (projlc@gmail.com)

llvm-svn: 138797

llvm-svn: 138796

Add vvvv support to disassembling of instructions with MRMDestMem and MRMDestReg form. Needed to support mem dest form of vmaskmovps/d. Fixes PR10807.

llvm-svn: 138795

I don't currently have a good testcase for this; will try to get one
tomorrow.  <rdar://problem/10032939>

llvm-svn: 138794

Remove obsolete ObjCInferRelatedReturnType from LangOptions...the correct option is ObjCInferRelatedResultType.

llvm-svn: 138793

apparent general rule.  Just special-case it as appropriate.
PR10789.

llvm-svn: 138792

register dependency (rather than glue them together). This is general
goodness as it gives scheduler more freedom. However it is motivated by
a nasty bug in isel.

When a i64 sub is expanded to subc + sube.
  libcall #1
     \
      \        subc 
       \       /  \
        \     /    \
         \   /    libcall #2
          sube

If the libcalls are not serialized (i.e. both have chains which are dag
entry), legalizer can serialize them in arbitrary orders. If it's
unlucky, it can force libcall #2 before libcall #1 in the above case.

  subc
   |
  libcall #2
   |
  libcall #1
   |
  sube

However since subc and sube are "glued" together, this ends up being a
cycle when the scheduler combine subc and sube as a single scheduling
unit.

The right solution is to fix LegalizeType too chains the libcalls together.
However, LegalizeType is not processing nodes in order so that's harder than
it should be. For now, the move to physical register dependency will do.

rdar://10019576

llvm-svn: 138791

llvm-svn: 138790

Doing this happens to disrupt the pattern that ARC was looking for
for move optimizations, so we need to fix that simultaneously.

llvm-svn: 138789

llvm-svn: 138788

llvm-svn: 138787