- Oct 17, 2012
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Chandler Carruth authored
revision makes no sense. We cannot use the address space of the *post indexed* type to conclude anything about a *pre indexed* pointer type's size. More importantly, this index can never be over a pointer. We are indexing over arrays and vectors here. Of course, I have no test case here. Neither did the original patch. =/ llvm-svn: 166091
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Richard Smith authored
llvm-svn: 166090
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Craig Topper authored
Remove LLVM_DELETED_FUNCTION from destructors that override non-deleted base class destructors. This isn't legal by the C++11 standard and clang now checks for it. Curiously gcc didn't catch this, possibly because of the template usage. llvm-svn: 166089
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John McCall authored
has ivars that require destruction, but none that require anything except zero-initialization. This is common in ARC and (when true throughout a class hierarchy) permits the elimination of an unnecessary message-send during allocation. llvm-svn: 166088
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John McCall authored
No functionality change. llvm-svn: 166087
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Michael Liao authored
- All shuffle insns required, especially PSHUB, are added in SSSE3. llvm-svn: 166086
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John McCall authored
combination of a load+objc_release; this is generally better for tools that try to track why values are retained and released. Also use objc_storeStrong when copying a block (again, only at -O0), which requires us to do a preliminary store of null in order to compensate for objc_storeStrong's assign semantics. llvm-svn: 166085
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Michael Liao authored
- MBB address is only valid as an immediate value in Small & Static code/relocation models. On other models, LEA is needed to load IP address of the restore MBB. - A minor fix of MBB in MC lowering is added as well to enable target relocation flag being propagated into MC. llvm-svn: 166084
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Jakob Stoklund Olesen authored
This is just as fast, and it makes it possible to avoid leaking the UsedPhysRegs BitVector implementation through MachineRegisterInfo::addPhysRegsUsed(). llvm-svn: 166083
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David Blaikie authored
Only deleted functions may override deleted functions and non-deleted functions may only override non-deleted functions. llvm-svn: 166082
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Jason Molenda authored
to handle an addition class of early-return instructions we find in arm code: tail-call optimziation returns where we restore the register state from the function entry and jump directly (not branch & link) to another function -- when that other function returns, it will return to our caller. Previously this mid-function epilogue sequence was not being correctly detected. We would not re-instate the prologue setup instructions for the rest of the function so unwinds would break from that point until the end of the function. <rdar://problem/12502597> llvm-svn: 166081
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Nico Weber authored
llvm-svn: 166080
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Douglas Gregor authored
llvm-svn: 166079
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Eli Friedman authored
llvm-svn: 166078
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Eric Christopher authored
llvm-svn: 166077
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Eric Christopher authored
llvm-svn: 166076
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Eric Christopher authored
llvm-svn: 166075
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Eric Christopher authored
llvm-svn: 166074
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Eli Friedman authored
llvm-svn: 166073
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Douglas Gregor authored
target options around so they can be accessed at any point (rather than keeping them transient). llvm-svn: 166072
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Richard Smith authored
explicitly specified iff it was specified in the declaration. llvm-svn: 166071
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Greg Clayton authored
llvm-svn: 166070
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David Blaikie authored
This is consistent/interoperable with GCC 4.7 (& __cxa_deleted_function isn't present in 4.4 - not sure when it got added, but you'll need something with that function available for this to work). llvm-svn: 166069
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Jakob Stoklund Olesen authored
PR14098 contains an example where we would rematerialize a MOV8ri immediately after the original instruction: %vreg7:sub_8bit<def> = MOV8ri 9; GR32_ABCD:%vreg7 %vreg22:sub_8bit<def> = MOV8ri 9; GR32_ABCD:%vreg7 Besides being pointless, it is also wrong since the original instruction only redefines part of the register, and the value read by the new instruction is wrong. The problem was the LiveRangeEdit::allUsesAvailableAt() didn't special-case OrigIdx == UseIdx and found the wrong SSA value. llvm-svn: 166068
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Jakob Stoklund Olesen authored
A fix for PR14098, including the test case is in the next commit. llvm-svn: 166067
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Manman Ren authored
rdar://12439123 llvm-svn: 166066
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Derek Schuff authored
Because PNaCl bitcode must be target-independent, it uses some different bitcode representations from other targets (e.g. byval and sret for structures). This means that without additional type information, it cannot meet some native ABI requirements for some targets (e.g. passing structures containing unions by value on x86-64). To allow generation of code which uses the correct native ABIs, we also support triples such as x86_64-nacl, which uses target-dependent IR (as opposed to le32-nacl, which uses byval and sret). To allow interoperation between the two types of code, this patch adds a calling convention attribute to be used in code compiled with the target-dependent triple, which will generate code using the le32-style bitcode. This calling convention does not need to be explicitly supported in the backend because it determines bitcode representation rather than native conventions (the backend just needs to undersand how to handle byval and sret for the Native Client OS). This patch implements __attribute__((pnaclcall)) to generate calls in bitcode according to the le32 bitcode conventions, an attribute which is accepted by any Native Client target, but issues a warning otherwise. llvm-svn: 166065
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Manman Ren authored
llvm-svn: 166064
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- Oct 16, 2012
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Chad Rosier authored
front-end and the AsmParser. No functional change intended. llvm-svn: 166063
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Jim Ingham authored
the SB API's that evaluate expressions. <rdar://problem/12457211> llvm-svn: 166062
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Michael Gottesman authored
An obfuscated splat is where the frontend poorly generates code for a splat using several different shuffles to create the splat, i.e., %A = load <4 x float>* %in_ptr, align 16 %B = shufflevector <4 x float> %A, <4 x float> undef, <4 x i32> <i32 0, i32 0, i32 undef, i32 undef> %C = shufflevector <4 x float> %B, <4 x float> %A, <4 x i32> <i32 0, i32 1, i32 4, i32 undef> %D = shufflevector <4 x float> %C, <4 x float> %A, <4 x i32> <i32 0, i32 1, i32 2, i32 4> llvm-svn: 166061
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Enrico Granata authored
llvm-svn: 166060
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David Blaikie authored
(original functionality committed in r99807, refactored in r160373) llvm-svn: 166059
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rdar://problem/12446320Enrico Granata authored
<rdar://problem/12446320> Fixing an issue with our Driver where setting an immediate output would not cause suppression of the final printout. This allows effective output redirection for Python commands llvm-svn: 166058
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Jason Molenda authored
to work properly; when doing bare-boards rom debugging force the OS to be one of those when initializing llvm. <rdar://problem/12504138> llvm-svn: 166057
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David Blaikie authored
llvm-svn: 166056
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Greg Clayton authored
This patch fixes an issue where if lldb fails to attach to a process (ie. invalid pid) on Linux, the process monitor thread gets stuck waiting for a signal from the attach thread, which never comes due to not being signaled. It also implements StopOpThread which is used for both attach/launch cases as I'm not aware of any special handling needed for the attach case. Also, propagate 'Error' from the Detach function instead of using a bool. llvm-svn: 166055
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Chad Rosier authored
llvm-svn: 166054
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Jakub Staszak authored
llvm-svn: 166053
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Manman Ren authored
We generalize r166040 to handle ABI alignment issues for all types. rdar://12439123 llvm-svn: 166052
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