llvm-svn: 137176

VMCore/BasicBlock.cpp: Don't assume BasicBlock::iterator might end with a non-PHInode Instruction in successors.

Frontends(eg. clang) might pass incomplete form of IR, to step off the way beyond iterator end. In the case I had met, it took infinite loop due to meeting bogus PHInode.

Thanks to Jay Foad and John McCall.

llvm-svn: 137175

llvm-svn: 137174

llvm-svn: 137173

llvm-svn: 137172

Fix an oversight in the FixedLenDecoderEmitter where we weren't correctly checking the success result of custom decoder hooks on singleton decodings.

llvm-svn: 137171

llvm-svn: 137170

llvm-svn: 137169

Create a new register class for the set of all GPRs except the PC.  Use it to tighten our decoding of BFI.

llvm-svn: 137168

types instead of letting Clang crash.

llvm-svn: 137167

llvm-svn: 137166

llvm-svn: 137165

llvm-svn: 137164

llvm-svn: 137163

llvm-svn: 137162

is the best we can do for these patterns. This fix PR10554.

llvm-svn: 137161

llvm-svn: 137160

functionality since in the C api a pass is created and added to a pass
manager in a single call.

llvm-svn: 137159

Assigned symbol addresses get truncated to 32-bits, even on 64-bit platforms.
That's obviously bogus.
For example,

 .globl _foo
 .equ _foo, 0x987654321ULL


rdar://9922863

llvm-svn: 137158

used a log unchecked.

llvm-svn: 137157

Not sure about BLXi, but this is what the old disassembler did.

llvm-svn: 137156

llvm-svn: 137154

llvm-svn: 137153

The new ARM disassembler disassembles "bx lr" as a special BX_ret instruction so target specific analysis isn't needed anymore.

llvm-svn: 137151

llvm-svn: 137150

llvm-svn: 137149

rdar://9915869

llvm-svn: 137148

llvm-svn: 137147

llvm-svn: 137146

This is mostly descriptive of the intended state once atomic load and store have landed.  

llvm-svn: 137145

This new disassembler can correctly decode all the testcases that the old one did, though
some "expected failure" testcases are XFAIL'd for now because it is not (yet) as strict in
operand checking as the old one was.

llvm-svn: 137144

When unloading a library, pass the old complete version of the library to UnloadImageLoadAddress, since that
one is completely filled in.  The one we make up from the event doesn't have section info since the
library has already been unloaded by the time we get to it.

llvm-svn: 137143

was behaving erratically because it didn't
have a return statement in -[A init].

Also made minor cosmetic changes to that test
case.

llvm-svn: 137142

llvm-svn: 137141

For Makefile.rules, the modification of CFLAGS (addition of -arch $(ARCH) for Darwin) needs to come before
the consuming of CFLAGS, not after.

llvm-svn: 137140

llvm-svn: 137137

Fix a crash while running the test suite.  Need to check the (LogSP)log shared pointer before using it.

llvm-svn: 137136

llvm-svn: 137135

'static' variable will be emitted twice.
PR10081

llvm-svn: 137134

Coalescing can remove copy-like instructions with sub-register operands
that constrained the register class.  Examples are:

  x86: GR32_ABCD:sub_8bit_hi -> GR32
  arm: DPR_VFP2:ssub0 -> DPR

Recompute the register class of any virtual registers that are used by
less instructions after coalescing.

This affects code generation for the Cortex-A8 where we use NEON
instructions for f32 operations, c.f. fp_convert.ll:

  vadd.f32  d16, d1, d0
  vcvt.s32.f32  d0, d16

The register allocator is now free to use d16 for the temporary, and
that comes first in the allocation order because it doesn't interfere
with any s-registers.

llvm-svn: 137133