- Apr 02, 2013
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NAKAMURA Takumi authored
llvm-svn: 178508
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Chad Rosier authored
and Jordan's suggestion. No functional change intendend. llvm-svn: 178507
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- Apr 01, 2013
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Jack Carter authored
Revision 177141 caused a regression in all but mips64 little endian. That is because none of the other Mips targets had test cases checking the contents of the .eh_frame section. This patch fixes both the llvm code and adds an assembler test case to include the current 4 flavors. The test cases unfortunately rely on llvm-objdump. A preferable method would be to use a pretty printer output such as what readelf -wf <elf_file> would give. I also changed the name of the test case to correct a typo. llvm-svn: 178506
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Vincent Lejeune authored
llvm-svn: 178505
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Vincent Lejeune authored
llvm-svn: 178504
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Vincent Lejeune authored
llvm-svn: 178503
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Richard Smith authored
specifier for an enumeration. Also fix a crash-on-invalid if a non-dependent name specifier is used to declare an enum template. llvm-svn: 178502
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Argyrios Kyrtzidis authored
[arcmt] Copy the diagnostics so we don't have to worry about invaliding iterators from the diagnostic list. Should fix http://llvm.org/PR15500 llvm-svn: 178500
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Tom Stellard authored
v2: - Add a test case v3: - Use the -### clang option in the tests llvm-svn: 178499
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Tom Stellard authored
llvm-svn: 178498
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Nico Weber authored
Also add a test for PR15637. llvm-svn: 178497
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Richard Smith authored
member inside a class template) when loading a PCH file or module. llvm-svn: 178496
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Shankar Easwaran authored
llvm-svn: 178495
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Ariel J. Bernal authored
Previously UseNullptr matched separately implicit and explicit casts to nullptr, now it matches casts that either are implict casts to nullptr or have an implicit cast to nullptr within. Also fixes PR15572 since the same macro replacement logic is applied to implicit and explicit casts. llvm-svn: 178494
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Daniel Malea authored
- process in 'unloaded' state was (incorrectly) considered to be alive by POSIX plugin - above caused a regression in TestProcessLaunch cases llvm-svn: 178493
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Eli Bendersky authored
llvm-svn: 178492
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Daniel Malea authored
- Check that process attach succeeded before attempting to WaitForProcessToStop (observed to cause hangs on Linux) - Update comment in TestHelloWorld case -- attaching by name still broken llvm-svn: 178491
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Adrian Prantl authored
when we actually end a lexical block. * Added new test for line table / block cleanup. * Follow-up to r177819 / rdar://problem/13115369 llvm-svn: 178490
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Hal Finkel authored
llvm-svn: 178489
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John McCall authored
visible. There's a lot of potential badness in how we're modelling these things, but getting this much correct is reasonably easy. rdar://13535367 llvm-svn: 178488
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Edwin Vane authored
Updated docs and tests. llvm-svn: 178487
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Hal Finkel authored
llvm-svn: 178486
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Edwin Vane authored
Loop convert's variable name aliasing may cause issues if the variable is declared as a value (copy). The converted loop will declare the variable as a reference which may inadvertently cause modifications to the container if it were used and modified as a temporary copy. This is fixed by preserving the reference or value qualifiers of the aliased variable. That is, if the variable was declared as a value the loop variable will also be declared as a value and similarly for references. Fixes: PR15600 Author: Jack Yang <jack.yang@intel.com> llvm-svn: 178485
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Shuxin Yang authored
llvm-svn: 178484
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Arnold Schwaighofer authored
We would also like to merge sequences that involve a variable index like in the example below. int index = *idx++ int i0 = c[index+0]; int i1 = c[index+1]; b[0] = i0; b[1] = i1; By extending the parsing of the base pointer to handle dags that contain a base, index, and offset we can handle examples like the one above. The dag for the code above will look something like: (load (i64 add (i64 copyfromreg %c) (i64 signextend (i8 load %index)))) (load (i64 add (i64 copyfromreg %c) (i64 signextend (i32 add (i32 signextend (i8 load %index)) (i32 1))))) The code that parses the tree ignores the intermediate sign extensions. However, if there is a sign extension it needs to be on all indexes. (load (i64 add (i64 copyfromreg %c) (i64 signextend (add (i8 load %index) (i8 1)))) vs (load (i64 add (i64 copyfromreg %c) (i64 signextend (i32 add (i32 signextend (i8 load %index)) (i32 1))))) radar://13536387 llvm-svn: 178483
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Enrico Granata authored
To hook it up to individual test cases: - define GetLongOptions() in your test case class to return something other than NULL (hopefully an array of options :-) - implement ParseOption() to check for the short option char and do the right thing - return true at the end if you want more options to come your way or false if you don’t - make sure that your Setup() call takes int& and char**& so that optind post-processing can happen - and call TestCase::Setup from your setup llvm-svn: 178482
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Chad Rosier authored
llvm-svn: 178481
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Hal Finkel authored
The P7 and A2 have additional floating-point conversion instructions which allow a direct two-instruction sequence (plus load/store) to convert from all combinations (signed/unsigned i32/i64) <--> (float/double) (on previous cores, only some combinations were directly available). llvm-svn: 178480
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DeLesley Hutchins authored
These were previously enabled as a "beta" feature, but they have now been extensively tested. llvm-svn: 178478
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Enrico Granata authored
llvm-svn: 178477
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Richard Smith authored
llvm-svn: 178476
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Argyrios Kyrtzidis authored
Patch by Matthias Kleine! llvm-svn: 178475
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Daniel Jasper authored
Before: void * (*a)(int *, SomeType *); After: void *(*a)(int *, SomeType *); llvm-svn: 178474
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Hal Finkel authored
Code improvement suggested by Jakob (in review of r178450). No functionality change intended. llvm-svn: 178473
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Hal Finkel authored
llvm-svn: 178472
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Jyotsna Verma authored
The assembly output for Hexagon contains ".string missing_arg". llvm-svn: 178471
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Hal Finkel authored
The popcntw instruction is available whenever the popcntd instruction is available, and performs a separate popcnt on the lower and upper 32-bits. Ignoring the high-order count, this can be used for the 32-bit input case (saving on the explicit zero extension otherwise required to use popcntd). llvm-svn: 178470
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Nadav Rotem authored
Patch by: Veselov, Yuri <Yuri.Veselov@intel.com> llvm-svn: 178469
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Hal Finkel authored
PPCISD::STFIWX is really a memory opcode, and so it should come after FIRST_TARGET_MEMORY_OPCODE, and we should use DAG.getMemIntrinsicNode to create nodes using it. No functionality change intended (although there could be optimization benefits from preserving the MMO information). llvm-svn: 178468
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Shankar Easwaran authored
llvm-svn: 178467
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