From 61ddc3d3db9b6c6b163774c7ce9f4d611cbd7c80 Mon Sep 17 00:00:00 2001 From: Nico Weber Date: Fri, 3 Sep 2021 09:24:19 -0400 Subject: [PATCH] Revert "[NFC] Recommit "Regenerate SVE ACLE intrinsics tests"" This reverts commit 91eda9c30f33da6ec6da70b59a5f5da6c6397039. Breaks tests on macOS, both intel and arm. See e.g. https://logs.chromium.org/logs/chromium/buildbucket/cr-buildbucket/8837137028177680097/+/u/package_clang/stdout?format=raw https://logs.chromium.org/logs/chromium/buildbucket/cr-buildbucket/8837137028177680081/+/u/package_clang/stdout?format=raw http://45.33.8.238/macm1/17258/step_7.txt http://45.33.8.238/mac/35004/step_7.txt --- .../aarch64-sve-intrinsics/acle_sve_abd.c | 1192 ++++--------- .../aarch64-sve-intrinsics/acle_sve_abs.c | 334 +--- .../aarch64-sve-intrinsics/acle_sve_acge.c | 108 +- .../aarch64-sve-intrinsics/acle_sve_acgt.c | 108 +- .../aarch64-sve-intrinsics/acle_sve_acle.c | 108 +- .../aarch64-sve-intrinsics/acle_sve_aclt.c | 108 +- .../aarch64-sve-intrinsics/acle_sve_add.c | 1192 ++++--------- .../aarch64-sve-intrinsics/acle_sve_adda.c | 55 +- .../aarch64-sve-intrinsics/acle_sve_addv.c | 177 +- .../aarch64-sve-intrinsics/acle_sve_adrb.c | 59 +- .../aarch64-sve-intrinsics/acle_sve_adrd.c | 59 +- .../aarch64-sve-intrinsics/acle_sve_adrh.c | 59 +- .../aarch64-sve-intrinsics/acle_sve_adrw.c | 59 +- .../aarch64-sve-intrinsics/acle_sve_and.c | 872 +++------- .../aarch64-sve-intrinsics/acle_sve_andv.c | 129 +- .../aarch64-sve-intrinsics/acle_sve_asr.c | 748 +++----- .../aarch64-sve-intrinsics/acle_sve_asrd.c | 275 +-- .../aarch64-sve-intrinsics/acle_sve_bfdot.c | 60 +- .../aarch64-sve-intrinsics/acle_sve_bfmlalb.c | 60 +- .../aarch64-sve-intrinsics/acle_sve_bfmlalt.c | 60 +- .../aarch64-sve-intrinsics/acle_sve_bfmmla.c | 18 +- .../aarch64-sve-intrinsics/acle_sve_bic.c | 872 +++------- .../aarch64-sve-intrinsics/acle_sve_brka.c | 33 +- .../aarch64-sve-intrinsics/acle_sve_brkb.c | 33 +- .../aarch64-sve-intrinsics/acle_sve_brkn.c | 20 +- .../aarch64-sve-intrinsics/acle_sve_brkpa.c | 20 +- .../aarch64-sve-intrinsics/acle_sve_brkpb.c | 20 +- .../aarch64-sve-intrinsics/acle_sve_cadd.c | 179 +- .../acle_sve_clasta-bfloat.c | 39 +- .../aarch64-sve-intrinsics/acle_sve_clasta.c | 347 +--- .../acle_sve_clastb-bfloat.c | 39 +- .../aarch64-sve-intrinsics/acle_sve_clastb.c | 347 +--- .../aarch64-sve-intrinsics/acle_sve_cls.c | 190 +- .../aarch64-sve-intrinsics/acle_sve_clz.c | 373 +--- .../aarch64-sve-intrinsics/acle_sve_cmla.c | 269 +-- .../aarch64-sve-intrinsics/acle_sve_cmpeq.c | 545 ++---- .../aarch64-sve-intrinsics/acle_sve_cmpge.c | 656 ++----- .../aarch64-sve-intrinsics/acle_sve_cmpgt.c | 656 ++----- .../aarch64-sve-intrinsics/acle_sve_cmple.c | 656 ++----- .../aarch64-sve-intrinsics/acle_sve_cmplt.c | 656 ++----- .../aarch64-sve-intrinsics/acle_sve_cmpne.c | 545 ++---- .../aarch64-sve-intrinsics/acle_sve_cmpuo.c | 130 +- .../aarch64-sve-intrinsics/acle_sve_cnot.c | 373 +--- .../acle_sve_cnt-bfloat.c | 55 +- .../aarch64-sve-intrinsics/acle_sve_cnt.c | 517 ++---- .../aarch64-sve-intrinsics/acle_sve_cntb.c | 218 +-- .../aarch64-sve-intrinsics/acle_sve_cntd.c | 239 +-- .../aarch64-sve-intrinsics/acle_sve_cnth.c | 221 +-- .../aarch64-sve-intrinsics/acle_sve_cntp.c | 75 +- .../aarch64-sve-intrinsics/acle_sve_cntw.c | 233 +-- .../aarch64-sve-intrinsics/acle_sve_compact.c | 103 +- .../acle_sve_create2-bfloat.c | 18 +- .../aarch64-sve-intrinsics/acle_sve_create2.c | 148 +- .../acle_sve_create3-bfloat.c | 18 +- .../aarch64-sve-intrinsics/acle_sve_create3.c | 148 +- .../acle_sve_create4-bfloat.c | 18 +- .../aarch64-sve-intrinsics/acle_sve_create4.c | 148 +- .../acle_sve_cvt-bfloat.c | 53 +- .../aarch64-sve-intrinsics/acle_sve_cvt.c | 1543 +++++------------ .../aarch64-sve-intrinsics/acle_sve_cvtnt.c | 37 +- .../aarch64-sve-intrinsics/acle_sve_div.c | 784 +++------ .../aarch64-sve-intrinsics/acle_sve_divr.c | 784 +++------ .../aarch64-sve-intrinsics/acle_sve_dot.c | 201 +-- .../acle_sve_dup-bfloat.c | 84 +- .../aarch64-sve-intrinsics/acle_sve_dup.c | 897 +++------- .../acle_sve_dupq-bfloat.c | 55 +- .../aarch64-sve-intrinsics/acle_sve_dupq.c | 756 ++------ .../aarch64-sve-intrinsics/acle_sve_eor.c | 871 +++------- .../aarch64-sve-intrinsics/acle_sve_eorv.c | 129 +- .../aarch64-sve-intrinsics/acle_sve_expa.c | 46 +- .../acle_sve_ext-bfloat.c | 20 +- .../aarch64-sve-intrinsics/acle_sve_ext.c | 202 +-- .../aarch64-sve-intrinsics/acle_sve_extb.c | 295 +--- .../aarch64-sve-intrinsics/acle_sve_exth.c | 199 +-- .../aarch64-sve-intrinsics/acle_sve_extw.c | 103 +- .../acle_sve_get2-bfloat.c | 31 +- .../aarch64-sve-intrinsics/acle_sve_get2.c | 150 +- .../acle_sve_get3-bfloat.c | 44 +- .../aarch64-sve-intrinsics/acle_sve_get3.c | 150 +- .../acle_sve_get4-bfloat.c | 57 +- .../aarch64-sve-intrinsics/acle_sve_get4.c | 150 +- .../aarch64-sve-intrinsics/acle_sve_index.c | 109 +- .../acle_sve_insr-bfloat.c | 20 +- .../aarch64-sve-intrinsics/acle_sve_insr.c | 150 +- .../acle_sve_lasta-bfloat.c | 23 +- .../aarch64-sve-intrinsics/acle_sve_lasta.c | 177 +- .../acle_sve_lastb-bfloat.c | 23 +- .../aarch64-sve-intrinsics/acle_sve_lastb.c | 177 +- .../acle_sve_ld1-bfloat.c | 43 +- .../aarch64-sve-intrinsics/acle_sve_ld1.c | 1103 +++--------- .../acle_sve_ld1ro-bfloat.c | 21 +- .../aarch64-sve-intrinsics/acle_sve_ld1ro.c | 175 +- .../acle_sve_ld1rq-bfloat.c | 21 +- .../aarch64-sve-intrinsics/acle_sve_ld1rq.c | 177 +- .../aarch64-sve-intrinsics/acle_sve_ld1sb.c | 575 ++---- .../aarch64-sve-intrinsics/acle_sve_ld1sh.c | 727 +++----- .../aarch64-sve-intrinsics/acle_sve_ld1sw.c | 367 ++-- .../aarch64-sve-intrinsics/acle_sve_ld1ub.c | 575 ++---- .../aarch64-sve-intrinsics/acle_sve_ld1uh.c | 727 +++----- .../aarch64-sve-intrinsics/acle_sve_ld1uw.c | 367 ++-- .../acle_sve_ld2-bfloat.c | 43 +- .../aarch64-sve-intrinsics/acle_sve_ld2.c | 411 ++--- .../acle_sve_ld3-bfloat.c | 43 +- .../aarch64-sve-intrinsics/acle_sve_ld3.c | 411 ++--- .../acle_sve_ld4-bfloat.c | 43 +- .../aarch64-sve-intrinsics/acle_sve_ld4.c | 411 ++--- .../acle_sve_ldff1-bfloat.c | 43 +- .../aarch64-sve-intrinsics/acle_sve_ldff1.c | 1103 +++--------- .../aarch64-sve-intrinsics/acle_sve_ldff1sb.c | 575 ++---- .../aarch64-sve-intrinsics/acle_sve_ldff1sh.c | 727 +++----- .../aarch64-sve-intrinsics/acle_sve_ldff1sw.c | 367 ++-- .../aarch64-sve-intrinsics/acle_sve_ldff1ub.c | 575 ++---- .../aarch64-sve-intrinsics/acle_sve_ldff1uh.c | 727 +++----- .../aarch64-sve-intrinsics/acle_sve_ldff1uw.c | 367 ++-- .../acle_sve_ldnf1-bfloat.c | 43 +- .../aarch64-sve-intrinsics/acle_sve_ldnf1.c | 413 ++--- .../aarch64-sve-intrinsics/acle_sve_ldnf1sb.c | 269 +-- .../aarch64-sve-intrinsics/acle_sve_ldnf1sh.c | 181 +- .../aarch64-sve-intrinsics/acle_sve_ldnf1sw.c | 93 +- .../aarch64-sve-intrinsics/acle_sve_ldnf1ub.c | 269 +-- .../aarch64-sve-intrinsics/acle_sve_ldnf1uh.c | 181 +- .../aarch64-sve-intrinsics/acle_sve_ldnf1uw.c | 93 +- .../acle_sve_ldnt1-bfloat.c | 43 +- .../aarch64-sve-intrinsics/acle_sve_ldnt1.c | 413 ++--- .../acle_sve_len-bfloat.c | 23 +- .../aarch64-sve-intrinsics/acle_sve_len.c | 183 +- .../aarch64-sve-intrinsics/acle_sve_lsl.c | 856 +++------ .../aarch64-sve-intrinsics/acle_sve_lsr.c | 517 ++---- .../aarch64-sve-intrinsics/acle_sve_mad.c | 1190 ++++--------- .../acle_sve_matmul_fp32.c | 18 +- .../acle_sve_matmul_fp64.c | 18 +- .../aarch64-sve-intrinsics/acle_sve_max.c | 1191 ++++--------- .../aarch64-sve-intrinsics/acle_sve_maxnm.c | 339 +--- .../aarch64-sve-intrinsics/acle_sve_maxnmv.c | 55 +- .../aarch64-sve-intrinsics/acle_sve_maxv.c | 177 +- .../aarch64-sve-intrinsics/acle_sve_min.c | 1191 ++++--------- .../aarch64-sve-intrinsics/acle_sve_minnm.c | 339 +--- .../aarch64-sve-intrinsics/acle_sve_minnmv.c | 55 +- .../aarch64-sve-intrinsics/acle_sve_minv.c | 177 +- .../aarch64-sve-intrinsics/acle_sve_mla.c | 1268 ++++---------- .../aarch64-sve-intrinsics/acle_sve_mls.c | 1268 ++++---------- .../aarch64-sve-intrinsics/acle_sve_mmla.c | 44 +- .../aarch64-sve-intrinsics/acle_sve_mov.c | 20 +- .../aarch64-sve-intrinsics/acle_sve_msb.c | 1190 ++++--------- .../aarch64-sve-intrinsics/acle_sve_mul.c | 1270 ++++---------- .../aarch64-sve-intrinsics/acle_sve_mulh.c | 859 +++------ .../aarch64-sve-intrinsics/acle_sve_mulx.c | 340 +--- .../aarch64-sve-intrinsics/acle_sve_nand.c | 20 +- .../aarch64-sve-intrinsics/acle_sve_neg.c | 334 +--- .../aarch64-sve-intrinsics/acle_sve_nmad.c | 340 +--- .../aarch64-sve-intrinsics/acle_sve_nmla.c | 340 +--- .../aarch64-sve-intrinsics/acle_sve_nmls.c | 340 +--- .../aarch64-sve-intrinsics/acle_sve_nmsb.c | 340 +--- .../aarch64-sve-intrinsics/acle_sve_nor.c | 20 +- .../aarch64-sve-intrinsics/acle_sve_not.c | 386 +---- .../aarch64-sve-intrinsics/acle_sve_orn.c | 20 +- .../aarch64-sve-intrinsics/acle_sve_orr.c | 872 +++------- .../aarch64-sve-intrinsics/acle_sve_orv.c | 129 +- .../aarch64-sve-intrinsics/acle_sve_pfalse.c | 17 +- .../aarch64-sve-intrinsics/acle_sve_pfirst.c | 20 +- .../aarch64-sve-intrinsics/acle_sve_pnext.c | 84 +- .../aarch64-sve-intrinsics/acle_sve_prfb.c | 297 +--- .../aarch64-sve-intrinsics/acle_sve_prfd.c | 345 +--- .../aarch64-sve-intrinsics/acle_sve_prfh.c | 343 +--- .../aarch64-sve-intrinsics/acle_sve_prfw.c | 345 +--- .../aarch64-sve-intrinsics/acle_sve_ptest.c | 44 +- .../aarch64-sve-intrinsics/acle_sve_ptrue.c | 335 +--- .../aarch64-sve-intrinsics/acle_sve_qadd.c | 239 +-- .../aarch64-sve-intrinsics/acle_sve_qdecb.c | 124 +- .../aarch64-sve-intrinsics/acle_sve_qdecd.c | 176 +- .../aarch64-sve-intrinsics/acle_sve_qdech.c | 176 +- .../aarch64-sve-intrinsics/acle_sve_qdecp.c | 347 +--- .../aarch64-sve-intrinsics/acle_sve_qdecw.c | 176 +- .../aarch64-sve-intrinsics/acle_sve_qincb.c | 124 +- .../aarch64-sve-intrinsics/acle_sve_qincd.c | 176 +- .../aarch64-sve-intrinsics/acle_sve_qinch.c | 176 +- .../aarch64-sve-intrinsics/acle_sve_qincp.c | 347 +--- .../aarch64-sve-intrinsics/acle_sve_qincw.c | 176 +- .../aarch64-sve-intrinsics/acle_sve_qsub.c | 239 +-- .../aarch64-sve-intrinsics/acle_sve_rbit.c | 373 +--- .../aarch64-sve-intrinsics/acle_sve_rdffr.c | 34 +- .../aarch64-sve-intrinsics/acle_sve_recpe.c | 46 +- .../aarch64-sve-intrinsics/acle_sve_recps.c | 46 +- .../aarch64-sve-intrinsics/acle_sve_recpx.c | 151 +- .../acle_sve_reinterpret-bfloat.c | 303 +--- .../acle_sve_reinterpret.c | 1530 ++++------------ .../acle_sve_rev-bfloat.c | 18 +- .../aarch64-sve-intrinsics/acle_sve_rev.c | 220 +-- .../aarch64-sve-intrinsics/acle_sve_revb.c | 295 +--- .../aarch64-sve-intrinsics/acle_sve_revh.c | 199 +-- .../aarch64-sve-intrinsics/acle_sve_revw.c | 103 +- .../aarch64-sve-intrinsics/acle_sve_rinta.c | 151 +- .../aarch64-sve-intrinsics/acle_sve_rinti.c | 151 +- .../aarch64-sve-intrinsics/acle_sve_rintm.c | 151 +- .../aarch64-sve-intrinsics/acle_sve_rintn.c | 151 +- .../aarch64-sve-intrinsics/acle_sve_rintp.c | 151 +- .../aarch64-sve-intrinsics/acle_sve_rintx.c | 151 +- .../aarch64-sve-intrinsics/acle_sve_rintz.c | 151 +- .../aarch64-sve-intrinsics/acle_sve_rsqrte.c | 46 +- .../aarch64-sve-intrinsics/acle_sve_rsqrts.c | 46 +- .../aarch64-sve-intrinsics/acle_sve_scale.c | 340 +--- .../acle_sve_sel-bfloat.c | 23 +- .../aarch64-sve-intrinsics/acle_sve_sel.c | 190 +- .../acle_sve_set2-bfloat.c | 31 +- .../aarch64-sve-intrinsics/acle_sve_set2.c | 148 +- .../acle_sve_set3-bfloat.c | 44 +- .../aarch64-sve-intrinsics/acle_sve_set3.c | 148 +- .../acle_sve_set4-bfloat.c | 57 +- .../aarch64-sve-intrinsics/acle_sve_set4.c | 148 +- .../aarch64-sve-intrinsics/acle_sve_setffr.c | 18 +- .../acle_sve_splice-bfloat.c | 23 +- .../aarch64-sve-intrinsics/acle_sve_splice.c | 177 +- .../aarch64-sve-intrinsics/acle_sve_sqrt.c | 151 +- .../acle_sve_st1-bfloat.c | 43 +- .../aarch64-sve-intrinsics/acle_sve_st1.c | 1102 +++--------- .../aarch64-sve-intrinsics/acle_sve_st1b.c | 7 +- .../aarch64-sve-intrinsics/acle_sve_st1h.c | 7 +- .../aarch64-sve-intrinsics/acle_sve_st1w.c | 7 +- .../acle_sve_st2-bfloat.c | 55 +- .../aarch64-sve-intrinsics/acle_sve_st2.c | 545 ++---- .../acle_sve_st3-bfloat.c | 61 +- .../aarch64-sve-intrinsics/acle_sve_st3.c | 611 ++----- .../acle_sve_st4-bfloat.c | 67 +- .../aarch64-sve-intrinsics/acle_sve_st4.c | 677 +++----- .../acle_sve_stnt1-bfloat.c | 43 +- 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.../acle_sve_zip2-bfloat.c | 18 +- .../acle_sve_zip2-fp64-bfloat.c | 18 +- .../acle_sve_zip2-fp64.c | 148 +- .../aarch64-sve-intrinsics/acle_sve_zip2.c | 229 +-- .../aarch64-sve2-intrinsics/acle_sve2_aba.c | 237 +-- .../aarch64-sve2-intrinsics/acle_sve2_abalb.c | 179 +- .../aarch64-sve2-intrinsics/acle_sve2_abalt.c | 179 +- .../aarch64-sve2-intrinsics/acle_sve2_abdlb.c | 179 +- .../aarch64-sve2-intrinsics/acle_sve2_abdlt.c | 179 +- .../aarch64-sve2-intrinsics/acle_sve2_adalp.c | 311 +--- .../aarch64-sve2-intrinsics/acle_sve2_adclb.c | 63 +- .../aarch64-sve2-intrinsics/acle_sve2_adclt.c | 63 +- .../acle_sve2_addhnb.c | 179 +- .../acle_sve2_addhnt.c | 179 +- .../aarch64-sve2-intrinsics/acle_sve2_addlb.c | 179 +- .../acle_sve2_addlbt.c | 92 +- .../aarch64-sve2-intrinsics/acle_sve2_addlt.c | 179 +- .../aarch64-sve2-intrinsics/acle_sve2_addp.c | 345 +--- .../aarch64-sve2-intrinsics/acle_sve2_addwb.c | 179 +- .../aarch64-sve2-intrinsics/acle_sve2_addwt.c | 179 +- .../aarch64-sve2-intrinsics/acle_sve2_aesd.c | 18 +- .../aarch64-sve2-intrinsics/acle_sve2_aese.c | 18 +- .../acle_sve2_aesimc.c | 18 +- .../aarch64-sve2-intrinsics/acle_sve2_aesmc.c | 18 +- .../aarch64-sve2-intrinsics/acle_sve2_bcax.c | 237 +-- .../aarch64-sve2-intrinsics/acle_sve2_bdep.c | 121 +- .../aarch64-sve2-intrinsics/acle_sve2_bext.c | 121 +- .../aarch64-sve2-intrinsics/acle_sve2_bgrp.c | 121 +- .../aarch64-sve2-intrinsics/acle_sve2_bsl.c | 237 +-- .../aarch64-sve2-intrinsics/acle_sve2_bsl1n.c | 237 +-- .../aarch64-sve2-intrinsics/acle_sve2_bsl2n.c | 237 +-- .../aarch64-sve2-intrinsics/acle_sve2_cadd.c | 213 +-- .../aarch64-sve2-intrinsics/acle_sve2_cdot.c | 148 +- .../aarch64-sve2-intrinsics/acle_sve2_cmla.c | 525 ++---- .../aarch64-sve2-intrinsics/acle_sve2_cvtlt.c | 69 +- .../aarch64-sve2-intrinsics/acle_sve2_cvtnt.c | 69 +- .../aarch64-sve2-intrinsics/acle_sve2_cvtx.c | 53 +- .../acle_sve2_cvtxnt.c | 37 +- .../aarch64-sve2-intrinsics/acle_sve2_eor3.c | 237 +-- .../aarch64-sve2-intrinsics/acle_sve2_eorbt.c | 237 +-- .../aarch64-sve2-intrinsics/acle_sve2_eortb.c | 237 +-- .../aarch64-sve2-intrinsics/acle_sve2_hadd.c | 854 +++------ .../acle_sve2_histcnt.c | 69 +- .../acle_sve2_histseg.c | 31 +- .../aarch64-sve2-intrinsics/acle_sve2_hsub.c | 857 +++------ .../aarch64-sve2-intrinsics/acle_sve2_hsubr.c | 856 +++------ .../aarch64-sve2-intrinsics/acle_sve2_ldnt1.c | 551 ++---- .../acle_sve2_ldnt1sb.c | 271 +-- .../acle_sve2_ldnt1sh.c | 435 ++--- .../acle_sve2_ldnt1sw.c | 277 +-- .../acle_sve2_ldnt1ub.c | 271 +-- .../acle_sve2_ldnt1uh.c | 435 ++--- .../acle_sve2_ldnt1uw.c | 277 +-- .../aarch64-sve2-intrinsics/acle_sve2_logb.c | 149 +- .../aarch64-sve2-intrinsics/acle_sve2_match.c | 69 +- .../acle_sve2_maxnmp.c | 101 +- .../aarch64-sve2-intrinsics/acle_sve2_maxp.c | 345 +--- .../acle_sve2_minnmp.c | 101 +- .../aarch64-sve2-intrinsics/acle_sve2_minp.c | 345 +--- .../aarch64-sve2-intrinsics/acle_sve2_mla.c | 148 +- .../aarch64-sve2-intrinsics/acle_sve2_mlalb.c | 338 +--- .../aarch64-sve2-intrinsics/acle_sve2_mlalt.c | 338 +--- .../aarch64-sve2-intrinsics/acle_sve2_mls.c | 161 +- .../aarch64-sve2-intrinsics/acle_sve2_mlslb.c | 338 +--- .../aarch64-sve2-intrinsics/acle_sve2_mlslt.c | 338 +--- .../aarch64-sve2-intrinsics/acle_sve2_movlb.c | 83 +- .../aarch64-sve2-intrinsics/acle_sve2_movlt.c | 83 +- .../aarch64-sve2-intrinsics/acle_sve2_mul.c | 161 +- .../aarch64-sve2-intrinsics/acle_sve2_mullb.c | 283 +-- .../aarch64-sve2-intrinsics/acle_sve2_mullt.c | 283 +-- .../aarch64-sve2-intrinsics/acle_sve2_nbsl.c | 237 +-- .../acle_sve2_nmatch.c | 69 +- .../aarch64-sve2-intrinsics/acle_sve2_pmul.c | 34 +- .../acle_sve2_pmullb.c | 133 +- .../acle_sve2_pmullb_128.c | 34 +- .../acle_sve2_pmullt.c | 133 +- .../acle_sve2_pmullt_128.c | 34 +- .../aarch64-sve2-intrinsics/acle_sve2_qabs.c | 188 +- .../aarch64-sve2-intrinsics/acle_sve2_qadd.c | 853 +++------ .../aarch64-sve2-intrinsics/acle_sve2_qcadd.c | 109 +- .../acle_sve2_qdmlalb.c | 144 +- .../acle_sve2_qdmlalbt.c | 92 +- .../acle_sve2_qdmlalt.c | 144 +- .../acle_sve2_qdmlslb.c | 144 +- .../acle_sve2_qdmlslbt.c | 92 +- .../acle_sve2_qdmlslt.c | 144 +- .../acle_sve2_qdmulh.c | 199 +-- .../acle_sve2_qdmullb.c | 144 +- .../acle_sve2_qdmullt.c | 144 +- .../aarch64-sve2-intrinsics/acle_sve2_qneg.c | 188 +- .../acle_sve2_qrdcmlah.c | 265 +-- .../acle_sve2_qrdmlah.c | 199 +-- .../acle_sve2_qrdmlsh.c | 199 +-- .../acle_sve2_qrdmulh.c | 199 +-- .../aarch64-sve2-intrinsics/acle_sve2_qrshl.c | 857 +++------ .../acle_sve2_qrshrnb.c | 161 +- .../acle_sve2_qrshrnt.c | 161 +- .../acle_sve2_qrshrunb.c | 83 +- .../acle_sve2_qrshrunt.c | 83 +- .../aarch64-sve2-intrinsics/acle_sve2_qshl.c | 857 +++------ .../aarch64-sve2-intrinsics/acle_sve2_qshlu.c | 395 ++--- .../acle_sve2_qshrnb.c | 161 +- .../acle_sve2_qshrnt.c | 161 +- .../acle_sve2_qshrunb.c | 83 +- .../acle_sve2_qshrunt.c | 83 +- .../aarch64-sve2-intrinsics/acle_sve2_qsub.c | 857 +++------ .../aarch64-sve2-intrinsics/acle_sve2_qsubr.c | 857 +++------ .../aarch64-sve2-intrinsics/acle_sve2_qxtnb.c | 83 +- .../aarch64-sve2-intrinsics/acle_sve2_qxtnt.c | 83 +- .../acle_sve2_qxtunb.c | 44 +- .../acle_sve2_qxtunt.c | 44 +- .../acle_sve2_raddhnb.c | 179 +- .../acle_sve2_raddhnt.c | 179 +- .../aarch64-sve2-intrinsics/acle_sve2_rax1.c | 31 +- .../aarch64-sve2-intrinsics/acle_sve2_recpe.c | 53 +- .../aarch64-sve2-intrinsics/acle_sve2_rhadd.c | 854 +++------ .../aarch64-sve2-intrinsics/acle_sve2_rshl.c | 857 +++------ .../aarch64-sve2-intrinsics/acle_sve2_rshr.c | 785 +++------ .../acle_sve2_rshrnb.c | 161 +- .../acle_sve2_rshrnt.c | 161 +- .../acle_sve2_rsqrte.c | 53 +- .../aarch64-sve2-intrinsics/acle_sve2_rsra.c | 213 +-- .../acle_sve2_rsubhnb.c | 179 +- .../acle_sve2_rsubhnt.c | 179 +- .../aarch64-sve2-intrinsics/acle_sve2_sbclb.c | 63 +- .../aarch64-sve2-intrinsics/acle_sve2_sbclt.c | 63 +- .../aarch64-sve2-intrinsics/acle_sve2_shllb.c | 161 +- .../aarch64-sve2-intrinsics/acle_sve2_shllt.c | 161 +- .../aarch64-sve2-intrinsics/acle_sve2_shrnb.c | 161 +- .../aarch64-sve2-intrinsics/acle_sve2_shrnt.c | 161 +- .../aarch64-sve2-intrinsics/acle_sve2_sli.c | 213 +-- .../aarch64-sve2-intrinsics/acle_sve2_sm4e.c | 18 +- .../acle_sve2_sm4ekey.c | 18 +- .../aarch64-sve2-intrinsics/acle_sve2_sqadd.c | 428 ++--- .../aarch64-sve2-intrinsics/acle_sve2_sra.c | 213 +-- .../aarch64-sve2-intrinsics/acle_sve2_sri.c | 213 +-- .../aarch64-sve2-intrinsics/acle_sve2_stnt1.c | 551 ++---- .../acle_sve2_stnt1b.c | 271 +-- .../acle_sve2_stnt1h.c | 435 ++--- .../acle_sve2_stnt1w.c | 277 +-- .../acle_sve2_subhnb.c | 179 +- .../acle_sve2_subhnt.c | 179 +- .../aarch64-sve2-intrinsics/acle_sve2_sublb.c | 179 +- .../acle_sve2_sublbt.c | 92 +- .../aarch64-sve2-intrinsics/acle_sve2_sublt.c | 179 +- .../acle_sve2_subltb.c | 92 +- .../aarch64-sve2-intrinsics/acle_sve2_subwb.c | 179 +- .../aarch64-sve2-intrinsics/acle_sve2_subwt.c | 179 +- .../acle_sve2_tbl2-bfloat.c | 24 +- .../aarch64-sve2-intrinsics/acle_sve2_tbl2.c | 214 +-- .../acle_sve2_tbx-bfloat.c | 18 +- .../aarch64-sve2-intrinsics/acle_sve2_tbx.c | 148 +- .../aarch64-sve2-intrinsics/acle_sve2_uqadd.c | 428 ++--- .../acle_sve2_whilege.c | 249 +-- .../acle_sve2_whilegt.c | 249 +-- .../acle_sve2_whilerw-bfloat.c | 21 +- .../acle_sve2_whilerw.c | 174 +- .../acle_sve2_whilewr-bfloat.c | 21 +- .../acle_sve2_whilewr.c | 174 +- .../aarch64-sve2-intrinsics/acle_sve2_xar.c | 213 +-- 428 files changed, 27228 insertions(+), 79645 deletions(-) diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c index 5b5b34d2edca..d1fff7220ccf 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abd.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,1210 +13,639 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svabd_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svabd_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svabd_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svabd_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svabd_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svabd_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svabd_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svabd_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svabd_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svabd_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svabd_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svabd_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svabd_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svabd_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svabd_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svabd_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svabd_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svabd_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svabd_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svabd_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svabd_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svabd_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svabd_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svabd_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svabd_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svabd_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svabd_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svabd_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svabd_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svabd_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svabd_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svabd_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svabd_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svabd_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svabd_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svabd_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svabd_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svabd_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svabd_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svabd_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svabd_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svabd_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svabd_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svabd_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svabd_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svabd_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svabd_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svabd_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svabd_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svabd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svabd_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svabd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svabd_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svabd_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svabd_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svabd_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svabd_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svabd_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svabd_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svabd_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svabd_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svabd_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svabd_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svabd_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svabd_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svabd_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svabd_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svabd_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svabd_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svabd_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svabd_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svabd_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svabd_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svabd_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svabd_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svabd_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svabd_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svabd_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svabd_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svabd_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svabd_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svabd_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svabd_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svabd_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svabd_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svabd_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svabd_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svabd_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svabd_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svabd_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svabd_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svabd_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svabd_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svabd_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svabd_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svabd_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svabd_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svabd_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svabd_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svabd_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svabd_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svabd_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svabd_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svabd_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svabd_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svabd_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svabd_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svabd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svabd_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svabd_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svabd_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svabd_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svabd_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svabd_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svabd_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svabd_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svabd_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svabd_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svabd_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svabd_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svabd_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svabd_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svabd_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svabd_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svabd_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabd_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svabd_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svabd_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_f64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svabd_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svabd_n_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_f32_zu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svabd_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svabd_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_f64_zu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svabd_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svabd_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svabd_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svabd_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_f32_mu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svabd_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svabd_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_f64_mu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svabd_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svabd_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svabd_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svabd_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_f32_xu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svabd_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svabd_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svabd_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svabd_n_f64_xu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svabd_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svabd_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabd.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabd,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abs.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abs.c index 76c5634b91d5..26360aca585d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abs.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_abs.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,353 +13,188 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svabs_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.abs.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svabs_s8_zu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.abs.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svabs_s8_z(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svabs_s8_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.abs.nxv16i8( zeroinitializer, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_s8,_z,)(pg, op); } -// CHECK-LABEL: @test_svabs_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabs_s16_zu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svabs_s16_z(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svabs_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.abs.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_s16,_z,)(pg, op); } -// CHECK-LABEL: @test_svabs_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabs_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svabs_s32_z(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svabs_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.abs.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_s32,_z,)(pg, op); } -// CHECK-LABEL: @test_svabs_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabs_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svabs_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svabs_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.abs.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svabs_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.abs.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svabs_s8_mu10__SVInt8_tu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.abs.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svabs_s8_m(svint8_t inactive, svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svabs_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.abs.nxv16i8( %inactive, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_s8,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svabs_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabs_s16_mu11__SVInt16_tu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svabs_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svabs_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.abs.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_s16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svabs_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabs_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svabs_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svabs_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.abs.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_s32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svabs_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabs_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svabs_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svabs_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.abs.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svabs_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.abs.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svabs_s8_xu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.abs.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svabs_s8_x(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svabs_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.abs.nxv16i8( undef, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_s8,_x,)(pg, op); } -// CHECK-LABEL: @test_svabs_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabs_s16_xu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svabs_s16_x(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svabs_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.abs.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_s16,_x,)(pg, op); } -// CHECK-LABEL: @test_svabs_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabs_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svabs_s32_x(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svabs_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.abs.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_s32,_x,)(pg, op); } -// CHECK-LABEL: @test_svabs_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabs_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.abs.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svabs_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svabs_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.abs.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_s64,_x,)(pg, op); } -// CHECK-LABEL: @test_svabs_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabs_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svabs_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svabs_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabs.nxv8f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svabs_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabs_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svabs_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svabs_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabs.nxv4f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svabs_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabs_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svabs_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svabs_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabs.nxv2f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svabs_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabs_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svabs_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svabs_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabs.nxv8f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svabs_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabs_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svabs_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svabs_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabs.nxv4f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svabs_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabs_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svabs_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svabs_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabs.nxv2f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svabs_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabs_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svabs_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svabs_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabs.nxv8f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svabs_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabs_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svabs_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svabs_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabs.nxv4f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svabs_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svabs_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fabs.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svabs_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svabs_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fabs.nxv2f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svabs,_f64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c index 791599bd74a3..12ff88c3f452 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acge.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,101 +13,54 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svacge_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svacge_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svacge_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svacge_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacge,_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svacge_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svacge_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svacge_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svacge_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacge,_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svacge_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svacge_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svacge_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svacge_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacge,_f64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svacge_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z17test_svacge_n_f32u10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svacge_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svacge_n_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacge,_n_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svacge_n_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z17test_svacge_n_f64u10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svacge_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svacge_n_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacge,_n_f64,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c index b1297fe1cfc2..6592ff28e9ac 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acgt.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,101 +13,54 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svacgt_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svacgt_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svacgt_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svacgt_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacgt,_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svacgt_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svacgt_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svacgt_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svacgt_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacgt,_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svacgt_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svacgt_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svacgt_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svacgt_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacgt,_f64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svacgt_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z17test_svacgt_n_f32u10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svacgt_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svacgt_n_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacgt,_n_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svacgt_n_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z17test_svacgt_n_f64u10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svacgt_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svacgt_n_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacgt,_n_f64,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c index b1af88e1c225..f39e73d31c66 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_acle.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,101 +13,54 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svacle_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svacle_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svacle_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svacle_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv8f16( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacle,_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svacle_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svacle_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svacle_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svacle_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv4f32( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacle,_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svacle_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svacle_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svacle_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svacle_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv2f64( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacle,_f64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svacle_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z17test_svacle_n_f32u10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svacle_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svacle_n_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv4f32( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacle,_n_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svacle_n_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z17test_svacle_n_f64u10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svacle_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svacle_n_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facge.nxv2f64( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svacle,_n_f64,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c index 4e5740b498d5..f4b212e5f2aa 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_aclt.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,101 +13,54 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svaclt_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svaclt_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svaclt_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svaclt_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv8f16( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svaclt,_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaclt_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svaclt_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svaclt_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svaclt_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svaclt,_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaclt_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svaclt_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svaclt_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svaclt_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svaclt,_f64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaclt_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z17test_svaclt_n_f32u10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svaclt_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svaclt_n_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv4f32( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svaclt,_n_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaclt_n_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z17test_svaclt_n_f64u10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svaclt_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svaclt_n_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.facgt.nxv2f64( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svaclt,_n_f64,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c index da95476e2d15..5c5458686d3d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_add.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,1210 +13,639 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svadd_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svadd_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svadd_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svadd_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svadd_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svadd_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svadd_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svadd_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svadd_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svadd_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svadd_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svadd_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svadd_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svadd_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svadd_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svadd_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svadd_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svadd_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svadd_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svadd_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svadd_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svadd_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svadd_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svadd_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svadd_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svadd_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svadd_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svadd_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svadd_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svadd_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svadd_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svadd_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svadd_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svadd_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svadd_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svadd_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svadd_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svadd_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svadd_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svadd_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svadd_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svadd_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svadd_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svadd_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svadd_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svadd_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svadd_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svadd_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svadd_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svadd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svadd_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svadd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svadd_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svadd_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svadd_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svadd_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svadd_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svadd_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svadd_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svadd_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svadd_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svadd_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svadd_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svadd_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svadd_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svadd_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svadd_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svadd_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svadd_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svadd_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svadd_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svadd_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svadd_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svadd_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svadd_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svadd_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svadd_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svadd_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svadd_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svadd_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svadd_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svadd_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svadd_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svadd_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svadd_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svadd_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svadd_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svadd_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svadd_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svadd_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svadd_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svadd_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svadd_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svadd_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svadd_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svadd_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svadd_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svadd_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svadd_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svadd_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svadd_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.add.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svadd_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svadd_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svadd_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svadd_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svadd_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svadd_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.add.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svadd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svadd_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.add.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svadd_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svadd_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svadd_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svadd_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svadd_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svadd_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svadd_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svadd_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svadd_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svadd_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svadd_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svadd_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svadd_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svadd_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svadd_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svadd_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svadd_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svadd_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svadd_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_f64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svadd_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svadd_n_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_f32_zu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svadd_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svadd_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_f64_zu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svadd_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svadd_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svadd_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svadd_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_f32_mu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svadd_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svadd_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_f64_mu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svadd_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svadd_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svadd_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svadd_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_f32_xu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svadd_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svadd_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadd_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadd_n_f64_xu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svadd_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svadd_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fadd.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadd,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adda.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adda.c index fb7ba8e27d97..d689ea45d2e7 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adda.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adda.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,53 +13,29 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svadda_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fadda.nxv8f16( [[TMP0]], half [[INITIAL:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret half [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svadda_f16u10__SVBool_tDhu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fadda.nxv8f16( [[TMP0]], half [[INITIAL:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret half [[TMP1]] -// float16_t test_svadda_f16(svbool_t pg, float16_t initial, svfloat16_t op) { + // CHECK-LABEL: test_svadda_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call half @llvm.aarch64.sve.fadda.nxv8f16( %[[PG]], half %initial, %op) + // CHECK: ret half %[[INTRINSIC]] return SVE_ACLE_FUNC(svadda,_f16,,)(pg, initial, op); } -// CHECK-LABEL: @test_svadda_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fadda.nxv4f32( [[TMP0]], float [[INITIAL:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret float [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svadda_f32u10__SVBool_tfu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fadda.nxv4f32( [[TMP0]], float [[INITIAL:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret float [[TMP1]] -// float32_t test_svadda_f32(svbool_t pg, float32_t initial, svfloat32_t op) { + // CHECK-LABEL: test_svadda_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call float @llvm.aarch64.sve.fadda.nxv4f32( %[[PG]], float %initial, %op) + // CHECK: ret float %[[INTRINSIC]] return SVE_ACLE_FUNC(svadda,_f32,,)(pg, initial, op); } -// CHECK-LABEL: @test_svadda_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fadda.nxv2f64( [[TMP0]], double [[INITIAL:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret double [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svadda_f64u10__SVBool_tdu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fadda.nxv2f64( [[TMP0]], double [[INITIAL:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret double [[TMP1]] -// float64_t test_svadda_f64(svbool_t pg, float64_t initial, svfloat64_t op) { + // CHECK-LABEL: test_svadda_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call double @llvm.aarch64.sve.fadda.nxv2f64( %[[PG]], double %initial, %op) + // CHECK: ret double %[[INTRINSIC]] return SVE_ACLE_FUNC(svadda,_f64,,)(pg, initial, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_addv.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_addv.c index 21dcd8624918..67b501483215 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_addv.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_addv.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,185 +13,99 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svaddv_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.saddv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svaddv_s8u10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.saddv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svaddv_s8(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svaddv_s8 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.saddv.nxv16i8( %pg, %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svaddv,_s8,,)(pg, op); } -// CHECK-LABEL: @test_svaddv_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.saddv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svaddv_s16u10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.saddv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// int64_t test_svaddv_s16(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svaddv_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.saddv.nxv8i16( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svaddv,_s16,,)(pg, op); } -// CHECK-LABEL: @test_svaddv_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.saddv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svaddv_s32u10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.saddv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// int64_t test_svaddv_s32(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svaddv_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.saddv.nxv4i32( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svaddv,_s32,,)(pg, op); } -// CHECK-LABEL: @test_svaddv_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.saddv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svaddv_s64u10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.saddv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// int64_t test_svaddv_s64(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svaddv_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.saddv.nxv2i64( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svaddv,_s64,,)(pg, op); } -// CHECK-LABEL: @test_svaddv_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svaddv_u8u10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svaddv_u8(svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svaddv_u8 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv16i8( %pg, %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svaddv,_u8,,)(pg, op); } -// CHECK-LABEL: @test_svaddv_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svaddv_u16u10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svaddv_u16(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svaddv_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv8i16( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svaddv,_u16,,)(pg, op); } -// CHECK-LABEL: @test_svaddv_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svaddv_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svaddv_u32(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svaddv_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv4i32( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svaddv,_u32,,)(pg, op); } -// CHECK-LABEL: @test_svaddv_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svaddv_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svaddv_u64(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svaddv_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uaddv.nxv2i64( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svaddv,_u64,,)(pg, op); } -// CHECK-LABEL: @test_svaddv_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.faddv.nxv8f16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret half [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svaddv_f16u10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.faddv.nxv8f16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret half [[TMP1]] -// float16_t test_svaddv_f16(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svaddv_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call half @llvm.aarch64.sve.faddv.nxv8f16( %[[PG]], %op) + // CHECK: ret half %[[INTRINSIC]] return SVE_ACLE_FUNC(svaddv,_f16,,)(pg, op); } -// CHECK-LABEL: @test_svaddv_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.faddv.nxv4f32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret float [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svaddv_f32u10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.faddv.nxv4f32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret float [[TMP1]] -// float32_t test_svaddv_f32(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svaddv_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call float @llvm.aarch64.sve.faddv.nxv4f32( %[[PG]], %op) + // CHECK: ret float %[[INTRINSIC]] return SVE_ACLE_FUNC(svaddv,_f32,,)(pg, op); } -// CHECK-LABEL: @test_svaddv_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.faddv.nxv2f64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret double [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svaddv_f64u10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.faddv.nxv2f64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret double [[TMP1]] -// float64_t test_svaddv_f64(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svaddv_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call double @llvm.aarch64.sve.faddv.nxv2f64( %[[PG]], %op) + // CHECK: ret double %[[INTRINSIC]] return SVE_ACLE_FUNC(svaddv,_f64,,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrb.c index 2c8a3ffc77ed..12aca6bd18f0 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrb.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,62 +13,34 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svadrb_u32base_s32offset( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrb.nxv4i32( [[BASES:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z29test_svadrb_u32base_s32offsetu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrb.nxv4i32( [[BASES:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svadrb_u32base_s32offset(svuint32_t bases, svint32_t offsets) { + // CHECK-LABEL: test_svadrb_u32base_s32offset + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adrb.nxv4i32( %bases, %offsets) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadrb_,u32base_s32,offset,)(bases, offsets); } -// CHECK-LABEL: @test_svadrb_u64base_s64offset( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrb.nxv2i64( [[BASES:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z29test_svadrb_u64base_s64offsetu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrb.nxv2i64( [[BASES:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svadrb_u64base_s64offset(svuint64_t bases, svint64_t offsets) { + // CHECK-LABEL: test_svadrb_u64base_s64offset + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adrb.nxv2i64( %bases, %offsets) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadrb_,u64base_s64,offset,)(bases, offsets); } -// CHECK-LABEL: @test_svadrb_u32base_u32offset( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrb.nxv4i32( [[BASES:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z29test_svadrb_u32base_u32offsetu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrb.nxv4i32( [[BASES:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svadrb_u32base_u32offset(svuint32_t bases, svuint32_t offsets) { + // CHECK-LABEL: test_svadrb_u32base_u32offset + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adrb.nxv4i32( %bases, %offsets) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadrb_,u32base_u32,offset,)(bases, offsets); } -// CHECK-LABEL: @test_svadrb_u64base_u64offset( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrb.nxv2i64( [[BASES:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z29test_svadrb_u64base_u64offsetu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrb.nxv2i64( [[BASES:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svadrb_u64base_u64offset(svuint64_t bases, svuint64_t offsets) { + // CHECK-LABEL: test_svadrb_u64base_u64offset + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adrb.nxv2i64( %bases, %offsets) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadrb_,u64base_u64,offset,)(bases, offsets); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrd.c index e8438ec7dde8..888d8733704d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrd.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,62 +13,34 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svadrd_u32base_s32index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrd.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z28test_svadrd_u32base_s32indexu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrd.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svadrd_u32base_s32index(svuint32_t bases, svint32_t indices) { + // CHECK-LABEL: test_svadrd_u32base_s32index + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adrd.nxv4i32( %bases, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadrd_,u32base_s32,index,)(bases, indices); } -// CHECK-LABEL: @test_svadrd_u64base_s64index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrd.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z28test_svadrd_u64base_s64indexu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrd.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svadrd_u64base_s64index(svuint64_t bases, svint64_t indices) { + // CHECK-LABEL: test_svadrd_u64base_s64index + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adrd.nxv2i64( %bases, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadrd_,u64base_s64,index,)(bases, indices); } -// CHECK-LABEL: @test_svadrd_u32base_u32index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrd.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z28test_svadrd_u32base_u32indexu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrd.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svadrd_u32base_u32index(svuint32_t bases, svuint32_t indices) { + // CHECK-LABEL: test_svadrd_u32base_u32index + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adrd.nxv4i32( %bases, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadrd_,u32base_u32,index,)(bases, indices); } -// CHECK-LABEL: @test_svadrd_u64base_u64index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrd.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z28test_svadrd_u64base_u64indexu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrd.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svadrd_u64base_u64index(svuint64_t bases, svuint64_t indices) { + // CHECK-LABEL: test_svadrd_u64base_u64index + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adrd.nxv2i64( %bases, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadrd_,u64base_u64,index,)(bases, indices); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrh.c index 804e307873b1..67e6ebe0f0b2 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrh.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,62 +13,34 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svadrh_u32base_s32index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrh.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z28test_svadrh_u32base_s32indexu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrh.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svadrh_u32base_s32index(svuint32_t bases, svint32_t indices) { + // CHECK-LABEL: test_svadrh_u32base_s32index + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adrh.nxv4i32( %bases, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadrh_,u32base_s32,index,)(bases, indices); } -// CHECK-LABEL: @test_svadrh_u64base_s64index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrh.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z28test_svadrh_u64base_s64indexu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrh.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svadrh_u64base_s64index(svuint64_t bases, svint64_t indices) { + // CHECK-LABEL: test_svadrh_u64base_s64index + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adrh.nxv2i64( %bases, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadrh_,u64base_s64,index,)(bases, indices); } -// CHECK-LABEL: @test_svadrh_u32base_u32index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrh.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z28test_svadrh_u32base_u32indexu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrh.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svadrh_u32base_u32index(svuint32_t bases, svuint32_t indices) { + // CHECK-LABEL: test_svadrh_u32base_u32index + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adrh.nxv4i32( %bases, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadrh_,u32base_u32,index,)(bases, indices); } -// CHECK-LABEL: @test_svadrh_u64base_u64index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrh.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z28test_svadrh_u64base_u64indexu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrh.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svadrh_u64base_u64index(svuint64_t bases, svuint64_t indices) { + // CHECK-LABEL: test_svadrh_u64base_u64index + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adrh.nxv2i64( %bases, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadrh_,u64base_u64,index,)(bases, indices); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrw.c index be14505f3751..226093d6c9b8 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_adrw.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,62 +13,34 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svadrw_u32base_s32index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrw.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z28test_svadrw_u32base_s32indexu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrw.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svadrw_u32base_s32index(svuint32_t bases, svint32_t indices) { + // CHECK-LABEL: test_svadrw_u32base_s32index + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adrw.nxv4i32( %bases, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadrw_,u32base_s32,index,)(bases, indices); } -// CHECK-LABEL: @test_svadrw_u64base_s64index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrw.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z28test_svadrw_u64base_s64indexu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrw.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svadrw_u64base_s64index(svuint64_t bases, svint64_t indices) { + // CHECK-LABEL: test_svadrw_u64base_s64index + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adrw.nxv2i64( %bases, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadrw_,u64base_s64,index,)(bases, indices); } -// CHECK-LABEL: @test_svadrw_u32base_u32index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrw.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z28test_svadrw_u32base_u32indexu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrw.nxv4i32( [[BASES:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svadrw_u32base_u32index(svuint32_t bases, svuint32_t indices) { + // CHECK-LABEL: test_svadrw_u32base_u32index + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adrw.nxv4i32( %bases, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadrw_,u32base_u32,index,)(bases, indices); } -// CHECK-LABEL: @test_svadrw_u64base_u64index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrw.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z28test_svadrw_u64base_u64indexu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adrw.nxv2i64( [[BASES:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svadrw_u64base_u64index(svuint64_t bases, svuint64_t indices) { + // CHECK-LABEL: test_svadrw_u64base_u64index + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adrw.nxv2i64( %bases, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svadrw_,u64base_u64,index,)(bases, indices); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c index 33d39cfc2be1..36af1dece373 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_and.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,889 +13,470 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svand_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svand_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svand_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svand_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svand_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svand_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svand_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svand_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svand_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svand_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svand_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svand_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svand_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svand_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svand_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svand_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svand_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svand_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svand_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svand_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svand_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svand_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svand_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svand_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svand_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svand_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svand_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svand_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svand_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svand_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svand_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svand_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svand_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svand_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svand_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svand_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svand_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svand_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svand_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svand_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svand_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svand_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svand_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svand_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svand_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svand_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svand_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svand_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svand_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svand_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svand_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svand_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svand_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svand_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svand_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svand_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svand_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svand_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svand_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svand_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svand_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svand_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svand_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svand_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svand_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svand_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svand_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svand_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svand_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svand_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svand_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svand_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svand_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svand_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svand_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svand_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svand_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svand_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svand_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svand_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svand_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svand_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svand_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svand_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svand_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svand_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svand_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svand_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svand_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svand_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svand_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svand_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svand_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svand_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svand_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svand_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svand_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svand_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svand_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svand_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svand_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svand_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svand_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svand_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svand_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svand_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svand_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svand_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svand_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svand_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svand_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svand_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svand_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svand_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svand_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svand_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svand_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svand_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svand_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svand_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svand_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svand_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svand_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svand_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svand_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svand_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svand_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svand_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svand_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svand_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svand_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svand_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svand_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svand_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.and.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svand_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svand_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svand_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svand_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svand_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svand_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svand_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svand_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svand_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.and.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svand_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svand_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_n_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svand_b_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svand_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svand_b_z(svbool_t pg, svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svand_b_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.z.nxv16i1( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svand,_b,_z,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_andv.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_andv.c index 0f0a8a791932..b394b9e7dae4 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_andv.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_andv.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,134 +13,72 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svandv_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.andv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i8 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svandv_s8u10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.andv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i8 [[TMP0]] -// int8_t test_svandv_s8(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svandv_s8 + // CHECK: %[[INTRINSIC:.*]] = call i8 @llvm.aarch64.sve.andv.nxv16i8( %pg, %op) + // CHECK: ret i8 %[[INTRINSIC]] return SVE_ACLE_FUNC(svandv,_s8,,)(pg, op); } -// CHECK-LABEL: @test_svandv_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.andv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i16 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svandv_s16u10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.andv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i16 [[TMP1]] -// int16_t test_svandv_s16(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svandv_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i16 @llvm.aarch64.sve.andv.nxv8i16( %[[PG]], %op) + // CHECK: ret i16 %[[INTRINSIC]] return SVE_ACLE_FUNC(svandv,_s16,,)(pg, op); } -// CHECK-LABEL: @test_svandv_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.andv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svandv_s32u10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.andv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// int32_t test_svandv_s32(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svandv_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.andv.nxv4i32( %[[PG]], %op) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svandv,_s32,,)(pg, op); } -// CHECK-LABEL: @test_svandv_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.andv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svandv_s64u10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.andv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// int64_t test_svandv_s64(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svandv_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.andv.nxv2i64( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svandv,_s64,,)(pg, op); } -// CHECK-LABEL: @test_svandv_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.andv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i8 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svandv_u8u10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.andv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i8 [[TMP0]] -// uint8_t test_svandv_u8(svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svandv_u8 + // CHECK: %[[INTRINSIC:.*]] = call i8 @llvm.aarch64.sve.andv.nxv16i8( %pg, %op) + // CHECK: ret i8 %[[INTRINSIC]] return SVE_ACLE_FUNC(svandv,_u8,,)(pg, op); } -// CHECK-LABEL: @test_svandv_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.andv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i16 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svandv_u16u10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.andv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i16 [[TMP1]] -// uint16_t test_svandv_u16(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svandv_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i16 @llvm.aarch64.sve.andv.nxv8i16( %[[PG]], %op) + // CHECK: ret i16 %[[INTRINSIC]] return SVE_ACLE_FUNC(svandv,_u16,,)(pg, op); } -// CHECK-LABEL: @test_svandv_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.andv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svandv_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.andv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// uint32_t test_svandv_u32(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svandv_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.andv.nxv4i32( %[[PG]], %op) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svandv,_u32,,)(pg, op); } -// CHECK-LABEL: @test_svandv_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.andv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svandv_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.andv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svandv_u64(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svandv_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.andv.nxv2i64( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svandv,_u64,,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c index b4bb06a44c39..20b12b6f6fab 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asr.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,762 +13,403 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svasr_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svasr_s8_zu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svasr_s8_z(svbool_t pg, svint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svasr_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svasr_s16_zu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svasr_s16_z(svbool_t pg, svint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svasr_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svasr_s32_zu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svasr_s32_z(svbool_t pg, svint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svasr_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svasr_s64_zu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svasr_s64_z(svbool_t pg, svint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svasr_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svasr_s8_mu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svasr_s8_m(svbool_t pg, svint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svasr_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svasr_s16_mu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svasr_s16_m(svbool_t pg, svint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svasr_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svasr_s32_mu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svasr_s32_m(svbool_t pg, svint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svasr_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svasr_s64_mu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svasr_s64_m(svbool_t pg, svint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svasr_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svasr_s8_xu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svasr_s8_x(svbool_t pg, svint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svasr_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svasr_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svasr_s16_x(svbool_t pg, svint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svasr_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svasr_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svasr_s32_x(svbool_t pg, svint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svasr_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svasr_s64_xu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svasr_s64_x(svbool_t pg, svint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svasr_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svasr_n_s64_zu10__SVBool_tu11__SVInt64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svasr_n_s64_z(svbool_t pg, svint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svasr_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svasr_n_s64_mu10__SVBool_tu11__SVInt64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svasr_n_s64_m(svbool_t pg, svint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svasr_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svasr_n_s64_xu10__SVBool_tu11__SVInt64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svasr_n_s64_x(svbool_t pg, svint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svasr_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_wide_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svasr_wide_s8_zu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svasr_wide_s8_z(svbool_t pg, svint8_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svasr_wide_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_wide_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svasr_wide_s16_zu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svasr_wide_s16_z(svbool_t pg, svint16_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svasr_wide_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_wide_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svasr_wide_s32_zu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svasr_wide_s32_z(svbool_t pg, svint32_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svasr_wide_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_wide_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svasr_wide_s8_mu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svasr_wide_s8_m(svbool_t pg, svint8_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svasr_wide_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_wide_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svasr_wide_s16_mu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svasr_wide_s16_m(svbool_t pg, svint16_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svasr_wide_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_wide_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svasr_wide_s32_mu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svasr_wide_s32_m(svbool_t pg, svint32_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svasr_wide_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_wide_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svasr_wide_s8_xu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svasr_wide_s8_x(svbool_t pg, svint8_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svasr_wide_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_wide_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svasr_wide_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svasr_wide_s16_x(svbool_t pg, svint16_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svasr_wide_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_wide_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svasr_wide_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svasr_wide_s32_x(svbool_t pg, svint32_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svasr_wide_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svasr_n_s8_zu10__SVBool_tu10__SVInt8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svasr_n_s8_z(svbool_t pg, svint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svasr_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svasr_n_s16_zu10__SVBool_tu11__SVInt16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svasr_n_s16_z(svbool_t pg, svint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svasr_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svasr_n_s32_zu10__SVBool_tu11__SVInt32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svasr_n_s32_z(svbool_t pg, svint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svasr_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svasr_n_s8_mu10__SVBool_tu10__SVInt8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svasr_n_s8_m(svbool_t pg, svint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svasr_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svasr_n_s16_mu10__SVBool_tu11__SVInt16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svasr_n_s16_m(svbool_t pg, svint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svasr_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svasr_n_s32_mu10__SVBool_tu11__SVInt32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svasr_n_s32_m(svbool_t pg, svint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svasr_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svasr_n_s8_xu10__SVBool_tu10__SVInt8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svasr_n_s8_x(svbool_t pg, svint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svasr_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svasr_n_s16_xu10__SVBool_tu11__SVInt16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svasr_n_s16_x(svbool_t pg, svint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svasr_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svasr_n_s32_xu10__SVBool_tu11__SVInt32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svasr_n_s32_x(svbool_t pg, svint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svasr_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_wide_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svasr_wide_n_s8_mu10__SVBool_tu10__SVInt8_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svasr_wide_n_s8_m(svbool_t pg, svint8_t op1, uint64_t op2) { + // CHECK-LABEL: test_svasr_wide_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_wide_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s16_mu10__SVBool_tu11__SVInt16_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svasr_wide_n_s16_m(svbool_t pg, svint16_t op1, uint64_t op2) { + // CHECK-LABEL: test_svasr_wide_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_wide_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s32_mu10__SVBool_tu11__SVInt32_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svasr_wide_n_s32_m(svbool_t pg, svint32_t op1, uint64_t op2) { + // CHECK-LABEL: test_svasr_wide_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_wide_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z22test_svasr_wide_n_s8_zu10__SVBool_tu10__SVInt8_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svasr_wide_n_s8_z(svbool_t pg, svint8_t op1, uint64_t op2) { + // CHECK-LABEL: test_svasr_wide_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( %pg, %[[PG]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_wide_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s16_zu10__SVBool_tu11__SVInt16_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svasr_wide_n_s16_z(svbool_t pg, svint16_t op1, uint64_t op2) { + // CHECK-LABEL: test_svasr_wide_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( %[[PG]], %[[OP]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_wide_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s32_zu10__SVBool_tu11__SVInt32_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svasr_wide_n_s32_z(svbool_t pg, svint32_t op1, uint64_t op2) { + // CHECK-LABEL: test_svasr_wide_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( %[[PG]], %[[OP]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_wide_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svasr_wide_n_s8_xu10__SVBool_tu10__SVInt8_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svasr_wide_n_s8_x(svbool_t pg, svint8_t op1, uint64_t op2) { + // CHECK-LABEL: test_svasr_wide_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_wide_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s16_xu10__SVBool_tu11__SVInt16_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svasr_wide_n_s16_x(svbool_t pg, svint16_t op1, uint64_t op2) { + // CHECK-LABEL: test_svasr_wide_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svasr_wide_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z23test_svasr_wide_n_s32_xu10__SVBool_tu11__SVInt32_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svasr_wide_n_s32_x(svbool_t pg, svint32_t op1, uint64_t op2) { + // CHECK-LABEL: test_svasr_wide_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asr.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasr_wide,_n_s32,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asrd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asrd.c index 7efe8ac98717..2de1b048c513 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asrd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_asrd.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,282 +13,150 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svasrd_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( [[PG]], [[TMP0]], i32 1) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svasrd_n_s8_zu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( [[PG]], [[TMP0]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svasrd_n_s8_z(svbool_t pg, svint8_t op1) { + // CHECK-LABEL: test_svasrd_n_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( %pg, %[[SEL]], i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasrd,_n_s8,_z,)(pg, op1, 1); } -// CHECK-LABEL: @test_svasrd_n_s8_z_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( [[PG]], [[TMP0]], i32 8) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svasrd_n_s8_z_1u10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( [[PG]], [[TMP0]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svasrd_n_s8_z_1(svbool_t pg, svint8_t op1) { + // CHECK-LABEL: test_svasrd_n_s8_z_1 + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( %pg, %[[SEL]], i32 8) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasrd,_n_s8,_z,)(pg, op1, 8); } -// CHECK-LABEL: @test_svasrd_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[TMP1]], i32 1) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svasrd_n_s16_zu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[TMP1]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svasrd_n_s16_z(svbool_t pg, svint16_t op1) { + // CHECK-LABEL: test_svasrd_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( %[[PG]], %[[SEL]], i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasrd,_n_s16,_z,)(pg, op1, 1); } -// CHECK-LABEL: @test_svasrd_n_s16_z_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[TMP1]], i32 16) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svasrd_n_s16_z_1u10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[TMP1]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svasrd_n_s16_z_1(svbool_t pg, svint16_t op1) { + // CHECK-LABEL: test_svasrd_n_s16_z_1 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( %[[PG]], %[[SEL]], i32 16) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasrd,_n_s16,_z,)(pg, op1, 16); } -// CHECK-LABEL: @test_svasrd_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[TMP1]], i32 1) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svasrd_n_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[TMP1]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svasrd_n_s32_z(svbool_t pg, svint32_t op1) { + // CHECK-LABEL: test_svasrd_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( %[[PG]], %[[SEL]], i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasrd,_n_s32,_z,)(pg, op1, 1); } -// CHECK-LABEL: @test_svasrd_n_s32_z_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[TMP1]], i32 32) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svasrd_n_s32_z_1u10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[TMP1]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svasrd_n_s32_z_1(svbool_t pg, svint32_t op1) { + // CHECK-LABEL: test_svasrd_n_s32_z_1 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( %[[PG]], %[[SEL]], i32 32) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasrd,_n_s32,_z,)(pg, op1, 32); } -// CHECK-LABEL: @test_svasrd_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[TMP1]], i32 1) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svasrd_n_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[TMP1]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svasrd_n_s64_z(svbool_t pg, svint64_t op1) { + // CHECK-LABEL: test_svasrd_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( %[[PG]], %[[SEL]], i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasrd,_n_s64,_z,)(pg, op1, 1); } -// CHECK-LABEL: @test_svasrd_n_s64_z_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[TMP1]], i32 64) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svasrd_n_s64_z_1u10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[TMP1]], i32 64) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svasrd_n_s64_z_1(svbool_t pg, svint64_t op1) { + // CHECK-LABEL: test_svasrd_n_s64_z_1 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( %[[PG]], %[[SEL]], i32 64) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasrd,_n_s64,_z,)(pg, op1, 64); } -// CHECK-LABEL: @test_svasrd_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svasrd_n_s8_mu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svasrd_n_s8_m(svbool_t pg, svint8_t op1) { + // CHECK-LABEL: test_svasrd_n_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( %pg, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasrd,_n_s8,_m,)(pg, op1, 1); } -// CHECK-LABEL: @test_svasrd_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svasrd_n_s16_mu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svasrd_n_s16_m(svbool_t pg, svint16_t op1) { + // CHECK-LABEL: test_svasrd_n_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( %[[PG]], %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasrd,_n_s16,_m,)(pg, op1, 1); } -// CHECK-LABEL: @test_svasrd_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svasrd_n_s32_mu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svasrd_n_s32_m(svbool_t pg, svint32_t op1) { + // CHECK-LABEL: test_svasrd_n_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( %[[PG]], %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasrd,_n_s32,_m,)(pg, op1, 1); } -// CHECK-LABEL: @test_svasrd_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svasrd_n_s64_mu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svasrd_n_s64_m(svbool_t pg, svint64_t op1) { + // CHECK-LABEL: test_svasrd_n_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( %[[PG]], %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasrd,_n_s64,_m,)(pg, op1, 1); } -// CHECK-LABEL: @test_svasrd_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svasrd_n_s8_xu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svasrd_n_s8_x(svbool_t pg, svint8_t op1) { + // CHECK-LABEL: test_svasrd_n_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asrd.nxv16i8( %pg, %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasrd,_n_s8,_x,)(pg, op1, 8); } -// CHECK-LABEL: @test_svasrd_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svasrd_n_s16_xu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svasrd_n_s16_x(svbool_t pg, svint16_t op1) { + // CHECK-LABEL: test_svasrd_n_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asrd.nxv8i16( %[[PG]], %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasrd,_n_s16,_x,)(pg, op1, 16); } -// CHECK-LABEL: @test_svasrd_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svasrd_n_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svasrd_n_s32_x(svbool_t pg, svint32_t op1) { + // CHECK-LABEL: test_svasrd_n_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asrd.nxv4i32( %[[PG]], %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasrd,_n_s32,_x,)(pg, op1, 32); } -// CHECK-LABEL: @test_svasrd_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svasrd_n_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svasrd_n_s64_x(svbool_t pg, svint64_t op1) { + // CHECK-LABEL: test_svasrd_n_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.asrd.nxv2i64( %[[PG]], %op1, i32 64) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svasrd,_n_s64,_x,)(pg, op1, 64); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c index deab191390c0..62258237bc5e 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfdot.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,60 +12,31 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_bfdot_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_bfdot_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_bfdot_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { + // CHECK-LABEL: test_bfdot_f32 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfdot( %x, %y, %z) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfdot, _f32, , )(x, y, z); } -// CHECK-LABEL: @test_bfdot_lane_0_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_bfdot_lane_0_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_bfdot_lane_0_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { + // CHECK-LABEL: test_bfdot_lane_0_f32 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfdot.lane( %x, %y, %z, i64 0) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfdot_lane, _f32, , )(x, y, z, 0); } -// CHECK-LABEL: @test_bfdot_lane_3_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_bfdot_lane_3_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfdot.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_bfdot_lane_3_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { + // CHECK-LABEL: test_bfdot_lane_3_f32 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfdot.lane( %x, %y, %z, i64 3) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfdot_lane, _f32, , )(x, y, z, 3); } -// CHECK-LABEL: @test_bfdot_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[Z:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_bfdot_n_f32u13__SVFloat32_tu14__SVBFloat16_tu6__bf16( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[Z:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfdot( [[X:%.*]], [[Y:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_bfdot_n_f32(svfloat32_t x, svbfloat16_t y, bfloat16_t z) { + // CHECK-LABEL: test_bfdot_n_f32 + // CHECK: %[[SPLAT:.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat %z) + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfdot( %x, %y, %[[SPLAT]]) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfdot, _n_f32, , )(x, y, z); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c index c5733eb812e7..8669de8ea322 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,60 +12,31 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svbfmlalb_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svbfmlalb_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svbfmlalb_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { + // CHECK-LABEL: test_svbfmlalb_f32 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalb( %x, %y, %z) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalb, _f32, , )(x, y, z); } -// CHECK-LABEL: @test_bfmlalb_lane_0_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_bfmlalb_lane_0_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_bfmlalb_lane_0_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { + // CHECK-LABEL: test_bfmlalb_lane_0_f32 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalb.lane( %x, %y, %z, i64 0) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalb_lane, _f32, , )(x, y, z, 0); } -// CHECK-LABEL: @test_bfmlalb_lane_7_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_bfmlalb_lane_7_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalb.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_bfmlalb_lane_7_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { + // CHECK-LABEL: test_bfmlalb_lane_7_f32 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalb.lane( %x, %y, %z, i64 7) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalb_lane, _f32, , )(x, y, z, 7); } -// CHECK-LABEL: @test_bfmlalb_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[Z:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_bfmlalb_n_f32u13__SVFloat32_tu14__SVBFloat16_tu6__bf16( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[Z:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalb( [[X:%.*]], [[Y:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_bfmlalb_n_f32(svfloat32_t x, svbfloat16_t y, bfloat16_t z) { + // CHECK-LABEL: test_bfmlalb_n_f32 + // CHECK: %[[SPLAT:.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat %z) + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalb( %x, %y, %[[SPLAT]]) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalb, _n_f32, , )(x, y, z); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c index 6fdd3206fee6..006ff6bc3200 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmlalt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,60 +12,31 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svbfmlalt_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svbfmlalt_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svbfmlalt_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { + // CHECK-LABEL: test_svbfmlalt_f32 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalt( %x, %y, %z) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalt, _f32, , )(x, y, z); } -// CHECK-LABEL: @test_bfmlalt_lane_0_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_bfmlalt_lane_0_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_bfmlalt_lane_0_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { + // CHECK-LABEL: test_bfmlalt_lane_0_f32 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalt.lane( %x, %y, %z, i64 0) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalt_lane, _f32, , )(x, y, z, 0); } -// CHECK-LABEL: @test_bfmlalt_lane_7_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_bfmlalt_lane_7_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmlalt.lane( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i64 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_bfmlalt_lane_7_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { + // CHECK-LABEL: test_bfmlalt_lane_7_f32 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalt.lane( %x, %y, %z, i64 7) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalt_lane, _f32, , )(x, y, z, 7); } -// CHECK-LABEL: @test_bfmlalt_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[Z:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_bfmlalt_n_f32u13__SVFloat32_tu14__SVBFloat16_tu6__bf16( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[Z:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bfmlalt( [[X:%.*]], [[Y:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_bfmlalt_n_f32(svfloat32_t x, svbfloat16_t y, bfloat16_t z) { + // CHECK-LABEL: test_bfmlalt_n_f32 + // CHECK: %[[SPLAT:.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat %z) + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmlalt( %x, %y, %[[SPLAT]]) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmlalt, _n_f32, , )(x, y, z); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c index c7f059f7904a..0d5af49d2758 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bfmmla.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,16 +12,9 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_bfmmla_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmmla( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_bfmmla_f32u13__SVFloat32_tu14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bfmmla( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_bfmmla_f32(svfloat32_t x, svbfloat16_t y, svbfloat16_t z) { + // CHECK-LABEL: test_bfmmla_f32 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.bfmmla( %x, %y, %z) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svbfmmla, _f32, , )(x, y, z); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c index e391d41fe795..fb11e485ca87 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_bic.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,889 +13,470 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svbic_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svbic_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svbic_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svbic_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svbic_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svbic_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svbic_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svbic_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svbic_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svbic_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svbic_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svbic_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svbic_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svbic_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svbic_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svbic_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svbic_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svbic_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svbic_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svbic_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svbic_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svbic_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svbic_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svbic_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svbic_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbic_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svbic_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svbic_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbic_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svbic_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svbic_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbic_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svbic_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svbic_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbic_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svbic_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svbic_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbic_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svbic_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svbic_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbic_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svbic_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svbic_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbic_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svbic_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svbic_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbic_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svbic_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svbic_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbic_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svbic_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svbic_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbic_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svbic_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svbic_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbic_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svbic_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svbic_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbic_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svbic_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svbic_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbic_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svbic_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svbic_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbic_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svbic_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svbic_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbic_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svbic_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svbic_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbic_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svbic_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svbic_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svbic_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svbic_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svbic_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svbic_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svbic_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svbic_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svbic_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svbic_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svbic_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svbic_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svbic_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svbic_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svbic_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svbic_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svbic_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svbic_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svbic_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svbic_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svbic_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svbic_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svbic_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svbic_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svbic_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svbic_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbic_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svbic_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svbic_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svbic_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svbic_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svbic_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svbic_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svbic_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svbic_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svbic_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svbic_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svbic_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbic_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svbic_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svbic_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svbic_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svbic_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svbic_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svbic_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svbic_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svbic_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svbic_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svbic_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svbic_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbic_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svbic_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svbic_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svbic_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svbic_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svbic_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svbic_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svbic_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svbic_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svbic_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svbic_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svbic_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbic_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bic.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svbic_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svbic_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svbic_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svbic_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svbic_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svbic_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svbic_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svbic_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svbic_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.bic.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svbic_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svbic_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_n_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svbic_b_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svbic_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bic.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svbic_b_z(svbool_t pg, svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svbic_b_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bic.z.nxv16i1( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbic,_b,_z,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brka.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brka.c index 3bccc717c5f0..2e3b1d798d6d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brka.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brka.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,32 +13,18 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svbrka_b_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brka.z.nxv16i1( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbrka_b_zu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brka.z.nxv16i1( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svbrka_b_z(svbool_t pg, svbool_t op) { + // CHECK-LABEL: test_svbrka_b_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.brka.z.nxv16i1( %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbrka,_b,_z,)(pg, op); } -// CHECK-LABEL: @test_svbrka_b_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brka.nxv16i1( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbrka_b_mu10__SVBool_tu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brka.nxv16i1( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svbrka_b_m(svbool_t inactive, svbool_t pg, svbool_t op) { + // CHECK-LABEL: test_svbrka_b_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.brka.nxv16i1( %inactive, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbrka,_b,_m,)(inactive, pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkb.c index 6e4da6dad7af..239f7898f863 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkb.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,32 +13,18 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svbrkb_b_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkb.z.nxv16i1( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbrkb_b_zu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkb.z.nxv16i1( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svbrkb_b_z(svbool_t pg, svbool_t op) { + // CHECK-LABEL: test_svbrkb_b_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.brkb.z.nxv16i1( %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbrkb,_b,_z,)(pg, op); } -// CHECK-LABEL: @test_svbrkb_b_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkb.nxv16i1( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbrkb_b_mu10__SVBool_tu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkb.nxv16i1( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svbrkb_b_m(svbool_t inactive, svbool_t pg, svbool_t op) { + // CHECK-LABEL: test_svbrkb_b_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.brkb.nxv16i1( %inactive, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbrkb,_b,_m,)(inactive, pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkn.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkn.c index 1c9d7910eacb..c7e5d3fdccf7 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkn.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkn.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,17 +13,10 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svbrkn_b_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkn.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbrkn_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkn.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svbrkn_b_z(svbool_t pg, svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svbrkn_b_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.brkn.z.nxv16i1( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbrkn,_b,_z,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpa.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpa.c index 9597d0fffe1c..b3c0d3a05b5d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpa.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpa.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,17 +13,10 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svbrkpa_b_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkpa.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svbrkpa_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkpa.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svbrkpa_b_z(svbool_t pg, svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svbrkpa_b_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.brkpa.z.nxv16i1( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbrkpa,_b,_z,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpb.c index 2fe10fd9d805..8bd9500bffb9 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_brkpb.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,17 +13,10 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svbrkpb_b_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkpb.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svbrkpb_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.brkpb.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svbrkpb_b_z(svbool_t pg, svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svbrkpb_b_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.brkpb.z.nxv16i1( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svbrkpb,_b,_z,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c index 21500914e9f1..ff61eef172c2 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cadd.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,180 +13,96 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcadd_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svcadd_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svcadd_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svcadd_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( %[[PG]], %[[SEL]], %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcadd,_f16,_z,)(pg, op1, op2, 90); } -// CHECK-LABEL: @test_svcadd_f16_z_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svcadd_f16_z_1u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svcadd_f16_z_1(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svcadd_f16_z_1 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( %[[PG]], %[[SEL]], %op2, i32 270) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcadd,_f16,_z,)(pg, op1, op2, 270); } -// CHECK-LABEL: @test_svcadd_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcadd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svcadd_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcadd.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svcadd_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svcadd_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcadd.nxv4f32( %[[PG]], %[[SEL]], %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcadd,_f32,_z,)(pg, op1, op2, 90); } -// CHECK-LABEL: @test_svcadd_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcadd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svcadd_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcadd.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svcadd_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svcadd_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcadd.nxv2f64( %[[PG]], %[[SEL]], %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcadd,_f64,_z,)(pg, op1, op2, 90); } -// CHECK-LABEL: @test_svcadd_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcadd_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcadd_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svcadd_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( %[[PG]], %op1, %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcadd,_f16,_m,)(pg, op1, op2, 90); } -// CHECK-LABEL: @test_svcadd_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcadd_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcadd_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svcadd_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcadd.nxv4f32( %[[PG]], %op1, %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcadd,_f32,_m,)(pg, op1, op2, 90); } -// CHECK-LABEL: @test_svcadd_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcadd_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcadd_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svcadd_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcadd.nxv2f64( %[[PG]], %op1, %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcadd,_f64,_m,)(pg, op1, op2, 90); } -// CHECK-LABEL: @test_svcadd_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcadd_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcadd_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svcadd_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcadd.nxv8f16( %[[PG]], %op1, %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcadd,_f16,_x,)(pg, op1, op2, 90); } -// CHECK-LABEL: @test_svcadd_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcadd_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcadd_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svcadd_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcadd.nxv4f32( %[[PG]], %op1, %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcadd,_f32,_x,)(pg, op1, op2, 90); } -// CHECK-LABEL: @test_svcadd_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcadd_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcadd.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcadd_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svcadd_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcadd.nxv2f64( %[[PG]], %op1, %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcadd,_f64,_x,)(pg, op1, op2, 90); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c index 98e7cea30bcb..21e11d294e8f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta-bfloat.c @@ -1,11 +1,10 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -15,36 +14,20 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svclasta_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv8bf16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svclasta_bf16u10__SVBool_tu14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv8bf16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svclasta_bf16(svbool_t pg, svbfloat16_t fallback, svbfloat16_t data) { + // CHECK-LABEL: test_svclasta_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clasta.nxv8bf16( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svclasta_bf16'}} return SVE_ACLE_FUNC(svclasta, _bf16, , )(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_n_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call bfloat @llvm.aarch64.sve.clasta.n.nxv8bf16( [[TMP0]], bfloat [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret bfloat [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svclasta_n_bf16u10__SVBool_tu6__bf16u14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call bfloat @llvm.aarch64.sve.clasta.n.nxv8bf16( [[TMP0]], bfloat [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret bfloat [[TMP1]] -// bfloat16_t test_svclasta_n_bf16(svbool_t pg, bfloat16_t fallback, svbfloat16_t data) { + // CHECK-LABEL: test_svclasta_n_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call bfloat @llvm.aarch64.sve.clasta.n.nxv8bf16( %[[PG]], bfloat %fallback, %data) + // CHECK: ret bfloat %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svclasta_n_bf16'}} return SVE_ACLE_FUNC(svclasta, _n_bf16, , )(pg, fallback, data); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta.c index c6cf55accf82..009af721dd3c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clasta.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,368 +13,196 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svclasta_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clasta.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svclasta_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clasta.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svclasta_s8(svbool_t pg, svint8_t fallback, svint8_t data) { + // CHECK-LABEL: test_svclasta_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clasta.nxv16i8( %pg, %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_s8,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svclasta_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svclasta_s16(svbool_t pg, svint16_t fallback, svint16_t data) { + // CHECK-LABEL: test_svclasta_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clasta.nxv8i16( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_s16,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svclasta_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svclasta_s32(svbool_t pg, svint32_t fallback, svint32_t data) { + // CHECK-LABEL: test_svclasta_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clasta.nxv4i32( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_s32,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svclasta_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svclasta_s64(svbool_t pg, svint64_t fallback, svint64_t data) { + // CHECK-LABEL: test_svclasta_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clasta.nxv2i64( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_s64,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clasta.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svclasta_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clasta.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svclasta_u8(svbool_t pg, svuint8_t fallback, svuint8_t data) { + // CHECK-LABEL: test_svclasta_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clasta.nxv16i8( %pg, %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_u8,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svclasta_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svclasta_u16(svbool_t pg, svuint16_t fallback, svuint16_t data) { + // CHECK-LABEL: test_svclasta_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clasta.nxv8i16( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_u16,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svclasta_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svclasta_u32(svbool_t pg, svuint32_t fallback, svuint32_t data) { + // CHECK-LABEL: test_svclasta_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clasta.nxv4i32( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_u32,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svclasta_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svclasta_u64(svbool_t pg, svuint64_t fallback, svuint64_t data) { + // CHECK-LABEL: test_svclasta_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clasta.nxv2i64( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_u64,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv8f16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svclasta_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv8f16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svclasta_f16(svbool_t pg, svfloat16_t fallback, svfloat16_t data) { + // CHECK-LABEL: test_svclasta_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clasta.nxv8f16( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_f16,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv4f32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svclasta_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv4f32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svclasta_f32(svbool_t pg, svfloat32_t fallback, svfloat32_t data) { + // CHECK-LABEL: test_svclasta_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clasta.nxv4f32( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_f32,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv2f64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svclasta_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clasta.nxv2f64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svclasta_f64(svbool_t pg, svfloat64_t fallback, svfloat64_t data) { + // CHECK-LABEL: test_svclasta_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clasta.nxv2f64( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_f64,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.clasta.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret i8 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svclasta_n_s8u10__SVBool_tau10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.clasta.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret i8 [[TMP0]] -// int8_t test_svclasta_n_s8(svbool_t pg, int8_t fallback, svint8_t data) { + // CHECK-LABEL: test_svclasta_n_s8 + // CHECK: %[[INTRINSIC:.*]] = call i8 @llvm.aarch64.sve.clasta.n.nxv16i8( %pg, i8 %fallback, %data) + // CHECK: ret i8 %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_n_s8,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.clasta.n.nxv8i16( [[TMP0]], i16 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret i16 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svclasta_n_s16u10__SVBool_tsu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.clasta.n.nxv8i16( [[TMP0]], i16 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret i16 [[TMP1]] -// int16_t test_svclasta_n_s16(svbool_t pg, int16_t fallback, svint16_t data) { + // CHECK-LABEL: test_svclasta_n_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i16 @llvm.aarch64.sve.clasta.n.nxv8i16( %[[PG]], i16 %fallback, %data) + // CHECK: ret i16 %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_n_s16,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.clasta.n.nxv4i32( [[TMP0]], i32 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svclasta_n_s32u10__SVBool_tiu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.clasta.n.nxv4i32( [[TMP0]], i32 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// int32_t test_svclasta_n_s32(svbool_t pg, int32_t fallback, svint32_t data) { + // CHECK-LABEL: test_svclasta_n_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.clasta.n.nxv4i32( %[[PG]], i32 %fallback, %data) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_n_s32,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.clasta.n.nxv2i64( [[TMP0]], i64 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svclasta_n_s64u10__SVBool_tlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.clasta.n.nxv2i64( [[TMP0]], i64 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// int64_t test_svclasta_n_s64(svbool_t pg, int64_t fallback, svint64_t data) { + // CHECK-LABEL: test_svclasta_n_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.clasta.n.nxv2i64( %[[PG]], i64 %fallback, %data) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_n_s64,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.clasta.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret i8 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svclasta_n_u8u10__SVBool_thu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.clasta.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret i8 [[TMP0]] -// uint8_t test_svclasta_n_u8(svbool_t pg, uint8_t fallback, svuint8_t data) { + // CHECK-LABEL: test_svclasta_n_u8 + // CHECK: %[[INTRINSIC:.*]] = call i8 @llvm.aarch64.sve.clasta.n.nxv16i8( %pg, i8 %fallback, %data) + // CHECK: ret i8 %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_n_u8,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.clasta.n.nxv8i16( [[TMP0]], i16 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret i16 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svclasta_n_u16u10__SVBool_ttu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.clasta.n.nxv8i16( [[TMP0]], i16 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret i16 [[TMP1]] -// uint16_t test_svclasta_n_u16(svbool_t pg, uint16_t fallback, svuint16_t data) { + // CHECK-LABEL: test_svclasta_n_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i16 @llvm.aarch64.sve.clasta.n.nxv8i16( %[[PG]], i16 %fallback, %data) + // CHECK: ret i16 %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_n_u16,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.clasta.n.nxv4i32( [[TMP0]], i32 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svclasta_n_u32u10__SVBool_tju12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.clasta.n.nxv4i32( [[TMP0]], i32 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// uint32_t test_svclasta_n_u32(svbool_t pg, uint32_t fallback, svuint32_t data) { + // CHECK-LABEL: test_svclasta_n_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.clasta.n.nxv4i32( %[[PG]], i32 %fallback, %data) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_n_u32,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.clasta.n.nxv2i64( [[TMP0]], i64 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svclasta_n_u64u10__SVBool_tmu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.clasta.n.nxv2i64( [[TMP0]], i64 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svclasta_n_u64(svbool_t pg, uint64_t fallback, svuint64_t data) { + // CHECK-LABEL: test_svclasta_n_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.clasta.n.nxv2i64( %[[PG]], i64 %fallback, %data) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_n_u64,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_n_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.clasta.n.nxv8f16( [[TMP0]], half [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret half [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svclasta_n_f16u10__SVBool_tDhu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.clasta.n.nxv8f16( [[TMP0]], half [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret half [[TMP1]] -// float16_t test_svclasta_n_f16(svbool_t pg, float16_t fallback, svfloat16_t data) { + // CHECK-LABEL: test_svclasta_n_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call half @llvm.aarch64.sve.clasta.n.nxv8f16( %[[PG]], half %fallback, %data) + // CHECK: ret half %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_n_f16,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.clasta.n.nxv4f32( [[TMP0]], float [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret float [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svclasta_n_f32u10__SVBool_tfu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.clasta.n.nxv4f32( [[TMP0]], float [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret float [[TMP1]] -// float32_t test_svclasta_n_f32(svbool_t pg, float32_t fallback, svfloat32_t data) { + // CHECK-LABEL: test_svclasta_n_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call float @llvm.aarch64.sve.clasta.n.nxv4f32( %[[PG]], float %fallback, %data) + // CHECK: ret float %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_n_f32,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclasta_n_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.clasta.n.nxv2f64( [[TMP0]], double [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret double [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svclasta_n_f64u10__SVBool_tdu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.clasta.n.nxv2f64( [[TMP0]], double [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret double [[TMP1]] -// float64_t test_svclasta_n_f64(svbool_t pg, float64_t fallback, svfloat64_t data) { + // CHECK-LABEL: test_svclasta_n_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call double @llvm.aarch64.sve.clasta.n.nxv2f64( %[[PG]], double %fallback, %data) + // CHECK: ret double %[[INTRINSIC]] return SVE_ACLE_FUNC(svclasta,_n_f64,,)(pg, fallback, data); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c index 0bd0c3b85986..cf16ddc134fb 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb-bfloat.c @@ -1,11 +1,10 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -15,36 +14,20 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svclastb_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv8bf16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svclastb_bf16u10__SVBool_tu14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv8bf16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svclastb_bf16(svbool_t pg, svbfloat16_t fallback, svbfloat16_t data) { + // CHECK-LABEL: test_svclastb_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clastb.nxv8bf16( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svclastb_bf16'}} return SVE_ACLE_FUNC(svclastb, _bf16, , )(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_n_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call bfloat @llvm.aarch64.sve.clastb.n.nxv8bf16( [[TMP0]], bfloat [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret bfloat [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svclastb_n_bf16u10__SVBool_tu6__bf16u14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call bfloat @llvm.aarch64.sve.clastb.n.nxv8bf16( [[TMP0]], bfloat [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret bfloat [[TMP1]] -// bfloat16_t test_svclastb_n_bf16(svbool_t pg, bfloat16_t fallback, svbfloat16_t data) { + // CHECK-LABEL: test_svclastb_n_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call bfloat @llvm.aarch64.sve.clastb.n.nxv8bf16( %[[PG]], bfloat %fallback, %data) + // CHECK: ret bfloat %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svclastb_n_bf16'}} return SVE_ACLE_FUNC(svclastb, _n_bf16, , )(pg, fallback, data); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb.c index 1473d0ab6207..64c393ffb2d0 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clastb.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,368 +13,196 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svclastb_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clastb.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svclastb_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clastb.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svclastb_s8(svbool_t pg, svint8_t fallback, svint8_t data) { + // CHECK-LABEL: test_svclastb_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clastb.nxv16i8( %pg, %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_s8,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svclastb_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svclastb_s16(svbool_t pg, svint16_t fallback, svint16_t data) { + // CHECK-LABEL: test_svclastb_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clastb.nxv8i16( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_s16,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svclastb_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svclastb_s32(svbool_t pg, svint32_t fallback, svint32_t data) { + // CHECK-LABEL: test_svclastb_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clastb.nxv4i32( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_s32,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svclastb_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svclastb_s64(svbool_t pg, svint64_t fallback, svint64_t data) { + // CHECK-LABEL: test_svclastb_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clastb.nxv2i64( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_s64,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clastb.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svclastb_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clastb.nxv16i8( [[PG:%.*]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svclastb_u8(svbool_t pg, svuint8_t fallback, svuint8_t data) { + // CHECK-LABEL: test_svclastb_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clastb.nxv16i8( %pg, %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_u8,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svclastb_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv8i16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svclastb_u16(svbool_t pg, svuint16_t fallback, svuint16_t data) { + // CHECK-LABEL: test_svclastb_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clastb.nxv8i16( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_u16,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svclastb_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv4i32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svclastb_u32(svbool_t pg, svuint32_t fallback, svuint32_t data) { + // CHECK-LABEL: test_svclastb_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clastb.nxv4i32( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_u32,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svclastb_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv2i64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svclastb_u64(svbool_t pg, svuint64_t fallback, svuint64_t data) { + // CHECK-LABEL: test_svclastb_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clastb.nxv2i64( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_u64,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv8f16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svclastb_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv8f16( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svclastb_f16(svbool_t pg, svfloat16_t fallback, svfloat16_t data) { + // CHECK-LABEL: test_svclastb_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clastb.nxv8f16( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_f16,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv4f32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svclastb_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv4f32( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svclastb_f32(svbool_t pg, svfloat32_t fallback, svfloat32_t data) { + // CHECK-LABEL: test_svclastb_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clastb.nxv4f32( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_f32,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv2f64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svclastb_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clastb.nxv2f64( [[TMP0]], [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svclastb_f64(svbool_t pg, svfloat64_t fallback, svfloat64_t data) { + // CHECK-LABEL: test_svclastb_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clastb.nxv2f64( %[[PG]], %fallback, %data) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_f64,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.clastb.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret i8 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svclastb_n_s8u10__SVBool_tau10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.clastb.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret i8 [[TMP0]] -// int8_t test_svclastb_n_s8(svbool_t pg, int8_t fallback, svint8_t data) { + // CHECK-LABEL: test_svclastb_n_s8 + // CHECK: %[[INTRINSIC:.*]] = call i8 @llvm.aarch64.sve.clastb.n.nxv16i8( %pg, i8 %fallback, %data) + // CHECK: ret i8 %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_n_s8,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.clastb.n.nxv8i16( [[TMP0]], i16 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret i16 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svclastb_n_s16u10__SVBool_tsu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.clastb.n.nxv8i16( [[TMP0]], i16 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret i16 [[TMP1]] -// int16_t test_svclastb_n_s16(svbool_t pg, int16_t fallback, svint16_t data) { + // CHECK-LABEL: test_svclastb_n_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i16 @llvm.aarch64.sve.clastb.n.nxv8i16( %[[PG]], i16 %fallback, %data) + // CHECK: ret i16 %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_n_s16,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.clastb.n.nxv4i32( [[TMP0]], i32 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svclastb_n_s32u10__SVBool_tiu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.clastb.n.nxv4i32( [[TMP0]], i32 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// int32_t test_svclastb_n_s32(svbool_t pg, int32_t fallback, svint32_t data) { + // CHECK-LABEL: test_svclastb_n_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.clastb.n.nxv4i32( %[[PG]], i32 %fallback, %data) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_n_s32,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.clastb.n.nxv2i64( [[TMP0]], i64 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svclastb_n_s64u10__SVBool_tlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.clastb.n.nxv2i64( [[TMP0]], i64 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// int64_t test_svclastb_n_s64(svbool_t pg, int64_t fallback, svint64_t data) { + // CHECK-LABEL: test_svclastb_n_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.clastb.n.nxv2i64( %[[PG]], i64 %fallback, %data) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_n_s64,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.clastb.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret i8 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svclastb_n_u8u10__SVBool_thu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.clastb.n.nxv16i8( [[PG:%.*]], i8 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret i8 [[TMP0]] -// uint8_t test_svclastb_n_u8(svbool_t pg, uint8_t fallback, svuint8_t data) { + // CHECK-LABEL: test_svclastb_n_u8 + // CHECK: %[[INTRINSIC:.*]] = call i8 @llvm.aarch64.sve.clastb.n.nxv16i8( %pg, i8 %fallback, %data) + // CHECK: ret i8 %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_n_u8,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.clastb.n.nxv8i16( [[TMP0]], i16 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret i16 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svclastb_n_u16u10__SVBool_ttu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.clastb.n.nxv8i16( [[TMP0]], i16 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret i16 [[TMP1]] -// uint16_t test_svclastb_n_u16(svbool_t pg, uint16_t fallback, svuint16_t data) { + // CHECK-LABEL: test_svclastb_n_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i16 @llvm.aarch64.sve.clastb.n.nxv8i16( %[[PG]], i16 %fallback, %data) + // CHECK: ret i16 %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_n_u16,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.clastb.n.nxv4i32( [[TMP0]], i32 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svclastb_n_u32u10__SVBool_tju12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.clastb.n.nxv4i32( [[TMP0]], i32 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// uint32_t test_svclastb_n_u32(svbool_t pg, uint32_t fallback, svuint32_t data) { + // CHECK-LABEL: test_svclastb_n_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.clastb.n.nxv4i32( %[[PG]], i32 %fallback, %data) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_n_u32,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.clastb.n.nxv2i64( [[TMP0]], i64 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svclastb_n_u64u10__SVBool_tmu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.clastb.n.nxv2i64( [[TMP0]], i64 [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svclastb_n_u64(svbool_t pg, uint64_t fallback, svuint64_t data) { + // CHECK-LABEL: test_svclastb_n_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.clastb.n.nxv2i64( %[[PG]], i64 %fallback, %data) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_n_u64,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_n_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.clastb.n.nxv8f16( [[TMP0]], half [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret half [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svclastb_n_f16u10__SVBool_tDhu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.clastb.n.nxv8f16( [[TMP0]], half [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret half [[TMP1]] -// float16_t test_svclastb_n_f16(svbool_t pg, float16_t fallback, svfloat16_t data) { + // CHECK-LABEL: test_svclastb_n_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call half @llvm.aarch64.sve.clastb.n.nxv8f16( %[[PG]], half %fallback, %data) + // CHECK: ret half %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_n_f16,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.clastb.n.nxv4f32( [[TMP0]], float [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret float [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svclastb_n_f32u10__SVBool_tfu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.clastb.n.nxv4f32( [[TMP0]], float [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret float [[TMP1]] -// float32_t test_svclastb_n_f32(svbool_t pg, float32_t fallback, svfloat32_t data) { + // CHECK-LABEL: test_svclastb_n_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call float @llvm.aarch64.sve.clastb.n.nxv4f32( %[[PG]], float %fallback, %data) + // CHECK: ret float %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_n_f32,,)(pg, fallback, data); } -// CHECK-LABEL: @test_svclastb_n_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.clastb.n.nxv2f64( [[TMP0]], double [[FALLBACK:%.*]], [[DATA:%.*]]) -// CHECK-NEXT: ret double [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svclastb_n_f64u10__SVBool_tdu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.clastb.n.nxv2f64( [[TMP0]], double [[FALLBACK:%.*]], [[DATA:%.*]]) -// CPP-CHECK-NEXT: ret double [[TMP1]] -// float64_t test_svclastb_n_f64(svbool_t pg, float64_t fallback, svfloat64_t data) { + // CHECK-LABEL: test_svclastb_n_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call double @llvm.aarch64.sve.clastb.n.nxv2f64( %[[PG]], double %fallback, %data) + // CHECK: ret double %[[INTRINSIC]] return SVE_ACLE_FUNC(svclastb,_n_f64,,)(pg, fallback, data); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cls.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cls.c index c47252f7bd7e..c1f159dc7365 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cls.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cls.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,200 +13,107 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcls_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cls.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcls_s8_zu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cls.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svcls_s8_z(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svcls_s8_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cls.nxv16i8( zeroinitializer, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcls,_s8,_z,)(pg, op); } -// CHECK-LABEL: @test_svcls_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcls_s16_zu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcls_s16_z(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svcls_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cls.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcls,_s16,_z,)(pg, op); } -// CHECK-LABEL: @test_svcls_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcls_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcls_s32_z(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcls_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cls.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcls,_s32,_z,)(pg, op); } -// CHECK-LABEL: @test_svcls_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcls_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcls_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcls_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cls.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcls,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcls_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cls.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcls_s8_mu11__SVUint8_tu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cls.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svcls_s8_m(svuint8_t inactive, svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svcls_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cls.nxv16i8( %inactive, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcls,_s8,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcls_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcls_s16_mu12__SVUint16_tu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcls_s16_m(svuint16_t inactive, svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svcls_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cls.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcls,_s16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcls_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcls_s32_mu12__SVUint32_tu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcls_s32_m(svuint32_t inactive, svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcls_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cls.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcls,_s32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcls_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcls_s64_mu12__SVUint64_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcls_s64_m(svuint64_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcls_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cls.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcls,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcls_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cls.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcls_s8_xu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cls.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svcls_s8_x(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svcls_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cls.nxv16i8( undef, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcls,_s8,_x,)(pg, op); } -// CHECK-LABEL: @test_svcls_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcls_s16_xu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcls_s16_x(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svcls_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cls.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcls,_s16,_x,)(pg, op); } -// CHECK-LABEL: @test_svcls_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcls_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcls_s32_x(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcls_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cls.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcls,_s32,_x,)(pg, op); } -// CHECK-LABEL: @test_svcls_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcls_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cls.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcls_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcls_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cls.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcls,_s64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clz.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clz.c index 51e29598a9b5..ee64519b9fe0 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clz.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_clz.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,398 +13,212 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svclz_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svclz_s8_zu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svclz_s8_z(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svclz_s8_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv16i8( zeroinitializer, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_s8,_z,)(pg, op); } -// CHECK-LABEL: @test_svclz_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svclz_s16_zu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svclz_s16_z(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svclz_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_s16,_z,)(pg, op); } -// CHECK-LABEL: @test_svclz_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svclz_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svclz_s32_z(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svclz_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_s32,_z,)(pg, op); } -// CHECK-LABEL: @test_svclz_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svclz_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svclz_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svclz_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svclz_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svclz_u8_zu10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svclz_u8_z(svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svclz_u8_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv16i8( zeroinitializer, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_u8,_z,)(pg, op); } -// CHECK-LABEL: @test_svclz_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svclz_u16_zu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svclz_u16_z(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svclz_u16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_u16,_z,)(pg, op); } -// CHECK-LABEL: @test_svclz_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svclz_u32_zu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svclz_u32_z(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svclz_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_u32,_z,)(pg, op); } -// CHECK-LABEL: @test_svclz_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svclz_u64_zu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svclz_u64_z(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svclz_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_u64,_z,)(pg, op); } -// CHECK-LABEL: @test_svclz_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svclz_s8_mu11__SVUint8_tu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svclz_s8_m(svuint8_t inactive, svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svclz_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv16i8( %inactive, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_s8,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svclz_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svclz_s16_mu12__SVUint16_tu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svclz_s16_m(svuint16_t inactive, svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svclz_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_s16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svclz_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svclz_s32_mu12__SVUint32_tu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svclz_s32_m(svuint32_t inactive, svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svclz_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_s32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svclz_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svclz_s64_mu12__SVUint64_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svclz_s64_m(svuint64_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svclz_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svclz_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svclz_u8_mu11__SVUint8_tu10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svclz_u8_m(svuint8_t inactive, svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svclz_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv16i8( %inactive, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_u8,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svclz_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svclz_u16_mu12__SVUint16_tu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svclz_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svclz_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_u16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svclz_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svclz_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svclz_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svclz_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_u32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svclz_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svclz_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svclz_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svclz_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_u64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svclz_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svclz_s8_xu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svclz_s8_x(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svclz_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv16i8( undef, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_s8,_x,)(pg, op); } -// CHECK-LABEL: @test_svclz_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svclz_s16_xu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svclz_s16_x(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svclz_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_s16,_x,)(pg, op); } -// CHECK-LABEL: @test_svclz_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svclz_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svclz_s32_x(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svclz_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_s32,_x,)(pg, op); } -// CHECK-LABEL: @test_svclz_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svclz_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svclz_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svclz_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_s64,_x,)(pg, op); } -// CHECK-LABEL: @test_svclz_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svclz_u8_xu10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.clz.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svclz_u8_x(svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svclz_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv16i8( undef, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_u8,_x,)(pg, op); } -// CHECK-LABEL: @test_svclz_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svclz_u16_xu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svclz_u16_x(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svclz_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_u16,_x,)(pg, op); } -// CHECK-LABEL: @test_svclz_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svclz_u32_xu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svclz_u32_x(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svclz_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_u32,_x,)(pg, op); } -// CHECK-LABEL: @test_svclz_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svclz_u64_xu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.clz.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svclz_u64_x(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svclz_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.clz.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svclz,_u64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c index 0ffa0cb09de2..0c36e69853ed 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmla.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,278 +13,148 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcmla_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svcmla_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svcmla_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmla,_f16,_z,)(pg, op1, op2, op3, 0); } -// CHECK-LABEL: @test_svcmla_f16_z_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svcmla_f16_z_1u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svcmla_f16_z_1(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svcmla_f16_z_1 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3, i32 90) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmla,_f16,_z,)(pg, op1, op2, op3, 90); } -// CHECK-LABEL: @test_svcmla_f16_z_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svcmla_f16_z_2u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svcmla_f16_z_2(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svcmla_f16_z_2 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3, i32 180) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmla,_f16,_z,)(pg, op1, op2, op3, 180); } -// CHECK-LABEL: @test_svcmla_f16_z_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svcmla_f16_z_3u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svcmla_f16_z_3(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svcmla_f16_z_3 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3, i32 270) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmla,_f16,_z,)(pg, op1, op2, op3, 270); } -// CHECK-LABEL: @test_svcmla_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svcmla_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svcmla_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmla.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmla,_f32,_z,)(pg, op1, op2, op3, 0); } -// CHECK-LABEL: @test_svcmla_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svcmla_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svcmla_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmla.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3, i32 90) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmla,_f64,_z,)(pg, op1, op2, op3, 90); } -// CHECK-LABEL: @test_svcmla_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcmla_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svcmla_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( %[[PG]], %op1, %op2, %op3, i32 180) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmla,_f16,_m,)(pg, op1, op2, op3, 180); } -// CHECK-LABEL: @test_svcmla_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcmla_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svcmla_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmla.nxv4f32( %[[PG]], %op1, %op2, %op3, i32 270) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmla,_f32,_m,)(pg, op1, op2, op3, 270); } -// CHECK-LABEL: @test_svcmla_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcmla_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svcmla_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmla.nxv2f64( %[[PG]], %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmla,_f64,_m,)(pg, op1, op2, op3, 0); } -// CHECK-LABEL: @test_svcmla_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcmla_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svcmla_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmla.nxv8f16( %[[PG]], %op1, %op2, %op3, i32 90) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmla,_f16,_x,)(pg, op1, op2, op3, 90); } -// CHECK-LABEL: @test_svcmla_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcmla_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svcmla_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmla.nxv4f32( %[[PG]], %op1, %op2, %op3, i32 180) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmla,_f32,_x,)(pg, op1, op2, op3, 180); } -// CHECK-LABEL: @test_svcmla_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcmla_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svcmla_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmla.nxv2f64( %[[PG]], %op1, %op2, %op3, i32 270) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmla,_f64,_x,)(pg, op1, op2, op3, 270); } -// CHECK-LABEL: @test_svcmla_lane_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svcmla_lane_f16u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svcmla_lane_f16(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svcmla_lane_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv8f16( %op1, %op2, %op3, i32 0, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmla_lane,_f16,,)(op1, op2, op3, 0, 0); } -// CHECK-LABEL: @test_svcmla_lane_f16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svcmla_lane_f16_1u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svcmla_lane_f16_1(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svcmla_lane_f16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv8f16( %op1, %op2, %op3, i32 3, i32 90) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmla_lane,_f16,,)(op1, op2, op3, 3, 90); } -// CHECK-LABEL: @test_svcmla_lane_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svcmla_lane_f32u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svcmla_lane_f32(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svcmla_lane_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv4f32( %op1, %op2, %op3, i32 0, i32 180) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmla_lane,_f32,,)(op1, op2, op3, 0, 180); } -// CHECK-LABEL: @test_svcmla_lane_f32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svcmla_lane_f32_1u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svcmla_lane_f32_1(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svcmla_lane_f32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmla.lane.nxv4f32( %op1, %op2, %op3, i32 1, i32 270) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmla_lane,_f32,,)(op1, op2, op3, 1, 270); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c index cedd2738b7ef..3c267b3c49c3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpeq.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,538 +13,284 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcmpeq_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcmpeq_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmpeq_s8(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svcmpeq_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpeq,_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpeq_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpeq_s16(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svcmpeq_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpeq_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpeq_s32(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svcmpeq_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpeq_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpeq_s64(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmpeq_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_s64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcmpeq_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmpeq_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svcmpeq_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpeq,_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpeq_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpeq_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svcmpeq_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpeq_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpeq_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svcmpeq_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_u32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpeq_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpeq_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcmpeq_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_u64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_s64u10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpeq_n_s64(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmpeq_n_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_s64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_u64u10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpeq_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svcmpeq_n_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_u64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_wide_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svcmpeq_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmpeq_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmpeq_wide_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpeq_wide,_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_wide_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmpeq_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpeq_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmpeq_wide_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq_wide,_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_wide_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmpeq_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpeq_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmpeq_wide_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq_wide,_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmpeq_n_s8u10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmpeq_n_s8(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svcmpeq_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpeq,_n_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_s16u10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpeq_n_s16(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svcmpeq_n_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_s32u10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpeq_n_s32(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svcmpeq_n_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmpeq_n_u8u10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmpeq_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svcmpeq_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpeq,_n_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_u16u10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpeq_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svcmpeq_n_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_u32u10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpeq_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svcmpeq_n_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_u32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpeq_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpeq_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svcmpeq_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpeq_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpeq_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svcmpeq_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpeq_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpeq_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svcmpeq_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_f64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_n_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_f16u10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpeq_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svcmpeq_n_f16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpeq.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_f32u10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpeq_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svcmpeq_n_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpeq.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_n_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpeq_n_f64u10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpeq_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svcmpeq_n_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpeq.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq,_n_f64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_wide_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svcmpeq_wide_n_s8u10__SVBool_tu10__SVInt8_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmpeq_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmpeq_wide_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpeq_wide,_n_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_wide_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmpeq_wide_n_s16u10__SVBool_tu11__SVInt16_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpeq_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmpeq_wide_n_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq_wide,_n_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpeq_wide_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmpeq_wide_n_s32u10__SVBool_tu11__SVInt32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpeq_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmpeq_wide_n_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpeq.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpeq_wide,_n_s32,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c index 26ead4897ea1..895e49c69af2 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpge.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,650 +13,343 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcmpge_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcmpge_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmpge_s8(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svcmpge_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge,_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpge_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpge_s16(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svcmpge_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpge_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpge_s32(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svcmpge_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpge_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpge_s64(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmpge_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_s64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcmpge_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmpge_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svcmpge_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge,_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpge_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpge_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svcmpge_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpge_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpge_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svcmpge_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_u32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpge_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpge_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcmpge_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_u64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_s64u10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpge_n_s64(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmpge_n_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_s64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_u64u10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpge_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svcmpge_n_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_u64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_wide_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svcmpge_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmpge_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmpge_wide_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge_wide,_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_wide_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmpge_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpge_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmpge_wide_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_wide_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmpge_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpge_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmpge_wide_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_wide_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svcmpge_wide_u8u10__SVBool_tu11__SVUint8_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmpge_wide_u8(svbool_t pg, svuint8_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcmpge_wide_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge_wide,_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_wide_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmpge_wide_u16u10__SVBool_tu12__SVUint16_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpge_wide_u16(svbool_t pg, svuint16_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcmpge_wide_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_wide_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmpge_wide_u32u10__SVBool_tu12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpge_wide_u32(svbool_t pg, svuint32_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcmpge_wide_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_u32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmpge_n_s8u10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmpge_n_s8(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svcmpge_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge,_n_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_s16u10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpge_n_s16(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svcmpge_n_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_s32u10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpge_n_s32(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svcmpge_n_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmpge_n_u8u10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmpge_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svcmpge_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge,_n_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_u16u10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpge_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svcmpge_n_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_u32u10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpge_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svcmpge_n_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_u32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpge_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpge_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svcmpge_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpge_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpge_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svcmpge_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpge_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpge_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svcmpge_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_f64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_n_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_f16u10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpge_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svcmpge_n_f16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_f32u10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpge_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svcmpge_n_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_n_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpge_n_f64u10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpge_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svcmpge_n_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge,_n_f64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_wide_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svcmpge_wide_n_s8u10__SVBool_tu10__SVInt8_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmpge_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmpge_wide_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge_wide,_n_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_wide_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_s16u10__SVBool_tu11__SVInt16_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpge_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmpge_wide_n_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_n_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_wide_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_s32u10__SVBool_tu11__SVInt32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpge_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmpge_wide_n_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_n_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_wide_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svcmpge_wide_n_u8u10__SVBool_tu11__SVUint8_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmpge_wide_n_u8(svbool_t pg, svuint8_t op1, uint64_t op2) { + // CHECK-LABEL: test_svcmpge_wide_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpge_wide,_n_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_wide_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_u16u10__SVBool_tu12__SVUint16_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpge_wide_n_u16(svbool_t pg, svuint16_t op1, uint64_t op2) { + // CHECK-LABEL: test_svcmpge_wide_n_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_n_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpge_wide_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmpge_wide_n_u32u10__SVBool_tu12__SVUint32_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpge_wide_n_u32(svbool_t pg, svuint32_t op1, uint64_t op2) { + // CHECK-LABEL: test_svcmpge_wide_n_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpge_wide,_n_u32,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c index a5881cb129ab..9d11062448b2 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpgt.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,650 +13,343 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcmpgt_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcmpgt_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmpgt_s8(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svcmpgt_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt,_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpgt_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpgt_s16(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svcmpgt_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpgt_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpgt_s32(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svcmpgt_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpgt_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpgt_s64(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmpgt_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_s64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcmpgt_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmpgt_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svcmpgt_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt,_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpgt_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpgt_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svcmpgt_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpgt_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpgt_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svcmpgt_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_u32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpgt_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpgt_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcmpgt_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_u64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_s64u10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpgt_n_s64(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmpgt_n_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_s64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_u64u10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpgt_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svcmpgt_n_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_u64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_wide_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svcmpgt_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmpgt_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmpgt_wide_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt_wide,_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_wide_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmpgt_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpgt_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmpgt_wide_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_wide_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmpgt_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpgt_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmpgt_wide_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_wide_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svcmpgt_wide_u8u10__SVBool_tu11__SVUint8_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmpgt_wide_u8(svbool_t pg, svuint8_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcmpgt_wide_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt_wide,_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_wide_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmpgt_wide_u16u10__SVBool_tu12__SVUint16_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpgt_wide_u16(svbool_t pg, svuint16_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcmpgt_wide_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_wide_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmpgt_wide_u32u10__SVBool_tu12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpgt_wide_u32(svbool_t pg, svuint32_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcmpgt_wide_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_u32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmpgt_n_s8u10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmpgt_n_s8(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svcmpgt_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt,_n_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_s16u10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpgt_n_s16(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svcmpgt_n_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_s32u10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpgt_n_s32(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svcmpgt_n_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmpgt_n_u8u10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmpgt_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svcmpgt_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt,_n_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_u16u10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpgt_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svcmpgt_n_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_u32u10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpgt_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svcmpgt_n_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_u32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpgt_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpgt_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svcmpgt_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpgt_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpgt_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svcmpgt_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpgt_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpgt_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svcmpgt_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_f64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_n_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_f16u10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpgt_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svcmpgt_n_f16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_f32u10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpgt_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svcmpgt_n_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_n_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpgt_n_f64u10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpgt_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svcmpgt_n_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt,_n_f64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_wide_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svcmpgt_wide_n_s8u10__SVBool_tu10__SVInt8_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmpgt_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmpgt_wide_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt_wide,_n_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_wide_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_s16u10__SVBool_tu11__SVInt16_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpgt_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmpgt_wide_n_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_n_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_wide_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_s32u10__SVBool_tu11__SVInt32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpgt_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmpgt_wide_n_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_n_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_wide_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svcmpgt_wide_n_u8u10__SVBool_tu11__SVUint8_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmpgt_wide_n_u8(svbool_t pg, svuint8_t op1, uint64_t op2) { + // CHECK-LABEL: test_svcmpgt_wide_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpgt_wide,_n_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_wide_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_u16u10__SVBool_tu12__SVUint16_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpgt_wide_n_u16(svbool_t pg, svuint16_t op1, uint64_t op2) { + // CHECK-LABEL: test_svcmpgt_wide_n_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_n_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpgt_wide_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmpgt_wide_n_u32u10__SVBool_tu12__SVUint32_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpgt_wide_n_u32(svbool_t pg, svuint32_t op1, uint64_t op2) { + // CHECK-LABEL: test_svcmpgt_wide_n_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpgt_wide,_n_u32,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c index 694b7c7a93af..c3f6408b1126 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmple.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,650 +13,343 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcmple_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcmple_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmple_s8(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svcmple_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( %pg, %op2, %op1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple,_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmple_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmple_s16(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svcmple_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmple_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmple_s32(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svcmple_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmple_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmple_s64(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmple_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_s64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcmple_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmple_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svcmple_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( %pg, %op2, %op1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple,_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmple_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmple_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svcmple_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmple_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmple_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svcmple_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_u32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmple_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmple_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcmple_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_u64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmple_n_s64u10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmple_n_s64(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmple_n_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv2i64( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_s64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmple_n_u64u10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmple_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svcmple_n_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv2i64( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_u64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_wide_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svcmple_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmple_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmple_wide_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple_wide,_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_wide_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmple_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmple_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmple_wide_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_wide_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmple_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmple_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmple_wide_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_wide_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svcmple_wide_u8u10__SVBool_tu11__SVUint8_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmple_wide_u8(svbool_t pg, svuint8_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcmple_wide_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple_wide,_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_wide_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmple_wide_u16u10__SVBool_tu12__SVUint16_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmple_wide_u16(svbool_t pg, svuint16_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcmple_wide_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_wide_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmple_wide_u32u10__SVBool_tu12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmple_wide_u32(svbool_t pg, svuint32_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcmple_wide_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_u32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmple_n_s8u10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmple_n_s8(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svcmple_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv16i8( %pg, %[[DUP]], %op1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple,_n_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmple_n_s16u10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmple_n_s16(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svcmple_n_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv8i16( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmple_n_s32u10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmple_n_s32(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svcmple_n_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpge.nxv4i32( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmple_n_u8u10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmple_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svcmple_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv16i8( %pg, %[[DUP]], %op1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple,_n_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmple_n_u16u10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmple_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svcmple_n_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv8i16( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmple_n_u32u10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmple_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svcmple_n_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphs.nxv4i32( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_u32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmple_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmple_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svcmple_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmple_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmple_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svcmple_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmple_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmple_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svcmple_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_f64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_n_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmple_n_f16u10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmple_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svcmple_n_f16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv8f16( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmple_n_f32u10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmple_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svcmple_n_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv4f32( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_n_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmple_n_f64u10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmple_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svcmple_n_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpge.nxv2f64( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple,_n_f64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_wide_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svcmple_wide_n_s8u10__SVBool_tu10__SVInt8_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmple_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmple_wide_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmple.wide.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple_wide,_n_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_wide_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_s16u10__SVBool_tu11__SVInt16_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmple_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmple_wide_n_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmple.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_n_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_wide_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_s32u10__SVBool_tu11__SVInt32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmple_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmple_wide_n_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmple.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_n_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_wide_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svcmple_wide_n_u8u10__SVBool_tu11__SVUint8_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmple_wide_n_u8(svbool_t pg, svuint8_t op1, uint64_t op2) { + // CHECK-LABEL: test_svcmple_wide_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmple_wide,_n_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_wide_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_u16u10__SVBool_tu12__SVUint16_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmple_wide_n_u16(svbool_t pg, svuint16_t op1, uint64_t op2) { + // CHECK-LABEL: test_svcmple_wide_n_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_n_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmple_wide_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmple_wide_n_u32u10__SVBool_tu12__SVUint32_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmple_wide_n_u32(svbool_t pg, svuint32_t op1, uint64_t op2) { + // CHECK-LABEL: test_svcmple_wide_n_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpls.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmple_wide,_n_u32,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c index 1ef15579ade2..9bd99e176608 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmplt.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,650 +13,343 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcmplt_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcmplt_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmplt_s8(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svcmplt_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( %pg, %op2, %op1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt,_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmplt_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmplt_s16(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svcmplt_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmplt_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmplt_s32(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svcmplt_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmplt_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmplt_s64(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmplt_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_s64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcmplt_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmplt_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svcmplt_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( %pg, %op2, %op1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt,_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmplt_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmplt_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svcmplt_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmplt_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmplt_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svcmplt_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_u32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmplt_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmplt_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcmplt_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_u64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_s64u10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmplt_n_s64(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmplt_n_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv2i64( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_s64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_u64u10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmplt_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svcmplt_n_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv2i64( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_u64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_wide_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svcmplt_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmplt_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmplt_wide_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt_wide,_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_wide_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmplt_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmplt_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmplt_wide_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_wide_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmplt_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmplt_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmplt_wide_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_wide_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svcmplt_wide_u8u10__SVBool_tu11__SVUint8_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmplt_wide_u8(svbool_t pg, svuint8_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcmplt_wide_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt_wide,_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_wide_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmplt_wide_u16u10__SVBool_tu12__SVUint16_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmplt_wide_u16(svbool_t pg, svuint16_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcmplt_wide_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_wide_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmplt_wide_u32u10__SVBool_tu12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmplt_wide_u32(svbool_t pg, svuint32_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcmplt_wide_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_u32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmplt_n_s8u10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmplt_n_s8(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svcmplt_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv16i8( %pg, %[[DUP]], %op1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt,_n_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_s16u10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmplt_n_s16(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svcmplt_n_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv8i16( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_s32u10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmplt_n_s32(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svcmplt_n_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpgt.nxv4i32( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmplt_n_u8u10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( [[PG:%.*]], [[TMP0]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmplt_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svcmplt_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv16i8( %pg, %[[DUP]], %op1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt,_n_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_u16u10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmplt_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svcmplt_n_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv8i16( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_u32u10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmplt_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svcmplt_n_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmphi.nxv4i32( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_u32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmplt_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmplt_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svcmplt_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmplt_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmplt_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svcmplt_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmplt_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[OP2:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmplt_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svcmplt_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( %[[PG]], %op2, %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_f64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_n_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_f16u10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmplt_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svcmplt_n_f16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv8f16( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_f32u10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmplt_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svcmplt_n_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv4f32( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_n_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmplt_n_f64u10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( [[TMP0]], [[TMP1]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmplt_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svcmplt_n_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpgt.nxv2f64( %[[PG]], %[[DUP]], %op1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt,_n_f64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_wide_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svcmplt_wide_n_s8u10__SVBool_tu10__SVInt8_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmplt_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmplt_wide_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt_wide,_n_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_wide_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_s16u10__SVBool_tu11__SVInt16_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmplt_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmplt_wide_n_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_n_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_wide_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_s32u10__SVBool_tu11__SVInt32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmplt_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmplt_wide_n_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplt.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_n_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_wide_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svcmplt_wide_n_u8u10__SVBool_tu11__SVUint8_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmplt_wide_n_u8(svbool_t pg, svuint8_t op1, uint64_t op2) { + // CHECK-LABEL: test_svcmplt_wide_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmplt_wide,_n_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_wide_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_u16u10__SVBool_tu12__SVUint16_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmplt_wide_n_u16(svbool_t pg, svuint16_t op1, uint64_t op2) { + // CHECK-LABEL: test_svcmplt_wide_n_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_n_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmplt_wide_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmplt_wide_n_u32u10__SVBool_tu12__SVUint32_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmplt_wide_n_u32(svbool_t pg, svuint32_t op1, uint64_t op2) { + // CHECK-LABEL: test_svcmplt_wide_n_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmplo.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmplt_wide,_n_u32,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c index 42bad6790261..878864760f2b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpne.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,538 +13,284 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcmpne_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcmpne_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmpne_s8(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svcmpne_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpne,_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpne_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpne_s16(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svcmpne_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpne_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpne_s32(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svcmpne_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpne_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpne_s64(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmpne_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_s64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcmpne_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmpne_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svcmpne_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpne,_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpne_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpne_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svcmpne_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpne_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpne_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svcmpne_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_u32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpne_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpne_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcmpne_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_u64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_s64u10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpne_n_s64(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmpne_n_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_s64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_u64u10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpne_n_u64(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svcmpne_n_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_u64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_wide_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svcmpne_wide_s8u10__SVBool_tu10__SVInt8_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svcmpne_wide_s8(svbool_t pg, svint8_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmpne_wide_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpne_wide,_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_wide_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmpne_wide_s16u10__SVBool_tu11__SVInt16_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpne_wide_s16(svbool_t pg, svint16_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmpne_wide_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne_wide,_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_wide_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svcmpne_wide_s32u10__SVBool_tu11__SVInt32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpne_wide_s32(svbool_t pg, svint32_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcmpne_wide_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne_wide,_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmpne_n_s8u10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmpne_n_s8(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svcmpne_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpne,_n_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_s16u10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpne_n_s16(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svcmpne_n_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_s32u10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpne_n_s32(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svcmpne_n_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmpne_n_u8u10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmpne_n_u8(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svcmpne_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpne,_n_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_u16u10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpne_n_u16(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svcmpne_n_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_u32u10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpne_n_u32(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svcmpne_n_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_u32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpne_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpne_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svcmpne_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpne_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpne_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svcmpne_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpne_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpne_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svcmpne_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_f64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_n_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_f16u10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpne_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svcmpne_n_f16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpne.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_f32u10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpne_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svcmpne_n_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpne.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_n_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpne_n_f64u10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpne_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svcmpne_n_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpne.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne,_n_f64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_wide_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svcmpne_wide_n_s8u10__SVBool_tu10__SVInt8_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svcmpne_wide_n_s8(svbool_t pg, svint8_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmpne_wide_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcmpne_wide,_n_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_wide_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmpne_wide_n_s16u10__SVBool_tu11__SVInt16_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpne_wide_n_s16(svbool_t pg, svint16_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmpne_wide_n_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne_wide,_n_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpne_wide_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svcmpne_wide_n_s32u10__SVBool_tu11__SVInt32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpne_wide_n_s32(svbool_t pg, svint32_t op1, int64_t op2) { + // CHECK-LABEL: test_svcmpne_wide_n_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpne_wide,_n_s32,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c index e8742c168fb0..7531de36f149 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cmpuo.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,122 +13,65 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcmpuo_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpuo_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpuo_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svcmpuo_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpuo,_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpuo_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpuo_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpuo_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svcmpuo_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpuo,_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpuo_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmpuo_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svcmpuo_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svcmpuo_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpuo,_f64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpuo_n_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpuo_n_f16u10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpuo_n_f16(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svcmpuo_n_f16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpuo.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpuo,_n_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpuo_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpuo_n_f32u10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpuo_n_f32(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svcmpuo_n_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpuo.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpuo,_n_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svcmpuo_n_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svcmpuo_n_f64u10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svcmpuo_n_f64(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svcmpuo_n_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcmpuo.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svcmpuo,_n_f64,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnot.c index 1a277c0f6faa..c0da8d1d4691 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnot.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,398 +13,212 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcnot_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnot_s8_zu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svcnot_s8_z(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svcnot_s8_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( zeroinitializer, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_s8,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnot_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnot_s16_zu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svcnot_s16_z(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svcnot_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_s16,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnot_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnot_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svcnot_s32_z(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcnot_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_s32,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnot_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnot_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svcnot_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcnot_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnot_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnot_u8_zu10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svcnot_u8_z(svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svcnot_u8_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( zeroinitializer, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_u8,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnot_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnot_u16_zu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcnot_u16_z(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svcnot_u16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_u16,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnot_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnot_u32_zu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcnot_u32_z(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svcnot_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_u32,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnot_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnot_u64_zu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcnot_u64_z(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svcnot_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_u64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnot_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnot_s8_mu10__SVInt8_tu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svcnot_s8_m(svint8_t inactive, svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svcnot_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( %inactive, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_s8,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnot_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnot_s16_mu11__SVInt16_tu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svcnot_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svcnot_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_s16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnot_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnot_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svcnot_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcnot_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_s32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnot_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnot_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svcnot_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcnot_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnot_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnot_u8_mu11__SVUint8_tu10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svcnot_u8_m(svuint8_t inactive, svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svcnot_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( %inactive, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_u8,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnot_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnot_u16_mu12__SVUint16_tu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcnot_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svcnot_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_u16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnot_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnot_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcnot_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svcnot_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_u32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnot_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnot_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcnot_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svcnot_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_u64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnot_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnot_s8_xu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svcnot_s8_x(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svcnot_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( undef, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_s8,_x,)(pg, op); } -// CHECK-LABEL: @test_svcnot_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnot_s16_xu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svcnot_s16_x(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svcnot_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_s16,_x,)(pg, op); } -// CHECK-LABEL: @test_svcnot_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnot_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svcnot_s32_x(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcnot_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_s32,_x,)(pg, op); } -// CHECK-LABEL: @test_svcnot_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnot_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svcnot_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcnot_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_s64,_x,)(pg, op); } -// CHECK-LABEL: @test_svcnot_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnot_u8_xu10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svcnot_u8_x(svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svcnot_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv16i8( undef, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_u8,_x,)(pg, op); } -// CHECK-LABEL: @test_svcnot_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnot_u16_xu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcnot_u16_x(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svcnot_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_u16,_x,)(pg, op); } -// CHECK-LABEL: @test_svcnot_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnot_u32_xu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcnot_u32_x(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svcnot_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_u32,_x,)(pg, op); } -// CHECK-LABEL: @test_svcnot_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnot_u64_xu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcnot_u64_x(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svcnot_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnot.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnot,_u64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c index b2d16157ebeb..0bd8e036e5dd 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt-bfloat.c @@ -1,11 +1,10 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -15,52 +14,28 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcnt_bf16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8bf16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnt_bf16_zu10__SVBool_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8bf16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcnt_bf16_z(svbool_t pg, svbfloat16_t op) { + // CHECK-LABEL: test_svcnt_bf16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv8bf16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcnt_bf16_z'}} return SVE_ACLE_FUNC(svcnt, _bf16, _z, )(pg, op); } -// CHECK-LABEL: @test_svcnt_bf16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8bf16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnt_bf16_mu12__SVUint16_tu10__SVBool_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8bf16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcnt_bf16_m(svuint16_t inactive, svbool_t pg, svbfloat16_t op) { + // CHECK-LABEL: test_svcnt_bf16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv8bf16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcnt_bf16_m'}} return SVE_ACLE_FUNC(svcnt, _bf16, _m, )(inactive, pg, op); } -// CHECK-LABEL: @test_svcnt_bf16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8bf16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnt_bf16_xu10__SVBool_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8bf16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcnt_bf16_x(svbool_t pg, svbfloat16_t op) { + // CHECK-LABEL: test_svcnt_bf16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv8bf16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcnt_bf16_x'}} return SVE_ACLE_FUNC(svcnt, _bf16, _x, )(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt.c index f9676c630c19..59af5391ad0c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnt.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,551 +13,293 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcnt_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcnt_s8_zu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svcnt_s8_z(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svcnt_s8_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( zeroinitializer, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_s8,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnt_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_s16_zu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcnt_s16_z(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svcnt_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_s16,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnt_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcnt_s32_z(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcnt_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_s32,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnt_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcnt_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcnt_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnt_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcnt_u8_zu10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svcnt_u8_z(svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svcnt_u8_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( zeroinitializer, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_u8,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnt_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_u16_zu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcnt_u16_z(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svcnt_u16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_u16,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnt_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_u32_zu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcnt_u32_z(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svcnt_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_u32,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnt_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_u64_zu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcnt_u64_z(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svcnt_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_u64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnt_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcnt_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcnt_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv8f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnt_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcnt_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcnt_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv4f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnt_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcnt_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcnt_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv2f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcnt_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcnt_s8_mu11__SVUint8_tu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svcnt_s8_m(svuint8_t inactive, svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svcnt_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( %inactive, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_s8,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnt_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_s16_mu12__SVUint16_tu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcnt_s16_m(svuint16_t inactive, svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svcnt_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_s16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnt_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_s32_mu12__SVUint32_tu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcnt_s32_m(svuint32_t inactive, svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcnt_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_s32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnt_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_s64_mu12__SVUint64_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcnt_s64_m(svuint64_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcnt_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnt_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcnt_u8_mu11__SVUint8_tu10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svcnt_u8_m(svuint8_t inactive, svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svcnt_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( %inactive, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_u8,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnt_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_u16_mu12__SVUint16_tu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcnt_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svcnt_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_u16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnt_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcnt_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svcnt_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_u32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnt_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcnt_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svcnt_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_u64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnt_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_f16_mu12__SVUint16_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcnt_f16_m(svuint16_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcnt_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv8f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnt_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_f32_mu12__SVUint32_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcnt_f32_m(svuint32_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcnt_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv4f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnt_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_f64_mu12__SVUint64_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcnt_f64_m(svuint64_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcnt_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv2f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcnt_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcnt_s8_xu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svcnt_s8_x(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svcnt_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( undef, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_s8,_x,)(pg, op); } -// CHECK-LABEL: @test_svcnt_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_s16_xu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcnt_s16_x(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svcnt_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_s16,_x,)(pg, op); } -// CHECK-LABEL: @test_svcnt_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcnt_s32_x(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcnt_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_s32,_x,)(pg, op); } -// CHECK-LABEL: @test_svcnt_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcnt_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcnt_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_s64,_x,)(pg, op); } -// CHECK-LABEL: @test_svcnt_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcnt_u8_xu10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svcnt_u8_x(svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svcnt_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv16i8( undef, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_u8,_x,)(pg, op); } -// CHECK-LABEL: @test_svcnt_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_u16_xu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcnt_u16_x(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svcnt_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_u16,_x,)(pg, op); } -// CHECK-LABEL: @test_svcnt_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_u32_xu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcnt_u32_x(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svcnt_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_u32,_x,)(pg, op); } -// CHECK-LABEL: @test_svcnt_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_u64_xu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcnt_u64_x(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svcnt_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_u64,_x,)(pg, op); } -// CHECK-LABEL: @test_svcnt_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcnt_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcnt_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv8f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svcnt_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcnt_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcnt_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv4f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svcnt_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svcnt_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.cnt.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcnt_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcnt_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cnt.nxv2f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcnt,_f64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c index a5991a5a0151..9e4326e312c5 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntb.c @@ -1,262 +1,142 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include -// CHECK-LABEL: @test_svcntb( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 4 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z11test_svcntbv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 4 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svcntb() { + // CHECK-LABEL: test_svcntb + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.vscale.i64() + // CHECK-NEXT: %[[RET:.*]] = shl i64 %[[INTRINSIC]], 4 + // CHECK: ret i64 %[[RET]] return svcntb(); } -// CHECK-LABEL: @test_svcntb_pat( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 0) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcntb_patv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 0) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntb_pat() { + // CHECK-LABEL: test_svcntb_pat + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntb(i32 0) + // CHECK: ret i64 %[[INTRINSIC]] return svcntb_pat(SV_POW2); } -// CHECK-LABEL: @test_svcntb_pat_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 1 -// -// CPP-CHECK-LABEL: @_Z17test_svcntb_pat_1v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 1 -// uint64_t test_svcntb_pat_1() { + // CHECK-LABEL: test_svcntb_pat_1 + // CHECK: ret i64 1 return svcntb_pat(SV_VL1); } -// CHECK-LABEL: @test_svcntb_pat_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 2 -// -// CPP-CHECK-LABEL: @_Z17test_svcntb_pat_2v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 2 -// uint64_t test_svcntb_pat_2() { + // CHECK-LABEL: test_svcntb_pat_2 + // CHECK: ret i64 2 return svcntb_pat(SV_VL2); } -// CHECK-LABEL: @test_svcntb_pat_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 3 -// -// CPP-CHECK-LABEL: @_Z17test_svcntb_pat_3v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 3 -// uint64_t test_svcntb_pat_3() { + // CHECK-LABEL: test_svcntb_pat_3 + // CHECK: ret i64 3 return svcntb_pat(SV_VL3); } -// CHECK-LABEL: @test_svcntb_pat_4( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 4 -// -// CPP-CHECK-LABEL: @_Z17test_svcntb_pat_4v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 4 -// uint64_t test_svcntb_pat_4() { + // CHECK-LABEL: test_svcntb_pat_4 + // CHECK: ret i64 4 return svcntb_pat(SV_VL4); } -// CHECK-LABEL: @test_svcntb_pat_5( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 5 -// -// CPP-CHECK-LABEL: @_Z17test_svcntb_pat_5v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 5 -// uint64_t test_svcntb_pat_5() { + // CHECK-LABEL: test_svcntb_pat_5 + // CHECK: ret i64 5 return svcntb_pat(SV_VL5); } -// CHECK-LABEL: @test_svcntb_pat_6( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 6 -// -// CPP-CHECK-LABEL: @_Z17test_svcntb_pat_6v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 6 -// uint64_t test_svcntb_pat_6() { + // CHECK-LABEL: test_svcntb_pat_6 + // CHECK: ret i64 6 return svcntb_pat(SV_VL6); } -// CHECK-LABEL: @test_svcntb_pat_7( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 7 -// -// CPP-CHECK-LABEL: @_Z17test_svcntb_pat_7v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 7 -// uint64_t test_svcntb_pat_7() { + // CHECK-LABEL: test_svcntb_pat_7 + // CHECK: ret i64 7 return svcntb_pat(SV_VL7); } -// CHECK-LABEL: @test_svcntb_pat_8( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 8 -// -// CPP-CHECK-LABEL: @_Z17test_svcntb_pat_8v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 8 -// uint64_t test_svcntb_pat_8() { + // CHECK-LABEL: test_svcntb_pat_8 + // CHECK: ret i64 8 return svcntb_pat(SV_VL8); } -// CHECK-LABEL: @test_svcntb_pat_9( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 16 -// -// CPP-CHECK-LABEL: @_Z17test_svcntb_pat_9v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 16 -// uint64_t test_svcntb_pat_9() { + // CHECK-LABEL: test_svcntb_pat_9 + // CHECK: ret i64 16 return svcntb_pat(SV_VL16); } -// CHECK-LABEL: @test_svcntb_pat_10( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 10) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntb_pat_10v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 10) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntb_pat_10() { + // CHECK-LABEL: test_svcntb_pat_10 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntb(i32 10) + // CHECK: ret i64 %[[INTRINSIC]] return svcntb_pat(SV_VL32); } -// CHECK-LABEL: @test_svcntb_pat_11( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 11) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntb_pat_11v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 11) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntb_pat_11() { + // CHECK-LABEL: test_svcntb_pat_11 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntb(i32 11) + // CHECK: ret i64 %[[INTRINSIC]] return svcntb_pat(SV_VL64); } -// CHECK-LABEL: @test_svcntb_pat_12( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 12) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntb_pat_12v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 12) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntb_pat_12() { + // CHECK-LABEL: test_svcntb_pat_12 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntb(i32 12) + // CHECK: ret i64 %[[INTRINSIC]] return svcntb_pat(SV_VL128); } -// CHECK-LABEL: @test_svcntb_pat_13( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 13) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntb_pat_13v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 13) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntb_pat_13() { + // CHECK-LABEL: test_svcntb_pat_13 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntb(i32 13) + // CHECK: ret i64 %[[INTRINSIC]] return svcntb_pat(SV_VL256); } -// CHECK-LABEL: @test_svcntb_pat_14( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 29) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntb_pat_14v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 29) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntb_pat_14() { + // CHECK-LABEL: test_svcntb_pat_14 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntb(i32 29) + // CHECK: ret i64 %[[INTRINSIC]] return svcntb_pat(SV_MUL4); } -// CHECK-LABEL: @test_svcntb_pat_15( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 30) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntb_pat_15v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntb(i32 30) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntb_pat_15() { + // CHECK-LABEL: test_svcntb_pat_15 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntb(i32 30) + // CHECK: ret i64 %[[INTRINSIC]] return svcntb_pat(SV_MUL3); } -// CHECK-LABEL: @test_svcntb_pat_16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 4 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntb_pat_16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 4 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svcntb_pat_16() { + // CHECK-LABEL: test_svcntb_pat_16 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.vscale.i64() + // CHECK-NEXT: %[[RET:.*]] = shl i64 %[[INTRINSIC]], 4 + // CHECK: ret i64 %[[RET]] return svcntb_pat(SV_ALL); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c index eb3e848a7b53..9880968bae9b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntd.c @@ -1,276 +1,149 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include -// CHECK-LABEL: @test_svcntd( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 1 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z11test_svcntdv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 1 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svcntd() { + // CHECK-LABEL: test_svcntd + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.vscale.i64() + // CHECK-NEXT: %[[RET:.*]] = shl i64 %[[INTRINSIC]], 1 + // CHECK: ret i64 %[[RET]] return svcntd(); } -// CHECK-LABEL: @test_svcntd_pat( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 0) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcntd_patv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 0) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntd_pat() { + // CHECK-LABEL: test_svcntd_pat + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntd(i32 0) + // CHECK: ret i64 %[[INTRINSIC]] return svcntd_pat(SV_POW2); } -// CHECK-LABEL: @test_svcntd_pat_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 1 -// -// CPP-CHECK-LABEL: @_Z17test_svcntd_pat_1v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 1 -// uint64_t test_svcntd_pat_1() { + // CHECK-LABEL: test_svcntd_pat_1 + // CHECK: ret i64 1 return svcntd_pat(SV_VL1); } -// CHECK-LABEL: @test_svcntd_pat_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 2 -// -// CPP-CHECK-LABEL: @_Z17test_svcntd_pat_2v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 2 -// uint64_t test_svcntd_pat_2() { + // CHECK-LABEL: test_svcntd_pat_2 + // CHECK: ret i64 2 return svcntd_pat(SV_VL2); } -// CHECK-LABEL: @test_svcntd_pat_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 3) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcntd_pat_3v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 3) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntd_pat_3() { + // CHECK-LABEL: test_svcntd_pat_3 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntd(i32 3) + // CHECK: ret i64 %[[INTRINSIC]] return svcntd_pat(SV_VL3); } -// CHECK-LABEL: @test_svcntd_pat_4( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 4) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcntd_pat_4v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 4) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntd_pat_4() { + // CHECK-LABEL: test_svcntd_pat_4 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntd(i32 4) + // CHECK: ret i64 %[[INTRINSIC]] return svcntd_pat(SV_VL4); } -// CHECK-LABEL: @test_svcntd_pat_5( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 5) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcntd_pat_5v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 5) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntd_pat_5() { + // CHECK-LABEL: test_svcntd_pat_5 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntd(i32 5) + // CHECK: ret i64 %[[INTRINSIC]] return svcntd_pat(SV_VL5); } -// CHECK-LABEL: @test_svcntd_pat_6( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 6) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcntd_pat_6v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 6) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntd_pat_6() { + // CHECK-LABEL: test_svcntd_pat_6 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntd(i32 6) + // CHECK: ret i64 %[[INTRINSIC]] return svcntd_pat(SV_VL6); } -// CHECK-LABEL: @test_svcntd_pat_7( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 7) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcntd_pat_7v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 7) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntd_pat_7() { + // CHECK-LABEL: test_svcntd_pat_7 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntd(i32 7) + // CHECK: ret i64 %[[INTRINSIC]] return svcntd_pat(SV_VL7); } -// CHECK-LABEL: @test_svcntd_pat_8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 8) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcntd_pat_8v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 8) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntd_pat_8() { + // CHECK-LABEL: test_svcntd_pat_8 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntd(i32 8) + // CHECK: ret i64 %[[INTRINSIC]] return svcntd_pat(SV_VL8); } -// CHECK-LABEL: @test_svcntd_pat_9( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 9) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcntd_pat_9v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 9) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntd_pat_9() { + // CHECK-LABEL: test_svcntd_pat_9 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntd(i32 9) + // CHECK: ret i64 %[[INTRINSIC]] return svcntd_pat(SV_VL16); } -// CHECK-LABEL: @test_svcntd_pat_10( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 10) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntd_pat_10v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 10) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntd_pat_10() { + // CHECK-LABEL: test_svcntd_pat_10 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntd(i32 10) + // CHECK: ret i64 %[[INTRINSIC]] return svcntd_pat(SV_VL32); } -// CHECK-LABEL: @test_svcntd_pat_11( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 11) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntd_pat_11v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 11) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntd_pat_11() { + // CHECK-LABEL: test_svcntd_pat_11 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntd(i32 11) + // CHECK: ret i64 %[[INTRINSIC]] return svcntd_pat(SV_VL64); } -// CHECK-LABEL: @test_svcntd_pat_12( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 12) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntd_pat_12v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 12) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntd_pat_12() { + // CHECK-LABEL: test_svcntd_pat_12 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntd(i32 12) + // CHECK: ret i64 %[[INTRINSIC]] return svcntd_pat(SV_VL128); } -// CHECK-LABEL: @test_svcntd_pat_13( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 13) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntd_pat_13v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 13) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntd_pat_13() { + // CHECK-LABEL: test_svcntd_pat_13 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntd(i32 13) + // CHECK: ret i64 %[[INTRINSIC]] return svcntd_pat(SV_VL256); } -// CHECK-LABEL: @test_svcntd_pat_14( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 29) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntd_pat_14v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 29) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntd_pat_14() { + // CHECK-LABEL: test_svcntd_pat_14 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntd(i32 29) + // CHECK: ret i64 %[[INTRINSIC]] return svcntd_pat(SV_MUL4); } -// CHECK-LABEL: @test_svcntd_pat_15( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 30) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntd_pat_15v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntd(i32 30) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntd_pat_15() { + // CHECK-LABEL: test_svcntd_pat_15 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntd(i32 30) + // CHECK: ret i64 %[[INTRINSIC]] return svcntd_pat(SV_MUL3); } -// CHECK-LABEL: @test_svcntd_pat_16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 1 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntd_pat_16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 1 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svcntd_pat_16() { + // CHECK-LABEL: test_svcntd_pat_16 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.vscale.i64() + // CHECK-NEXT: %[[RET:.*]] = shl i64 %[[INTRINSIC]], 1 + // CHECK: ret i64 %[[RET]] return svcntd_pat(SV_ALL); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c index 50ca8f525387..4c3c03d2ca30 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cnth.c @@ -1,264 +1,143 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include -// CHECK-LABEL: @test_svcnth( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 3 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z11test_svcnthv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 3 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svcnth() { + // CHECK-LABEL: test_svcnth + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.vscale.i64() + // CHECK-NEXT: %[[RET:.*]] = shl i64 %[[INTRINSIC]], 3 + // CHECK: ret i64 %[[RET]] return svcnth(); } -// CHECK-LABEL: @test_svcnth_pat( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 0) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcnth_patv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 0) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcnth_pat() { + // CHECK-LABEL: test_svcnth_pat + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cnth(i32 0) + // CHECK: ret i64 %[[INTRINSIC]] return svcnth_pat(SV_POW2); } -// CHECK-LABEL: @test_svcnth_pat_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 1 -// -// CPP-CHECK-LABEL: @_Z17test_svcnth_pat_1v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 1 -// uint64_t test_svcnth_pat_1() { + // CHECK-LABEL: test_svcnth_pat_1 + // CHECK: ret i64 1 return svcnth_pat(SV_VL1); } -// CHECK-LABEL: @test_svcnth_pat_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 2 -// -// CPP-CHECK-LABEL: @_Z17test_svcnth_pat_2v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 2 -// uint64_t test_svcnth_pat_2() { + // CHECK-LABEL: test_svcnth_pat_2 + // CHECK: ret i64 2 return svcnth_pat(SV_VL2); } -// CHECK-LABEL: @test_svcnth_pat_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 3 -// -// CPP-CHECK-LABEL: @_Z17test_svcnth_pat_3v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 3 -// uint64_t test_svcnth_pat_3() { + // CHECK-LABEL: test_svcnth_pat_3 + // CHECK: ret i64 3 return svcnth_pat(SV_VL3); } -// CHECK-LABEL: @test_svcnth_pat_4( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 4 -// -// CPP-CHECK-LABEL: @_Z17test_svcnth_pat_4v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 4 -// uint64_t test_svcnth_pat_4() { + // CHECK-LABEL: test_svcnth_pat_4 + // CHECK: ret i64 4 return svcnth_pat(SV_VL4); } -// CHECK-LABEL: @test_svcnth_pat_5( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 5 -// -// CPP-CHECK-LABEL: @_Z17test_svcnth_pat_5v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 5 -// uint64_t test_svcnth_pat_5() { + // CHECK-LABEL: test_svcnth_pat_5 + // CHECK: ret i64 5 return svcnth_pat(SV_VL5); } -// CHECK-LABEL: @test_svcnth_pat_6( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 6 -// -// CPP-CHECK-LABEL: @_Z17test_svcnth_pat_6v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 6 -// uint64_t test_svcnth_pat_6() { + // CHECK-LABEL: test_svcnth_pat_6 + // CHECK: ret i64 6 return svcnth_pat(SV_VL6); } -// CHECK-LABEL: @test_svcnth_pat_7( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 7 -// -// CPP-CHECK-LABEL: @_Z17test_svcnth_pat_7v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 7 -// uint64_t test_svcnth_pat_7() { + // CHECK-LABEL: test_svcnth_pat_7 + // CHECK: ret i64 7 return svcnth_pat(SV_VL7); } -// CHECK-LABEL: @test_svcnth_pat_8( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 8 -// -// CPP-CHECK-LABEL: @_Z17test_svcnth_pat_8v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 8 -// uint64_t test_svcnth_pat_8() { + // CHECK-LABEL: test_svcnth_pat_8 + // CHECK: ret i64 8 return svcnth_pat(SV_VL8); } -// CHECK-LABEL: @test_svcnth_pat_9( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 9) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcnth_pat_9v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 9) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcnth_pat_9() { + // CHECK-LABEL: test_svcnth_pat_9 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cnth(i32 9) + // CHECK: ret i64 %[[INTRINSIC]] return svcnth_pat(SV_VL16); } -// CHECK-LABEL: @test_svcnth_pat_10( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 10) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcnth_pat_10v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 10) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcnth_pat_10() { + // CHECK-LABEL: test_svcnth_pat_10 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cnth(i32 10) + // CHECK: ret i64 %[[INTRINSIC]] return svcnth_pat(SV_VL32); } -// CHECK-LABEL: @test_svcnth_pat_11( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 11) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcnth_pat_11v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 11) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcnth_pat_11() { + // CHECK-LABEL: test_svcnth_pat_11 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cnth(i32 11) + // CHECK: ret i64 %[[INTRINSIC]] return svcnth_pat(SV_VL64); } -// CHECK-LABEL: @test_svcnth_pat_12( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 12) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcnth_pat_12v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 12) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcnth_pat_12() { + // CHECK-LABEL: test_svcnth_pat_12 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cnth(i32 12) + // CHECK: ret i64 %[[INTRINSIC]] return svcnth_pat(SV_VL128); } -// CHECK-LABEL: @test_svcnth_pat_13( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 13) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcnth_pat_13v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 13) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcnth_pat_13() { + // CHECK-LABEL: test_svcnth_pat_13 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cnth(i32 13) + // CHECK: ret i64 %[[INTRINSIC]] return svcnth_pat(SV_VL256); } -// CHECK-LABEL: @test_svcnth_pat_14( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 29) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcnth_pat_14v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 29) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcnth_pat_14() { + // CHECK-LABEL: test_svcnth_pat_14 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cnth(i32 29) + // CHECK: ret i64 %[[INTRINSIC]] return svcnth_pat(SV_MUL4); } -// CHECK-LABEL: @test_svcnth_pat_15( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 30) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcnth_pat_15v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cnth(i32 30) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcnth_pat_15() { + // CHECK-LABEL: test_svcnth_pat_15 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cnth(i32 30) + // CHECK: ret i64 %[[INTRINSIC]] return svcnth_pat(SV_MUL3); } -// CHECK-LABEL: @test_svcnth_pat_16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 3 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svcnth_pat_16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 3 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svcnth_pat_16() { + // CHECK-LABEL: test_svcnth_pat_16 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.vscale.i64() + // CHECK-NEXT: %[[RET:.*]] = shl i64 %[[INTRINSIC]], 3 + // CHECK: ret i64 %[[RET]] return svcnth_pat(SV_ALL); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c index 4850cecf31e6..1fe39d45d21c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntp.c @@ -1,78 +1,43 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include -// CHECK-LABEL: @test_svcntp_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntp.nxv16i1( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svcntp_b8u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntp.nxv16i1( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntp_b8(svbool_t pg, svbool_t op) { + // CHECK-LABEL: test_svcntp_b8 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntp.nxv16i1( %pg, %op) + // CHECK: ret i64 %[[INTRINSIC]] return svcntp_b8(pg, op); } -// CHECK-LABEL: @test_svcntp_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.sve.cntp.nxv8i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: ret i64 [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svcntp_b16u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.sve.cntp.nxv8i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: ret i64 [[TMP2]] -// uint64_t test_svcntp_b16(svbool_t pg, svbool_t op) { + // CHECK-LABEL: test_svcntp_b16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %op) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntp.nxv8i1( %[[PG]], %[[OP]]) + // CHECK: ret i64 %[[INTRINSIC]] return svcntp_b16(pg, op); } -// CHECK-LABEL: @test_svcntp_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.sve.cntp.nxv4i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: ret i64 [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svcntp_b32u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.sve.cntp.nxv4i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: ret i64 [[TMP2]] -// uint64_t test_svcntp_b32(svbool_t pg, svbool_t op) { + // CHECK-LABEL: test_svcntp_b32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %op) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntp.nxv4i1( %[[PG]], %[[OP]]) + // CHECK: ret i64 %[[INTRINSIC]] return svcntp_b32(pg, op); } -// CHECK-LABEL: @test_svcntp_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.sve.cntp.nxv2i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: ret i64 [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svcntp_b64u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.aarch64.sve.cntp.nxv2i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: ret i64 [[TMP2]] -// uint64_t test_svcntp_b64(svbool_t pg, svbool_t op) { + // CHECK-LABEL: test_svcntp_b64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %op) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntp.nxv2i1( %[[PG]], %[[OP]]) + // CHECK: ret i64 %[[INTRINSIC]] return svcntp_b64(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c index 4c12fd8ee7b4..a57c5d2bdb15 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cntw.c @@ -1,272 +1,147 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include -// CHECK-LABEL: @test_svcntw( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 2 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z11test_svcntwv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 2 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svcntw() { + // CHECK-LABEL: test_svcntw + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.vscale.i64() + // CHECK-NEXT: %[[RET:.*]] = shl i64 %[[INTRINSIC]], 2 + // CHECK: ret i64 %[[RET]] return svcntw(); } -// CHECK-LABEL: @test_svcntw_pat( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 0) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcntw_patv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 0) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntw_pat() { + // CHECK-LABEL: test_svcntw_pat + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntw(i32 0) + // CHECK: ret i64 %[[INTRINSIC]] return svcntw_pat(SV_POW2); } -// CHECK-LABEL: @test_svcntw_pat_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 1 -// -// CPP-CHECK-LABEL: @_Z17test_svcntw_pat_1v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 1 -// uint64_t test_svcntw_pat_1() { + // CHECK-LABEL: test_svcntw_pat_1 + // CHECK: ret i64 1 return svcntw_pat(SV_VL1); } -// CHECK-LABEL: @test_svcntw_pat_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 2 -// -// CPP-CHECK-LABEL: @_Z17test_svcntw_pat_2v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 2 -// uint64_t test_svcntw_pat_2() { + // CHECK-LABEL: test_svcntw_pat_2 + // CHECK: ret i64 2 return svcntw_pat(SV_VL2); } -// CHECK-LABEL: @test_svcntw_pat_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 3 -// -// CPP-CHECK-LABEL: @_Z17test_svcntw_pat_3v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 3 -// uint64_t test_svcntw_pat_3() { + // CHECK-LABEL: test_svcntw_pat_3 + // CHECK: ret i64 3 return svcntw_pat(SV_VL3); } -// CHECK-LABEL: @test_svcntw_pat_4( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret i64 4 -// -// CPP-CHECK-LABEL: @_Z17test_svcntw_pat_4v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret i64 4 -// uint64_t test_svcntw_pat_4() { + // CHECK-LABEL: test_svcntw_pat_4 + // CHECK: ret i64 4 return svcntw_pat(SV_VL4); } -// CHECK-LABEL: @test_svcntw_pat_5( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 5) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcntw_pat_5v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 5) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntw_pat_5() { + // CHECK-LABEL: test_svcntw_pat_5 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntw(i32 5) + // CHECK: ret i64 %[[INTRINSIC]] return svcntw_pat(SV_VL5); } -// CHECK-LABEL: @test_svcntw_pat_6( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 6) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcntw_pat_6v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 6) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntw_pat_6() { + // CHECK-LABEL: test_svcntw_pat_6 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntw(i32 6) + // CHECK: ret i64 %[[INTRINSIC]] return svcntw_pat(SV_VL6); } -// CHECK-LABEL: @test_svcntw_pat_7( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 7) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcntw_pat_7v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 7) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntw_pat_7() { + // CHECK-LABEL: test_svcntw_pat_7 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntw(i32 7) + // CHECK: ret i64 %[[INTRINSIC]] return svcntw_pat(SV_VL7); } -// CHECK-LABEL: @test_svcntw_pat_8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 8) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcntw_pat_8v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 8) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntw_pat_8() { + // CHECK-LABEL: test_svcntw_pat_8 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntw(i32 8) + // CHECK: ret i64 %[[INTRINSIC]] return svcntw_pat(SV_VL8); } -// CHECK-LABEL: @test_svcntw_pat_9( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 9) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcntw_pat_9v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 9) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntw_pat_9() { + // CHECK-LABEL: test_svcntw_pat_9 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntw(i32 9) + // CHECK: ret i64 %[[INTRINSIC]] return svcntw_pat(SV_VL16); } -// CHECK-LABEL: @test_svcntw_pat_10( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 10) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntw_pat_10v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 10) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntw_pat_10() { + // CHECK-LABEL: test_svcntw_pat_10 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntw(i32 10) + // CHECK: ret i64 %[[INTRINSIC]] return svcntw_pat(SV_VL32); } -// CHECK-LABEL: @test_svcntw_pat_11( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 11) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntw_pat_11v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 11) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntw_pat_11() { + // CHECK-LABEL: test_svcntw_pat_11 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntw(i32 11) + // CHECK: ret i64 %[[INTRINSIC]] return svcntw_pat(SV_VL64); } -// CHECK-LABEL: @test_svcntw_pat_12( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 12) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntw_pat_12v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 12) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntw_pat_12() { + // CHECK-LABEL: test_svcntw_pat_12 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntw(i32 12) + // CHECK: ret i64 %[[INTRINSIC]] return svcntw_pat(SV_VL128); } -// CHECK-LABEL: @test_svcntw_pat_13( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 13) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntw_pat_13v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 13) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntw_pat_13() { + // CHECK-LABEL: test_svcntw_pat_13 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntw(i32 13) + // CHECK: ret i64 %[[INTRINSIC]] return svcntw_pat(SV_VL256); } -// CHECK-LABEL: @test_svcntw_pat_14( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 29) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntw_pat_14v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 29) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntw_pat_14() { + // CHECK-LABEL: test_svcntw_pat_14 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntw(i32 29) + // CHECK: ret i64 %[[INTRINSIC]] return svcntw_pat(SV_MUL4); } -// CHECK-LABEL: @test_svcntw_pat_15( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 30) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntw_pat_15v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.cntw(i32 30) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svcntw_pat_15() { + // CHECK-LABEL: test_svcntw_pat_15 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.cntw(i32 30) + // CHECK: ret i64 %[[INTRINSIC]] return svcntw_pat(SV_MUL3); } -// CHECK-LABEL: @test_svcntw_pat_16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 2 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svcntw_pat_16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 2 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svcntw_pat_16() { + // CHECK-LABEL: test_svcntw_pat_16 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.vscale.i64() + // CHECK-NEXT: %[[RET:.*]] = shl i64 %[[INTRINSIC]], 2 + // CHECK: ret i64 %[[RET]] return svcntw_pat(SV_ALL); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_compact.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_compact.c index 69f3ff9c782a..89d2d02b7992 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_compact.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_compact.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,104 +13,56 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcompact_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svcompact_s32u10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svcompact_s32(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcompact_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.compact.nxv4i32( %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcompact,_s32,,)(pg, op); } -// CHECK-LABEL: @test_svcompact_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svcompact_s64u10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svcompact_s64(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcompact_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.compact.nxv2i64( %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcompact,_s64,,)(pg, op); } -// CHECK-LABEL: @test_svcompact_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svcompact_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcompact_u32(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svcompact_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.compact.nxv4i32( %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcompact,_u32,,)(pg, op); } -// CHECK-LABEL: @test_svcompact_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svcompact_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcompact_u64(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svcompact_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.compact.nxv2i64( %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcompact,_u64,,)(pg, op); } -// CHECK-LABEL: @test_svcompact_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv4f32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svcompact_f32u10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv4f32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcompact_f32(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcompact_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.compact.nxv4f32( %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcompact,_f32,,)(pg, op); } -// CHECK-LABEL: @test_svcompact_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv2f64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svcompact_f64u10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.compact.nxv2f64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcompact_f64(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcompact_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.compact.nxv2f64( %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcompact,_f64,,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c index d41179bb2ac7..f4b81a671d09 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,18 +13,11 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcreate2_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16bf16.nxv8bf16( [[X0:%.*]], [[X1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svcreate2_bf16u14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16bf16.nxv8bf16( [[X0:%.*]], [[X1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16x2_t test_svcreate2_bf16(svbfloat16_t x0, svbfloat16_t x1) { + // CHECK-LABEL: test_svcreate2_bf16 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16bf16.nxv8bf16( %x0, %x1) + // CHECK-NEXT: ret %[[CREATE]] // expected-warning@+1 {{implicit declaration of function 'svcreate2_bf16'}} return SVE_ACLE_FUNC(svcreate2,_bf16,,)(x0, x1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2.c index de04db3f5609..db2a6c552114 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create2.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,167 +12,90 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcreate2_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8( [[X0:%.*]], [[X1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcreate2_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8( [[X0:%.*]], [[X1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8x2_t test_svcreate2_s8(svint8_t x0, svint8_t x1) { + // CHECK-LABEL: test_svcreate2_s8 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8( %x0, %x1) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate2,_s8,,)(x0, x1); } -// CHECK-LABEL: @test_svcreate2_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16i16.nxv8i16( [[X0:%.*]], [[X1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate2_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16i16.nxv8i16( [[X0:%.*]], [[X1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16x2_t test_svcreate2_s16(svint16_t x0, svint16_t x1) { + // CHECK-LABEL: test_svcreate2_s16 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16i16.nxv8i16( %x0, %x1) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate2,_s16,,)(x0, x1); } -// CHECK-LABEL: @test_svcreate2_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32( [[X0:%.*]], [[X1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate2_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32( [[X0:%.*]], [[X1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32x2_t test_svcreate2_s32(svint32_t x0, svint32_t x1) { + // CHECK-LABEL: test_svcreate2_s32 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32( %x0, %x1) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate2,_s32,,)(x0, x1); } -// CHECK-LABEL: @test_svcreate2_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv4i64.nxv2i64( [[X0:%.*]], [[X1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate2_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv4i64.nxv2i64( [[X0:%.*]], [[X1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64x2_t test_svcreate2_s64(svint64_t x0, svint64_t x1) { + // CHECK-LABEL: test_svcreate2_s64 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create2.nxv4i64.nxv2i64( %x0, %x1) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate2,_s64,,)(x0, x1); } -// CHECK-LABEL: @test_svcreate2_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8( [[X0:%.*]], [[X1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcreate2_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8( [[X0:%.*]], [[X1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8x2_t test_svcreate2_u8(svuint8_t x0, svuint8_t x1) { + // CHECK-LABEL: test_svcreate2_u8 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create2.nxv32i8.nxv16i8( %x0, %x1) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate2,_u8,,)(x0, x1); } -// CHECK-LABEL: @test_svcreate2_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16i16.nxv8i16( [[X0:%.*]], [[X1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate2_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16i16.nxv8i16( [[X0:%.*]], [[X1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16x2_t test_svcreate2_u16(svuint16_t x0, svuint16_t x1) { + // CHECK-LABEL: test_svcreate2_u16 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16i16.nxv8i16( %x0, %x1) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate2,_u16,,)(x0, x1); } -// CHECK-LABEL: @test_svcreate2_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32( [[X0:%.*]], [[X1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate2_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32( [[X0:%.*]], [[X1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32x2_t test_svcreate2_u32(svuint32_t x0, svuint32_t x1) { + // CHECK-LABEL: test_svcreate2_u32 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create2.nxv8i32.nxv4i32( %x0, %x1) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate2,_u32,,)(x0, x1); } -// CHECK-LABEL: @test_svcreate2_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv4i64.nxv2i64( [[X0:%.*]], [[X1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate2_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv4i64.nxv2i64( [[X0:%.*]], [[X1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64x2_t test_svcreate2_u64(svuint64_t x0, svuint64_t x1) { + // CHECK-LABEL: test_svcreate2_u64 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create2.nxv4i64.nxv2i64( %x0, %x1) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate2,_u64,,)(x0, x1); } -// CHECK-LABEL: @test_svcreate2_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16f16.nxv8f16( [[X0:%.*]], [[X1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate2_f16u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16f16.nxv8f16( [[X0:%.*]], [[X1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16x2_t test_svcreate2_f16(svfloat16_t x0, svfloat16_t x1) { + // CHECK-LABEL: test_svcreate2_f16 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create2.nxv16f16.nxv8f16( %x0, %x1) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate2,_f16,,)(x0, x1); } -// CHECK-LABEL: @test_svcreate2_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv8f32.nxv4f32( [[X0:%.*]], [[X1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate2_f32u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv8f32.nxv4f32( [[X0:%.*]], [[X1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32x2_t test_svcreate2_f32(svfloat32_t x0, svfloat32_t x1) { + // CHECK-LABEL: test_svcreate2_f32 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create2.nxv8f32.nxv4f32( %x0, %x1) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate2,_f32,,)(x0, x1); } -// CHECK-LABEL: @test_svcreate2_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv4f64.nxv2f64( [[X0:%.*]], [[X1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate2_f64u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create2.nxv4f64.nxv2f64( [[X0:%.*]], [[X1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64x2_t test_svcreate2_f64(svfloat64_t x0, svfloat64_t x1) { + // CHECK-LABEL: test_svcreate2_f64 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create2.nxv4f64.nxv2f64( %x0, %x1) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate2,_f64,,)(x0, x1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c index eefdf1c07664..7ec4814fd111 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,18 +13,11 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcreate3_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24bf16.nxv8bf16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svcreate3_bf16u14__SVBFloat16_tu14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24bf16.nxv8bf16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16x3_t test_svcreate3_bf16(svbfloat16_t x0, svbfloat16_t x1, svbfloat16_t x2) { + // CHECK-LABEL: test_svcreate3_bf16 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24bf16.nxv8bf16( %x0, %x1, %x2) + // CHECK-NEXT: ret %[[CREATE]] // expected-warning@+1 {{implicit declaration of function 'svcreate3_bf16'}} return SVE_ACLE_FUNC(svcreate3,_bf16,,)(x0, x1, x2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3.c index 2148bda5dac5..37ada8a18737 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create3.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,167 +12,90 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcreate3_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv48i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcreate3_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv48i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8x3_t test_svcreate3_s8(svint8_t x0, svint8_t x1, svint8_t x2) { + // CHECK-LABEL: test_svcreate3_s8 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create3.nxv48i8.nxv16i8( %x0, %x1, %x2) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate3,_s8,,)(x0, x1, x2); } -// CHECK-LABEL: @test_svcreate3_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate3_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16x3_t test_svcreate3_s16(svint16_t x0, svint16_t x1, svint16_t x2) { + // CHECK-LABEL: test_svcreate3_s16 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24i16.nxv8i16( %x0, %x1, %x2) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate3,_s16,,)(x0, x1, x2); } -// CHECK-LABEL: @test_svcreate3_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv12i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate3_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv12i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32x3_t test_svcreate3_s32(svint32_t x0, svint32_t x1, svint32_t x2) { + // CHECK-LABEL: test_svcreate3_s32 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create3.nxv12i32.nxv4i32( %x0, %x1, %x2) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate3,_s32,,)(x0, x1, x2); } -// CHECK-LABEL: @test_svcreate3_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv6i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate3_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv6i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64x3_t test_svcreate3_s64(svint64_t x0, svint64_t x1, svint64_t x2) { + // CHECK-LABEL: test_svcreate3_s64 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create3.nxv6i64.nxv2i64( %x0, %x1, %x2) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate3,_s64,,)(x0, x1, x2); } -// CHECK-LABEL: @test_svcreate3_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv48i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcreate3_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv48i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8x3_t test_svcreate3_u8(svuint8_t x0, svuint8_t x1, svuint8_t x2) { + // CHECK-LABEL: test_svcreate3_u8 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create3.nxv48i8.nxv16i8( %x0, %x1, %x2) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate3,_u8,,)(x0, x1, x2); } -// CHECK-LABEL: @test_svcreate3_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate3_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16x3_t test_svcreate3_u16(svuint16_t x0, svuint16_t x1, svuint16_t x2) { + // CHECK-LABEL: test_svcreate3_u16 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24i16.nxv8i16( %x0, %x1, %x2) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate3,_u16,,)(x0, x1, x2); } -// CHECK-LABEL: @test_svcreate3_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv12i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate3_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv12i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32x3_t test_svcreate3_u32(svuint32_t x0, svuint32_t x1, svuint32_t x2) { + // CHECK-LABEL: test_svcreate3_u32 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create3.nxv12i32.nxv4i32( %x0, %x1, %x2) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate3,_u32,,)(x0, x1, x2); } -// CHECK-LABEL: @test_svcreate3_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv6i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate3_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv6i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64x3_t test_svcreate3_u64(svuint64_t x0, svuint64_t x1, svuint64_t x2) { + // CHECK-LABEL: test_svcreate3_u64 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create3.nxv6i64.nxv2i64( %x0, %x1, %x2) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate3,_u64,,)(x0, x1, x2); } -// CHECK-LABEL: @test_svcreate3_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24f16.nxv8f16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate3_f16u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24f16.nxv8f16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16x3_t test_svcreate3_f16(svfloat16_t x0, svfloat16_t x1, svfloat16_t x2) { + // CHECK-LABEL: test_svcreate3_f16 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create3.nxv24f16.nxv8f16( %x0, %x1, %x2) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate3,_f16,,)(x0, x1, x2); } -// CHECK-LABEL: @test_svcreate3_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv12f32.nxv4f32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate3_f32u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv12f32.nxv4f32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32x3_t test_svcreate3_f32(svfloat32_t x0, svfloat32_t x1, svfloat32_t x2) { + // CHECK-LABEL: test_svcreate3_f32 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create3.nxv12f32.nxv4f32( %x0, %x1, %x2) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate3,_f32,,)(x0, x1, x2); } -// CHECK-LABEL: @test_svcreate3_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv6f64.nxv2f64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate3_f64u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create3.nxv6f64.nxv2f64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64x3_t test_svcreate3_f64(svfloat64_t x0, svfloat64_t x1, svfloat64_t x2) { + // CHECK-LABEL: test_svcreate3_f64 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create3.nxv6f64.nxv2f64( %x0, %x1, %x2) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate3,_f64,,)(x0, x1, x2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c index 97636facc9a3..17723b9419a7 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,18 +13,11 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcreate4_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32bf16.nxv8bf16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svcreate4_bf16u14__SVBFloat16_tu14__SVBFloat16_tu14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32bf16.nxv8bf16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16x4_t test_svcreate4_bf16(svbfloat16_t x0, svbfloat16_t x1, svbfloat16_t x2, svbfloat16_t x4) { + // CHECK-LABEL: test_svcreate4_bf16 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32bf16.nxv8bf16( %x0, %x1, %x2, %x4) + // CHECK-NEXT: ret %[[CREATE]] // expected-warning@+1 {{implicit declaration of function 'svcreate4_bf16'}} return SVE_ACLE_FUNC(svcreate4,_bf16,,)(x0, x1, x2, x4); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4.c index ee4053a29ab8..f30bbb880f83 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_create4.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,167 +12,90 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcreate4_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcreate4_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8x4_t test_svcreate4_s8(svint8_t x0, svint8_t x1, svint8_t x2, svint8_t x4) { + // CHECK-LABEL: test_svcreate4_s8 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8( %x0, %x1, %x2, %x4) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate4,_s8,,)(x0, x1, x2, x4); } -// CHECK-LABEL: @test_svcreate4_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate4_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16x4_t test_svcreate4_s16(svint16_t x0, svint16_t x1, svint16_t x2, svint16_t x4) { + // CHECK-LABEL: test_svcreate4_s16 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32i16.nxv8i16( %x0, %x1, %x2, %x4) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate4,_s16,,)(x0, x1, x2, x4); } -// CHECK-LABEL: @test_svcreate4_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv16i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate4_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv16i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32x4_t test_svcreate4_s32(svint32_t x0, svint32_t x1, svint32_t x2, svint32_t x4) { + // CHECK-LABEL: test_svcreate4_s32 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create4.nxv16i32.nxv4i32( %x0, %x1, %x2, %x4) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate4,_s32,,)(x0, x1, x2, x4); } -// CHECK-LABEL: @test_svcreate4_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv8i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate4_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv8i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64x4_t test_svcreate4_s64(svint64_t x0, svint64_t x1, svint64_t x2, svint64_t x4) { + // CHECK-LABEL: test_svcreate4_s64 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create4.nxv8i64.nxv2i64( %x0, %x1, %x2, %x4) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate4,_s64,,)(x0, x1, x2, x4); } -// CHECK-LABEL: @test_svcreate4_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcreate4_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8x4_t test_svcreate4_u8(svuint8_t x0, svuint8_t x1, svuint8_t x2, svuint8_t x4) { + // CHECK-LABEL: test_svcreate4_u8 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create4.nxv64i8.nxv16i8( %x0, %x1, %x2, %x4) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate4,_u8,,)(x0, x1, x2, x4); } -// CHECK-LABEL: @test_svcreate4_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate4_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32i16.nxv8i16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16x4_t test_svcreate4_u16(svuint16_t x0, svuint16_t x1, svuint16_t x2, svuint16_t x4) { + // CHECK-LABEL: test_svcreate4_u16 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32i16.nxv8i16( %x0, %x1, %x2, %x4) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate4,_u16,,)(x0, x1, x2, x4); } -// CHECK-LABEL: @test_svcreate4_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv16i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate4_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv16i32.nxv4i32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32x4_t test_svcreate4_u32(svuint32_t x0, svuint32_t x1, svuint32_t x2, svuint32_t x4) { + // CHECK-LABEL: test_svcreate4_u32 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create4.nxv16i32.nxv4i32( %x0, %x1, %x2, %x4) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate4,_u32,,)(x0, x1, x2, x4); } -// CHECK-LABEL: @test_svcreate4_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv8i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate4_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv8i64.nxv2i64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64x4_t test_svcreate4_u64(svuint64_t x0, svuint64_t x1, svuint64_t x2, svuint64_t x4) { + // CHECK-LABEL: test_svcreate4_u64 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create4.nxv8i64.nxv2i64( %x0, %x1, %x2, %x4) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate4,_u64,,)(x0, x1, x2, x4); } -// CHECK-LABEL: @test_svcreate4_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32f16.nxv8f16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate4_f16u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32f16.nxv8f16( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16x4_t test_svcreate4_f16(svfloat16_t x0, svfloat16_t x1, svfloat16_t x2, svfloat16_t x4) { + // CHECK-LABEL: test_svcreate4_f16 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create4.nxv32f16.nxv8f16( %x0, %x1, %x2, %x4) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate4,_f16,,)(x0, x1, x2, x4); } -// CHECK-LABEL: @test_svcreate4_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv16f32.nxv4f32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate4_f32u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv16f32.nxv4f32( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32x4_t test_svcreate4_f32(svfloat32_t x0, svfloat32_t x1, svfloat32_t x2, svfloat32_t x4) { + // CHECK-LABEL: test_svcreate4_f32 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create4.nxv16f32.nxv4f32( %x0, %x1, %x2, %x4) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate4,_f32,,)(x0, x1, x2, x4); } -// CHECK-LABEL: @test_svcreate4_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv8f64.nxv2f64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svcreate4_f64u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.create4.nxv8f64.nxv2f64( [[X0:%.*]], [[X1:%.*]], [[X2:%.*]], [[X4:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64x4_t test_svcreate4_f64(svfloat64_t x0, svfloat64_t x1, svfloat64_t x2, svfloat64_t x4) { + // CHECK-LABEL: test_svcreate4_f64 + // CHECK: %[[CREATE:.*]] = call @llvm.aarch64.sve.tuple.create4.nxv8f64.nxv2f64( %x0, %x1, %x2, %x4) + // CHECK-NEXT: ret %[[CREATE]] return SVE_ACLE_FUNC(svcreate4,_f64,,)(x0, x1, x2, x4); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c index fff5ddc4fb17..f7f397aba059 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,50 +12,26 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcvt_bf16_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.bf16f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svcvt_bf16_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.bf16f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svcvt_bf16_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_bf16_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.bf16f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_bf16, _f32, _x, )(pg, op); } -// CHECK-LABEL: @test_svcvt_bf16_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.bf16f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svcvt_bf16_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.bf16f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svcvt_bf16_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_bf16_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.bf16f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_bf16, _f32, _z, )(pg, op); } -// CHECK-LABEL: @test_svcvt_bf16_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.bf16f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svcvt_bf16_f32_mu14__SVBFloat16_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.bf16f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svcvt_bf16_f32_m(svbfloat16_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_bf16_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.bf16f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_bf16, _f32, _m, )(inactive, pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt.c index 207897876281..3f4cb7989014 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvt.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,1634 +13,866 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcvt_s16_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s16_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svcvt_s16_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_s16_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s16,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_s16_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s16_f16_mu11__SVInt16_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svcvt_s16_f16_m(svint16_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_s16_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s16,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_s16_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s16_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svcvt_s16_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_s16_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.nxv8i16.nxv8f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s16,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_u16_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u16_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcvt_u16_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_u16_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u16,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_u16_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u16_f16_mu12__SVUint16_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcvt_u16_f16_m(svuint16_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_u16_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u16,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_u16_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u16_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svcvt_u16_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_u16_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.nxv8i16.nxv8f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u16,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_s32_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s32_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svcvt_s32_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_s32_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.i32f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s32,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_s32_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s32_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svcvt_s32_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_s32_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s32,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_s32_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s32_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svcvt_s32_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvt_s32_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.i32f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s32,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_s32_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s32_f16_mu11__SVInt32_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svcvt_s32_f16_m(svint32_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_s32_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.i32f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s32,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_s32_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s32_f32_mu11__SVInt32_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svcvt_s32_f32_m(svint32_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_s32_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s32,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_s32_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s32_f64_mu11__SVInt32_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svcvt_s32_f64_m(svint32_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvt_s32_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.i32f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s32,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_s32_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s32_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svcvt_s32_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_s32_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.i32f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s32,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_s32_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s32_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svcvt_s32_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_s32_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.nxv4i32.nxv4f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s32,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_s32_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s32_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i32f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svcvt_s32_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvt_s32_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.i32f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s32,_f64,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_s64_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s64_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svcvt_s64_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_s64_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.i64f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s64,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_s64_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s64_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svcvt_s64_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_s64_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.i64f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s64,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_s64_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s64_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svcvt_s64_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvt_s64_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s64,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_s64_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s64_f16_mu11__SVInt64_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svcvt_s64_f16_m(svint64_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_s64_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.i64f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s64,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_s64_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s64_f32_mu11__SVInt64_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svcvt_s64_f32_m(svint64_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_s64_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.i64f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s64,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_s64_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s64_f64_mu11__SVInt64_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svcvt_s64_f64_m(svint64_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvt_s64_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s64,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_s64_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s64_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svcvt_s64_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_s64_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.i64f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s64,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_s64_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s64_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.i64f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svcvt_s64_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_s64_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.i64f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s64,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_s64_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_s64_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svcvt_s64_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvt_s64_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzs.nxv2i64.nxv2f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_s64,_f64,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_u32_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u32_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcvt_u32_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_u32_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.i32f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u32,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_u32_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u32_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcvt_u32_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_u32_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u32,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_u32_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u32_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcvt_u32_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvt_u32_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.i32f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u32,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_u32_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u32_f16_mu12__SVUint32_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcvt_u32_f16_m(svuint32_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_u32_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.i32f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u32,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_u32_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u32_f32_mu12__SVUint32_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcvt_u32_f32_m(svuint32_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_u32_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u32,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_u32_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u32_f64_mu12__SVUint32_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcvt_u32_f64_m(svuint32_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvt_u32_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.i32f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u32,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_u32_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u32_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcvt_u32_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_u32_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.i32f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u32,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_u32_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u32_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcvt_u32_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_u32_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.nxv4i32.nxv4f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u32,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_u32_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u32_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i32f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svcvt_u32_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvt_u32_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.i32f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u32,_f64,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_u64_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u64_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcvt_u64_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_u64_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.i64f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u64,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_u64_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u64_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcvt_u64_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_u64_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.i64f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u64,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_u64_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u64_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcvt_u64_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvt_u64_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u64,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_u64_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u64_f16_mu12__SVUint64_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcvt_u64_f16_m(svuint64_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_u64_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.i64f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u64,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_u64_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u64_f32_mu12__SVUint64_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcvt_u64_f32_m(svuint64_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_u64_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.i64f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u64,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_u64_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u64_f64_mu12__SVUint64_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcvt_u64_f64_m(svuint64_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvt_u64_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u64,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_u64_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u64_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcvt_u64_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_u64_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.i64f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u64,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_u64_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u64_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.i64f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcvt_u64_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_u64_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.i64f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u64,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_u64_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_u64_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svcvt_u64_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvt_u64_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtzu.nxv2i64.nxv2f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_u64,_f64,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f16_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f16_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvt_f16_s32_z(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcvt_f16_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.scvtf.f16i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f16,_s32,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f32_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f32_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvt_f32_s32_z(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcvt_f32_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f32,_s32,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f64_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f64i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f64_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f64i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvt_f64_s32_z(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcvt_f64_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.scvtf.f64i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f64,_s32,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f16_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f16_s32_mu13__SVFloat16_tu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvt_f16_s32_m(svfloat16_t inactive, svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcvt_f16_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.scvtf.f16i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f16,_s32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_f32_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f32_s32_mu13__SVFloat32_tu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvt_f32_s32_m(svfloat32_t inactive, svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcvt_f32_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f32,_s32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_f64_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f64i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f64_s32_mu13__SVFloat64_tu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f64i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvt_f64_s32_m(svfloat64_t inactive, svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcvt_f64_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.scvtf.f64i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f64,_s32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_f16_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f16_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvt_f16_s32_x(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcvt_f16_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.scvtf.f16i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f16,_s32,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f32_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f32_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvt_f32_s32_x(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcvt_f32_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.scvtf.nxv4f32.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f32,_s32,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f64_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f64i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f64_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f64i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvt_f64_s32_x(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svcvt_f64_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.scvtf.f64i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f64,_s32,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f16_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f16_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvt_f16_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcvt_f16_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.scvtf.f16i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f16,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f32_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f32i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f32_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f32i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvt_f32_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcvt_f32_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.scvtf.f32i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f32,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f64_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f64_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvt_f64_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcvt_f64_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f64,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f16_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f16_s64_mu13__SVFloat16_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvt_f16_s64_m(svfloat16_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcvt_f16_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.scvtf.f16i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f16,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_f32_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f32i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f32_s64_mu13__SVFloat32_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f32i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvt_f32_s64_m(svfloat32_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcvt_f32_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.scvtf.f32i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f32,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_f64_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f64_s64_mu13__SVFloat64_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvt_f64_s64_m(svfloat64_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcvt_f64_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f64,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_f16_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f16_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f16i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvt_f16_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcvt_f16_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.scvtf.f16i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f16,_s64,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f32_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f32i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f32_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.f32i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvt_f32_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcvt_f32_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.scvtf.f32i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f32,_s64,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f64_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f64_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvt_f64_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svcvt_f64_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.scvtf.nxv2f64.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f64,_s64,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f16_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f16_u32_zu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvt_f16_u32_z(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svcvt_f16_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ucvtf.f16i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f16,_u32,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f32_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f32_u32_zu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvt_f32_u32_z(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svcvt_f32_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f32,_u32,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f64_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f64i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f64_u32_zu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f64i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvt_f64_u32_z(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svcvt_f64_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ucvtf.f64i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f64,_u32,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f16_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f16_u32_mu13__SVFloat16_tu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvt_f16_u32_m(svfloat16_t inactive, svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svcvt_f16_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ucvtf.f16i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f16,_u32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_f32_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f32_u32_mu13__SVFloat32_tu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvt_f32_u32_m(svfloat32_t inactive, svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svcvt_f32_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f32,_u32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_f64_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f64i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f64_u32_mu13__SVFloat64_tu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f64i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvt_f64_u32_m(svfloat64_t inactive, svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svcvt_f64_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ucvtf.f64i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f64,_u32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_f16_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f16_u32_xu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvt_f16_u32_x(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svcvt_f16_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ucvtf.f16i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f16,_u32,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f32_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f32_u32_xu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvt_f32_u32_x(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svcvt_f32_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ucvtf.nxv4f32.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f32,_u32,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f64_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f64i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f64_u32_xu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f64i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvt_f64_u32_x(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svcvt_f64_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ucvtf.f64i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f64,_u32,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f16_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f16_u64_zu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvt_f16_u64_z(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svcvt_f16_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ucvtf.f16i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f16,_u64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f32_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f32i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f32_u64_zu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f32i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvt_f32_u64_z(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svcvt_f32_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ucvtf.f32i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f32,_u64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f64_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f64_u64_zu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvt_f64_u64_z(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svcvt_f64_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f64,_u64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f16_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f16_u64_mu13__SVFloat16_tu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvt_f16_u64_m(svfloat16_t inactive, svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svcvt_f16_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ucvtf.f16i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f16,_u64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_f32_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f32i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f32_u64_mu13__SVFloat32_tu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f32i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvt_f32_u64_m(svfloat32_t inactive, svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svcvt_f32_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ucvtf.f32i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f32,_u64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_f64_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f64_u64_mu13__SVFloat64_tu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvt_f64_u64_m(svfloat64_t inactive, svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svcvt_f64_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f64,_u64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_f16_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f16_u64_xu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f16i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvt_f16_u64_x(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svcvt_f16_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ucvtf.f16i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f16,_u64,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f32_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f32i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f32_u64_xu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.f32i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvt_f32_u64_x(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svcvt_f32_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ucvtf.f32i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f32,_u64,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f64_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f64_u64_xu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvt_f64_u64_x(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svcvt_f64_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ucvtf.nxv2f64.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f64,_u64,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f32_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f32_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvt_f32_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_f32_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.f32f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f32,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f64_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f64_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvt_f64_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_f64_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.f64f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f64,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f32_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f32_f16_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvt_f32_f16_m(svfloat32_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_f32_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.f32f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f32,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_f64_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f64_f16_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvt_f64_f16_m(svfloat64_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_f64_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.f64f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f64,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_f32_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f32_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvt_f32_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_f32_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.f32f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f32,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f64_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f64_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvt_f64_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvt_f64_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.f64f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f64,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f64_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f64_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvt_f64_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_f64_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.f64f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f64,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f64_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f64_f32_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvt_f64_f32_m(svfloat64_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_f64_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.f64f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f64,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_f64_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f64_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f64f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvt_f64_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_f64_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.f64f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f64,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f16_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f16_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvt_f16_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_f16_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.f16f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f16,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f16_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f16_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvt_f16_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvt_f16_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.f16f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f16,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f16_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f16_f32_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvt_f16_f32_m(svfloat16_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_f16_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.f16f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f16,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_f16_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f16_f64_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvt_f16_f64_m(svfloat16_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvt_f16_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.f16f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f16,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_f16_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f16_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvt_f16_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvt_f16_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.f16f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f16,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f16_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f16_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f16f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvt_f16_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvt_f16_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.f16f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f16,_f64,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f32_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f32_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvt_f32_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvt_f32_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.f32f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f32,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvt_f32_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f32_f64_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvt_f32_f64_m(svfloat32_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvt_f32_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.f32f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f32,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvt_f32_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svcvt_f32_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvt.f32f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvt_f32_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvt_f32_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvt.f32f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvt_f32,_f64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c index e9a032119819..8dee5e5e4f8e 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_cvtnt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,34 +12,18 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcvtnt_bf16_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.bf16f32( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z23test_svcvtnt_bf16_f32_xu14__SVBFloat16_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.bf16f32( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svcvtnt_bf16_f32_x(svbfloat16_t even, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvtnt_bf16_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtnt.bf16f32( %even, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvtnt_bf16, _f32, _x, )(even, pg, op); } -// CHECK-LABEL: @test_svcvtnt_bf16_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.bf16f32( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z23test_svcvtnt_bf16_f32_mu14__SVBFloat16_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.bf16f32( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svcvtnt_bf16_f32_m(svbfloat16_t even, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvtnt_bf16_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtnt.bf16f32( %even, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svcvtnt_bf16, _f32, _m, )(even, pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c index 4f384678c243..b7e02df4c152 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_div.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,786 +13,415 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svdiv_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svdiv_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svdiv_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svdiv_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svdiv_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svdiv_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svdiv_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svdiv_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svdiv_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svdiv_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svdiv_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svdiv_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svdiv_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svdiv_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svdiv_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svdiv_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svdiv_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svdiv_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svdiv_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svdiv_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svdiv_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svdiv_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svdiv_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svdiv_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svdiv_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svdiv_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svdiv_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svdiv_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svdiv_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svdiv_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svdiv_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svdiv_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svdiv_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svdiv_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svdiv_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svdiv_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svdiv_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svdiv_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svdiv_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svdiv_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svdiv_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svdiv_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svdiv_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svdiv_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svdiv_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdiv.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svdiv_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svdiv_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svdiv_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svdiv_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udiv.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svdiv_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svdiv_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svdiv_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svdiv_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svdiv_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svdiv_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svdiv_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svdiv_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svdiv_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svdiv_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svdiv_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svdiv_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svdiv_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svdiv_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svdiv_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svdiv_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdiv_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svdiv_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svdiv_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_f64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svdiv_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svdiv_n_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f32_zu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svdiv_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svdiv_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f64_zu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svdiv_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svdiv_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svdiv_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svdiv_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f32_mu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svdiv_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svdiv_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f64_mu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svdiv_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svdiv_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svdiv_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svdiv_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f32_xu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svdiv_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svdiv_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdiv_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svdiv_n_f64_xu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svdiv_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svdiv_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdiv.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdiv,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c index b703082f0b0e..7bf735a49a04 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_divr.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,786 +13,415 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svdivr_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svdivr_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svdivr_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svdivr_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svdivr_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svdivr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svdivr_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svdivr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svdivr_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svdivr_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svdivr_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svdivr_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svdivr_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svdivr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svdivr_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svdivr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svdivr_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svdivr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svdivr_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svdivr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svdivr_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svdivr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svdivr_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svdivr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svdivr_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svdivr_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svdivr_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svdivr_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svdivr_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svdivr_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svdivr_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svdivr_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svdivr_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svdivr_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svdivr_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svdivr_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svdivr_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svdivr_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svdivr_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svdivr_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svdivr_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svdivr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svdivr_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svdivr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svdivr_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdivr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svdivr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svdivr_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svdivr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svdivr_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udivr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svdivr_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svdivr_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svdivr_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svdivr_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svdivr_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svdivr_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svdivr_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svdivr_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svdivr_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svdivr_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svdivr_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svdivr_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svdivr_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svdivr_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svdivr_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svdivr_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svdivr_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svdivr_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svdivr_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_f64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svdivr_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svdivr_n_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f32_zu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svdivr_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svdivr_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f64_zu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svdivr_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svdivr_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svdivr_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svdivr_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f32_mu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svdivr_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svdivr_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f64_mu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svdivr_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svdivr_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svdivr_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svdivr_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f32_xu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svdivr_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svdivr_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svdivr_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svdivr_n_f64_xu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svdivr_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svdivr_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fdivr.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdivr,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c index b08c6be1529a..8a3322df1b35 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dot.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,220 +13,118 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svdot_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svdot_s32u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svdot_s32(svint32_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svdot_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svdot_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svdot_s64u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svdot_s64(svint64_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svdot_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svdot_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svdot_u32u12__SVUint32_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svdot_u32(svuint32_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svdot_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udot.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svdot_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svdot_u64u12__SVUint64_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svdot_u64(svuint64_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svdot_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udot.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svdot_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdot_n_s32u11__SVInt32_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svdot_n_s32(svint32_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svdot_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svdot_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdot_n_s64u11__SVInt64_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svdot_n_s64(svint64_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svdot_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svdot_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdot_n_u32u12__SVUint32_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svdot_n_u32(svuint32_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svdot_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udot.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svdot_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdot_n_u64u12__SVUint64_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.udot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svdot_n_u64(svuint64_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svdot_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udot.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot,_n_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svdot_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svdot_lane_s32u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svdot_lane_s32(svint32_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svdot_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot_lane,_s32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svdot_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svdot_lane_s32_1u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svdot_lane_s32_1(svint32_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svdot_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.lane.nxv4i32( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot_lane,_s32,,)(op1, op2, op3, 3); } -// CHECK-LABEL: @test_svdot_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svdot_lane_s64u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svdot_lane_s64(svint64_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svdot_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot_lane,_s64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svdot_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svdot_lane_s64_1u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svdot_lane_s64_1(svint64_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svdot_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sdot.lane.nxv2i64( %op1, %op2, %op3, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot_lane,_s64,,)(op1, op2, op3, 1); } -// CHECK-LABEL: @test_svdot_lane_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svdot_lane_u32u12__SVUint32_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svdot_lane_u32(svuint32_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svdot_lane_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udot.lane.nxv4i32( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot_lane,_u32,,)(op1, op2, op3, 3); } -// CHECK-LABEL: @test_svdot_lane_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svdot_lane_u64u12__SVUint64_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.udot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svdot_lane_u64(svuint64_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svdot_lane_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.udot.lane.nxv2i64( %op1, %op2, %op3, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdot_lane,_u64,,)(op1, op2, op3, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c index b914fb6fc2cd..65e6b93bdb4a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup-bfloat.c @@ -1,11 +1,10 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -15,86 +14,47 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svdup_n_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svdup_n_bf16u6__bf16( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svdup_n_bf16(bfloat16_t op) { + // CHECK-LABEL: test_svdup_n_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv8bf16(bfloat %op) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16'}} return SVE_ACLE_FUNC(svdup, _n, _bf16, )(op); } -// CHECK-LABEL: @test_svdup_n_bf16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( zeroinitializer, [[TMP0]], bfloat [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_zu10__SVBool_tu6__bf16( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( zeroinitializer, [[TMP0]], bfloat [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svdup_n_bf16_z(svbool_t pg, bfloat16_t op) { + // CHECK-LABEL: test_svdup_n_bf16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( zeroinitializer, %[[PG]], bfloat %op) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_z'}} return SVE_ACLE_FUNC(svdup, _n, _bf16_z, )(pg, op); } -// CHECK-LABEL: @test_svdup_n_bf16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( [[INACTIVE:%.*]], [[TMP0]], bfloat [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_mu14__SVBFloat16_tu10__SVBool_tu6__bf16( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( [[INACTIVE:%.*]], [[TMP0]], bfloat [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svdup_n_bf16_m(svbfloat16_t inactive, svbool_t pg, bfloat16_t op) { + // CHECK-LABEL: test_svdup_n_bf16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( %inactive, %[[PG]], bfloat %op) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_m'}} return SVE_ACLE_FUNC(svdup, _n, _bf16_m, )(inactive, pg, op); } -// CHECK-LABEL: @test_svdup_n_bf16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( undef, [[TMP0]], bfloat [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svdup_n_bf16_xu10__SVBool_tu6__bf16( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( undef, [[TMP0]], bfloat [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svdup_n_bf16_x(svbool_t pg, bfloat16_t op) { + // CHECK-LABEL: test_svdup_n_bf16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8bf16( undef, %[[PG]], bfloat %op) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svdup_n_bf16_x'}} return SVE_ACLE_FUNC(svdup, _n, _bf16_x, )(pg, op); } -// CHECK-LABEL: @test_svdup_lane_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8bf16( [[DATA:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svdup_lane_bf16u14__SVBFloat16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8bf16( [[DATA:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svdup_lane_bf16(svbfloat16_t data, uint16_t index) { + // CHECK-LABEL: test_svdup_lane_bf16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %index) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv8bf16( %data, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svdup_lane_bf16'}} return SVE_ACLE_FUNC(svdup_lane,_bf16,,)(data, index); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c index a09e95262570..f632be7b8598 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dup.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,969 +13,515 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svdup_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svdup_n_s8a( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svdup_n_s8(int8_t op) { + // CHECK-LABEL: test_svdup_n_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s8,)(op); } -// CHECK-LABEL: @test_svdup_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svdup_n_s16s( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svdup_n_s16(int16_t op) { + // CHECK-LABEL: test_svdup_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s16,)(op); } -// CHECK-LABEL: @test_svdup_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svdup_n_s32i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svdup_n_s32(int32_t op) { + // CHECK-LABEL: test_svdup_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s32,)(op); } -// CHECK-LABEL: @test_svdup_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svdup_n_s64l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svdup_n_s64(int64_t op) { + // CHECK-LABEL: test_svdup_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s64,)(op); } -// CHECK-LABEL: @test_svdup_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svdup_n_u8h( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svdup_n_u8(uint8_t op) { + // CHECK-LABEL: test_svdup_n_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u8,)(op); } -// CHECK-LABEL: @test_svdup_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svdup_n_u16t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svdup_n_u16(uint16_t op) { + // CHECK-LABEL: test_svdup_n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u16,)(op); } -// CHECK-LABEL: @test_svdup_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svdup_n_u32j( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svdup_n_u32(uint32_t op) { + // CHECK-LABEL: test_svdup_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u32,)(op); } -// CHECK-LABEL: @test_svdup_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svdup_n_u64m( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svdup_n_u64(uint64_t op) { + // CHECK-LABEL: test_svdup_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u64,)(op); } -// CHECK-LABEL: @test_svdup_n_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svdup_n_f16Dh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svdup_n_f16(float16_t op) { + // CHECK-LABEL: test_svdup_n_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f16,)(op); } -// CHECK-LABEL: @test_svdup_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svdup_n_f32f( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svdup_n_f32(float32_t op) { + // CHECK-LABEL: test_svdup_n_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f32,)(op); } -// CHECK-LABEL: @test_svdup_n_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svdup_n_f64d( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svdup_n_f64(float64_t op) { + // CHECK-LABEL: test_svdup_n_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f64,)(op); } -// CHECK-LABEL: @test_svdup_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svdup_n_s8_zu10__SVBool_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svdup_n_s8_z(svbool_t pg, int8_t op) { + // CHECK-LABEL: test_svdup_n_s8_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, %pg, i8 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s8_z,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_s16_zu10__SVBool_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svdup_n_s16_z(svbool_t pg, int16_t op) { + // CHECK-LABEL: test_svdup_n_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, %[[PG]], i16 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s16_z,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_s32_zu10__SVBool_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svdup_n_s32_z(svbool_t pg, int32_t op) { + // CHECK-LABEL: test_svdup_n_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, %[[PG]], i32 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s32_z,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_s64_zu10__SVBool_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svdup_n_s64_z(svbool_t pg, int64_t op) { + // CHECK-LABEL: test_svdup_n_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, %[[PG]], i64 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s64_z,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svdup_n_u8_zu10__SVBool_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, [[PG:%.*]], i8 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svdup_n_u8_z(svbool_t pg, uint8_t op) { + // CHECK-LABEL: test_svdup_n_u8_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv16i8( zeroinitializer, %pg, i8 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u8_z,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_u16_zu10__SVBool_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, [[TMP0]], i16 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svdup_n_u16_z(svbool_t pg, uint16_t op) { + // CHECK-LABEL: test_svdup_n_u16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8i16( zeroinitializer, %[[PG]], i16 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u16_z,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_u32_zu10__SVBool_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, [[TMP0]], i32 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svdup_n_u32_z(svbool_t pg, uint32_t op) { + // CHECK-LABEL: test_svdup_n_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4i32( zeroinitializer, %[[PG]], i32 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u32_z,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_u64_zu10__SVBool_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, [[TMP0]], i64 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svdup_n_u64_z(svbool_t pg, uint64_t op) { + // CHECK-LABEL: test_svdup_n_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2i64( zeroinitializer, %[[PG]], i64 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u64_z,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( zeroinitializer, [[TMP0]], half [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_f16_zu10__SVBool_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( zeroinitializer, [[TMP0]], half [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svdup_n_f16_z(svbool_t pg, float16_t op) { + // CHECK-LABEL: test_svdup_n_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8f16( zeroinitializer, %[[PG]], half %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f16_z,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( zeroinitializer, [[TMP0]], float [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_f32_zu10__SVBool_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( zeroinitializer, [[TMP0]], float [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svdup_n_f32_z(svbool_t pg, float32_t op) { + // CHECK-LABEL: test_svdup_n_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4f32( zeroinitializer, %[[PG]], float %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f32_z,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( zeroinitializer, [[TMP0]], double [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_f64_zu10__SVBool_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( zeroinitializer, [[TMP0]], double [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svdup_n_f64_z(svbool_t pg, float64_t op) { + // CHECK-LABEL: test_svdup_n_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2f64( zeroinitializer, %[[PG]], double %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f64_z,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svdup_n_s8_mu10__SVInt8_tu10__SVBool_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svdup_n_s8_m(svint8_t inactive, svbool_t pg, int8_t op) { + // CHECK-LABEL: test_svdup_n_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv16i8( %inactive, %pg, i8 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s8_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svdup_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_s16_mu11__SVInt16_tu10__SVBool_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svdup_n_s16_m(svint16_t inactive, svbool_t pg, int16_t op) { + // CHECK-LABEL: test_svdup_n_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8i16( %inactive, %[[PG]], i16 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s16_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svdup_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_s32_mu11__SVInt32_tu10__SVBool_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svdup_n_s32_m(svint32_t inactive, svbool_t pg, int32_t op) { + // CHECK-LABEL: test_svdup_n_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4i32( %inactive, %[[PG]], i32 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s32_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svdup_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_s64_mu11__SVInt64_tu10__SVBool_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svdup_n_s64_m(svint64_t inactive, svbool_t pg, int64_t op) { + // CHECK-LABEL: test_svdup_n_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2i64( %inactive, %[[PG]], i64 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s64_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svdup_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svdup_n_u8_mu11__SVUint8_tu10__SVBool_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], i8 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svdup_n_u8_m(svuint8_t inactive, svbool_t pg, uint8_t op) { + // CHECK-LABEL: test_svdup_n_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv16i8( %inactive, %pg, i8 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u8_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svdup_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_u16_mu12__SVUint16_tu10__SVBool_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], i16 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svdup_n_u16_m(svuint16_t inactive, svbool_t pg, uint16_t op) { + // CHECK-LABEL: test_svdup_n_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8i16( %inactive, %[[PG]], i16 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u16_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svdup_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_u32_mu12__SVUint32_tu10__SVBool_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], i32 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svdup_n_u32_m(svuint32_t inactive, svbool_t pg, uint32_t op) { + // CHECK-LABEL: test_svdup_n_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4i32( %inactive, %[[PG]], i32 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u32_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svdup_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_u64_mu12__SVUint64_tu10__SVBool_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], i64 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svdup_n_u64_m(svuint64_t inactive, svbool_t pg, uint64_t op) { + // CHECK-LABEL: test_svdup_n_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2i64( %inactive, %[[PG]], i64 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u64_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svdup_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], half [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_f16_mu13__SVFloat16_tu10__SVBool_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], half [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svdup_n_f16_m(svfloat16_t inactive, svbool_t pg, float16_t op) { + // CHECK-LABEL: test_svdup_n_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8f16( %inactive, %[[PG]], half %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f16_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svdup_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], float [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_f32_mu13__SVFloat32_tu10__SVBool_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], float [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svdup_n_f32_m(svfloat32_t inactive, svbool_t pg, float32_t op) { + // CHECK-LABEL: test_svdup_n_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4f32( %inactive, %[[PG]], float %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f32_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svdup_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], double [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_f64_mu13__SVFloat64_tu10__SVBool_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], double [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svdup_n_f64_m(svfloat64_t inactive, svbool_t pg, float64_t op) { + // CHECK-LABEL: test_svdup_n_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2f64( %inactive, %[[PG]], double %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f64_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svdup_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svdup_n_s8_xu10__SVBool_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svdup_n_s8_x(svbool_t pg, int8_t op) { + // CHECK-LABEL: test_svdup_n_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, %pg, i8 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s8_x,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_s16_xu10__SVBool_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svdup_n_s16_x(svbool_t pg, int16_t op) { + // CHECK-LABEL: test_svdup_n_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, %[[PG]], i16 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s16_x,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_s32_xu10__SVBool_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svdup_n_s32_x(svbool_t pg, int32_t op) { + // CHECK-LABEL: test_svdup_n_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, %[[PG]], i32 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s32_x,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_s64_xu10__SVBool_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svdup_n_s64_x(svbool_t pg, int64_t op) { + // CHECK-LABEL: test_svdup_n_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, %[[PG]], i64 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_s64_x,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svdup_n_u8_xu10__SVBool_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, [[PG:%.*]], i8 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svdup_n_u8_x(svbool_t pg, uint8_t op) { + // CHECK-LABEL: test_svdup_n_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv16i8( undef, %pg, i8 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u8_x,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_u16_xu10__SVBool_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, [[TMP0]], i16 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svdup_n_u16_x(svbool_t pg, uint16_t op) { + // CHECK-LABEL: test_svdup_n_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8i16( undef, %[[PG]], i16 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u16_x,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_u32_xu10__SVBool_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, [[TMP0]], i32 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svdup_n_u32_x(svbool_t pg, uint32_t op) { + // CHECK-LABEL: test_svdup_n_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4i32( undef, %[[PG]], i32 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u32_x,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_u64_xu10__SVBool_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, [[TMP0]], i64 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svdup_n_u64_x(svbool_t pg, uint64_t op) { + // CHECK-LABEL: test_svdup_n_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2i64( undef, %[[PG]], i64 %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_u64_x,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( undef, [[TMP0]], half [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_f16_xu10__SVBool_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv8f16( undef, [[TMP0]], half [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svdup_n_f16_x(svbool_t pg, float16_t op) { + // CHECK-LABEL: test_svdup_n_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv8f16( undef, %[[PG]], half %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f16_x,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( undef, [[TMP0]], float [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_f32_xu10__SVBool_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv4f32( undef, [[TMP0]], float [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svdup_n_f32_x(svbool_t pg, float32_t op) { + // CHECK-LABEL: test_svdup_n_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv4f32( undef, %[[PG]], float %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f32_x,)(pg, op); } -// CHECK-LABEL: @test_svdup_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( undef, [[TMP0]], double [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_n_f64_xu10__SVBool_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.nxv2f64( undef, [[TMP0]], double [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svdup_n_f64_x(svbool_t pg, float64_t op) { + // CHECK-LABEL: test_svdup_n_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dup.nxv2f64( undef, %[[PG]], double %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup,_n,_f64_x,)(pg, op); } -// CHECK-LABEL: @test_svdup_lane_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[INDEX:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_lane_s8u10__SVInt8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svdup_lane_s8(svint8_t data, uint8_t index) { + // CHECK-LABEL: test_svdup_lane_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %index) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( %data, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_s8,,)(data, index); } -// CHECK-LABEL: @test_svdup_lane_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svdup_lane_s16u11__SVInt16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svdup_lane_s16(svint16_t data, uint16_t index) { + // CHECK-LABEL: test_svdup_lane_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %index) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( %data, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_s16,,)(data, index); } -// CHECK-LABEL: @test_svdup_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[INDEX:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svdup_lane_s32u11__SVInt32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svdup_lane_s32(svint32_t data, uint32_t index) { + // CHECK-LABEL: test_svdup_lane_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %index) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( %data, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_s32,,)(data, index); } -// CHECK-LABEL: @test_svdup_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[INDEX:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svdup_lane_s64u11__SVInt64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svdup_lane_s64(svint64_t data, uint64_t index) { + // CHECK-LABEL: test_svdup_lane_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %index) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( %data, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_s64,,)(data, index); } -// CHECK-LABEL: @test_svdup_lane_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[INDEX:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svdup_lane_u8u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svdup_lane_u8(svuint8_t data, uint8_t index) { + // CHECK-LABEL: test_svdup_lane_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %index) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( %data, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_u8,,)(data, index); } -// CHECK-LABEL: @test_svdup_lane_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svdup_lane_u16u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svdup_lane_u16(svuint16_t data, uint16_t index) { + // CHECK-LABEL: test_svdup_lane_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %index) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( %data, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_u16,,)(data, index); } -// CHECK-LABEL: @test_svdup_lane_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[INDEX:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svdup_lane_u32u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svdup_lane_u32(svuint32_t data, uint32_t index) { + // CHECK-LABEL: test_svdup_lane_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %index) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( %data, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_u32,,)(data, index); } -// CHECK-LABEL: @test_svdup_lane_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[INDEX:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svdup_lane_u64u12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svdup_lane_u64(svuint64_t data, uint64_t index) { + // CHECK-LABEL: test_svdup_lane_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %index) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( %data, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_u64,,)(data, index); } -// CHECK-LABEL: @test_svdup_lane_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8f16( [[DATA:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svdup_lane_f16u13__SVFloat16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv8f16( [[DATA:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svdup_lane_f16(svfloat16_t data, uint16_t index) { + // CHECK-LABEL: test_svdup_lane_f16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %index) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv8f16( %data, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_f16,,)(data, index); } -// CHECK-LABEL: @test_svdup_lane_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[INDEX:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4f32( [[DATA:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svdup_lane_f32u13__SVFloat32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv4f32( [[DATA:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svdup_lane_f32(svfloat32_t data, uint32_t index) { + // CHECK-LABEL: test_svdup_lane_f32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %index) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv4f32( %data, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_f32,,)(data, index); } -// CHECK-LABEL: @test_svdup_lane_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[INDEX:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2f64( [[DATA:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svdup_lane_f64u13__SVFloat64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tbl.nxv2f64( [[DATA:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svdup_lane_f64(svfloat64_t data, uint64_t index) { + // CHECK-LABEL: test_svdup_lane_f64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %index) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv2f64( %data, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdup_lane,_f64,,)(data, index); } -// CHECK-LABEL: @test_svdup_n_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i1(i1 [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svdup_n_b8b( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i1(i1 [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svdup_n_b8(bool op) { + // CHECK-LABEL: test_svdup_n_b8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i1(i1 %op) + // CHECK: ret %[[DUP]] return SVE_ACLE_FUNC(svdup,_n,_b8,)(op); } -// CHECK-LABEL: @test_svdup_n_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i1(i1 [[OP:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdup_n_b16b( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i1(i1 [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svdup_n_b16(bool op) { + // CHECK-LABEL: test_svdup_n_b16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i1(i1 %op) + // CHECK: %[[CVT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[DUP]]) + // CHECK: ret %[[CVT]] return SVE_ACLE_FUNC(svdup,_n,_b16,)(op); } -// CHECK-LABEL: @test_svdup_n_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i1(i1 [[OP:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdup_n_b32b( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i1(i1 [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svdup_n_b32(bool op) { + // CHECK-LABEL: test_svdup_n_b32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i1(i1 %op) + // CHECK: %[[CVT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[DUP]]) + // CHECK: ret %[[CVT]] return SVE_ACLE_FUNC(svdup,_n,_b32,)(op); } -// CHECK-LABEL: @test_svdup_n_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i1(i1 [[OP:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svdup_n_b64b( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i1(i1 [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svdup_n_b64(bool op) { + // CHECK-LABEL: test_svdup_n_b64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i1(i1 %op) + // CHECK: %[[CVT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[DUP]]) + // CHECK: ret %[[CVT]] return SVE_ACLE_FUNC(svdup,_n,_b64,)(op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c index a1bc7df34c8b..086d753870ec 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq-bfloat.c @@ -1,11 +1,10 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -15,51 +14,23 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svdupq_lane_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8bf16( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svdupq_lane_bf16u14__SVBFloat16_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8bf16( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svdupq_lane_bf16(svbfloat16_t data, uint64_t index) { + // CHECK-LABEL: test_svdupq_lane_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8bf16( %data, i64 %index) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svdupq_lane_bf16'}} return SVE_ACLE_FUNC(svdupq_lane, _bf16, , )(data, index); } -// CHECK-LABEL: @test_svdupq_n_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x bfloat> undef, bfloat [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x bfloat> [[TMP0]], bfloat [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x bfloat> [[TMP1]], bfloat [[X2:%.*]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x bfloat> [[TMP2]], bfloat [[X3:%.*]], i32 3 -// CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x bfloat> [[TMP3]], bfloat [[X4:%.*]], i32 4 -// CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x bfloat> [[TMP4]], bfloat [[X5:%.*]], i32 5 -// CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x bfloat> [[TMP5]], bfloat [[X6:%.*]], i32 6 -// CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x bfloat> [[TMP6]], bfloat [[X7:%.*]], i32 7 -// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> [[TMP7]], i64 0) -// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8bf16( [[TMP8]], i64 0) -// CHECK-NEXT: ret [[TMP9]] -// -// CPP-CHECK-LABEL: @_Z18test_svdupq_n_bf16u6__bf16u6__bf16u6__bf16u6__bf16u6__bf16u6__bf16u6__bf16u6__bf16( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x bfloat> undef, bfloat [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x bfloat> [[TMP0]], bfloat [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x bfloat> [[TMP1]], bfloat [[X2:%.*]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x bfloat> [[TMP2]], bfloat [[X3:%.*]], i32 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x bfloat> [[TMP3]], bfloat [[X4:%.*]], i32 4 -// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x bfloat> [[TMP4]], bfloat [[X5:%.*]], i32 5 -// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x bfloat> [[TMP5]], bfloat [[X6:%.*]], i32 6 -// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x bfloat> [[TMP6]], bfloat [[X7:%.*]], i32 7 -// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> [[TMP7]], i64 0) -// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8bf16( [[TMP8]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP9]] -// svbfloat16_t test_svdupq_n_bf16(bfloat16_t x0, bfloat16_t x1, bfloat16_t x2, bfloat16_t x3, bfloat16_t x4, bfloat16_t x5, bfloat16_t x6, bfloat16_t x7) { + // CHECK-LABEL: test_svdupq_n_bf16 + // CHECK: insertelement <8 x bfloat> undef, bfloat %x0, i32 0 // + // CHECK: %[[VEC:.*]] = insertelement <8 x bfloat> %[[X:.*]], bfloat %x7, i32 7 + // CHECK-NOT: insertelement + // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv8bf16.v8bf16( undef, <8 x bfloat> %[[VEC]], i64 0) + // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8bf16( %[[INS]], i64 0) + // CHECK: ret %[[DUPQ]] // expected-warning@+1 {{implicit declaration of function 'svdupq_n_bf16'}} return SVE_ACLE_FUNC(svdupq, _n, _bf16, )(x0, x1, x2, x3, x4, x5, x6, x7); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c index effd3345303f..680986c6ae0b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_dupq.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,744 +13,317 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svdupq_lane_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svdupq_lane_s8u10__SVInt8_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svdupq_lane_s8(svint8_t data, uint64_t index) { + // CHECK-LABEL: test_svdupq_lane_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( %data, i64 %index) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_s8,,)(data, index); } -// CHECK-LABEL: @test_svdupq_lane_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_s16u11__SVInt16_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svdupq_lane_s16(svint16_t data, uint64_t index) { + // CHECK-LABEL: test_svdupq_lane_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( %data, i64 %index) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_s16,,)(data, index); } -// CHECK-LABEL: @test_svdupq_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_s32u11__SVInt32_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svdupq_lane_s32(svint32_t data, uint64_t index) { + // CHECK-LABEL: test_svdupq_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( %data, i64 %index) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_s32,,)(data, index); } -// CHECK-LABEL: @test_svdupq_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_s64u11__SVInt64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svdupq_lane_s64(svint64_t data, uint64_t index) { + // CHECK-LABEL: test_svdupq_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( %data, i64 %index) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_s64,,)(data, index); } -// CHECK-LABEL: @test_svdupq_lane_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svdupq_lane_u8u11__SVUint8_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svdupq_lane_u8(svuint8_t data, uint64_t index) { + // CHECK-LABEL: test_svdupq_lane_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( %data, i64 %index) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_u8,,)(data, index); } -// CHECK-LABEL: @test_svdupq_lane_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_u16u12__SVUint16_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svdupq_lane_u16(svuint16_t data, uint64_t index) { + // CHECK-LABEL: test_svdupq_lane_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( %data, i64 %index) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_u16,,)(data, index); } -// CHECK-LABEL: @test_svdupq_lane_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_u32u12__SVUint32_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svdupq_lane_u32(svuint32_t data, uint64_t index) { + // CHECK-LABEL: test_svdupq_lane_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( %data, i64 %index) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_u32,,)(data, index); } -// CHECK-LABEL: @test_svdupq_lane_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_u64u12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svdupq_lane_u64(svuint64_t data, uint64_t index) { + // CHECK-LABEL: test_svdupq_lane_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( %data, i64 %index) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_u64,,)(data, index); } -// CHECK-LABEL: @test_svdupq_lane_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_f16u13__SVFloat16_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svdupq_lane_f16(svfloat16_t data, uint64_t index) { + // CHECK-LABEL: test_svdupq_lane_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( %data, i64 %index) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_f16,,)(data, index); } -// CHECK-LABEL: @test_svdupq_lane_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_f32u13__SVFloat32_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svdupq_lane_f32(svfloat32_t data, uint64_t index) { + // CHECK-LABEL: test_svdupq_lane_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( %data, i64 %index) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_f32,,)(data, index); } -// CHECK-LABEL: @test_svdupq_lane_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svdupq_lane_f64u13__SVFloat64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[DATA:%.*]], i64 [[INDEX:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svdupq_lane_f64(svfloat64_t data, uint64_t index) { + // CHECK-LABEL: test_svdupq_lane_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( %data, i64 %index) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svdupq_lane,_f64,,)(data, index); } -// CHECK-LABEL: @test_svdupq_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i32 3 -// CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i32 4 -// CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i32 5 -// CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i32 6 -// CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i32 7 -// CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i32 8 -// CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i32 9 -// CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i32 10 -// CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i32 11 -// CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i32 12 -// CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i32 13 -// CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i32 14 -// CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i32 15 -// CHECK-NEXT: [[TMP16:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) -// CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) -// CHECK-NEXT: ret [[TMP17]] -// -// CPP-CHECK-LABEL: @_Z16test_svdupq_n_s8aaaaaaaaaaaaaaaa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i32 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i32 4 -// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i32 5 -// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i32 6 -// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i32 7 -// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i32 8 -// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i32 9 -// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i32 10 -// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i32 11 -// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i32 12 -// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i32 13 -// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i32 14 -// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i32 15 -// CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) -// CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP17]] -// svint8_t test_svdupq_n_s8(int8_t x0, int8_t x1, int8_t x2, int8_t x3, int8_t x4, int8_t x5, int8_t x6, int8_t x7, int8_t x8, int8_t x9, int8_t x10, int8_t x11, int8_t x12, int8_t x13, int8_t x14, int8_t x15) { + // CHECK-LABEL: test_svdupq_n_s8 + // CHECK: insertelement <16 x i8> undef, i8 %x0, i32 0 // + // CHECK: %[[VEC:.*]] = insertelement <16 x i8> %[[X:.*]], i8 %x15, i32 15 + // CHECK-NOT: insertelement + // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> %[[VEC]], i64 0) + // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( %[[INS]], i64 0) + // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_s8,)(x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15); } -// CHECK-LABEL: @test_svdupq_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i32 3 -// CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i32 4 -// CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i32 5 -// CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i32 6 -// CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i32 7 -// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) -// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) -// CHECK-NEXT: ret [[TMP9]] -// -// CPP-CHECK-LABEL: @_Z17test_svdupq_n_s16ssssssss( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i32 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i32 4 -// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i32 5 -// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i32 6 -// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i32 7 -// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) -// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP9]] -// svint16_t test_svdupq_n_s16(int16_t x0, int16_t x1, int16_t x2, int16_t x3, int16_t x4, int16_t x5, int16_t x6, int16_t x7) { + // CHECK-LABEL: test_svdupq_n_s16 + // CHECK: insertelement <8 x i16> undef, i16 %x0, i32 0 // + // CHECK: %[[VEC:.*]] = insertelement <8 x i16> %[[X:.*]], i16 %x7, i32 7 + // CHECK-NOT: insertelement + // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> %[[VEC]], i64 0) + // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( %[[INS]], i64 0) + // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_s16,)(x0, x1, x2, x3, x4, x5, x6, x7); } -// CHECK-LABEL: @test_svdupq_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i32 3 -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) -// CHECK-NEXT: ret [[TMP5]] -// -// CPP-CHECK-LABEL: @_Z17test_svdupq_n_s32iiii( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i32 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP5]] -// svint32_t test_svdupq_n_s32(int32_t x0, int32_t x1, int32_t x2, int32_t x3) { + // CHECK-LABEL: test_svdupq_n_s32 + // CHECK: insertelement <4 x i32> undef, i32 %x0, i32 0 // + // CHECK: %[[VEC:.*]] = insertelement <4 x i32> %[[X:.*]], i32 %x3, i32 3 + // CHECK-NOT: insertelement + // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> %[[VEC]], i64 0) + // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( %[[INS]], i64 0) + // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_s32,)(x0, x1, x2, x3); } -// CHECK-LABEL: @test_svdupq_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z17test_svdupq_n_s64ll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svdupq_n_s64(int64_t x0, int64_t x1) { + // CHECK-LABEL: test_svdupq_n_s64 + // CHECK: %[[SVEC:.*]] = insertelement <2 x i64> undef, i64 %x0, i32 0 + // CHECK: %[[VEC:.*]] = insertelement <2 x i64> %[[SVEC]], i64 %x1, i32 1 + // CHECK-NOT: insertelement + // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> %[[VEC]], i64 0) + // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( %[[INS]], i64 0) + // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_s64,)(x0, x1); } -// CHECK-LABEL: @test_svdupq_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i32 3 -// CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i32 4 -// CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i32 5 -// CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i32 6 -// CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i32 7 -// CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i32 8 -// CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i32 9 -// CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i32 10 -// CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i32 11 -// CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i32 12 -// CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i32 13 -// CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i32 14 -// CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i32 15 -// CHECK-NEXT: [[TMP16:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) -// CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) -// CHECK-NEXT: ret [[TMP17]] -// -// CPP-CHECK-LABEL: @_Z16test_svdupq_n_u8hhhhhhhhhhhhhhhh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[X2:%.*]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[X3:%.*]], i32 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[X4:%.*]], i32 4 -// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[X5:%.*]], i32 5 -// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[X6:%.*]], i32 6 -// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[X7:%.*]], i32 7 -// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[X8:%.*]], i32 8 -// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[X9:%.*]], i32 9 -// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[X10:%.*]], i32 10 -// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[X11:%.*]], i32 11 -// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[X12:%.*]], i32 12 -// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[X13:%.*]], i32 13 -// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[X14:%.*]], i32 14 -// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[X15:%.*]], i32 15 -// CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) -// CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP16]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP17]] -// svuint8_t test_svdupq_n_u8(uint8_t x0, uint8_t x1, uint8_t x2, uint8_t x3, uint8_t x4, uint8_t x5, uint8_t x6, uint8_t x7, uint8_t x8, uint8_t x9, uint8_t x10, uint8_t x11, uint8_t x12, uint8_t x13, uint8_t x14, uint8_t x15) { + // CHECK-LABEL: test_svdupq_n_u8 + // CHECK: insertelement <16 x i8> undef, i8 %x0, i32 0 // + // CHECK: %[[VEC:.*]] = insertelement <16 x i8> %[[X:.*]], i8 %x15, i32 15 + // CHECK-NOT: insertelement + // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> %[[VEC]], i64 0) + // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( %[[INS]], i64 0) + // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_u8,)(x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15); } -// CHECK-LABEL: @test_svdupq_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i32 3 -// CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i32 4 -// CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i32 5 -// CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i32 6 -// CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i32 7 -// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) -// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) -// CHECK-NEXT: ret [[TMP9]] -// -// CPP-CHECK-LABEL: @_Z17test_svdupq_n_u16tttttttt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x i16> undef, i16 [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x i16> [[TMP0]], i16 [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[X2:%.*]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[X3:%.*]], i32 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x i16> [[TMP3]], i16 [[X4:%.*]], i32 4 -// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x i16> [[TMP4]], i16 [[X5:%.*]], i32 5 -// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x i16> [[TMP5]], i16 [[X6:%.*]], i32 6 -// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x i16> [[TMP6]], i16 [[X7:%.*]], i32 7 -// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP7]], i64 0) -// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP8]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP9]] -// svuint16_t test_svdupq_n_u16(uint16_t x0, uint16_t x1, uint16_t x2, uint16_t x3, uint16_t x4, uint16_t x5, uint16_t x6, uint16_t x7) { + // CHECK-LABEL: test_svdupq_n_u16 + // CHECK: insertelement <8 x i16> undef, i16 %x0, i32 0 // + // CHECK: %[[VEC:.*]] = insertelement <8 x i16> %[[X:.*]], i16 %x7, i32 7 + // CHECK-NOT: insertelement + // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> %[[VEC]], i64 0) + // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( %[[INS]], i64 0) + // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_u16,)(x0, x1, x2, x3, x4, x5, x6, x7); } -// CHECK-LABEL: @test_svdupq_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i32 3 -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) -// CHECK-NEXT: ret [[TMP5]] -// -// CPP-CHECK-LABEL: @_Z17test_svdupq_n_u32jjjj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x i32> undef, i32 [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x i32> [[TMP0]], i32 [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X2:%.*]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X3:%.*]], i32 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP3]], i64 0) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP4]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP5]] -// svuint32_t test_svdupq_n_u32(uint32_t x0, uint32_t x1, uint32_t x2, uint32_t x3) { + // CHECK-LABEL: test_svdupq_n_u32 + // CHECK: insertelement <4 x i32> undef, i32 %x0, i32 0 // + // CHECK: %[[VEC:.*]] = insertelement <4 x i32> %[[X:.*]], i32 %x3, i32 3 + // CHECK-NOT: insertelement + // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> %[[VEC]], i64 0) + // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( %[[INS]], i64 0) + // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_u32,)(x0, x1, x2, x3); } -// CHECK-LABEL: @test_svdupq_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z17test_svdupq_n_u64mm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x i64> undef, i64 [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x i64> [[TMP0]], i64 [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP1]], i64 0) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP2]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svdupq_n_u64(uint64_t x0, uint64_t x1) { + // CHECK-LABEL: test_svdupq_n_u64 + // CHECK: %[[SVEC:.*]] = insertelement <2 x i64> undef, i64 %x0, i32 0 + // CHECK: %[[VEC:.*]] = insertelement <2 x i64> %[[SVEC]], i64 %x1, i32 1 + // CHECK-NOT: insertelement + // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> %[[VEC]], i64 0) + // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( %[[INS]], i64 0) + // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_u64,)(x0, x1); } -// CHECK-LABEL: @test_svdupq_n_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x half> undef, half [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x half> [[TMP0]], half [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x half> [[TMP1]], half [[X2:%.*]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x half> [[TMP2]], half [[X3:%.*]], i32 3 -// CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x half> [[TMP3]], half [[X4:%.*]], i32 4 -// CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x half> [[TMP4]], half [[X5:%.*]], i32 5 -// CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x half> [[TMP5]], half [[X6:%.*]], i32 6 -// CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x half> [[TMP6]], half [[X7:%.*]], i32 7 -// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8f16.v8f16( undef, <8 x half> [[TMP7]], i64 0) -// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[TMP8]], i64 0) -// CHECK-NEXT: ret [[TMP9]] -// -// CPP-CHECK-LABEL: @_Z17test_svdupq_n_f16DhDhDhDhDhDhDhDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <8 x half> undef, half [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x half> [[TMP0]], half [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <8 x half> [[TMP1]], half [[X2:%.*]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <8 x half> [[TMP2]], half [[X3:%.*]], i32 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <8 x half> [[TMP3]], half [[X4:%.*]], i32 4 -// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <8 x half> [[TMP4]], half [[X5:%.*]], i32 5 -// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <8 x half> [[TMP5]], half [[X6:%.*]], i32 6 -// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <8 x half> [[TMP6]], half [[X7:%.*]], i32 7 -// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.experimental.vector.insert.nxv8f16.v8f16( undef, <8 x half> [[TMP7]], i64 0) -// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( [[TMP8]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP9]] -// svfloat16_t test_svdupq_n_f16(float16_t x0, float16_t x1, float16_t x2, float16_t x3, float16_t x4, float16_t x5, float16_t x6, float16_t x7) { + // CHECK-LABEL: test_svdupq_n_f16 + // CHECK: insertelement <8 x half> undef, half %x0, i32 0 // + // CHECK: %[[VEC:.*]] = insertelement <8 x half> %[[X:.*]], half %x7, i32 7 + // CHECK-NOT: insertelement + // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv8f16.v8f16( undef, <8 x half> %[[VEC]], i64 0) + // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8f16( %[[INS]], i64 0) + // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_f16,)(x0, x1, x2, x3, x4, x5, x6, x7); } -// CHECK-LABEL: @test_svdupq_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> undef, float [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[X2:%.*]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[X3:%.*]], i32 3 -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4f32.v4f32( undef, <4 x float> [[TMP3]], i64 0) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[TMP4]], i64 0) -// CHECK-NEXT: ret [[TMP5]] -// -// CPP-CHECK-LABEL: @_Z17test_svdupq_n_f32ffff( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <4 x float> undef, float [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x float> [[TMP0]], float [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <4 x float> [[TMP1]], float [[X2:%.*]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <4 x float> [[TMP2]], float [[X3:%.*]], i32 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.experimental.vector.insert.nxv4f32.v4f32( undef, <4 x float> [[TMP3]], i64 0) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( [[TMP4]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP5]] -// svfloat32_t test_svdupq_n_f32(float32_t x0, float32_t x1, float32_t x2, float32_t x3) { + // CHECK-LABEL: test_svdupq_n_f32 + // CHECK: insertelement <4 x float> undef, float %x0, i32 0 // + // CHECK: %[[VEC:.*]] = insertelement <4 x float> %[[X:.*]], float %x3, i32 3 + // CHECK-NOT: insertelement + // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv4f32.v4f32( undef, <4 x float> %[[VEC]], i64 0) + // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4f32( %[[INS]], i64 0) + // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_f32,)(x0, x1, x2, x3); } -// CHECK-LABEL: @test_svdupq_n_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> undef, double [[X0:%.*]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[X1:%.*]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[TMP1]], i64 0) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[TMP2]], i64 0) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z17test_svdupq_n_f64dd( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <2 x double> undef, double [[X0:%.*]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <2 x double> [[TMP0]], double [[X1:%.*]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.experimental.vector.insert.nxv2f64.v2f64( undef, <2 x double> [[TMP1]], i64 0) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( [[TMP2]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svdupq_n_f64(float64_t x0, float64_t x1) { + // CHECK-LABEL: test_svdupq_n_f64 + // CHECK: %[[SVEC:.*]] = insertelement <2 x double> undef, double %x0, i32 0 + // CHECK: %[[VEC:.*]] = insertelement <2 x double> %[[SVEC]], double %x1, i32 1 + // CHECK-NOT: insertelement + // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv2f64.v2f64( undef, <2 x double> %[[VEC]], i64 0) + // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2f64( %[[INS]], i64 0) + // CHECK: ret %[[DUPQ]] return SVE_ACLE_FUNC(svdupq,_n,_f64,)(x0, x1); } -// CHECK-LABEL: @test_svdupq_n_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[X0:%.*]] to i8 -// CHECK-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[X1:%.*]] to i8 -// CHECK-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[X2:%.*]] to i8 -// CHECK-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[X3:%.*]] to i8 -// CHECK-NEXT: [[FROMBOOL4:%.*]] = zext i1 [[X4:%.*]] to i8 -// CHECK-NEXT: [[FROMBOOL5:%.*]] = zext i1 [[X5:%.*]] to i8 -// CHECK-NEXT: [[FROMBOOL6:%.*]] = zext i1 [[X6:%.*]] to i8 -// CHECK-NEXT: [[FROMBOOL7:%.*]] = zext i1 [[X7:%.*]] to i8 -// CHECK-NEXT: [[FROMBOOL8:%.*]] = zext i1 [[X8:%.*]] to i8 -// CHECK-NEXT: [[FROMBOOL9:%.*]] = zext i1 [[X9:%.*]] to i8 -// CHECK-NEXT: [[FROMBOOL10:%.*]] = zext i1 [[X10:%.*]] to i8 -// CHECK-NEXT: [[FROMBOOL11:%.*]] = zext i1 [[X11:%.*]] to i8 -// CHECK-NEXT: [[FROMBOOL12:%.*]] = zext i1 [[X12:%.*]] to i8 -// CHECK-NEXT: [[FROMBOOL13:%.*]] = zext i1 [[X13:%.*]] to i8 -// CHECK-NEXT: [[FROMBOOL14:%.*]] = zext i1 [[X14:%.*]] to i8 -// CHECK-NEXT: [[FROMBOOL15:%.*]] = zext i1 [[X15:%.*]] to i8 -// CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[FROMBOOL]], i32 0 -// CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[FROMBOOL1]], i32 1 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[FROMBOOL2]], i32 2 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[FROMBOOL3]], i32 3 -// CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[FROMBOOL4]], i32 4 -// CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[FROMBOOL5]], i32 5 -// CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[FROMBOOL6]], i32 6 -// CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[FROMBOOL7]], i32 7 -// CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[FROMBOOL8]], i32 8 -// CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[FROMBOOL9]], i32 9 -// CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[FROMBOOL10]], i32 10 -// CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[FROMBOOL11]], i32 11 -// CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[FROMBOOL12]], i32 12 -// CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[FROMBOOL13]], i32 13 -// CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[FROMBOOL14]], i32 14 -// CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[FROMBOOL15]], i32 15 -// CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) -// CHECK-NEXT: [[TMP17:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) -// CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP17]], i64 0) -// CHECK-NEXT: [[TMP19:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) -// CHECK-NEXT: [[TMP20:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[TMP16]], [[TMP18]], [[TMP19]]) -// CHECK-NEXT: ret [[TMP20]] -// -// CPP-CHECK-LABEL: @_Z16test_svdupq_n_b8bbbbbbbbbbbbbbbb( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[X0:%.*]] to i8 -// CPP-CHECK-NEXT: [[FROMBOOL1:%.*]] = zext i1 [[X1:%.*]] to i8 -// CPP-CHECK-NEXT: [[FROMBOOL2:%.*]] = zext i1 [[X2:%.*]] to i8 -// CPP-CHECK-NEXT: [[FROMBOOL3:%.*]] = zext i1 [[X3:%.*]] to i8 -// CPP-CHECK-NEXT: [[FROMBOOL4:%.*]] = zext i1 [[X4:%.*]] to i8 -// CPP-CHECK-NEXT: [[FROMBOOL5:%.*]] = zext i1 [[X5:%.*]] to i8 -// CPP-CHECK-NEXT: [[FROMBOOL6:%.*]] = zext i1 [[X6:%.*]] to i8 -// CPP-CHECK-NEXT: [[FROMBOOL7:%.*]] = zext i1 [[X7:%.*]] to i8 -// CPP-CHECK-NEXT: [[FROMBOOL8:%.*]] = zext i1 [[X8:%.*]] to i8 -// CPP-CHECK-NEXT: [[FROMBOOL9:%.*]] = zext i1 [[X9:%.*]] to i8 -// CPP-CHECK-NEXT: [[FROMBOOL10:%.*]] = zext i1 [[X10:%.*]] to i8 -// CPP-CHECK-NEXT: [[FROMBOOL11:%.*]] = zext i1 [[X11:%.*]] to i8 -// CPP-CHECK-NEXT: [[FROMBOOL12:%.*]] = zext i1 [[X12:%.*]] to i8 -// CPP-CHECK-NEXT: [[FROMBOOL13:%.*]] = zext i1 [[X13:%.*]] to i8 -// CPP-CHECK-NEXT: [[FROMBOOL14:%.*]] = zext i1 [[X14:%.*]] to i8 -// CPP-CHECK-NEXT: [[FROMBOOL15:%.*]] = zext i1 [[X15:%.*]] to i8 -// CPP-CHECK-NEXT: [[TMP0:%.*]] = insertelement <16 x i8> undef, i8 [[FROMBOOL]], i32 0 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = insertelement <16 x i8> [[TMP0]], i8 [[FROMBOOL1]], i32 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[FROMBOOL2]], i32 2 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <16 x i8> [[TMP2]], i8 [[FROMBOOL3]], i32 3 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <16 x i8> [[TMP3]], i8 [[FROMBOOL4]], i32 4 -// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <16 x i8> [[TMP4]], i8 [[FROMBOOL5]], i32 5 -// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <16 x i8> [[TMP5]], i8 [[FROMBOOL6]], i32 6 -// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <16 x i8> [[TMP6]], i8 [[FROMBOOL7]], i32 7 -// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <16 x i8> [[TMP7]], i8 [[FROMBOOL8]], i32 8 -// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <16 x i8> [[TMP8]], i8 [[FROMBOOL9]], i32 9 -// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <16 x i8> [[TMP9]], i8 [[FROMBOOL10]], i32 10 -// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <16 x i8> [[TMP10]], i8 [[FROMBOOL11]], i32 11 -// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <16 x i8> [[TMP11]], i8 [[FROMBOOL12]], i32 12 -// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <16 x i8> [[TMP12]], i8 [[FROMBOOL13]], i32 13 -// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <16 x i8> [[TMP13]], i8 [[FROMBOOL14]], i32 14 -// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <16 x i8> [[TMP14]], i8 [[FROMBOOL15]], i32 15 -// CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) -// CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> [[TMP15]], i64 0) -// CPP-CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( [[TMP17]], i64 0) -// CPP-CHECK-NEXT: [[TMP19:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) -// CPP-CHECK-NEXT: [[TMP20:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( [[TMP16]], [[TMP18]], [[TMP19]]) -// CPP-CHECK-NEXT: ret [[TMP20]] -// svbool_t test_svdupq_n_b8(bool x0, bool x1, bool x2, bool x3, bool x4, bool x5, bool x6, bool x7, bool x8, bool x9, bool x10, bool x11, bool x12, bool x13, bool x14, bool x15) { + // CHECK-LABEL: test_svdupq_n_b8 + // CHECK-DAG: %[[X0:.*]] = zext i1 %x0 to i8 + // CHECK-DAG: %[[X15:.*]] = zext i1 %x15 to i8 + // CHECK: insertelement <16 x i8> undef, i8 %[[X0]], i32 0 // + // CHECK: %[[VEC:.*]] = insertelement <16 x i8> %[[X:.*]], i8 %[[X15]], i32 15 + // CHECK-NOT: insertelement + // CHECK: %[[PTRUE:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) + // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv16i8.v16i8( undef, <16 x i8> %[[VEC]], i64 0) + // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv16i8( %[[INS]], i64 0) + // CHECK: %[[ZERO:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) + // CHECK: %[[CMP:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv16i8( %[[PTRUE]], %[[DUPQ]], %[[ZERO]]) + // CHECK: ret %[[CMP]] return SVE_ACLE_FUNC(svdupq,_n,_b8,)(x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15); } -// CHECK-LABEL: @test_svdupq_n_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i16 -// CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i16 -// CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[X2:%.*]] to i16 -// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[X3:%.*]] to i16 -// CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[X4:%.*]] to i16 -// CHECK-NEXT: [[TMP5:%.*]] = zext i1 [[X5:%.*]] to i16 -// CHECK-NEXT: [[TMP6:%.*]] = zext i1 [[X6:%.*]] to i16 -// CHECK-NEXT: [[TMP7:%.*]] = zext i1 [[X7:%.*]] to i16 -// CHECK-NEXT: [[TMP8:%.*]] = insertelement <8 x i16> undef, i16 [[TMP0]], i32 0 -// CHECK-NEXT: [[TMP9:%.*]] = insertelement <8 x i16> [[TMP8]], i16 [[TMP1]], i32 1 -// CHECK-NEXT: [[TMP10:%.*]] = insertelement <8 x i16> [[TMP9]], i16 [[TMP2]], i32 2 -// CHECK-NEXT: [[TMP11:%.*]] = insertelement <8 x i16> [[TMP10]], i16 [[TMP3]], i32 3 -// CHECK-NEXT: [[TMP12:%.*]] = insertelement <8 x i16> [[TMP11]], i16 [[TMP4]], i32 4 -// CHECK-NEXT: [[TMP13:%.*]] = insertelement <8 x i16> [[TMP12]], i16 [[TMP5]], i32 5 -// CHECK-NEXT: [[TMP14:%.*]] = insertelement <8 x i16> [[TMP13]], i16 [[TMP6]], i32 6 -// CHECK-NEXT: [[TMP15:%.*]] = insertelement <8 x i16> [[TMP14]], i16 [[TMP7]], i32 7 -// CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) -// CHECK-NEXT: [[TMP17:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP15]], i64 0) -// CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP17]], i64 0) -// CHECK-NEXT: [[TMP19:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) -// CHECK-NEXT: [[TMP20:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP16]], [[TMP18]], [[TMP19]]) -// CHECK-NEXT: [[TMP21:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP20]]) -// CHECK-NEXT: ret [[TMP21]] -// -// CPP-CHECK-LABEL: @_Z17test_svdupq_n_b16bbbbbbbb( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i16 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i16 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[X2:%.*]] to i16 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[X3:%.*]] to i16 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext i1 [[X4:%.*]] to i16 -// CPP-CHECK-NEXT: [[TMP5:%.*]] = zext i1 [[X5:%.*]] to i16 -// CPP-CHECK-NEXT: [[TMP6:%.*]] = zext i1 [[X6:%.*]] to i16 -// CPP-CHECK-NEXT: [[TMP7:%.*]] = zext i1 [[X7:%.*]] to i16 -// CPP-CHECK-NEXT: [[TMP8:%.*]] = insertelement <8 x i16> undef, i16 [[TMP0]], i32 0 -// CPP-CHECK-NEXT: [[TMP9:%.*]] = insertelement <8 x i16> [[TMP8]], i16 [[TMP1]], i32 1 -// CPP-CHECK-NEXT: [[TMP10:%.*]] = insertelement <8 x i16> [[TMP9]], i16 [[TMP2]], i32 2 -// CPP-CHECK-NEXT: [[TMP11:%.*]] = insertelement <8 x i16> [[TMP10]], i16 [[TMP3]], i32 3 -// CPP-CHECK-NEXT: [[TMP12:%.*]] = insertelement <8 x i16> [[TMP11]], i16 [[TMP4]], i32 4 -// CPP-CHECK-NEXT: [[TMP13:%.*]] = insertelement <8 x i16> [[TMP12]], i16 [[TMP5]], i32 5 -// CPP-CHECK-NEXT: [[TMP14:%.*]] = insertelement <8 x i16> [[TMP13]], i16 [[TMP6]], i32 6 -// CPP-CHECK-NEXT: [[TMP15:%.*]] = insertelement <8 x i16> [[TMP14]], i16 [[TMP7]], i32 7 -// CPP-CHECK-NEXT: [[TMP16:%.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) -// CPP-CHECK-NEXT: [[TMP17:%.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> [[TMP15]], i64 0) -// CPP-CHECK-NEXT: [[TMP18:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( [[TMP17]], i64 0) -// CPP-CHECK-NEXT: [[TMP19:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) -// CPP-CHECK-NEXT: [[TMP20:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( [[TMP16]], [[TMP18]], [[TMP19]]) -// CPP-CHECK-NEXT: [[TMP21:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP20]]) -// CPP-CHECK-NEXT: ret [[TMP21]] -// svbool_t test_svdupq_n_b16(bool x0, bool x1, bool x2, bool x3, bool x4, bool x5, bool x6, bool x7) { + // CHECK-LABEL: test_svdupq_n_b16 + // CHECK-DAG: %[[X0:.*]] = zext i1 %x0 to i16 + // CHECK-DAG: %[[X7:.*]] = zext i1 %x7 to i16 + // CHECK: insertelement <8 x i16> undef, i16 %[[X0]], i32 0 // + // CHECK: %[[VEC:.*]] = insertelement <8 x i16> %[[X:.*]], i16 %[[X7]], i32 7 + // CHECK-NOT: insertelement + // CHECK: %[[PTRUE:.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) + // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv8i16.v8i16( undef, <8 x i16> %[[VEC]], i64 0) + // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv8i16( %[[INS]], i64 0) + // CHECK: %[[ZERO:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) + // CHECK: %[[CMP:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv8i16( %[[PTRUE]], %[[DUPQ]], %[[ZERO]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[CMP]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svdupq,_n,_b16,)(x0, x1, x2, x3, x4, x5, x6, x7); } -// CHECK-LABEL: @test_svdupq_n_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i32 -// CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i32 -// CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[X2:%.*]] to i32 -// CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[X3:%.*]] to i32 -// CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> undef, i32 [[TMP0]], i32 0 -// CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> [[TMP4]], i32 [[TMP1]], i32 1 -// CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP2]], i32 2 -// CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP3]], i32 3 -// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) -// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP7]], i64 0) -// CHECK-NEXT: [[TMP10:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP9]], i64 0) -// CHECK-NEXT: [[TMP11:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) -// CHECK-NEXT: [[TMP12:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP8]], [[TMP10]], [[TMP11]]) -// CHECK-NEXT: [[TMP13:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP12]]) -// CHECK-NEXT: ret [[TMP13]] -// -// CPP-CHECK-LABEL: @_Z17test_svdupq_n_b32bbbb( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i32 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i32 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext i1 [[X2:%.*]] to i32 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext i1 [[X3:%.*]] to i32 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = insertelement <4 x i32> undef, i32 [[TMP0]], i32 0 -// CPP-CHECK-NEXT: [[TMP5:%.*]] = insertelement <4 x i32> [[TMP4]], i32 [[TMP1]], i32 1 -// CPP-CHECK-NEXT: [[TMP6:%.*]] = insertelement <4 x i32> [[TMP5]], i32 [[TMP2]], i32 2 -// CPP-CHECK-NEXT: [[TMP7:%.*]] = insertelement <4 x i32> [[TMP6]], i32 [[TMP3]], i32 3 -// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) -// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> [[TMP7]], i64 0) -// CPP-CHECK-NEXT: [[TMP10:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( [[TMP9]], i64 0) -// CPP-CHECK-NEXT: [[TMP11:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) -// CPP-CHECK-NEXT: [[TMP12:%.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( [[TMP8]], [[TMP10]], [[TMP11]]) -// CPP-CHECK-NEXT: [[TMP13:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP12]]) -// CPP-CHECK-NEXT: ret [[TMP13]] -// svbool_t test_svdupq_n_b32(bool x0, bool x1, bool x2, bool x3) { + // CHECK-LABEL: test_svdupq_n_b32 + // CHECK-DAG: %[[X0:.*]] = zext i1 %x0 to i32 + // CHECK-DAG: %[[X3:.*]] = zext i1 %x3 to i32 + // CHECK: insertelement <4 x i32> undef, i32 %[[X0]], i32 0 // + // CHECK: %[[VEC:.*]] = insertelement <4 x i32> %[[X:.*]], i32 %[[X3]], i32 3 + // CHECK-NOT: insertelement + // CHECK: %[[PTRUE:.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) + // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv4i32.v4i32( undef, <4 x i32> %[[VEC]], i64 0) + // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv4i32( %[[INS]], i64 0) + // CHECK: %[[ZERO:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) + // CHECK: %[[CMP:.*]] = call @llvm.aarch64.sve.cmpne.wide.nxv4i32( %[[PTRUE]], %[[DUPQ]], %[[ZERO]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[CMP]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svdupq,_n,_b32,)(x0, x1, x2, x3); } -// CHECK-LABEL: @test_svdupq_n_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i64 -// CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i64 -// CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i64> undef, i64 [[TMP0]], i32 0 -// CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i64> [[TMP2]], i64 [[TMP1]], i32 1 -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP3]], i64 0) -// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP5]], i64 0) -// CHECK-NEXT: [[TMP7:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) -// CHECK-NEXT: [[TMP8:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP4]], [[TMP6]], [[TMP7]]) -// CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP8]]) -// CHECK-NEXT: ret [[TMP9]] -// -// CPP-CHECK-LABEL: @_Z17test_svdupq_n_b64bb( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = zext i1 [[X0:%.*]] to i64 -// CPP-CHECK-NEXT: [[TMP1:%.*]] = zext i1 [[X1:%.*]] to i64 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = insertelement <2 x i64> undef, i64 [[TMP0]], i32 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = insertelement <2 x i64> [[TMP2]], i64 [[TMP1]], i32 1 -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> [[TMP3]], i64 0) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( [[TMP5]], i64 0) -// CPP-CHECK-NEXT: [[TMP7:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) -// CPP-CHECK-NEXT: [[TMP8:%.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( [[TMP4]], [[TMP6]], [[TMP7]]) -// CPP-CHECK-NEXT: [[TMP9:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP8]]) -// CPP-CHECK-NEXT: ret [[TMP9]] -// svbool_t test_svdupq_n_b64(bool x0, bool x1) { + // CHECK-LABEL: test_svdupq_n_b64 + // CHECK-DAG: %[[X0:.*]] = zext i1 %x0 to i64 + // CHECK-DAG: %[[X1:.*]] = zext i1 %x1 to i64 + // CHECK: %[[SVEC:.*]] = insertelement <2 x i64> undef, i64 %[[X0]], i32 0 + // CHECK: %[[VEC:.*]] = insertelement <2 x i64> %[[SVEC]], i64 %[[X1]], i32 1 + // CHECK-NOT: insertelement + // CHECK: %[[PTRUE:.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) + // CHECK: %[[INS:.*]] = call @llvm.experimental.vector.insert.nxv2i64.v2i64( undef, <2 x i64> %[[VEC]], i64 0) + // CHECK: %[[DUPQ:.*]] = call @llvm.aarch64.sve.dupq.lane.nxv2i64( %[[INS]], i64 0) + // CHECK: %[[ZERO:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 0) + // CHECK: %[[CMP:.*]] = call @llvm.aarch64.sve.cmpne.nxv2i64( %[[PTRUE]], %[[DUPQ]], %[[ZERO]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[CMP]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svdupq,_n,_b64,)(x0, x1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c index 66704fbdcec3..37c5a93ca4e0 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eor.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,889 +13,469 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_sveor_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_sveor_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_sveor_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_sveor_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_sveor_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_sveor_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_sveor_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_sveor_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_sveor_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_sveor_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_sveor_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_sveor_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_sveor_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_sveor_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_sveor_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_sveor_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_sveor_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_sveor_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_sveor_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_sveor_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_sveor_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_sveor_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_sveor_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_sveor_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_sveor_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_sveor_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_sveor_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_sveor_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_sveor_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_sveor_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_sveor_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_sveor_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_sveor_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_sveor_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_sveor_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_sveor_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_sveor_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_sveor_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_sveor_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_sveor_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_sveor_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_sveor_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_sveor_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_sveor_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_sveor_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_sveor_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_sveor_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_sveor_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_sveor_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_sveor_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_sveor_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_sveor_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_sveor_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_sveor_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_sveor_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_sveor_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_sveor_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_sveor_n_s8_z + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_sveor_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_sveor_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_sveor_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_sveor_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_sveor_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_sveor_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_sveor_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_sveor_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_sveor_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_sveor_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_sveor_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_sveor_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_sveor_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_sveor_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_sveor_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_sveor_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_sveor_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_sveor_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_sveor_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_sveor_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_sveor_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_sveor_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_sveor_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_sveor_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_sveor_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_sveor_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_sveor_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_sveor_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_sveor_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_sveor_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_sveor_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_sveor_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_sveor_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_sveor_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_sveor_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_sveor_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_sveor_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_sveor_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_sveor_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_sveor_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_sveor_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_sveor_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_sveor_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_sveor_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_sveor_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_sveor_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_sveor_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_sveor_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_sveor_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_sveor_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_sveor_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_sveor_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_sveor_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_sveor_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_sveor_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_sveor_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_sveor_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_sveor_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_sveor_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_sveor_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_sveor_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_sveor_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_sveor_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_sveor_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_sveor_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_sveor_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_sveor_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.eor.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_sveor_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_sveor_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_n_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_sveor_b_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_sveor_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_sveor_b_z(svbool_t pg, svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_sveor_b_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.z.nxv16i1( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(sveor,_b,_z,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eorv.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eorv.c index c2d9f658d75e..a6fedfc48f5b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eorv.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_eorv.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,134 +13,72 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_sveorv_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.eorv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i8 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_sveorv_s8u10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.eorv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i8 [[TMP0]] -// int8_t test_sveorv_s8(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_sveorv_s8 + // CHECK: %[[INTRINSIC:.*]] = call i8 @llvm.aarch64.sve.eorv.nxv16i8( %pg, %op) + // CHECK: ret i8 %[[INTRINSIC]] return SVE_ACLE_FUNC(sveorv,_s8,,)(pg, op); } -// CHECK-LABEL: @test_sveorv_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.eorv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i16 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_sveorv_s16u10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.eorv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i16 [[TMP1]] -// int16_t test_sveorv_s16(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_sveorv_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i16 @llvm.aarch64.sve.eorv.nxv8i16( %[[PG]], %op) + // CHECK: ret i16 %[[INTRINSIC]] return SVE_ACLE_FUNC(sveorv,_s16,,)(pg, op); } -// CHECK-LABEL: @test_sveorv_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.eorv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_sveorv_s32u10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.eorv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// int32_t test_sveorv_s32(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_sveorv_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.eorv.nxv4i32( %[[PG]], %op) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(sveorv,_s32,,)(pg, op); } -// CHECK-LABEL: @test_sveorv_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.eorv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_sveorv_s64u10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.eorv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// int64_t test_sveorv_s64(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_sveorv_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.eorv.nxv2i64( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(sveorv,_s64,,)(pg, op); } -// CHECK-LABEL: @test_sveorv_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.eorv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i8 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_sveorv_u8u10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.eorv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i8 [[TMP0]] -// uint8_t test_sveorv_u8(svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_sveorv_u8 + // CHECK: %[[INTRINSIC:.*]] = call i8 @llvm.aarch64.sve.eorv.nxv16i8( %pg, %op) + // CHECK: ret i8 %[[INTRINSIC]] return SVE_ACLE_FUNC(sveorv,_u8,,)(pg, op); } -// CHECK-LABEL: @test_sveorv_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.eorv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i16 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_sveorv_u16u10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.eorv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i16 [[TMP1]] -// uint16_t test_sveorv_u16(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_sveorv_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i16 @llvm.aarch64.sve.eorv.nxv8i16( %[[PG]], %op) + // CHECK: ret i16 %[[INTRINSIC]] return SVE_ACLE_FUNC(sveorv,_u16,,)(pg, op); } -// CHECK-LABEL: @test_sveorv_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.eorv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_sveorv_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.eorv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// uint32_t test_sveorv_u32(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_sveorv_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.eorv.nxv4i32( %[[PG]], %op) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(sveorv,_u32,,)(pg, op); } -// CHECK-LABEL: @test_sveorv_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.eorv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_sveorv_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.eorv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_sveorv_u64(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_sveorv_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.eorv.nxv2i64( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(sveorv,_u64,,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_expa.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_expa.c index bb43fe46cc7d..946c8feb5132 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_expa.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_expa.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,47 +13,26 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svexpa_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fexpa.x.nxv8f16( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svexpa_f16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fexpa.x.nxv8f16( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svexpa_f16(svuint16_t op) { + // CHECK-LABEL: test_svexpa_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fexpa.x.nxv8f16( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svexpa,_f16,,)(op); } -// CHECK-LABEL: @test_svexpa_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fexpa.x.nxv4f32( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svexpa_f32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fexpa.x.nxv4f32( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svexpa_f32(svuint32_t op) { + // CHECK-LABEL: test_svexpa_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fexpa.x.nxv4f32( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svexpa,_f32,,)(op); } -// CHECK-LABEL: @test_svexpa_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fexpa.x.nxv2f64( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svexpa_f64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fexpa.x.nxv2f64( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svexpa_f64(svuint64_t op) { + // CHECK-LABEL: test_svexpa_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fexpa.x.nxv2f64( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svexpa,_f64,,)(op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c index 7612697ce9a0..94efa175f8f4 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext-bfloat.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,18 +13,11 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svext_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]], i32 127) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svext_bf16u14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]], i32 127) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svext_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svext_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ext.nxv8bf16( %op1, %op2, i32 127) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svext_bf16'}} return SVE_ACLE_FUNC(svext,_bf16,,)(op1, op2, 127); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext.c index 170ab7f53bc3..b4bfd4c87515 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ext.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,227 +13,122 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svext_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svext_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svext_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svext_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ext.nxv16i8( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svext,_s8,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svext_s8_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 255) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svext_s8_1u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 255) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svext_s8_1(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svext_s8_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ext.nxv16i8( %op1, %op2, i32 255) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svext,_s8,,)(op1, op2, 255); } -// CHECK-LABEL: @test_svext_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svext_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svext_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svext_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ext.nxv8i16( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svext,_s16,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svext_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 127) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svext_s16_1u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 127) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svext_s16_1(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svext_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ext.nxv8i16( %op1, %op2, i32 127) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svext,_s16,,)(op1, op2, 127); } -// CHECK-LABEL: @test_svext_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svext_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svext_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svext_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ext.nxv4i32( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svext,_s32,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svext_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 63) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svext_s32_1u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 63) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svext_s32_1(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svext_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ext.nxv4i32( %op1, %op2, i32 63) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svext,_s32,,)(op1, op2, 63); } -// CHECK-LABEL: @test_svext_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svext_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svext_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svext_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ext.nxv2i64( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svext,_s64,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svext_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 31) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svext_s64_1u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 31) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svext_s64_1(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svext_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ext.nxv2i64( %op1, %op2, i32 31) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svext,_s64,,)(op1, op2, 31); } -// CHECK-LABEL: @test_svext_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 255) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svext_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 255) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svext_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svext_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ext.nxv16i8( %op1, %op2, i32 255) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svext,_u8,,)(op1, op2, 255); } -// CHECK-LABEL: @test_svext_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 127) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svext_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 127) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svext_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svext_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ext.nxv8i16( %op1, %op2, i32 127) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svext,_u16,,)(op1, op2, 127); } -// CHECK-LABEL: @test_svext_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 63) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svext_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 63) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svext_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svext_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ext.nxv4i32( %op1, %op2, i32 63) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svext,_u32,,)(op1, op2, 63); } -// CHECK-LABEL: @test_svext_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 31) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svext_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 31) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svext_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svext_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ext.nxv2i64( %op1, %op2, i32 31) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svext,_u64,,)(op1, op2, 31); } -// CHECK-LABEL: @test_svext_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 127) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svext_f16u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 127) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svext_f16(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svext_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ext.nxv8f16( %op1, %op2, i32 127) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svext,_f16,,)(op1, op2, 127); } -// CHECK-LABEL: @test_svext_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 63) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svext_f32u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 63) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svext_f32(svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svext_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ext.nxv4f32( %op1, %op2, i32 63) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svext,_f32,,)(op1, op2, 63); } -// CHECK-LABEL: @test_svext_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 31) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svext_f64u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ext.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 31) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svext_f64(svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svext_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ext.nxv2f64( %op1, %op2, i32 31) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svext,_f64,,)(op1, op2, 31); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extb.c index 890469e8afe0..b9dea71280fd 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extb.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,308 +13,164 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svextb_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextb_s16_zu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svextb_s16_z(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svextb_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sxtb.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextb,_s16,_z,)(pg, op); } -// CHECK-LABEL: @test_svextb_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextb_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svextb_s32_z(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svextb_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sxtb.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextb,_s32,_z,)(pg, op); } -// CHECK-LABEL: @test_svextb_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextb_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svextb_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svextb_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sxtb.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextb,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svextb_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextb_u16_zu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svextb_u16_z(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svextb_u16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uxtb.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextb,_u16,_z,)(pg, op); } -// CHECK-LABEL: @test_svextb_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextb_u32_zu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svextb_u32_z(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svextb_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uxtb.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextb,_u32,_z,)(pg, op); } -// CHECK-LABEL: @test_svextb_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextb_u64_zu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svextb_u64_z(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svextb_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uxtb.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextb,_u64,_z,)(pg, op); } -// CHECK-LABEL: @test_svextb_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextb_s16_mu11__SVInt16_tu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svextb_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svextb_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sxtb.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextb,_s16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svextb_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextb_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svextb_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svextb_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sxtb.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextb,_s32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svextb_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextb_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svextb_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svextb_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sxtb.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextb,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svextb_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextb_u16_mu12__SVUint16_tu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svextb_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svextb_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uxtb.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextb,_u16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svextb_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextb_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svextb_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svextb_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uxtb.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextb,_u32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svextb_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextb_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svextb_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svextb_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uxtb.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextb,_u64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svextb_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextb_s16_xu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svextb_s16_x(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svextb_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sxtb.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextb,_s16,_x,)(pg, op); } -// CHECK-LABEL: @test_svextb_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextb_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svextb_s32_x(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svextb_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sxtb.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextb,_s32,_x,)(pg, op); } -// CHECK-LABEL: @test_svextb_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextb_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svextb_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svextb_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sxtb.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextb,_s64,_x,)(pg, op); } -// CHECK-LABEL: @test_svextb_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextb_u16_xu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svextb_u16_x(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svextb_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uxtb.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextb,_u16,_x,)(pg, op); } -// CHECK-LABEL: @test_svextb_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextb_u32_xu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svextb_u32_x(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svextb_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uxtb.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextb,_u32,_x,)(pg, op); } -// CHECK-LABEL: @test_svextb_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextb_u64_xu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svextb_u64_x(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svextb_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uxtb.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextb,_u64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_exth.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_exth.c index 00bb66679c0a..09a2de0c29da 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_exth.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_exth.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,206 +13,110 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svexth_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svexth_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svexth_s32_z(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svexth_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sxth.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svexth,_s32,_z,)(pg, op); } -// CHECK-LABEL: @test_svexth_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svexth_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svexth_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svexth_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sxth.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svexth,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svexth_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svexth_u32_zu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svexth_u32_z(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svexth_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uxth.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svexth,_u32,_z,)(pg, op); } -// CHECK-LABEL: @test_svexth_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svexth_u64_zu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svexth_u64_z(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svexth_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uxth.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svexth,_u64,_z,)(pg, op); } -// CHECK-LABEL: @test_svexth_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svexth_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svexth_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svexth_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sxth.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svexth,_s32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svexth_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svexth_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svexth_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svexth_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sxth.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svexth,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svexth_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svexth_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svexth_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svexth_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uxth.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svexth,_u32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svexth_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svexth_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svexth_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svexth_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uxth.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svexth,_u64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svexth_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svexth_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svexth_s32_x(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svexth_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sxth.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svexth,_s32,_x,)(pg, op); } -// CHECK-LABEL: @test_svexth_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svexth_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxth.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svexth_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svexth_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sxth.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svexth,_s64,_x,)(pg, op); } -// CHECK-LABEL: @test_svexth_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svexth_u32_xu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svexth_u32_x(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svexth_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uxth.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svexth,_u32,_x,)(pg, op); } -// CHECK-LABEL: @test_svexth_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svexth_u64_xu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxth.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svexth_u64_x(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svexth_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uxth.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svexth,_u64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extw.c index cebc35e36dae..4dd352568131 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_extw.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,104 +13,56 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svextw_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextw_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svextw_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svextw_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sxtw.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextw,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svextw_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextw_u64_zu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svextw_u64_z(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svextw_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uxtw.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextw,_u64,_z,)(pg, op); } -// CHECK-LABEL: @test_svextw_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextw_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svextw_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svextw_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sxtw.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextw,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svextw_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextw_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svextw_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svextw_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uxtw.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextw,_u64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svextw_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextw_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sxtw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svextw_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svextw_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sxtw.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextw,_s64,_x,)(pg, op); } -// CHECK-LABEL: @test_svextw_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svextw_u64_xu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uxtw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svextw_u64_x(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svextw_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uxtw.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svextw,_u64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c index 2a2327ddf6b4..0c8a8ad19ecc 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,34 +13,20 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svget2_bf16_0( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[TUPLE:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svget2_bf16_014svbfloat16x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[TUPLE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svget2_bf16_0(svbfloat16x2_t tuple) { + // CHECK-LABEL: test_svget2_bf16_0 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( %tuple, i32 0) + // CHECK-NEXT: ret %[[EXT]] // expected-warning@+1 {{implicit declaration of function 'svget2_bf16'}} return SVE_ACLE_FUNC(svget2,_bf16,,)(tuple, 0); } -// CHECK-LABEL: @test_svget2_bf16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[TUPLE:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svget2_bf16_114svbfloat16x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[TUPLE:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svget2_bf16_1(svbfloat16x2_t tuple) { + // CHECK-LABEL: test_svget2_bf16_1 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( %tuple, i32 1) + // CHECK-NEXT: ret %[[EXT]] // expected-warning@+1 {{implicit declaration of function 'svget2_bf16'}} return SVE_ACLE_FUNC(svget2,_bf16,,)(tuple, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2.c index d9d013e13390..55e85bc06e3b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get2.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,167 +13,90 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svget2_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[TUPLE:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svget2_s810svint8x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[TUPLE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svget2_s8(svint8x2_t tuple) { + // CHECK-LABEL: test_svget2_s8 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( %tuple, i32 0) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget2,_s8,,)(tuple, 0); } -// CHECK-LABEL: @test_svget2_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[TUPLE:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget2_s1611svint16x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[TUPLE:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svget2_s16(svint16x2_t tuple) { + // CHECK-LABEL: test_svget2_s16 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( %tuple, i32 1) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget2,_s16,,)(tuple, 1); } -// CHECK-LABEL: @test_svget2_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[TUPLE:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget2_s3211svint32x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[TUPLE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svget2_s32(svint32x2_t tuple) { + // CHECK-LABEL: test_svget2_s32 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( %tuple, i32 0) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget2,_s32,,)(tuple, 0); } -// CHECK-LABEL: @test_svget2_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[TUPLE:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget2_s6411svint64x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[TUPLE:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svget2_s64(svint64x2_t tuple) { + // CHECK-LABEL: test_svget2_s64 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( %tuple, i32 1) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget2,_s64,,)(tuple, 1); } -// CHECK-LABEL: @test_svget2_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[TUPLE:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svget2_u811svuint8x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[TUPLE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svget2_u8(svuint8x2_t tuple) { + // CHECK-LABEL: test_svget2_u8 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( %tuple, i32 0) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget2,_u8,,)(tuple, 0); } -// CHECK-LABEL: @test_svget2_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[TUPLE:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget2_u1612svuint16x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[TUPLE:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svget2_u16(svuint16x2_t tuple) { + // CHECK-LABEL: test_svget2_u16 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( %tuple, i32 1) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget2,_u16,,)(tuple, 1); } -// CHECK-LABEL: @test_svget2_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[TUPLE:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget2_u3212svuint32x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[TUPLE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svget2_u32(svuint32x2_t tuple) { + // CHECK-LABEL: test_svget2_u32 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( %tuple, i32 0) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget2,_u32,,)(tuple, 0); } -// CHECK-LABEL: @test_svget2_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[TUPLE:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget2_u6412svuint64x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[TUPLE:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svget2_u64(svuint64x2_t tuple) { + // CHECK-LABEL: test_svget2_u64 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( %tuple, i32 1) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget2,_u64,,)(tuple, 1); } -// CHECK-LABEL: @test_svget2_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[TUPLE:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget2_f1613svfloat16x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[TUPLE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svget2_f16(svfloat16x2_t tuple) { + // CHECK-LABEL: test_svget2_f16 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( %tuple, i32 0) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget2,_f16,,)(tuple, 0); } -// CHECK-LABEL: @test_svget2_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[TUPLE:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget2_f3213svfloat32x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[TUPLE:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svget2_f32(svfloat32x2_t tuple) { + // CHECK-LABEL: test_svget2_f32 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( %tuple, i32 1) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget2,_f32,,)(tuple, 1); } -// CHECK-LABEL: @test_svget2_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[TUPLE:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget2_f6413svfloat64x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[TUPLE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svget2_f64(svfloat64x2_t tuple) { + // CHECK-LABEL: test_svget2_f64 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( %tuple, i32 0) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget2,_f64,,)(tuple, 0); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c index cffcce28e422..c4efd621a336 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,50 +13,29 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svget3_bf16_0( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[TUPLE:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svget3_bf16_014svbfloat16x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[TUPLE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svget3_bf16_0(svbfloat16x3_t tuple) { + // CHECK-LABEL: test_svget3_bf16_0 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( %tuple, i32 0) + // CHECK-NEXT: ret %[[EXT]] // expected-warning@+1 {{implicit declaration of function 'svget3_bf16'}} return SVE_ACLE_FUNC(svget3,_bf16,,)(tuple, 0); } -// CHECK-LABEL: @test_svget3_bf16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[TUPLE:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svget3_bf16_114svbfloat16x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[TUPLE:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svget3_bf16_1(svbfloat16x3_t tuple) { + // CHECK-LABEL: test_svget3_bf16_1 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( %tuple, i32 1) + // CHECK-NEXT: ret %[[EXT]] // expected-warning@+1 {{implicit declaration of function 'svget3_bf16'}} return SVE_ACLE_FUNC(svget3,_bf16,,)(tuple, 1); } -// CHECK-LABEL: @test_svget3_bf16_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[TUPLE:%.*]], i32 2) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svget3_bf16_214svbfloat16x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[TUPLE:%.*]], i32 2) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svget3_bf16_2(svbfloat16x3_t tuple) { + // CHECK-LABEL: test_svget3_bf16_2 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( %tuple, i32 2) + // CHECK-NEXT: ret %[[EXT]] // expected-warning@+1 {{implicit declaration of function 'svget3_bf16'}} return SVE_ACLE_FUNC(svget3,_bf16,,)(tuple, 2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3.c index a1f26d973276..e4c2315c2cc2 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get3.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,167 +13,90 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svget3_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[TUPLE:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svget3_s810svint8x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[TUPLE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svget3_s8(svint8x3_t tuple) { + // CHECK-LABEL: test_svget3_s8 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( %tuple, i32 0) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget3,_s8,,)(tuple, 0); } -// CHECK-LABEL: @test_svget3_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[TUPLE:%.*]], i32 2) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget3_s1611svint16x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[TUPLE:%.*]], i32 2) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svget3_s16(svint16x3_t tuple) { + // CHECK-LABEL: test_svget3_s16 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( %tuple, i32 2) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget3,_s16,,)(tuple, 2); } -// CHECK-LABEL: @test_svget3_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[TUPLE:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget3_s3211svint32x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[TUPLE:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svget3_s32(svint32x3_t tuple) { + // CHECK-LABEL: test_svget3_s32 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( %tuple, i32 1) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget3,_s32,,)(tuple, 1); } -// CHECK-LABEL: @test_svget3_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[TUPLE:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget3_s6411svint64x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[TUPLE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svget3_s64(svint64x3_t tuple) { + // CHECK-LABEL: test_svget3_s64 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( %tuple, i32 0) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget3,_s64,,)(tuple, 0); } -// CHECK-LABEL: @test_svget3_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[TUPLE:%.*]], i32 2) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svget3_u811svuint8x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[TUPLE:%.*]], i32 2) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svget3_u8(svuint8x3_t tuple) { + // CHECK-LABEL: test_svget3_u8 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( %tuple, i32 2) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget3,_u8,,)(tuple, 2); } -// CHECK-LABEL: @test_svget3_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[TUPLE:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget3_u1612svuint16x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[TUPLE:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svget3_u16(svuint16x3_t tuple) { + // CHECK-LABEL: test_svget3_u16 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( %tuple, i32 1) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget3,_u16,,)(tuple, 1); } -// CHECK-LABEL: @test_svget3_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[TUPLE:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget3_u3212svuint32x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[TUPLE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svget3_u32(svuint32x3_t tuple) { + // CHECK-LABEL: test_svget3_u32 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( %tuple, i32 0) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget3,_u32,,)(tuple, 0); } -// CHECK-LABEL: @test_svget3_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[TUPLE:%.*]], i32 2) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget3_u6412svuint64x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[TUPLE:%.*]], i32 2) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svget3_u64(svuint64x3_t tuple) { + // CHECK-LABEL: test_svget3_u64 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( %tuple, i32 2) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget3,_u64,,)(tuple, 2); } -// CHECK-LABEL: @test_svget3_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[TUPLE:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget3_f1613svfloat16x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[TUPLE:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svget3_f16(svfloat16x3_t tuple) { + // CHECK-LABEL: test_svget3_f16 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( %tuple, i32 1) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget3,_f16,,)(tuple, 1); } -// CHECK-LABEL: @test_svget3_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[TUPLE:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget3_f3213svfloat32x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[TUPLE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svget3_f32(svfloat32x3_t tuple) { + // CHECK-LABEL: test_svget3_f32 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( %tuple, i32 0) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget3,_f32,,)(tuple, 0); } -// CHECK-LABEL: @test_svget3_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[TUPLE:%.*]], i32 2) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget3_f6413svfloat64x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[TUPLE:%.*]], i32 2) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svget3_f64(svfloat64x3_t tuple) { + // CHECK-LABEL: test_svget3_f64 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( %tuple, i32 2) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget3,_f64,,)(tuple, 2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c index 95b4600d3718..b14583058382 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,66 +13,38 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svget4_bf16_0( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svget4_bf16_014svbfloat16x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svget4_bf16_0(svbfloat16x4_t tuple) { + // CHECK-LABEL: test_svget4_bf16_0 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( %tuple, i32 0) + // CHECK-NEXT: ret %[[EXT]] // expected-warning@+1 {{implicit declaration of function 'svget4_bf16'}} return SVE_ACLE_FUNC(svget4,_bf16,,)(tuple, 0); } -// CHECK-LABEL: @test_svget4_bf16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svget4_bf16_114svbfloat16x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svget4_bf16_1(svbfloat16x4_t tuple) { + // CHECK-LABEL: test_svget4_bf16_1 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( %tuple, i32 1) + // CHECK-NEXT: ret %[[EXT]] // expected-warning@+1 {{implicit declaration of function 'svget4_bf16'}} return SVE_ACLE_FUNC(svget4,_bf16,,)(tuple, 1); } -// CHECK-LABEL: @test_svget4_bf16_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 2) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svget4_bf16_214svbfloat16x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 2) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svget4_bf16_2(svbfloat16x4_t tuple) { + // CHECK-LABEL: test_svget4_bf16_2 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( %tuple, i32 2) + // CHECK-NEXT: ret %[[EXT]] // expected-warning@+1 {{implicit declaration of function 'svget4_bf16'}} return SVE_ACLE_FUNC(svget4,_bf16,,)(tuple, 2); } -// CHECK-LABEL: @test_svget4_bf16_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svget4_bf16_314svbfloat16x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[TUPLE:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svget4_bf16_3(svbfloat16x4_t tuple) { + // CHECK-LABEL: test_svget4_bf16_3 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( %tuple, i32 3) + // CHECK-NEXT: ret %[[EXT]] // expected-warning@+1 {{implicit declaration of function 'svget4_bf16'}} return SVE_ACLE_FUNC(svget4,_bf16,,)(tuple, 3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4.c index 76c39645a67e..00094d746568 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_get4.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -16,167 +15,90 @@ // NOTE: For these tests clang converts the struct parameter into // several parameters, one for each member of the original struct. -// CHECK-LABEL: @test_svget4_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[TUPLE:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svget4_s810svint8x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[TUPLE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svget4_s8(svint8x4_t tuple) { + // CHECK-LABEL: test_svget4_s8 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( %tuple, i32 0) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget4,_s8,,)(tuple, 0); } -// CHECK-LABEL: @test_svget4_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[TUPLE:%.*]], i32 2) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget4_s1611svint16x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[TUPLE:%.*]], i32 2) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svget4_s16(svint16x4_t tuple) { + // CHECK-LABEL: test_svget4_s16 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( %tuple, i32 2) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget4,_s16,,)(tuple, 2); } -// CHECK-LABEL: @test_svget4_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[TUPLE:%.*]], i32 2) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget4_s3211svint32x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[TUPLE:%.*]], i32 2) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svget4_s32(svint32x4_t tuple) { + // CHECK-LABEL: test_svget4_s32 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( %tuple, i32 2) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget4,_s32,,)(tuple, 2); } -// CHECK-LABEL: @test_svget4_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[TUPLE:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget4_s6411svint64x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[TUPLE:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svget4_s64(svint64x4_t tuple) { + // CHECK-LABEL: test_svget4_s64 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( %tuple, i32 3) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget4,_s64,,)(tuple, 3); } -// CHECK-LABEL: @test_svget4_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[TUPLE:%.*]], i32 2) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svget4_u811svuint8x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[TUPLE:%.*]], i32 2) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svget4_u8(svuint8x4_t tuple) { + // CHECK-LABEL: test_svget4_u8 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( %tuple, i32 2) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget4,_u8,,)(tuple, 2); } -// CHECK-LABEL: @test_svget4_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[TUPLE:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget4_u1612svuint16x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[TUPLE:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svget4_u16(svuint16x4_t tuple) { + // CHECK-LABEL: test_svget4_u16 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( %tuple, i32 3) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget4,_u16,,)(tuple, 3); } -// CHECK-LABEL: @test_svget4_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[TUPLE:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget4_u3212svuint32x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[TUPLE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svget4_u32(svuint32x4_t tuple) { + // CHECK-LABEL: test_svget4_u32 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( %tuple, i32 0) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget4,_u32,,)(tuple, 0); } -// CHECK-LABEL: @test_svget4_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[TUPLE:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget4_u6412svuint64x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[TUPLE:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svget4_u64(svuint64x4_t tuple) { + // CHECK-LABEL: test_svget4_u64 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( %tuple, i32 3) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget4,_u64,,)(tuple, 3); } -// CHECK-LABEL: @test_svget4_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[TUPLE:%.*]], i32 2) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget4_f1613svfloat16x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[TUPLE:%.*]], i32 2) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svget4_f16(svfloat16x4_t tuple) { + // CHECK-LABEL: test_svget4_f16 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( %tuple, i32 2) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget4,_f16,,)(tuple, 2); } -// CHECK-LABEL: @test_svget4_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[TUPLE:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget4_f3213svfloat32x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[TUPLE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svget4_f32(svfloat32x4_t tuple) { + // CHECK-LABEL: test_svget4_f32 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( %tuple, i32 0) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget4,_f32,,)(tuple, 0); } -// CHECK-LABEL: @test_svget4_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[TUPLE:%.*]], i32 2) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svget4_f6413svfloat64x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[TUPLE:%.*]], i32 2) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svget4_f64(svfloat64x4_t tuple) { + // CHECK-LABEL: test_svget4_f64 + // CHECK: %[[EXT:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( %tuple, i32 2) + // CHECK-NEXT: ret %[[EXT]] return SVE_ACLE_FUNC(svget4,_f64,,)(tuple, 2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_index.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_index.c index 23cfd38d0eb4..96cbada5663a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_index.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_index.c @@ -1,126 +1,69 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include -// CHECK-LABEL: @test_svindex_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv16i8(i8 [[BASE:%.*]], i8 [[STEP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svindex_s8aa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv16i8(i8 [[BASE:%.*]], i8 [[STEP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svindex_s8(int8_t base, int8_t step) { + // CHECK-LABEL: test_svindex_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.index.nxv16i8(i8 %base, i8 %step) + // CHECK: ret %[[INTRINSIC]] return svindex_s8(base, step); } -// CHECK-LABEL: @test_svindex_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv8i16(i16 [[BASE:%.*]], i16 [[STEP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svindex_s16ss( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv8i16(i16 [[BASE:%.*]], i16 [[STEP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svindex_s16(int16_t base, int16_t step) { + // CHECK-LABEL: test_svindex_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.index.nxv8i16(i16 %base, i16 %step) + // CHECK: ret %[[INTRINSIC]] return svindex_s16(base, step); } -// CHECK-LABEL: @test_svindex_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv4i32(i32 [[BASE:%.*]], i32 [[STEP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svindex_s32ii( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv4i32(i32 [[BASE:%.*]], i32 [[STEP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svindex_s32(int32_t base, int32_t step) { + // CHECK-LABEL: test_svindex_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.index.nxv4i32(i32 %base, i32 %step) + // CHECK: ret %[[INTRINSIC]] return svindex_s32(base, step); } -// CHECK-LABEL: @test_svindex_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv2i64(i64 [[BASE:%.*]], i64 [[STEP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svindex_s64ll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv2i64(i64 [[BASE:%.*]], i64 [[STEP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svindex_s64(int64_t base, int64_t step) { + // CHECK-LABEL: test_svindex_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.index.nxv2i64(i64 %base, i64 %step) + // CHECK: ret %[[INTRINSIC]] return svindex_s64(base, step); } -// CHECK-LABEL: @test_svindex_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv16i8(i8 [[BASE:%.*]], i8 [[STEP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svindex_u8hh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv16i8(i8 [[BASE:%.*]], i8 [[STEP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svindex_u8(uint8_t base, uint8_t step) { + // CHECK-LABEL: test_svindex_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.index.nxv16i8(i8 %base, i8 %step) + // CHECK: ret %[[INTRINSIC]] return svindex_u8(base, step); } -// CHECK-LABEL: @test_svindex_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv8i16(i16 [[BASE:%.*]], i16 [[STEP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svindex_u16tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv8i16(i16 [[BASE:%.*]], i16 [[STEP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svindex_u16(uint16_t base, uint16_t step) { + // CHECK-LABEL: test_svindex_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.index.nxv8i16(i16 %base, i16 %step) + // CHECK: ret %[[INTRINSIC]] return svindex_u16(base, step); } -// CHECK-LABEL: @test_svindex_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv4i32(i32 [[BASE:%.*]], i32 [[STEP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svindex_u32jj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv4i32(i32 [[BASE:%.*]], i32 [[STEP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svindex_u32(uint32_t base, uint32_t step) { + // CHECK-LABEL: test_svindex_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.index.nxv4i32(i32 %base, i32 %step) + // CHECK: ret %[[INTRINSIC]] return svindex_u32(base, step); } -// CHECK-LABEL: @test_svindex_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv2i64(i64 [[BASE:%.*]], i64 [[STEP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svindex_u64mm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.index.nxv2i64(i64 [[BASE:%.*]], i64 [[STEP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svindex_u64(uint64_t base, uint64_t step) { + // CHECK-LABEL: test_svindex_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.index.nxv2i64(i64 %base, i64 %step) + // CHECK: ret %[[INTRINSIC]] return svindex_u64(base, step); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c index 7385dc51e047..330d0c3fe00f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr-bfloat.c @@ -1,11 +1,10 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -15,17 +14,10 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svinsr_n_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv8bf16( [[OP1:%.*]], bfloat [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svinsr_n_bf16u14__SVBFloat16_tu6__bf16( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv8bf16( [[OP1:%.*]], bfloat [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svinsr_n_bf16(svbfloat16_t op1, bfloat16_t op2) { + // CHECK-LABEL: test_svinsr_n_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.insr.nxv8bf16( %op1, bfloat %op2) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svinsr_n_bf16'}} return SVE_ACLE_FUNC(svinsr, _n_bf16, , )(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr.c index 20a4e43d8ad0..b1d6c86a4d5a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_insr.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,167 +13,90 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svinsr_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv16i8( [[OP1:%.*]], i8 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svinsr_n_s8u10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv16i8( [[OP1:%.*]], i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svinsr_n_s8(svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svinsr_n_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.insr.nxv16i8( %op1, i8 %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svinsr,_n_s8,,)(op1, op2); } -// CHECK-LABEL: @test_svinsr_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv8i16( [[OP1:%.*]], i16 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svinsr_n_s16u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv8i16( [[OP1:%.*]], i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svinsr_n_s16(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svinsr_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.insr.nxv8i16( %op1, i16 %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svinsr,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svinsr_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv4i32( [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svinsr_n_s32u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv4i32( [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svinsr_n_s32(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svinsr_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.insr.nxv4i32( %op1, i32 %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svinsr,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svinsr_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv2i64( [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svinsr_n_s64u11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv2i64( [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svinsr_n_s64(svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svinsr_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.insr.nxv2i64( %op1, i64 %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svinsr,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svinsr_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv16i8( [[OP1:%.*]], i8 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svinsr_n_u8u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv16i8( [[OP1:%.*]], i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svinsr_n_u8(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svinsr_n_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.insr.nxv16i8( %op1, i8 %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svinsr,_n_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svinsr_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv8i16( [[OP1:%.*]], i16 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svinsr_n_u16u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv8i16( [[OP1:%.*]], i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svinsr_n_u16(svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svinsr_n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.insr.nxv8i16( %op1, i16 %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svinsr,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svinsr_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv4i32( [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svinsr_n_u32u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv4i32( [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svinsr_n_u32(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svinsr_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.insr.nxv4i32( %op1, i32 %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svinsr,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svinsr_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv2i64( [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svinsr_n_u64u12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv2i64( [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svinsr_n_u64(svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svinsr_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.insr.nxv2i64( %op1, i64 %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svinsr,_n_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svinsr_n_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv8f16( [[OP1:%.*]], half [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svinsr_n_f16u13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv8f16( [[OP1:%.*]], half [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svinsr_n_f16(svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svinsr_n_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.insr.nxv8f16( %op1, half %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svinsr,_n_f16,,)(op1, op2); } -// CHECK-LABEL: @test_svinsr_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv4f32( [[OP1:%.*]], float [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svinsr_n_f32u13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv4f32( [[OP1:%.*]], float [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svinsr_n_f32(svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svinsr_n_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.insr.nxv4f32( %op1, float %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svinsr,_n_f32,,)(op1, op2); } -// CHECK-LABEL: @test_svinsr_n_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv2f64( [[OP1:%.*]], double [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svinsr_n_f64u13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.insr.nxv2f64( [[OP1:%.*]], double [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svinsr_n_f64(svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svinsr_n_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.insr.nxv2f64( %op1, double %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svinsr,_n_f64,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c index 029d7b648ff0..8a9a9b301142 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta-bfloat.c @@ -1,11 +1,10 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -15,19 +14,11 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svlasta_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call bfloat @llvm.aarch64.sve.lasta.nxv8bf16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret bfloat [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svlasta_bf16u10__SVBool_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call bfloat @llvm.aarch64.sve.lasta.nxv8bf16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret bfloat [[TMP1]] -// bfloat16_t test_svlasta_bf16(svbool_t pg, svbfloat16_t op) { + // CHECK-LABEL: test_svlasta_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call bfloat @llvm.aarch64.sve.lasta.nxv8bf16( %[[PG]], %op) + // CHECK: ret bfloat %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svlasta_bf16'}} return SVE_ACLE_FUNC(svlasta, _bf16, , )(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta.c index e22f5f7808d1..08c599d84968 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lasta.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,185 +13,99 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svlasta_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.lasta.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i8 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svlasta_s8u10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.lasta.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i8 [[TMP0]] -// int8_t test_svlasta_s8(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svlasta_s8 + // CHECK: %[[INTRINSIC:.*]] = call i8 @llvm.aarch64.sve.lasta.nxv16i8( %pg, %op) + // CHECK: ret i8 %[[INTRINSIC]] return SVE_ACLE_FUNC(svlasta,_s8,,)(pg, op); } -// CHECK-LABEL: @test_svlasta_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.lasta.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i16 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlasta_s16u10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.lasta.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i16 [[TMP1]] -// int16_t test_svlasta_s16(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svlasta_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i16 @llvm.aarch64.sve.lasta.nxv8i16( %[[PG]], %op) + // CHECK: ret i16 %[[INTRINSIC]] return SVE_ACLE_FUNC(svlasta,_s16,,)(pg, op); } -// CHECK-LABEL: @test_svlasta_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.lasta.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlasta_s32u10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.lasta.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// int32_t test_svlasta_s32(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svlasta_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.lasta.nxv4i32( %[[PG]], %op) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svlasta,_s32,,)(pg, op); } -// CHECK-LABEL: @test_svlasta_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.lasta.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlasta_s64u10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.lasta.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// int64_t test_svlasta_s64(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svlasta_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.lasta.nxv2i64( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svlasta,_s64,,)(pg, op); } -// CHECK-LABEL: @test_svlasta_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.lasta.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i8 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svlasta_u8u10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.lasta.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i8 [[TMP0]] -// uint8_t test_svlasta_u8(svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svlasta_u8 + // CHECK: %[[INTRINSIC:.*]] = call i8 @llvm.aarch64.sve.lasta.nxv16i8( %pg, %op) + // CHECK: ret i8 %[[INTRINSIC]] return SVE_ACLE_FUNC(svlasta,_u8,,)(pg, op); } -// CHECK-LABEL: @test_svlasta_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.lasta.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i16 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlasta_u16u10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.lasta.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i16 [[TMP1]] -// uint16_t test_svlasta_u16(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svlasta_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i16 @llvm.aarch64.sve.lasta.nxv8i16( %[[PG]], %op) + // CHECK: ret i16 %[[INTRINSIC]] return SVE_ACLE_FUNC(svlasta,_u16,,)(pg, op); } -// CHECK-LABEL: @test_svlasta_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.lasta.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlasta_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.lasta.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// uint32_t test_svlasta_u32(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svlasta_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.lasta.nxv4i32( %[[PG]], %op) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svlasta,_u32,,)(pg, op); } -// CHECK-LABEL: @test_svlasta_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.lasta.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlasta_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.lasta.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svlasta_u64(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svlasta_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.lasta.nxv2i64( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svlasta,_u64,,)(pg, op); } -// CHECK-LABEL: @test_svlasta_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.lasta.nxv8f16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret half [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlasta_f16u10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.lasta.nxv8f16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret half [[TMP1]] -// float16_t test_svlasta_f16(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svlasta_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call half @llvm.aarch64.sve.lasta.nxv8f16( %[[PG]], %op) + // CHECK: ret half %[[INTRINSIC]] return SVE_ACLE_FUNC(svlasta,_f16,,)(pg, op); } -// CHECK-LABEL: @test_svlasta_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.lasta.nxv4f32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret float [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlasta_f32u10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.lasta.nxv4f32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret float [[TMP1]] -// float32_t test_svlasta_f32(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svlasta_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call float @llvm.aarch64.sve.lasta.nxv4f32( %[[PG]], %op) + // CHECK: ret float %[[INTRINSIC]] return SVE_ACLE_FUNC(svlasta,_f32,,)(pg, op); } -// CHECK-LABEL: @test_svlasta_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.lasta.nxv2f64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret double [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlasta_f64u10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.lasta.nxv2f64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret double [[TMP1]] -// float64_t test_svlasta_f64(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svlasta_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call double @llvm.aarch64.sve.lasta.nxv2f64( %[[PG]], %op) + // CHECK: ret double %[[INTRINSIC]] return SVE_ACLE_FUNC(svlasta,_f64,,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c index de0239916708..ac5ca3db00c0 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb-bfloat.c @@ -1,11 +1,10 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -15,19 +14,11 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svlastb_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call bfloat @llvm.aarch64.sve.lastb.nxv8bf16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret bfloat [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svlastb_bf16u10__SVBool_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call bfloat @llvm.aarch64.sve.lastb.nxv8bf16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret bfloat [[TMP1]] -// bfloat16_t test_svlastb_bf16(svbool_t pg, svbfloat16_t op) { + // CHECK-LABEL: test_svlastb_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call bfloat @llvm.aarch64.sve.lastb.nxv8bf16( %[[PG]], %op) + // CHECK: ret bfloat %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svlastb_bf16'}} return SVE_ACLE_FUNC(svlastb, _bf16, , )(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb.c index 7d3ce15dbe90..2d29af299317 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lastb.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,185 +13,99 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svlastb_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.lastb.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i8 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svlastb_s8u10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.lastb.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i8 [[TMP0]] -// int8_t test_svlastb_s8(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svlastb_s8 + // CHECK: %[[INTRINSIC:.*]] = call i8 @llvm.aarch64.sve.lastb.nxv16i8( %pg, %op) + // CHECK: ret i8 %[[INTRINSIC]] return SVE_ACLE_FUNC(svlastb,_s8,,)(pg, op); } -// CHECK-LABEL: @test_svlastb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.lastb.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i16 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlastb_s16u10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.lastb.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i16 [[TMP1]] -// int16_t test_svlastb_s16(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svlastb_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i16 @llvm.aarch64.sve.lastb.nxv8i16( %[[PG]], %op) + // CHECK: ret i16 %[[INTRINSIC]] return SVE_ACLE_FUNC(svlastb,_s16,,)(pg, op); } -// CHECK-LABEL: @test_svlastb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.lastb.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlastb_s32u10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.lastb.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// int32_t test_svlastb_s32(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svlastb_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.lastb.nxv4i32( %[[PG]], %op) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svlastb,_s32,,)(pg, op); } -// CHECK-LABEL: @test_svlastb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.lastb.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlastb_s64u10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.lastb.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// int64_t test_svlastb_s64(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svlastb_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.lastb.nxv2i64( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svlastb,_s64,,)(pg, op); } -// CHECK-LABEL: @test_svlastb_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.lastb.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i8 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svlastb_u8u10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.lastb.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i8 [[TMP0]] -// uint8_t test_svlastb_u8(svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svlastb_u8 + // CHECK: %[[INTRINSIC:.*]] = call i8 @llvm.aarch64.sve.lastb.nxv16i8( %pg, %op) + // CHECK: ret i8 %[[INTRINSIC]] return SVE_ACLE_FUNC(svlastb,_u8,,)(pg, op); } -// CHECK-LABEL: @test_svlastb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.lastb.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i16 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlastb_u16u10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.lastb.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i16 [[TMP1]] -// uint16_t test_svlastb_u16(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svlastb_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i16 @llvm.aarch64.sve.lastb.nxv8i16( %[[PG]], %op) + // CHECK: ret i16 %[[INTRINSIC]] return SVE_ACLE_FUNC(svlastb,_u16,,)(pg, op); } -// CHECK-LABEL: @test_svlastb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.lastb.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlastb_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.lastb.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// uint32_t test_svlastb_u32(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svlastb_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.lastb.nxv4i32( %[[PG]], %op) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svlastb,_u32,,)(pg, op); } -// CHECK-LABEL: @test_svlastb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.lastb.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlastb_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.lastb.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svlastb_u64(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svlastb_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.lastb.nxv2i64( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svlastb,_u64,,)(pg, op); } -// CHECK-LABEL: @test_svlastb_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.lastb.nxv8f16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret half [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlastb_f16u10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.lastb.nxv8f16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret half [[TMP1]] -// float16_t test_svlastb_f16(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svlastb_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call half @llvm.aarch64.sve.lastb.nxv8f16( %[[PG]], %op) + // CHECK: ret half %[[INTRINSIC]] return SVE_ACLE_FUNC(svlastb,_f16,,)(pg, op); } -// CHECK-LABEL: @test_svlastb_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.lastb.nxv4f32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret float [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlastb_f32u10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.lastb.nxv4f32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret float [[TMP1]] -// float32_t test_svlastb_f32(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svlastb_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call float @llvm.aarch64.sve.lastb.nxv4f32( %[[PG]], %op) + // CHECK: ret float %[[INTRINSIC]] return SVE_ACLE_FUNC(svlastb,_f32,,)(pg, op); } -// CHECK-LABEL: @test_svlastb_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.lastb.nxv2f64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret double [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlastb_f64u10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.lastb.nxv2f64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret double [[TMP1]] -// float64_t test_svlastb_f64(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svlastb_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call double @llvm.aarch64.sve.lastb.nxv2f64( %[[PG]], %op) + // CHECK: ret double %[[INTRINSIC]] return SVE_ACLE_FUNC(svlastb,_f64,,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c index 88c39af44963..55d9761c4605 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,42 +13,24 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svld1_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svld1_bf16u10__SVBool_tPKu6__bf16( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svld1_bf16(svbool_t pg, const bfloat16_t *base) { + // CHECK-LABEL: test_svld1_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv8bf16( %[[PG]], bfloat* %base) + // CHECK: ret %[[LOAD]] // expected-warning@+1 {{implicit declaration of function 'svld1_bf16'}} return SVE_ACLE_FUNC(svld1,_bf16,,)(pg, base); } -// CHECK-LABEL: @test_svld1_vnum_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svld1_vnum_bf16u10__SVBool_tPKu6__bf16l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbfloat16_t test_svld1_vnum_bf16(svbool_t pg, const bfloat16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1_vnum_bf16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast bfloat* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv8bf16( %[[PG]], bfloat* %[[GEP]]) + // CHECK: ret %[[LOAD]] // expected-warning@+1 {{implicit declaration of function 'svld1_vnum_bf16'}} return SVE_ACLE_FUNC(svld1_vnum,_bf16,,)(pg, base, vnum); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c index f3833761b41a..4e7225c10244 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,1096 +13,560 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svld1_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svld1_s8u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svld1_s8(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svld1_s8 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv16i8( %pg, i8* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1,_s8,,)(pg, base); } -// CHECK-LABEL: @test_svld1_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld1_s16u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svld1_s16(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svld1_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv8i16( %[[PG]], i16* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1,_s16,,)(pg, base); } -// CHECK-LABEL: @test_svld1_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld1_s32u10__SVBool_tPKi( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svld1_s32(svbool_t pg, const int32_t *base) { + // CHECK-LABEL: test_svld1_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i32( %[[PG]], i32* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1,_s32,,)(pg, base); } -// CHECK-LABEL: @test_svld1_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld1_s64u10__SVBool_tPKl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svld1_s64(svbool_t pg, const int64_t *base) { + // CHECK-LABEL: test_svld1_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i64( %[[PG]], i64* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1,_s64,,)(pg, base); } -// CHECK-LABEL: @test_svld1_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svld1_u8u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svld1_u8(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svld1_u8 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv16i8( %pg, i8* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1,_u8,,)(pg, base); } -// CHECK-LABEL: @test_svld1_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld1_u16u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svld1_u16(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svld1_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv8i16( %[[PG]], i16* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1,_u16,,)(pg, base); } -// CHECK-LABEL: @test_svld1_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld1_u32u10__SVBool_tPKj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svld1_u32(svbool_t pg, const uint32_t *base) { + // CHECK-LABEL: test_svld1_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i32( %[[PG]], i32* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1,_u32,,)(pg, base); } -// CHECK-LABEL: @test_svld1_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld1_u64u10__SVBool_tPKm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svld1_u64(svbool_t pg, const uint64_t *base) { + // CHECK-LABEL: test_svld1_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i64( %[[PG]], i64* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1,_u64,,)(pg, base); } -// CHECK-LABEL: @test_svld1_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld1_f16u10__SVBool_tPKDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svld1_f16(svbool_t pg, const float16_t *base) { + // CHECK-LABEL: test_svld1_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv8f16( %[[PG]], half* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1,_f16,,)(pg, base); } -// CHECK-LABEL: @test_svld1_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld1_f32u10__SVBool_tPKf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svld1_f32(svbool_t pg, const float32_t *base) { + // CHECK-LABEL: test_svld1_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4f32( %[[PG]], float* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1,_f32,,)(pg, base); } -// CHECK-LABEL: @test_svld1_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld1_f64u10__SVBool_tPKd( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svld1_f64(svbool_t pg, const float64_t *base) { + // CHECK-LABEL: test_svld1_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2f64( %[[PG]], double* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1,_f64,,)(pg, base); } -// CHECK-LABEL: @test_svld1_vnum_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svld1_vnum_s8u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svld1_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1_vnum_s8 + // CHECK: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv16i8( %pg, i8* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_vnum,_s8,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld1_vnum_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld1_vnum_s16u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svld1_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1_vnum_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv8i16( %[[PG]], i16* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_vnum,_s16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld1_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld1_vnum_s32u10__SVBool_tPKil( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svld1_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i32( %[[PG]], i32* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_vnum,_s32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld1_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i64( [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld1_vnum_s64u10__SVBool_tPKll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i64( [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svld1_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i64( %[[PG]], i64* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_vnum,_s64,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld1_vnum_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svld1_vnum_u8u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svld1_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1_vnum_u8 + // CHECK: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv16i8( %pg, i8* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_vnum,_u8,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld1_vnum_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld1_vnum_u16u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svld1_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1_vnum_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv8i16( %[[PG]], i16* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_vnum,_u16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld1_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld1_vnum_u32u10__SVBool_tPKjl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svld1_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i32( %[[PG]], i32* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_vnum,_u32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld1_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i64( [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld1_vnum_u64u10__SVBool_tPKml( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i64( [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svld1_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i64( %[[PG]], i64* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_vnum,_u64,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld1_vnum_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv8f16( [[TMP0]], half* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld1_vnum_f16u10__SVBool_tPKDhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv8f16( [[TMP0]], half* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svld1_vnum_f16(svbool_t pg, const float16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1_vnum_f16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast half* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv8f16( %[[PG]], half* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_vnum,_f16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld1_vnum_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4f32( [[TMP0]], float* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld1_vnum_f32u10__SVBool_tPKfl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4f32( [[TMP0]], float* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svld1_vnum_f32(svbool_t pg, const float32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1_vnum_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast float* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4f32( %[[PG]], float* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_vnum,_f32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld1_vnum_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2f64( [[TMP0]], double* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld1_vnum_f64u10__SVBool_tPKdl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2f64( [[TMP0]], double* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svld1_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1_vnum_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast double* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2f64( %[[PG]], double* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_vnum,_f64,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld1_gather_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z29test_svld1_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svld1_gather_u32base_s32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svld1_gather_u32base_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( %[[PG]], %bases, i64 0) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: @test_svld1_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z29test_svld1_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svld1_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svld1_gather_u64base_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( %[[PG]], %bases, i64 0) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svld1_gather_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z29test_svld1_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svld1_gather_u32base_u32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svld1_gather_u32base_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( %[[PG]], %bases, i64 0) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: @test_svld1_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z29test_svld1_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svld1_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svld1_gather_u64base_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( %[[PG]], %bases, i64 0) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svld1_gather_u32base_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z29test_svld1_gather_u32base_f32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svld1_gather_u32base_f32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svld1_gather_u32base_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( %[[PG]], %bases, i64 0) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather, _u32base, _f32, )(pg, bases); } -// CHECK-LABEL: @test_svld1_gather_u64base_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z29test_svld1_gather_u64base_f64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svld1_gather_u64base_f64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svld1_gather_u64base_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( %[[PG]], %bases, i64 0) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather, _u64base, _f64, )(pg, bases); } -// CHECK-LABEL: @test_svld1_gather_s32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1_gather_s32offset_s32u10__SVBool_tPKiu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svld1_gather_s32offset_s32(svbool_t pg, const int32_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svld1_gather_s32offset_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32( %[[PG]], i32* %base, %offsets) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, s32, offset, _s32)(pg, base, offsets); } -// CHECK-LABEL: @test_svld1_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1_gather_s64offset_s64u10__SVBool_tPKlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svld1_gather_s64offset_s64(svbool_t pg, const int64_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svld1_gather_s64offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( %[[PG]], i64* %base, %offsets) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, s64, offset, _s64)(pg, base, offsets); } -// CHECK-LABEL: @test_svld1_gather_s32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1_gather_s32offset_u32u10__SVBool_tPKju11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svld1_gather_s32offset_u32(svbool_t pg, const uint32_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svld1_gather_s32offset_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i32( %[[PG]], i32* %base, %offsets) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, s32, offset, _u32)(pg, base, offsets); } -// CHECK-LABEL: @test_svld1_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1_gather_s64offset_u64u10__SVBool_tPKmu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svld1_gather_s64offset_u64(svbool_t pg, const uint64_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svld1_gather_s64offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( %[[PG]], i64* %base, %offsets) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, s64, offset, _u64)(pg, base, offsets); } -// CHECK-LABEL: @test_svld1_gather_s32offset_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1_gather_s32offset_f32u10__SVBool_tPKfu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svld1_gather_s32offset_f32(svbool_t pg, const float32_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svld1_gather_s32offset_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4f32( %[[PG]], float* %base, %offsets) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, s32, offset, _f32)(pg, base, offsets); } -// CHECK-LABEL: @test_svld1_gather_s64offset_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1_gather_s64offset_f64u10__SVBool_tPKdu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svld1_gather_s64offset_f64(svbool_t pg, const float64_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svld1_gather_s64offset_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2f64( %[[PG]], double* %base, %offsets) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, s64, offset, _f64)(pg, base, offsets); } -// CHECK-LABEL: @test_svld1_gather_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1_gather_u32offset_s32u10__SVBool_tPKiu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svld1_gather_u32offset_s32(svbool_t pg, const int32_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svld1_gather_u32offset_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32( %[[PG]], i32* %base, %offsets) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, u32, offset, _s32)(pg, base, offsets); } -// CHECK-LABEL: @test_svld1_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1_gather_u64offset_s64u10__SVBool_tPKlu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svld1_gather_u64offset_s64(svbool_t pg, const int64_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svld1_gather_u64offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( %[[PG]], i64* %base, %offsets) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, u64, offset, _s64)(pg, base, offsets); } -// CHECK-LABEL: @test_svld1_gather_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1_gather_u32offset_u32u10__SVBool_tPKju12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svld1_gather_u32offset_u32(svbool_t pg, const uint32_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svld1_gather_u32offset_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i32( %[[PG]], i32* %base, %offsets) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, u32, offset, _u32)(pg, base, offsets); } -// CHECK-LABEL: @test_svld1_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1_gather_u64offset_u64u10__SVBool_tPKmu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svld1_gather_u64offset_u64(svbool_t pg, const uint64_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svld1_gather_u64offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i64( %[[PG]], i64* %base, %offsets) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, u64, offset, _u64)(pg, base, offsets); } -// CHECK-LABEL: @test_svld1_gather_u32offset_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1_gather_u32offset_f32u10__SVBool_tPKfu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svld1_gather_u32offset_f32(svbool_t pg, const float32_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svld1_gather_u32offset_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4f32( %[[PG]], float* %base, %offsets) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, u32, offset, _f32)(pg, base, offsets); } -// CHECK-LABEL: @test_svld1_gather_u64offset_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1_gather_u64offset_f64u10__SVBool_tPKdu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svld1_gather_u64offset_f64(svbool_t pg, const float64_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svld1_gather_u64offset_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2f64( %[[PG]], double* %base, %offsets) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, u64, offset, _f64)(pg, base, offsets); } -// CHECK-LABEL: @test_svld1_gather_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z36test_svld1_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svld1_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1_gather_u32base_offset_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( %[[PG]], %bases, i64 %offset) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z36test_svld1_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svld1_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1_gather_u64base_offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( %[[PG]], %bases, i64 %offset) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1_gather_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z36test_svld1_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svld1_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1_gather_u32base_offset_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( %[[PG]], %bases, i64 %offset) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z36test_svld1_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svld1_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1_gather_u64base_offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( %[[PG]], %bases, i64 %offset) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1_gather_u32base_offset_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z36test_svld1_gather_u32base_offset_f32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svld1_gather_u32base_offset_f32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1_gather_u32base_offset_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( %[[PG]], %bases, i64 %offset) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather, _u32base, _offset_f32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1_gather_u64base_offset_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z36test_svld1_gather_u64base_offset_f64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svld1_gather_u64base_offset_f64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1_gather_u64base_offset_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( %[[PG]], %bases, i64 %offset) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather, _u64base, _offset_f64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1_gather_s32index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z30test_svld1_gather_s32index_s32u10__SVBool_tPKiu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svld1_gather_s32index_s32(svbool_t pg, const int32_t *base, svint32_t indices) { + // CHECK-LABEL: test_svld1_gather_s32index_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32( %[[PG]], i32* %base, %indices) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, s32, index, _s32)(pg, base, indices); } -// CHECK-LABEL: @test_svld1_gather_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z30test_svld1_gather_s64index_s64u10__SVBool_tPKlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svld1_gather_s64index_s64(svbool_t pg, const int64_t *base, svint64_t indices) { + // CHECK-LABEL: test_svld1_gather_s64index_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( %[[PG]], i64* %base, %indices) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, s64, index, _s64)(pg, base, indices); } -// CHECK-LABEL: @test_svld1_gather_s32index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z30test_svld1_gather_s32index_u32u10__SVBool_tPKju11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svld1_gather_s32index_u32(svbool_t pg, const uint32_t *base, svint32_t indices) { + // CHECK-LABEL: test_svld1_gather_s32index_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i32( %[[PG]], i32* %base, %indices) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, s32, index, _u32)(pg, base, indices); } -// CHECK-LABEL: @test_svld1_gather_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z30test_svld1_gather_s64index_u64u10__SVBool_tPKmu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svld1_gather_s64index_u64(svbool_t pg, const uint64_t *base, svint64_t indices) { + // CHECK-LABEL: test_svld1_gather_s64index_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( %[[PG]], i64* %base, %indices) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, s64, index, _u64)(pg, base, indices); } -// CHECK-LABEL: @test_svld1_gather_s32index_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z30test_svld1_gather_s32index_f32u10__SVBool_tPKfu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svld1_gather_s32index_f32(svbool_t pg, const float32_t *base, svint32_t indices) { + // CHECK-LABEL: test_svld1_gather_s32index_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4f32( %[[PG]], float* %base, %indices) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, s32, index, _f32)(pg, base, indices); } -// CHECK-LABEL: @test_svld1_gather_s64index_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z30test_svld1_gather_s64index_f64u10__SVBool_tPKdu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svld1_gather_s64index_f64(svbool_t pg, const float64_t *base, svint64_t indices) { + // CHECK-LABEL: test_svld1_gather_s64index_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( %[[PG]], double* %base, %indices) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, s64, index, _f64)(pg, base, indices); } -// CHECK-LABEL: @test_svld1_gather_u32index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z30test_svld1_gather_u32index_s32u10__SVBool_tPKiu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svld1_gather_u32index_s32(svbool_t pg, const int32_t *base, svuint32_t indices) { + // CHECK-LABEL: test_svld1_gather_u32index_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32( %[[PG]], i32* %base, %indices) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, u32, index, _s32)(pg, base, indices); } -// CHECK-LABEL: @test_svld1_gather_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z30test_svld1_gather_u64index_s64u10__SVBool_tPKlu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svld1_gather_u64index_s64(svbool_t pg, const int64_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svld1_gather_u64index_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( %[[PG]], i64* %base, %indices) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, u64, index, _s64)(pg, base, indices); } -// CHECK-LABEL: @test_svld1_gather_u32index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z30test_svld1_gather_u32index_u32u10__SVBool_tPKju12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svld1_gather_u32index_u32(svbool_t pg, const uint32_t *base, svuint32_t indices) { + // CHECK-LABEL: test_svld1_gather_u32index_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i32( %[[PG]], i32* %base, %indices) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, u32, index, _u32)(pg, base, indices); } -// CHECK-LABEL: @test_svld1_gather_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z30test_svld1_gather_u64index_u64u10__SVBool_tPKmu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svld1_gather_u64index_u64(svbool_t pg, const uint64_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svld1_gather_u64index_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i64( %[[PG]], i64* %base, %indices) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, u64, index, _u64)(pg, base, indices); } -// CHECK-LABEL: @test_svld1_gather_u32index_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z30test_svld1_gather_u32index_f32u10__SVBool_tPKfu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svld1_gather_u32index_f32(svbool_t pg, const float32_t *base, svuint32_t indices) { + // CHECK-LABEL: test_svld1_gather_u32index_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4f32( %[[PG]], float* %base, %indices) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, u32, index, _f32)(pg, base, indices); } -// CHECK-LABEL: @test_svld1_gather_u64index_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z30test_svld1_gather_u64index_f64u10__SVBool_tPKdu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svld1_gather_u64index_f64(svbool_t pg, const float64_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svld1_gather_u64index_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2f64( %[[PG]], double* %base, %indices) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather_, u64, index, _f64)(pg, base, indices); } -// CHECK-LABEL: @test_svld1_gather_u32base_index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svld1_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svld1_gather_u32base_index_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather, _u32base, _index_s32, )(pg, bases, index); } -// CHECK-LABEL: @test_svld1_gather_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svld1_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svld1_gather_u64base_index_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 3 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: @test_svld1_gather_u32base_index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svld1_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svld1_gather_u32base_index_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i32.nxv4i32( %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather, _u32base, _index_u32, )(pg, bases, index); } -// CHECK-LABEL: @test_svld1_gather_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svld1_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svld1_gather_u64base_index_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 3 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i64.nxv2i64( %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather, _u64base, _index_u64, )(pg, bases, index); } -// CHECK-LABEL: @test_svld1_gather_u32base_index_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svld1_gather_u32base_index_f32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svld1_gather_u32base_index_f32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svld1_gather_u32base_index_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4f32.nxv4i32( %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather, _u32base, _index_f32, )(pg, bases, index); } -// CHECK-LABEL: @test_svld1_gather_u64base_index_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svld1_gather_u64base_index_f64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svld1_gather_u64base_index_f64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svld1_gather_u64base_index_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 3 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2f64.nxv2i64( %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svld1_gather, _u64base, _index_f64, )(pg, bases, index); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c index d15fdb5ab4dc..254797e28c9a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -target-feature +f64mm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -target-feature +f64mm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -target-feature +f64mm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -target-feature +f64mm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -target-feature +f64mm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -target-feature +f64mm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,18 +12,10 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svld1ro_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svld1ro_bf16u10__SVBool_tPKu6__bf16( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svld1ro_bf16(svbool_t pg, const bfloat16_t *base) { + // CHECK-LABEL: test_svld1ro_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1ro.nxv8bf16( %[[PG]], bfloat* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1ro, _bf16, , )(pg, base); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c index 222aeb3f31c7..8f2e7aab912b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ro.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +f64mm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +f64mm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +f64mm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +f64mm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +f64mm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +f64mm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,174 +12,88 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svld1ro_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svld1ro_s8u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svld1ro_s8(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svld1ro_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1ro.nxv16i8( %pg, i8* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1ro, _s8, , )(pg, base); } -// CHECK-LABEL: @test_svld1ro_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1ro_s16u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svld1ro_s16(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svld1ro_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1ro.nxv8i16( %[[PG]], i16* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1ro, _s16, , )(pg, base); } -// CHECK-LABEL: @test_svld1ro_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1ro_s32u10__SVBool_tPKi( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svld1ro_s32(svbool_t pg, const int32_t *base) { + // CHECK-LABEL: test_svld1ro_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1ro.nxv4i32( %[[PG]], i32* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1ro, _s32, , )(pg, base); } -// CHECK-LABEL: @test_svld1ro_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1ro_s64u10__SVBool_tPKl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svld1ro_s64(svbool_t pg, const int64_t *base) { + // CHECK-LABEL: test_svld1ro_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1ro.nxv2i64( %[[PG]], i64* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1ro, _s64, , )(pg, base); } -// CHECK-LABEL: @test_svld1ro_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svld1ro_u8u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svld1ro_u8(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svld1ro_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1ro.nxv16i8( %pg, i8* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1ro, _u8, , )(pg, base); } -// CHECK-LABEL: @test_svld1ro_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1ro_u16u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svld1ro_u16(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svld1ro_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1ro.nxv8i16( %[[PG]], i16* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1ro, _u16, , )(pg, base); } -// CHECK-LABEL: @test_svld1ro_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1ro_u32u10__SVBool_tPKj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svld1ro_u32(svbool_t pg, const uint32_t *base) { + // CHECK-LABEL: test_svld1ro_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1ro.nxv4i32( %[[PG]], i32* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1ro, _u32, , )(pg, base); } -// CHECK-LABEL: @test_svld1ro_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1ro_u64u10__SVBool_tPKm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svld1ro_u64(svbool_t pg, const uint64_t *base) { + // CHECK-LABEL: test_svld1ro_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1ro.nxv2i64( %[[PG]], i64* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1ro, _u64, , )(pg, base); } -// CHECK-LABEL: @test_svld1ro_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1ro_f16u10__SVBool_tPKDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svld1ro_f16(svbool_t pg, const float16_t *base) { + // CHECK-LABEL: test_svld1ro_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1ro.nxv8f16( %[[PG]], half* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1ro, _f16, , )(pg, base); } -// CHECK-LABEL: @test_svld1ro_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1ro_f32u10__SVBool_tPKf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svld1ro_f32(svbool_t pg, const float32_t *base) { + // CHECK-LABEL: test_svld1ro_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1ro.nxv4f32( %[[PG]], float* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1ro, _f32, , )(pg, base); } -// CHECK-LABEL: @test_svld1ro_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1ro_f64u10__SVBool_tPKd( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1ro.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svld1ro_f64(svbool_t pg, const float64_t *base) { + // CHECK-LABEL: test_svld1ro_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1ro.nxv2f64( %[[PG]], double* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1ro, _f64, , )(pg, base); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c index da35a474bf8e..bf1688bb0118 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,20 +13,12 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svld1rq_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svld1rq_bf16u10__SVBool_tPKu6__bf16( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svld1rq_bf16(svbool_t pg, const bfloat16_t *base) { + // CHECK-LABEL: test_svld1rq_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1rq.nxv8bf16( %[[PG]], bfloat* %base) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svld1rq_bf16'}} return SVE_ACLE_FUNC(svld1rq,_bf16,,)(pg, base); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq.c index 9f8cbf82c9bb..f3bc8467d1ba 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1rq.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include @@ -15,185 +14,99 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svld1rq_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svld1rq_s8u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svld1rq_s8(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svld1rq_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1rq.nxv16i8( %pg, i8* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1rq,_s8,,)(pg, base); } -// CHECK-LABEL: @test_svld1rq_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1rq_s16u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svld1rq_s16(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svld1rq_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1rq.nxv8i16( %[[PG]], i16* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1rq,_s16,,)(pg, base); } -// CHECK-LABEL: @test_svld1rq_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1rq_s32u10__SVBool_tPKi( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svld1rq_s32(svbool_t pg, const int32_t *base) { + // CHECK-LABEL: test_svld1rq_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1rq.nxv4i32( %[[PG]], i32* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1rq,_s32,,)(pg, base); } -// CHECK-LABEL: @test_svld1rq_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1rq_s64u10__SVBool_tPKl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svld1rq_s64(svbool_t pg, const int64_t *base) { + // CHECK-LABEL: test_svld1rq_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1rq.nxv2i64( %[[PG]], i64* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1rq,_s64,,)(pg, base); } -// CHECK-LABEL: @test_svld1rq_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svld1rq_u8u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svld1rq_u8(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svld1rq_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1rq.nxv16i8( %pg, i8* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1rq,_u8,,)(pg, base); } -// CHECK-LABEL: @test_svld1rq_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1rq_u16u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svld1rq_u16(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svld1rq_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1rq.nxv8i16( %[[PG]], i16* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1rq,_u16,,)(pg, base); } -// CHECK-LABEL: @test_svld1rq_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1rq_u32u10__SVBool_tPKj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svld1rq_u32(svbool_t pg, const uint32_t *base) { + // CHECK-LABEL: test_svld1rq_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1rq.nxv4i32( %[[PG]], i32* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1rq,_u32,,)(pg, base); } -// CHECK-LABEL: @test_svld1rq_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1rq_u64u10__SVBool_tPKm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svld1rq_u64(svbool_t pg, const uint64_t *base) { + // CHECK-LABEL: test_svld1rq_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1rq.nxv2i64( %[[PG]], i64* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1rq,_u64,,)(pg, base); } -// CHECK-LABEL: @test_svld1rq_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1rq_f16u10__SVBool_tPKDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svld1rq_f16(svbool_t pg, const float16_t *base) { + // CHECK-LABEL: test_svld1rq_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1rq.nxv8f16( %[[PG]], half* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1rq,_f16,,)(pg, base); } -// CHECK-LABEL: @test_svld1rq_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1rq_f32u10__SVBool_tPKf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svld1rq_f32(svbool_t pg, const float32_t *base) { + // CHECK-LABEL: test_svld1rq_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1rq.nxv4f32( %[[PG]], float* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1rq,_f32,,)(pg, base); } -// CHECK-LABEL: @test_svld1rq_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1rq_f64u10__SVBool_tPKd( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1rq.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svld1rq_f64(svbool_t pg, const float64_t *base) { + // CHECK-LABEL: test_svld1rq_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ld1rq.nxv2f64( %[[PG]], double* %base) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svld1rq,_f64,,)(pg, base); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c index b3b04310192f..d2c72d684aa3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sb.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,542 +13,278 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svld1sb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1sb_s16u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svld1sb_s16(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svld1sb_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sb_s16(pg, base); } -// CHECK-LABEL: @test_svld1sb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1sb_s32u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1sb_s32(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svld1sb_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sb_s32(pg, base); } -// CHECK-LABEL: @test_svld1sb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1sb_s64u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sb_s64(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svld1sb_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sb_s64(pg, base); } -// CHECK-LABEL: @test_svld1sb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1sb_u16u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svld1sb_u16(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svld1sb_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sb_u16(pg, base); } -// CHECK-LABEL: @test_svld1sb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1sb_u32u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1sb_u32(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svld1sb_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sb_u32(pg, base); } -// CHECK-LABEL: @test_svld1sb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1sb_u64u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sb_u64(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svld1sb_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sb_u64(pg, base); } -// CHECK-LABEL: @test_svld1sb_vnum_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1sb_vnum_s16u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint16_t test_svld1sb_vnum_s16(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1sb_vnum_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sb_vnum_s16(pg, base, vnum); } -// CHECK-LABEL: @test_svld1sb_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1sb_vnum_s32u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint32_t test_svld1sb_vnum_s32(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1sb_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sb_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: @test_svld1sb_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1sb_vnum_s64u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint64_t test_svld1sb_vnum_s64(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1sb_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sb_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: @test_svld1sb_vnum_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1sb_vnum_u16u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint16_t test_svld1sb_vnum_u16(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1sb_vnum_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sb_vnum_u16(pg, base, vnum); } -// CHECK-LABEL: @test_svld1sb_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1sb_vnum_u32u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint32_t test_svld1sb_vnum_u32(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1sb_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sb_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: @test_svld1sb_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1sb_vnum_u64u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint64_t test_svld1sb_vnum_u64(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1sb_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sb_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: @test_svld1sb_gather_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1sb_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1sb_gather_u32base_s32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svld1sb_gather_u32base_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( %[[PG]], %bases, i64 0) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sb_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: @test_svld1sb_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1sb_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sb_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svld1sb_gather_u64base_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( %[[PG]], %bases, i64 0) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sb_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svld1sb_gather_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1sb_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1sb_gather_u32base_u32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svld1sb_gather_u32base_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( %[[PG]], %bases, i64 0) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sb_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: @test_svld1sb_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1sb_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sb_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svld1sb_gather_u64base_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( %[[PG]], %bases, i64 0) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sb_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svld1sb_gather_s32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_s32offset_s32u10__SVBool_tPKau11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1sb_gather_s32offset_s32(svbool_t pg, const int8_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svld1sb_gather_s32offset_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( %[[PG]], i8* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sb_gather_, s32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sb_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_s64offset_s64u10__SVBool_tPKau11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sb_gather_s64offset_s64(svbool_t pg, const int8_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svld1sb_gather_s64offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( %[[PG]], i8* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sb_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sb_gather_s32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_s32offset_u32u10__SVBool_tPKau11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1sb_gather_s32offset_u32(svbool_t pg, const int8_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svld1sb_gather_s32offset_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( %[[PG]], i8* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sb_gather_, s32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sb_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_s64offset_u64u10__SVBool_tPKau11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sb_gather_s64offset_u64(svbool_t pg, const int8_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svld1sb_gather_s64offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( %[[PG]], i8* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sb_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sb_gather_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_u32offset_s32u10__SVBool_tPKau12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1sb_gather_u32offset_s32(svbool_t pg, const int8_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svld1sb_gather_u32offset_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( %[[PG]], i8* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sb_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sb_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_u64offset_s64u10__SVBool_tPKau12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sb_gather_u64offset_s64(svbool_t pg, const int8_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svld1sb_gather_u64offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( %[[PG]], i8* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sb_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sb_gather_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_u32offset_u32u10__SVBool_tPKau12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1sb_gather_u32offset_u32(svbool_t pg, const int8_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svld1sb_gather_u32offset_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( %[[PG]], i8* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sb_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sb_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sb_gather_u64offset_u64u10__SVBool_tPKau12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sb_gather_u64offset_u64(svbool_t pg, const int8_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svld1sb_gather_u64offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( %[[PG]], i8* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sb_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sb_gather_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1sb_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1sb_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1sb_gather_u32base_offset_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( %[[PG]], %bases, i64 %offset) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sb_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1sb_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1sb_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sb_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1sb_gather_u64base_offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( %[[PG]], %bases, i64 %offset) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sb_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1sb_gather_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1sb_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1sb_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1sb_gather_u32base_offset_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( %[[PG]], %bases, i64 %offset) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sb_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1sb_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1sb_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sb_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1sb_gather_u64base_offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( %[[PG]], %bases, i64 %offset) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sb_gather, _u64base, _offset_u64, )(pg, bases, offset); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c index cc6b1d35d053..acf716b06a50 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sh.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,682 +13,346 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svld1sh_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1sh_s32u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1sh_s32(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svld1sh_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( %[[PG]], i16* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sh_s32(pg, base); } -// CHECK-LABEL: @test_svld1sh_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1sh_s64u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sh_s64(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svld1sh_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( %[[PG]], i16* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sh_s64(pg, base); } -// CHECK-LABEL: @test_svld1sh_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1sh_u32u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1sh_u32(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svld1sh_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( %[[PG]], i16* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sh_u32(pg, base); } -// CHECK-LABEL: @test_svld1sh_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1sh_u64u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sh_u64(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svld1sh_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( %[[PG]], i16* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sh_u64(pg, base); } -// CHECK-LABEL: @test_svld1sh_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1sh_vnum_s32u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint32_t test_svld1sh_vnum_s32(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1sh_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sh_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: @test_svld1sh_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1sh_vnum_s64u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint64_t test_svld1sh_vnum_s64(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1sh_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sh_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: @test_svld1sh_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1sh_vnum_u32u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint32_t test_svld1sh_vnum_u32(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1sh_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sh_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: @test_svld1sh_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1sh_vnum_u64u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint64_t test_svld1sh_vnum_u64(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1sh_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sh_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: @test_svld1sh_gather_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1sh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1sh_gather_u32base_s32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svld1sh_gather_u32base_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( %[[PG]], %bases, i64 0) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: @test_svld1sh_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1sh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sh_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svld1sh_gather_u64base_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( %[[PG]], %bases, i64 0) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svld1sh_gather_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1sh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1sh_gather_u32base_u32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svld1sh_gather_u32base_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( %[[PG]], %bases, i64 0) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: @test_svld1sh_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1sh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sh_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svld1sh_gather_u64base_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( %[[PG]], %bases, i64 0) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svld1sh_gather_s32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_s32offset_s32u10__SVBool_tPKsu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1sh_gather_s32offset_s32(svbool_t pg, const int16_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svld1sh_gather_s32offset_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( %[[PG]], i16* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather_, s32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sh_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_s64offset_s64u10__SVBool_tPKsu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sh_gather_s64offset_s64(svbool_t pg, const int16_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svld1sh_gather_s64offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( %[[PG]], i16* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sh_gather_s32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_s32offset_u32u10__SVBool_tPKsu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1sh_gather_s32offset_u32(svbool_t pg, const int16_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svld1sh_gather_s32offset_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( %[[PG]], i16* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather_, s32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sh_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_s64offset_u64u10__SVBool_tPKsu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sh_gather_s64offset_u64(svbool_t pg, const int16_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svld1sh_gather_s64offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( %[[PG]], i16* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sh_gather_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_u32offset_s32u10__SVBool_tPKsu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1sh_gather_u32offset_s32(svbool_t pg, const int16_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svld1sh_gather_u32offset_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( %[[PG]], i16* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sh_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_u64offset_s64u10__SVBool_tPKsu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sh_gather_u64offset_s64(svbool_t pg, const int16_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svld1sh_gather_u64offset_s64 + // CHECK: %[[PG]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( %[[PG]], i16* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sh_gather_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_u32offset_u32u10__SVBool_tPKsu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1sh_gather_u32offset_u32(svbool_t pg, const int16_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svld1sh_gather_u32offset_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( %[[PG]], i16* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sh_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sh_gather_u64offset_u64u10__SVBool_tPKsu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sh_gather_u64offset_u64(svbool_t pg, const int16_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svld1sh_gather_u64offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( %[[PG]], i16* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sh_gather_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1sh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1sh_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1sh_gather_u32base_offset_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( %[[PG]], %bases, i64 %offset) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1sh_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1sh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sh_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1sh_gather_u64base_offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( %[[PG]], %bases, i64 %offset) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1sh_gather_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1sh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1sh_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1sh_gather_u32base_offset_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( %[[PG]], %bases, i64 %offset) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %2 return SVE_ACLE_FUNC(svld1sh_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1sh_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1sh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sh_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1sh_gather_u64base_offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( %[[PG]], %bases, i64 %offset) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1sh_gather_s32index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_s32index_s32u10__SVBool_tPKsu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1sh_gather_s32index_s32(svbool_t pg, const int16_t *base, svint32_t indices) { + // CHECK-LABEL: test_svld1sh_gather_s32index_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( %[[PG]], i16* %base, %indices) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather_, s32, index_s32, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1sh_gather_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_s64index_s64u10__SVBool_tPKsu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sh_gather_s64index_s64(svbool_t pg, const int16_t *base, svint64_t indices) { + // CHECK-LABEL: test_svld1sh_gather_s64index_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( %[[PG]], i16* %base, %indices) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1sh_gather_s32index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_s32index_u32u10__SVBool_tPKsu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1sh_gather_s32index_u32(svbool_t pg, const int16_t *base, svint32_t indices) { + // CHECK-LABEL: test_svld1sh_gather_s32index_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( %[[PG]], i16* %base, %indices) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather_, s32, index_u32, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1sh_gather_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_s64index_u64u10__SVBool_tPKsu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sh_gather_s64index_u64(svbool_t pg, const int16_t *base, svint64_t indices) { + // CHECK-LABEL: test_svld1sh_gather_s64index_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( %[[PG]], i16* %base, %indices) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1sh_gather_u32index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_u32index_s32u10__SVBool_tPKsu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1sh_gather_u32index_s32(svbool_t pg, const int16_t *base, svuint32_t indices) { + // CHECK-LABEL: test_svld1sh_gather_u32index_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( %[[PG]], i16* %base, %indices) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather_, u32, index_s32, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1sh_gather_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_u64index_s64u10__SVBool_tPKsu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sh_gather_u64index_s64(svbool_t pg, const int16_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svld1sh_gather_u64index_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( %[[PG]], i16* %base, %indices) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1sh_gather_u32index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_u32index_u32u10__SVBool_tPKsu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1sh_gather_u32index_u32(svbool_t pg, const int16_t *base, svuint32_t indices) { + // CHECK-LABEL: test_svld1sh_gather_u32index_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( %[[PG]], i16* %base, %indices) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather_, u32, index_u32, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1sh_gather_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1sh_gather_u64index_u64u10__SVBool_tPKsu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sh_gather_u64index_u64(svbool_t pg, const int16_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svld1sh_gather_u64index_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( %[[PG]], i16* %base, %indices) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1sh_gather_u32base_index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z37test_svld1sh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svld1sh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svld1sh_gather_u32base_index_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather, _u32base, _index_s32, )(pg, bases, index); } -// CHECK-LABEL: @test_svld1sh_gather_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z37test_svld1sh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svld1sh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svld1sh_gather_u64base_index_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: @test_svld1sh_gather_u32base_index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z37test_svld1sh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svld1sh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svld1sh_gather_u32base_index_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather, _u32base, _index_u32, )(pg, bases, index); } -// CHECK-LABEL: @test_svld1sh_gather_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z37test_svld1sh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svld1sh_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svld1sh_gather_u64base_index_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sh_gather, _u64base, _index_u64, )(pg, bases, index); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c index ce6daaffd286..b9c4dcdaff60 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1sw.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,342 +13,174 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svld1sw_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1sw_s64u10__SVBool_tPKi( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sw_s64(svbool_t pg, const int32_t *base) { + // CHECK-LABEL: test_svld1sw_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( %[[PG]], i32* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sw_s64(pg, base); } -// CHECK-LABEL: @test_svld1sw_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1sw_u64u10__SVBool_tPKi( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sw_u64(svbool_t pg, const int32_t *base) { + // CHECK-LABEL: test_svld1sw_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( %[[PG]], i32* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sw_u64(pg, base); } -// CHECK-LABEL: @test_svld1sw_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1sw_vnum_s64u10__SVBool_tPKil( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint64_t test_svld1sw_vnum_s64(svbool_t pg, const int32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1sw_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( %[[PG]], i32* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sw_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: @test_svld1sw_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1sw_vnum_u64u10__SVBool_tPKil( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint64_t test_svld1sw_vnum_u64(svbool_t pg, const int32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1sw_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( %[[PG]], i32* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svld1sw_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: @test_svld1sw_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1sw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sw_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svld1sw_gather_u64base_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( %[[PG]], %bases, i64 0) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sw_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svld1sw_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1sw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sw_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svld1sw_gather_u64base_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( %[[PG]], %bases, i64 0) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sw_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svld1sw_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sw_gather_s64offset_s64u10__SVBool_tPKiu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sw_gather_s64offset_s64(svbool_t pg, const int32_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svld1sw_gather_s64offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( %[[PG]], i32* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sw_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sw_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sw_gather_s64offset_u64u10__SVBool_tPKiu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sw_gather_s64offset_u64(svbool_t pg, const int32_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svld1sw_gather_s64offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( %[[PG]], i32* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sw_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sw_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sw_gather_u64offset_s64u10__SVBool_tPKiu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sw_gather_u64offset_s64(svbool_t pg, const int32_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svld1sw_gather_u64offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( %[[PG]], i32* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sw_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sw_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1sw_gather_u64offset_u64u10__SVBool_tPKiu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sw_gather_u64offset_u64(svbool_t pg, const int32_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svld1sw_gather_u64offset_u64 + // CHECK: %[[PG]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( %[[PG]], i32* %base, %offsets) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sw_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1sw_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1sw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sw_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1sw_gather_u64base_offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( %[[PG]], %bases, i64 %offset) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sw_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1sw_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1sw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sw_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1sw_gather_u64base_offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( %[[PG]], %bases, i64 %offset) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sw_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1sw_gather_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1sw_gather_s64index_s64u10__SVBool_tPKiu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sw_gather_s64index_s64(svbool_t pg, const int32_t *base, svint64_t indices) { + // CHECK-LABEL: test_svld1sw_gather_s64index_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( %[[PG]], i32* %base, %indices) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sw_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1sw_gather_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1sw_gather_s64index_u64u10__SVBool_tPKiu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sw_gather_s64index_u64(svbool_t pg, const int32_t *base, svint64_t indices) { + // CHECK-LABEL: test_svld1sw_gather_s64index_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( %[[PG]], i32* %base, %indices) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sw_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1sw_gather_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1sw_gather_u64index_s64u10__SVBool_tPKiu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1sw_gather_u64index_s64(svbool_t pg, const int32_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svld1sw_gather_u64index_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( %[[PG]], i32* %base, %indices) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sw_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1sw_gather_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1sw_gather_u64index_u64u10__SVBool_tPKiu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1sw_gather_u64index_u64(svbool_t pg, const int32_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svld1sw_gather_u64index_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( %[[PG]], i32* %base, %indices) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sw_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1sw_gather_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z37test_svld1sw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svld1sw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svld1sw_gather_u64base_index_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return SVE_ACLE_FUNC(svld1sw_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: @test_svld1sw_gather_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z37test_svld1sw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svld1sw_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svld1sw_gather_u64base_index_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: %[[SEXT]] return SVE_ACLE_FUNC(svld1sw_gather, _u64base, _index_u64, )(pg, bases, index); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c index 73f95358a59d..6df00731b60a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1ub.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,542 +13,278 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svld1ub_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1ub_s16u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svld1ub_s16(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svld1ub_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( %[[PG]], i8* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1ub_s16(pg, base); } -// CHECK-LABEL: @test_svld1ub_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1ub_s32u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1ub_s32(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svld1ub_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( %[[PG]], i8* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1ub_s32(pg, base); } -// CHECK-LABEL: @test_svld1ub_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1ub_s64u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1ub_s64(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svld1ub_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( %[[PG]], i8* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1ub_s64(pg, base); } -// CHECK-LABEL: @test_svld1ub_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1ub_u16u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svld1ub_u16(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svld1ub_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( %[[PG]], i8* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1ub_u16(pg, base); } -// CHECK-LABEL: @test_svld1ub_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1ub_u32u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1ub_u32(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svld1ub_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( %[[PG]], i8* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1ub_u32(pg, base); } -// CHECK-LABEL: @test_svld1ub_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1ub_u64u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1ub_u64(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svld1ub_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( %[[PG]], i8* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1ub_u64(pg, base); } -// CHECK-LABEL: @test_svld1ub_vnum_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1ub_vnum_s16u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint16_t test_svld1ub_vnum_s16(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1ub_vnum_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1ub_vnum_s16(pg, base, vnum); } -// CHECK-LABEL: @test_svld1ub_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1ub_vnum_s32u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint32_t test_svld1ub_vnum_s32(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1ub_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1ub_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: @test_svld1ub_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1ub_vnum_s64u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint64_t test_svld1ub_vnum_s64(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1ub_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1ub_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: @test_svld1ub_vnum_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1ub_vnum_u16u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint16_t test_svld1ub_vnum_u16(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1ub_vnum_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv8i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1ub_vnum_u16(pg, base, vnum); } -// CHECK-LABEL: @test_svld1ub_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1ub_vnum_u32u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint32_t test_svld1ub_vnum_u32(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1ub_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1ub_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: @test_svld1ub_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1ub_vnum_u64u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint64_t test_svld1ub_vnum_u64(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1ub_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1ub_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: @test_svld1ub_gather_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1ub_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1ub_gather_u32base_s32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svld1ub_gather_u32base_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( %[[PG]], %bases, i64 0) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1ub_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: @test_svld1ub_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1ub_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1ub_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svld1ub_gather_u64base_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( %[[PG]], %bases, i64 0) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1ub_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svld1ub_gather_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1ub_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1ub_gather_u32base_u32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svld1ub_gather_u32base_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( %[[PG]], %bases, i64 0) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1ub_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: @test_svld1ub_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1ub_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1ub_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svld1ub_gather_u64base_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( %[[PG]], %bases, i64 0) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1ub_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svld1ub_gather_s32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_s32offset_s32u10__SVBool_tPKhu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1ub_gather_s32offset_s32(svbool_t pg, const uint8_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svld1ub_gather_s32offset_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( %[[PG]], i8* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1ub_gather_, s32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1ub_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_s64offset_s64u10__SVBool_tPKhu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1ub_gather_s64offset_s64(svbool_t pg, const uint8_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svld1ub_gather_s64offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( %[[PG]], i8* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1ub_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1ub_gather_s32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_s32offset_u32u10__SVBool_tPKhu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1ub_gather_s32offset_u32(svbool_t pg, const uint8_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svld1ub_gather_s32offset_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i8( %[[PG]], i8* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1ub_gather_, s32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1ub_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_s64offset_u64u10__SVBool_tPKhu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1ub_gather_s64offset_u64(svbool_t pg, const uint8_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svld1ub_gather_s64offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( %[[PG]], i8* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1ub_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1ub_gather_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_u32offset_s32u10__SVBool_tPKhu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1ub_gather_u32offset_s32(svbool_t pg, const uint8_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svld1ub_gather_u32offset_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( %[[PG]], i8* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1ub_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1ub_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_u64offset_s64u10__SVBool_tPKhu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1ub_gather_u64offset_s64(svbool_t pg, const uint8_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svld1ub_gather_u64offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( %[[PG]], i8* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1ub_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1ub_gather_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_u32offset_u32u10__SVBool_tPKhu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1ub_gather_u32offset_u32(svbool_t pg, const uint8_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svld1ub_gather_u32offset_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i8( %[[PG]], i8* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1ub_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1ub_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1ub_gather_u64offset_u64u10__SVBool_tPKhu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1ub_gather_u64offset_u64(svbool_t pg, const uint8_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svld1ub_gather_u64offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i8( %[[PG]], i8* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1ub_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1ub_gather_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1ub_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1ub_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1ub_gather_u32base_offset_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( %[[PG]], %bases, i64 %offset) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1ub_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1ub_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1ub_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1ub_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1ub_gather_u64base_offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( %[[PG]], %bases, i64 %offset) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1ub_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1ub_gather_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1ub_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1ub_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1ub_gather_u32base_offset_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i8.nxv4i32( %[[PG]], %bases, i64 %offset) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1ub_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1ub_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1ub_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1ub_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1ub_gather_u64base_offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i8.nxv2i64( %[[PG]], %bases, i64 %offset) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1ub_gather, _u64base, _offset_u64, )(pg, bases, offset); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c index 7b9a2af0f733..735868396ae0 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uh.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,682 +13,346 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svld1uh_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1uh_s32u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1uh_s32(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svld1uh_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( %[[PG]], i16* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1uh_s32(pg, base); } -// CHECK-LABEL: @test_svld1uh_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1uh_s64u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1uh_s64(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svld1uh_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( %[[PG]], i16* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1uh_s64(pg, base); } -// CHECK-LABEL: @test_svld1uh_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1uh_u32u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1uh_u32(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svld1uh_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( %[[PG]], i16* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1uh_u32(pg, base); } -// CHECK-LABEL: @test_svld1uh_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1uh_u64u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1uh_u64(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svld1uh_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( %[[PG]], i16* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1uh_u64(pg, base); } -// CHECK-LABEL: @test_svld1uh_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1uh_vnum_s32u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint32_t test_svld1uh_vnum_s32(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1uh_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1uh_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: @test_svld1uh_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1uh_vnum_s64u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint64_t test_svld1uh_vnum_s64(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1uh_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1uh_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: @test_svld1uh_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1uh_vnum_u32u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint32_t test_svld1uh_vnum_u32(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1uh_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv4i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1uh_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: @test_svld1uh_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1uh_vnum_u64u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint64_t test_svld1uh_vnum_u64(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1uh_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1uh_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: @test_svld1uh_gather_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1uh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1uh_gather_u32base_s32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svld1uh_gather_u32base_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( %[[PG]], %bases, i64 0) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: @test_svld1uh_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1uh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1uh_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svld1uh_gather_u64base_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( %[[PG]], %bases, i64 0) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svld1uh_gather_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1uh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1uh_gather_u32base_u32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svld1uh_gather_u32base_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( %[[PG]], %bases, i64 0) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: et %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: @test_svld1uh_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1uh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1uh_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svld1uh_gather_u64base_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( %[[PG]], %bases, i64 0) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svld1uh_gather_s32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_s32offset_s32u10__SVBool_tPKtu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1uh_gather_s32offset_s32(svbool_t pg, const uint16_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svld1uh_gather_s32offset_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( %[[PG]], i16* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather_, s32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1uh_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_s64offset_s64u10__SVBool_tPKtu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1uh_gather_s64offset_s64(svbool_t pg, const uint16_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svld1uh_gather_s64offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( %[[PG]], i16* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %1 to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1uh_gather_s32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_s32offset_u32u10__SVBool_tPKtu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1uh_gather_s32offset_u32(svbool_t pg, const uint16_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svld1uh_gather_s32offset_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.nxv4i16( %[[PG]], i16* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather_, s32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1uh_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_s64offset_u64u10__SVBool_tPKtu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1uh_gather_s64offset_u64(svbool_t pg, const uint16_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svld1uh_gather_s64offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( %[[PG]], i16* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %1 to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1uh_gather_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_u32offset_s32u10__SVBool_tPKtu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1uh_gather_u32offset_s32(svbool_t pg, const uint16_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svld1uh_gather_u32offset_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( %[[PG]], i16* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1uh_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_u64offset_s64u10__SVBool_tPKtu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1uh_gather_u64offset_s64(svbool_t pg, const uint16_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svld1uh_gather_u64offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( %[[PG]], i16* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1uh_gather_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_u32offset_u32u10__SVBool_tPKtu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1uh_gather_u32offset_u32(svbool_t pg, const uint16_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svld1uh_gather_u32offset_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.nxv4i16( %[[PG]], i16* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1uh_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1uh_gather_u64offset_u64u10__SVBool_tPKtu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1uh_gather_u64offset_u64(svbool_t pg, const uint16_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svld1uh_gather_u64offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i16( %[[PG]], i16* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %1 to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1uh_gather_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1uh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1uh_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1uh_gather_u32base_offset_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( %[[PG]], %bases, i64 %offset) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1uh_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1uh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1uh_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1uh_gather_u64base_offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( %[[PG]], %bases, i64 %offset) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1uh_gather_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1uh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1uh_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1uh_gather_u32base_offset_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( %[[PG]], %bases, i64 %offset) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %2 return SVE_ACLE_FUNC(svld1uh_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1uh_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1uh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1uh_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1uh_gather_u64base_offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( %[[PG]], %bases, i64 %offset) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1uh_gather_s32index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_s32index_s32u10__SVBool_tPKtu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1uh_gather_s32index_s32(svbool_t pg, const uint16_t *base, svint32_t indices) { + // CHECK-LABEL: test_svld1uh_gather_s32index_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( %[[PG]], i16* %base, %indices) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather_, s32, index_s32, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1uh_gather_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_s64index_s64u10__SVBool_tPKtu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1uh_gather_s64index_s64(svbool_t pg, const uint16_t *base, svint64_t indices) { + // CHECK-LABEL: test_svld1uh_gather_s64index_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( %[[PG]], i16* %base, %indices) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1uh_gather_s32index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_s32index_u32u10__SVBool_tPKtu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1uh_gather_s32index_u32(svbool_t pg, const uint16_t *base, svint32_t indices) { + // CHECK-LABEL: test_svld1uh_gather_s32index_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.sxtw.index.nxv4i16( %[[PG]], i16* %base, %indices) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather_, s32, index_u32, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1uh_gather_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_s64index_u64u10__SVBool_tPKtu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1uh_gather_s64index_u64(svbool_t pg, const uint16_t *base, svint64_t indices) { + // CHECK-LABEL: test_svld1uh_gather_s64index_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( %[[PG]], i16* %base, %indices) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1uh_gather_u32index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_u32index_s32u10__SVBool_tPKtu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svld1uh_gather_u32index_s32(svbool_t pg, const uint16_t *base, svuint32_t indices) { + // CHECK-LABEL: test_svld1uh_gather_u32index_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( %[[PG]], i16* %base, %indices) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather_, u32, index_s32, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1uh_gather_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_u64index_s64u10__SVBool_tPKtu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1uh_gather_u64index_s64(svbool_t pg, const uint16_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svld1uh_gather_u64index_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( %[[PG]], i16* %base, %indices) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1uh_gather_u32index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_u32index_u32u10__SVBool_tPKtu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svld1uh_gather_u32index_u32(svbool_t pg, const uint16_t *base, svuint32_t indices) { + // CHECK-LABEL: test_svld1uh_gather_u32index_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.uxtw.index.nxv4i16( %[[PG]], i16* %base, %indices) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather_, u32, index_u32, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1uh_gather_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1uh_gather_u64index_u64u10__SVBool_tPKtu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1uh_gather_u64index_u64(svbool_t pg, const uint16_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svld1uh_gather_u64index_u64 + // CHECK: %[[PG]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i16( %[[PG]], i16* %base, %indices) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1uh_gather_u32base_index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z37test_svld1uh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svld1uh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svld1uh_gather_u32base_index_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather, _u32base, _index_s32, )(pg, bases, index); } -// CHECK-LABEL: @test_svld1uh_gather_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z37test_svld1uh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svld1uh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svld1uh_gather_u64base_index_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: @test_svld1uh_gather_u32base_index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z37test_svld1uh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svld1uh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svld1uh_gather_u32base_index_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv4i16.nxv4i32( %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather, _u32base, _index_u32, )(pg, bases, index); } -// CHECK-LABEL: @test_svld1uh_gather_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z37test_svld1uh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svld1uh_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svld1uh_gather_u64base_index_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i16.nxv2i64( %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uh_gather, _u64base, _index_u64, )(pg, bases, index); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c index fb7f1f89266a..e487d08a5c90 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld1uw.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,342 +13,174 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svld1uw_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1uw_s64u10__SVBool_tPKj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1uw_s64(svbool_t pg, const uint32_t *base) { + // CHECK-LABEL: test_svld1uw_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( %[[PG]], i32* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1uw_s64(pg, base); } -// CHECK-LABEL: @test_svld1uw_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svld1uw_u64u10__SVBool_tPKj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1uw_u64(svbool_t pg, const uint32_t *base) { + // CHECK-LABEL: test_svld1uw_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( %[[PG]], i32* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1uw_u64(pg, base); } -// CHECK-LABEL: @test_svld1uw_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1uw_vnum_s64u10__SVBool_tPKjl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint64_t test_svld1uw_vnum_s64(svbool_t pg, const uint32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1uw_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( %[[PG]], i32* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1uw_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: @test_svld1uw_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z21test_svld1uw_vnum_u64u10__SVBool_tPKjl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint64_t test_svld1uw_vnum_u64(svbool_t pg, const uint32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld1uw_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.nxv2i32( %[[PG]], i32* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svld1uw_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: @test_svld1uw_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1uw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1uw_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svld1uw_gather_u64base_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( %[[PG]], %bases, i64 0) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svld1uw_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z31test_svld1uw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1uw_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svld1uw_gather_u64base_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( %[[PG]], %bases, i64 0) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svld1uw_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1uw_gather_s64offset_s64u10__SVBool_tPKju11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1uw_gather_s64offset_s64(svbool_t pg, const uint32_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svld1uw_gather_s64offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( %[[PG]], i32* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uw_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1uw_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1uw_gather_s64offset_u64u10__SVBool_tPKju11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1uw_gather_s64offset_u64(svbool_t pg, const uint32_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svld1uw_gather_s64offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( %[[PG]], i32* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uw_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1uw_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1uw_gather_u64offset_s64u10__SVBool_tPKju12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1uw_gather_u64offset_s64(svbool_t pg, const uint32_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svld1uw_gather_u64offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( %[[PG]], i32* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uw_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1uw_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svld1uw_gather_u64offset_u64u10__SVBool_tPKju12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1uw_gather_u64offset_u64(svbool_t pg, const uint32_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svld1uw_gather_u64offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.nxv2i32( %[[PG]], i32* %base, %offsets) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uw_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svld1uw_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1uw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1uw_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1uw_gather_u64base_offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( %[[PG]], %bases, i64 %offset) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1uw_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z38test_svld1uw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1uw_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svld1uw_gather_u64base_offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( %[[PG]], %bases, i64 %offset) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svld1uw_gather_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1uw_gather_s64index_s64u10__SVBool_tPKju11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1uw_gather_s64index_s64(svbool_t pg, const uint32_t *base, svint64_t indices) { + // CHECK-LABEL: test_svld1uw_gather_s64index_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( %[[PG]], i32* %base, %indices) + // CHECK: %[[ZEXT:.*]] = zext %1 to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uw_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1uw_gather_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1uw_gather_s64index_u64u10__SVBool_tPKju11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1uw_gather_s64index_u64(svbool_t pg, const uint32_t *base, svint64_t indices) { + // CHECK-LABEL: test_svld1uw_gather_s64index_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( %[[PG]], i32* %base, %indices) + // CHECK: %[[ZEXT:.*]] = zext %1 to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uw_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1uw_gather_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1uw_gather_u64index_s64u10__SVBool_tPKju12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svld1uw_gather_u64index_s64(svbool_t pg, const uint32_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svld1uw_gather_u64index_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( %[[PG]], i32* %base, %indices) + // CHECK: %[[ZEXT]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uw_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1uw_gather_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z32test_svld1uw_gather_u64index_u64u10__SVBool_tPKju12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svld1uw_gather_u64index_u64(svbool_t pg, const uint32_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svld1uw_gather_u64index_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.index.nxv2i32( %[[PG]], i32* %base, %indices) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uw_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svld1uw_gather_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z37test_svld1uw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svld1uw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svld1uw_gather_u64base_index_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: @test_svld1uw_gather_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z37test_svld1uw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svld1uw_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svld1uw_gather_u64base_index_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld1.gather.scalar.offset.nxv2i32.nxv2i64( %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: %[[ZEXT]] return SVE_ACLE_FUNC(svld1uw_gather, _u64base, _index_u64, )(pg, bases, index); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c index f3adc9c882af..4fa4a0692f5c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,41 +12,23 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svld2_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv16bf16.nxv8i1( [[TMP0]], bfloat* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svld2_bf16u10__SVBool_tPKu6__bf16( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv16bf16.nxv8i1( [[TMP0]], bfloat* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16x2_t test_svld2_bf16(svbool_t pg, const bfloat16_t *base) { + // CHECK-LABEL: test_svld2_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv16bf16.nxv8i1( %[[PG]], bfloat* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2,_bf16,,)(pg, base); } -// CHECK-LABEL: @test_svld2_vnum_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv16bf16.nxv8i1( [[TMP0]], bfloat* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svld2_vnum_bf16u10__SVBool_tPKu6__bf16l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv16bf16.nxv8i1( [[TMP0]], bfloat* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbfloat16x2_t test_svld2_vnum_bf16(svbool_t pg, const bfloat16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld2_vnum_bf16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast bfloat* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv16bf16.nxv8i1( %[[PG]], bfloat* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2_vnum,_bf16,,)(pg, base, vnum); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2.c index 303ad2bcb0a2..fbb994b4a891 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld2.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,412 +12,218 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svld2_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svld2_s8u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8x2_t test_svld2_s8(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svld2_s8 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( %pg, i8* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2,_s8,,)(pg, base); } -// CHECK-LABEL: @test_svld2_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld2_s16u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16x2_t test_svld2_s16(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svld2_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( %[[PG]], i16* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2,_s16,,)(pg, base); } -// CHECK-LABEL: @test_svld2_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld2_s32u10__SVBool_tPKi( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32x2_t test_svld2_s32(svbool_t pg, const int32_t *base) { + // CHECK-LABEL: test_svld2_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( %[[PG]], i32* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2,_s32,,)(pg, base); } -// CHECK-LABEL: @test_svld2_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld2_s64u10__SVBool_tPKl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64x2_t test_svld2_s64(svbool_t pg, const int64_t *base) { + // CHECK-LABEL: test_svld2_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( %[[PG]], i64* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2,_s64,,)(pg, base); } -// CHECK-LABEL: @test_svld2_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svld2_u8u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8x2_t test_svld2_u8(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svld2_u8 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( %pg, i8* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2,_u8,,)(pg, base); } -// CHECK-LABEL: @test_svld2_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld2_u16u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16x2_t test_svld2_u16(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svld2_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( %[[PG]], i16* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2,_u16,,)(pg, base); } -// CHECK-LABEL: @test_svld2_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld2_u32u10__SVBool_tPKj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32x2_t test_svld2_u32(svbool_t pg, const uint32_t *base) { + // CHECK-LABEL: test_svld2_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( %[[PG]], i32* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2,_u32,,)(pg, base); } -// CHECK-LABEL: @test_svld2_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld2_u64u10__SVBool_tPKm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64x2_t test_svld2_u64(svbool_t pg, const uint64_t *base) { + // CHECK-LABEL: test_svld2_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( %[[PG]], i64* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2,_u64,,)(pg, base); } -// CHECK-LABEL: @test_svld2_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1( [[TMP0]], half* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld2_f16u10__SVBool_tPKDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1( [[TMP0]], half* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16x2_t test_svld2_f16(svbool_t pg, const float16_t *base) { + // CHECK-LABEL: test_svld2_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1( %[[PG]], half* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2,_f16,,)(pg, base); } -// CHECK-LABEL: @test_svld2_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv8f32.nxv4i1( [[TMP0]], float* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld2_f32u10__SVBool_tPKf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv8f32.nxv4i1( [[TMP0]], float* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32x2_t test_svld2_f32(svbool_t pg, const float32_t *base) { + // CHECK-LABEL: test_svld2_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv8f32.nxv4i1( %[[PG]], float* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2,_f32,,)(pg, base); } -// CHECK-LABEL: @test_svld2_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv4f64.nxv2i1( [[TMP0]], double* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld2_f64u10__SVBool_tPKd( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld2.nxv4f64.nxv2i1( [[TMP0]], double* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64x2_t test_svld2_f64(svbool_t pg, const float64_t *base) { + // CHECK-LABEL: test_svld2_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv4f64.nxv2i1( %[[PG]], double* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2,_f64,,)(pg, base); } -// CHECK-LABEL: @test_svld2_vnum_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svld2_vnum_s8u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8x2_t test_svld2_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld2_vnum_s8 + // CHECK: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( %pg, i8* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2_vnum,_s8,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld2_vnum_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld2_vnum_s16u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16x2_t test_svld2_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld2_vnum_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( %[[PG]], i16* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2_vnum,_s16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld2_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld2_vnum_s32u10__SVBool_tPKil( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32x2_t test_svld2_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld2_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( %[[PG]], i32* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2_vnum,_s32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld2_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld2_vnum_s64u10__SVBool_tPKll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64x2_t test_svld2_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld2_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( %[[PG]], i64* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2_vnum,_s64,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld2_vnum_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svld2_vnum_u8u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8x2_t test_svld2_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld2_vnum_u8 + // CHECK: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv32i8.nxv16i1( %pg, i8* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2_vnum,_u8,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld2_vnum_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld2_vnum_u16u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16x2_t test_svld2_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld2_vnum_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv16i16.nxv8i1( %[[PG]], i16* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2_vnum,_u16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld2_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld2_vnum_u32u10__SVBool_tPKjl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32x2_t test_svld2_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld2_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv8i32.nxv4i1( %[[PG]], i32* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2_vnum,_u32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld2_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld2_vnum_u64u10__SVBool_tPKml( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64x2_t test_svld2_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld2_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv4i64.nxv2i1( %[[PG]], i64* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2_vnum,_u64,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld2_vnum_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1( [[TMP0]], half* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld2_vnum_f16u10__SVBool_tPKDhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1( [[TMP0]], half* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16x2_t test_svld2_vnum_f16(svbool_t pg, const float16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld2_vnum_f16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast half* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv16f16.nxv8i1( %[[PG]], half* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2_vnum,_f16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld2_vnum_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv8f32.nxv4i1( [[TMP0]], float* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld2_vnum_f32u10__SVBool_tPKfl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv8f32.nxv4i1( [[TMP0]], float* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32x2_t test_svld2_vnum_f32(svbool_t pg, const float32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld2_vnum_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast float* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv8f32.nxv4i1( %[[PG]], float* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2_vnum,_f32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld2_vnum_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv4f64.nxv2i1( [[TMP0]], double* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld2_vnum_f64u10__SVBool_tPKdl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld2.nxv4f64.nxv2i1( [[TMP0]], double* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64x2_t test_svld2_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld2_vnum_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast double* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld2.nxv4f64.nxv2i1( %[[PG]], double* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld2_vnum,_f64,,)(pg, base, vnum); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c index 318c6d82d1a9..a5afd64089be 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,40 +12,22 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svld3_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv24bf16.nxv8i1( [[TMP0]], bfloat* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svld3_bf16u10__SVBool_tPKu6__bf16( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv24bf16.nxv8i1( [[TMP0]], bfloat* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16x3_t test_svld3_bf16(svbool_t pg, const bfloat16_t *base) { + // CHECK-LABEL: test_svld3_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv24bf16.nxv8i1( %[[PG]], bfloat* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3,_bf16,,)(pg, base); } -// CHECK-LABEL: @test_svld3_vnum_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv24bf16.nxv8i1( [[TMP0]], bfloat* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svld3_vnum_bf16u10__SVBool_tPKu6__bf16l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv24bf16.nxv8i1( [[TMP0]], bfloat* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbfloat16x3_t test_svld3_vnum_bf16(svbool_t pg, const bfloat16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld3_vnum_bf16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast bfloat* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv24bf16.nxv8i1( %[[PG]], bfloat* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3_vnum,_bf16,,)(pg, base, vnum); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3.c index e207bece5574..9353dae26f0d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld3.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,412 +12,218 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svld3_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svld3_s8u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8x3_t test_svld3_s8(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svld3_s8 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( %pg, i8* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3,_s8,,)(pg, base); } -// CHECK-LABEL: @test_svld3_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld3_s16u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16x3_t test_svld3_s16(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svld3_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( %[[PG]], i16* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3,_s16,,)(pg, base); } -// CHECK-LABEL: @test_svld3_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld3_s32u10__SVBool_tPKi( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32x3_t test_svld3_s32(svbool_t pg, const int32_t *base) { + // CHECK-LABEL: test_svld3_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( %[[PG]], i32* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3,_s32,,)(pg, base); } -// CHECK-LABEL: @test_svld3_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld3_s64u10__SVBool_tPKl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64x3_t test_svld3_s64(svbool_t pg, const int64_t *base) { + // CHECK-LABEL: test_svld3_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( %[[PG]], i64* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3,_s64,,)(pg, base); } -// CHECK-LABEL: @test_svld3_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svld3_u8u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8x3_t test_svld3_u8(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svld3_u8 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( %pg, i8* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3,_u8,,)(pg, base); } -// CHECK-LABEL: @test_svld3_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld3_u16u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16x3_t test_svld3_u16(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svld3_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( %[[PG]], i16* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3,_u16,,)(pg, base); } -// CHECK-LABEL: @test_svld3_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld3_u32u10__SVBool_tPKj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32x3_t test_svld3_u32(svbool_t pg, const uint32_t *base) { + // CHECK-LABEL: test_svld3_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( %[[PG]], i32* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3,_u32,,)(pg, base); } -// CHECK-LABEL: @test_svld3_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld3_u64u10__SVBool_tPKm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64x3_t test_svld3_u64(svbool_t pg, const uint64_t *base) { + // CHECK-LABEL: test_svld3_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( %[[PG]], i64* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3,_u64,,)(pg, base); } -// CHECK-LABEL: @test_svld3_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv24f16.nxv8i1( [[TMP0]], half* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld3_f16u10__SVBool_tPKDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv24f16.nxv8i1( [[TMP0]], half* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16x3_t test_svld3_f16(svbool_t pg, const float16_t *base) { + // CHECK-LABEL: test_svld3_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv24f16.nxv8i1( %[[PG]], half* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3,_f16,,)(pg, base); } -// CHECK-LABEL: @test_svld3_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv12f32.nxv4i1( [[TMP0]], float* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld3_f32u10__SVBool_tPKf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv12f32.nxv4i1( [[TMP0]], float* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32x3_t test_svld3_f32(svbool_t pg, const float32_t *base) { + // CHECK-LABEL: test_svld3_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv12f32.nxv4i1( %[[PG]], float* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3,_f32,,)(pg, base); } -// CHECK-LABEL: @test_svld3_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv6f64.nxv2i1( [[TMP0]], double* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld3_f64u10__SVBool_tPKd( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld3.nxv6f64.nxv2i1( [[TMP0]], double* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64x3_t test_svld3_f64(svbool_t pg, const float64_t *base) { + // CHECK-LABEL: test_svld3_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv6f64.nxv2i1( %[[PG]], double* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3,_f64,,)(pg, base); } -// CHECK-LABEL: @test_svld3_vnum_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svld3_vnum_s8u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8x3_t test_svld3_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld3_vnum_s8 + // CHECK: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( %pg, i8* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3_vnum,_s8,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld3_vnum_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld3_vnum_s16u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16x3_t test_svld3_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld3_vnum_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( %[[PG]], i16* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3_vnum,_s16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld3_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld3_vnum_s32u10__SVBool_tPKil( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32x3_t test_svld3_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld3_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( %[[PG]], i32* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3_vnum,_s32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld3_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld3_vnum_s64u10__SVBool_tPKll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64x3_t test_svld3_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld3_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( %[[PG]], i64* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3_vnum,_s64,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld3_vnum_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svld3_vnum_u8u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8x3_t test_svld3_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld3_vnum_u8 + // CHECK: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv48i8.nxv16i1( %pg, i8* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3_vnum,_u8,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld3_vnum_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld3_vnum_u16u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16x3_t test_svld3_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld3_vnum_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv24i16.nxv8i1( %[[PG]], i16* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3_vnum,_u16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld3_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld3_vnum_u32u10__SVBool_tPKjl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32x3_t test_svld3_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld3_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv12i32.nxv4i1( %[[PG]], i32* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3_vnum,_u32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld3_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld3_vnum_u64u10__SVBool_tPKml( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64x3_t test_svld3_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld3_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv6i64.nxv2i1( %[[PG]], i64* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3_vnum,_u64,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld3_vnum_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv24f16.nxv8i1( [[TMP0]], half* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld3_vnum_f16u10__SVBool_tPKDhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv24f16.nxv8i1( [[TMP0]], half* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16x3_t test_svld3_vnum_f16(svbool_t pg, const float16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld3_vnum_f16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast half* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv24f16.nxv8i1( %[[PG]], half* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3_vnum,_f16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld3_vnum_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv12f32.nxv4i1( [[TMP0]], float* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld3_vnum_f32u10__SVBool_tPKfl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv12f32.nxv4i1( [[TMP0]], float* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32x3_t test_svld3_vnum_f32(svbool_t pg, const float32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld3_vnum_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast float* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv12f32.nxv4i1( %[[PG]], float* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3_vnum,_f32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld3_vnum_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv6f64.nxv2i1( [[TMP0]], double* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld3_vnum_f64u10__SVBool_tPKdl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld3.nxv6f64.nxv2i1( [[TMP0]], double* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64x3_t test_svld3_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld3_vnum_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast double* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld3.nxv6f64.nxv2i1( %[[PG]], double* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld3_vnum,_f64,,)(pg, base, vnum); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c index 483a7b7b5dc1..9d73d5f88f3e 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,40 +12,22 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svld4_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv32bf16.nxv8i1( [[TMP0]], bfloat* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svld4_bf16u10__SVBool_tPKu6__bf16( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv32bf16.nxv8i1( [[TMP0]], bfloat* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16x4_t test_svld4_bf16(svbool_t pg, const bfloat16_t *base) { + // CHECK-LABEL: test_svld4_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv32bf16.nxv8i1( %[[PG]], bfloat* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4,_bf16,,)(pg, base); } -// CHECK-LABEL: @test_svld4_vnum_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv32bf16.nxv8i1( [[TMP0]], bfloat* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svld4_vnum_bf16u10__SVBool_tPKu6__bf16l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv32bf16.nxv8i1( [[TMP0]], bfloat* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbfloat16x4_t test_svld4_vnum_bf16(svbool_t pg, const bfloat16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld4_vnum_bf16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast bfloat* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv32bf16.nxv8i1( %[[PG]], bfloat* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4_vnum,_bf16,,)(pg, base, vnum); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4.c index bee97c947441..bff9ae56ed60 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ld4.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,412 +12,218 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svld4_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svld4_s8u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8x4_t test_svld4_s8(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svld4_s8 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( %pg, i8* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4,_s8,,)(pg, base); } -// CHECK-LABEL: @test_svld4_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld4_s16u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16x4_t test_svld4_s16(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svld4_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( %[[PG]], i16* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4,_s16,,)(pg, base); } -// CHECK-LABEL: @test_svld4_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld4_s32u10__SVBool_tPKi( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32x4_t test_svld4_s32(svbool_t pg, const int32_t *base) { + // CHECK-LABEL: test_svld4_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( %[[PG]], i32* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4,_s32,,)(pg, base); } -// CHECK-LABEL: @test_svld4_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld4_s64u10__SVBool_tPKl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64x4_t test_svld4_s64(svbool_t pg, const int64_t *base) { + // CHECK-LABEL: test_svld4_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( %[[PG]], i64* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4,_s64,,)(pg, base); } -// CHECK-LABEL: @test_svld4_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svld4_u8u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8x4_t test_svld4_u8(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svld4_u8 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( %pg, i8* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4,_u8,,)(pg, base); } -// CHECK-LABEL: @test_svld4_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld4_u16u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16x4_t test_svld4_u16(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svld4_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( %[[PG]], i16* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4,_u16,,)(pg, base); } -// CHECK-LABEL: @test_svld4_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld4_u32u10__SVBool_tPKj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32x4_t test_svld4_u32(svbool_t pg, const uint32_t *base) { + // CHECK-LABEL: test_svld4_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( %[[PG]], i32* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4,_u32,,)(pg, base); } -// CHECK-LABEL: @test_svld4_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld4_u64u10__SVBool_tPKm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64x4_t test_svld4_u64(svbool_t pg, const uint64_t *base) { + // CHECK-LABEL: test_svld4_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( %[[PG]], i64* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4,_u64,,)(pg, base); } -// CHECK-LABEL: @test_svld4_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1( [[TMP0]], half* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld4_f16u10__SVBool_tPKDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1( [[TMP0]], half* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16x4_t test_svld4_f16(svbool_t pg, const float16_t *base) { + // CHECK-LABEL: test_svld4_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1( %[[PG]], half* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4,_f16,,)(pg, base); } -// CHECK-LABEL: @test_svld4_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv16f32.nxv4i1( [[TMP0]], float* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld4_f32u10__SVBool_tPKf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv16f32.nxv4i1( [[TMP0]], float* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32x4_t test_svld4_f32(svbool_t pg, const float32_t *base) { + // CHECK-LABEL: test_svld4_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv16f32.nxv4i1( %[[PG]], float* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4,_f32,,)(pg, base); } -// CHECK-LABEL: @test_svld4_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv8f64.nxv2i1( [[TMP0]], double* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svld4_f64u10__SVBool_tPKd( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ld4.nxv8f64.nxv2i1( [[TMP0]], double* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64x4_t test_svld4_f64(svbool_t pg, const float64_t *base) { + // CHECK-LABEL: test_svld4_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv8f64.nxv2i1( %[[PG]], double* %base) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4,_f64,,)(pg, base); } -// CHECK-LABEL: @test_svld4_vnum_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svld4_vnum_s8u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8x4_t test_svld4_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld4_vnum_s8 + // CHECK: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( %pg, i8* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4_vnum,_s8,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld4_vnum_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld4_vnum_s16u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16x4_t test_svld4_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld4_vnum_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( %[[PG]], i16* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4_vnum,_s16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld4_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld4_vnum_s32u10__SVBool_tPKil( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32x4_t test_svld4_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld4_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( %[[PG]], i32* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4_vnum,_s32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld4_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld4_vnum_s64u10__SVBool_tPKll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64x4_t test_svld4_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld4_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( %[[PG]], i64* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4_vnum,_s64,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld4_vnum_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svld4_vnum_u8u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8x4_t test_svld4_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld4_vnum_u8 + // CHECK: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv64i8.nxv16i1( %pg, i8* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4_vnum,_u8,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld4_vnum_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld4_vnum_u16u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16x4_t test_svld4_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld4_vnum_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv32i16.nxv8i1( %[[PG]], i16* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4_vnum,_u16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld4_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld4_vnum_u32u10__SVBool_tPKjl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32x4_t test_svld4_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld4_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv16i32.nxv4i1( %[[PG]], i32* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4_vnum,_u32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld4_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld4_vnum_u64u10__SVBool_tPKml( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64x4_t test_svld4_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld4_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv8i64.nxv2i1( %[[PG]], i64* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4_vnum,_u64,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld4_vnum_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1( [[TMP0]], half* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld4_vnum_f16u10__SVBool_tPKDhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1( [[TMP0]], half* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16x4_t test_svld4_vnum_f16(svbool_t pg, const float16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld4_vnum_f16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast half* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv32f16.nxv8i1( %[[PG]], half* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4_vnum,_f16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld4_vnum_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv16f32.nxv4i1( [[TMP0]], float* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld4_vnum_f32u10__SVBool_tPKfl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv16f32.nxv4i1( [[TMP0]], float* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32x4_t test_svld4_vnum_f32(svbool_t pg, const float32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld4_vnum_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast float* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv16f32.nxv4i1( %[[PG]], float* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4_vnum,_f32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svld4_vnum_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv8f64.nxv2i1( [[TMP0]], double* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svld4_vnum_f64u10__SVBool_tPKdl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ld4.nxv8f64.nxv2i1( [[TMP0]], double* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64x4_t test_svld4_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svld4_vnum_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast double* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ld4.nxv8f64.nxv2i1( %[[PG]], double* %[[GEP]]) + // CHECK-NEXT: ret %[[LOAD]] return SVE_ACLE_FUNC(svld4_vnum,_f64,,)(pg, base, vnum); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c index 89b0992cd53d..848a7a8fcbb3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,42 +13,24 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldff1_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svldff1_bf16u10__SVBool_tPKu6__bf16( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svldff1_bf16(svbool_t pg, const bfloat16_t *base) { + // CHECK-LABEL: test_svldff1_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv8bf16( %[[PG]], bfloat* %base) + // CHECK: ret %[[LOAD]] // expected-warning@+1 {{implicit declaration of function 'svldff1_bf16'}} return SVE_ACLE_FUNC(svldff1,_bf16,,)(pg, base); } -// CHECK-LABEL: @test_svldff1_vnum_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z22test_svldff1_vnum_bf16u10__SVBool_tPKu6__bf16l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbfloat16_t test_svldff1_vnum_bf16(svbool_t pg, const bfloat16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1_vnum_bf16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast bfloat* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv8bf16( %[[PG]], bfloat* %[[GEP]]) + // CHECK: ret %[[LOAD]] // expected-warning@+1 {{implicit declaration of function 'svldff1_vnum_bf16'}} return SVE_ACLE_FUNC(svldff1_vnum,_bf16,,)(pg, base, vnum); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c index ca12ca0610af..0ded34cc7cb8 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,1096 +13,560 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldff1_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svldff1_s8u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svldff1_s8(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svldff1_s8 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( %pg, i8* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1,_s8,,)(pg, base); } -// CHECK-LABEL: @test_svldff1_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldff1_s16u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svldff1_s16(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svldff1_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( %[[PG]], i16* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1,_s16,,)(pg, base); } -// CHECK-LABEL: @test_svldff1_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldff1_s32u10__SVBool_tPKi( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svldff1_s32(svbool_t pg, const int32_t *base) { + // CHECK-LABEL: test_svldff1_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( %[[PG]], i32* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1,_s32,,)(pg, base); } -// CHECK-LABEL: @test_svldff1_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldff1_s64u10__SVBool_tPKl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svldff1_s64(svbool_t pg, const int64_t *base) { + // CHECK-LABEL: test_svldff1_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( %[[PG]], i64* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1,_s64,,)(pg, base); } -// CHECK-LABEL: @test_svldff1_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svldff1_u8u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svldff1_u8(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svldff1_u8 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( %pg, i8* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1,_u8,,)(pg, base); } -// CHECK-LABEL: @test_svldff1_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldff1_u16u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svldff1_u16(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svldff1_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( %[[PG]], i16* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1,_u16,,)(pg, base); } -// CHECK-LABEL: @test_svldff1_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldff1_u32u10__SVBool_tPKj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svldff1_u32(svbool_t pg, const uint32_t *base) { + // CHECK-LABEL: test_svldff1_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( %[[PG]], i32* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1,_u32,,)(pg, base); } -// CHECK-LABEL: @test_svldff1_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldff1_u64u10__SVBool_tPKm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svldff1_u64(svbool_t pg, const uint64_t *base) { + // CHECK-LABEL: test_svldff1_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( %[[PG]], i64* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1,_u64,,)(pg, base); } -// CHECK-LABEL: @test_svldff1_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldff1_f16u10__SVBool_tPKDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svldff1_f16(svbool_t pg, const float16_t *base) { + // CHECK-LABEL: test_svldff1_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv8f16( %[[PG]], half* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1,_f16,,)(pg, base); } -// CHECK-LABEL: @test_svldff1_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldff1_f32u10__SVBool_tPKf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svldff1_f32(svbool_t pg, const float32_t *base) { + // CHECK-LABEL: test_svldff1_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4f32( %[[PG]], float* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1,_f32,,)(pg, base); } -// CHECK-LABEL: @test_svldff1_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldff1_f64u10__SVBool_tPKd( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svldff1_f64(svbool_t pg, const float64_t *base) { + // CHECK-LABEL: test_svldff1_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2f64( %[[PG]], double* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1,_f64,,)(pg, base); } -// CHECK-LABEL: @test_svldff1_vnum_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svldff1_vnum_s8u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svldff1_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1_vnum_s8 + // CHECK: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( %pg, i8* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1_vnum,_s8,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1_vnum_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_s16u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svldff1_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1_vnum_s16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( %[[PG]], i16* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1_vnum,_s16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_s32u10__SVBool_tPKil( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svldff1_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1_vnum_s32 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( %[[PG]], i32* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1_vnum,_s32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_s64u10__SVBool_tPKll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svldff1_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1_vnum_s64 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( %[[PG]], i64* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1_vnum,_s64,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1_vnum_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svldff1_vnum_u8u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svldff1_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1_vnum_u8 + // CHECK: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv16i8( %pg, i8* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1_vnum,_u8,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1_vnum_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_u16u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svldff1_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1_vnum_u16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv8i16( %[[PG]], i16* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1_vnum,_u16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_u32u10__SVBool_tPKjl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svldff1_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1_vnum_u32 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i32( %[[PG]], i32* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1_vnum,_u32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_u64u10__SVBool_tPKml( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svldff1_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1_vnum_u64 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i64( %[[PG]], i64* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1_vnum,_u64,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1_vnum_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8f16( [[TMP0]], half* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_f16u10__SVBool_tPKDhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8f16( [[TMP0]], half* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svldff1_vnum_f16(svbool_t pg, const float16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1_vnum_f16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast half* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv8f16( %[[PG]], half* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1_vnum,_f16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1_vnum_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4f32( [[TMP0]], float* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_f32u10__SVBool_tPKfl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4f32( [[TMP0]], float* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svldff1_vnum_f32(svbool_t pg, const float32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1_vnum_f32 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast float* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4f32( %[[PG]], float* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1_vnum,_f32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1_vnum_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2f64( [[TMP0]], double* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldff1_vnum_f64u10__SVBool_tPKdl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2f64( [[TMP0]], double* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svldff1_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1_vnum_f64 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast double* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2f64( %[[PG]], double* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldff1_vnum,_f64,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1_gather_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svldff1_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svldff1_gather_u32base_s32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldff1_gather_u32base_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: @test_svldff1_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svldff1_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svldff1_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldff1_gather_u64base_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svldff1_gather_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svldff1_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svldff1_gather_u32base_u32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldff1_gather_u32base_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: @test_svldff1_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svldff1_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svldff1_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldff1_gather_u64base_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svldff1_gather_u32base_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svldff1_gather_u32base_f32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svldff1_gather_u32base_f32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldff1_gather_u32base_f32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather, _u32base, _f32, )(pg, bases); } -// CHECK-LABEL: @test_svldff1_gather_u64base_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svldff1_gather_u64base_f64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svldff1_gather_u64base_f64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldff1_gather_u64base_f64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather, _u64base, _f64, )(pg, bases); } -// CHECK-LABEL: @test_svldff1_gather_s32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_s32offset_s32u10__SVBool_tPKiu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svldff1_gather_s32offset_s32(svbool_t pg, const int32_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svldff1_gather_s32offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32( [[PG]], i32* %base, %offsets) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, s32, offset, _s32)(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_s64offset_s64u10__SVBool_tPKlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svldff1_gather_s64offset_s64(svbool_t pg, const int64_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldff1_gather_s64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[PG]], i64* %base, %offsets) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, s64, offset, _s64)(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1_gather_s32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_s32offset_u32u10__SVBool_tPKju11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svldff1_gather_s32offset_u32(svbool_t pg, const uint32_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svldff1_gather_s32offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i32( [[PG]], i32* %base, %offsets) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, s32, offset, _u32)(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_s64offset_u64u10__SVBool_tPKmu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svldff1_gather_s64offset_u64(svbool_t pg, const uint64_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldff1_gather_s64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[PG]], i64* %base, %offsets) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, s64, offset, _u64)(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1_gather_s32offset_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_s32offset_f32u10__SVBool_tPKfu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svldff1_gather_s32offset_f32(svbool_t pg, const float32_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svldff1_gather_s32offset_f32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4f32( [[PG]], float* %base, %offsets) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, s32, offset, _f32)(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1_gather_s64offset_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_s64offset_f64u10__SVBool_tPKdu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svldff1_gather_s64offset_f64(svbool_t pg, const float64_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldff1_gather_s64offset_f64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2f64( [[PG]], double* %base, %offsets) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, s64, offset, _f64)(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1_gather_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_u32offset_s32u10__SVBool_tPKiu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svldff1_gather_u32offset_s32(svbool_t pg, const int32_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldff1_gather_u32offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32( [[PG]], i32* %base, %offsets) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, u32, offset, _s32)(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_u64offset_s64u10__SVBool_tPKlu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svldff1_gather_u64offset_s64(svbool_t pg, const int64_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldff1_gather_u64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[PG]], i64* %base, %offsets) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, u64, offset, _s64)(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1_gather_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_u32offset_u32u10__SVBool_tPKju12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svldff1_gather_u32offset_u32(svbool_t pg, const uint32_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldff1_gather_u32offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i32( [[PG]], i32* %base, %offsets) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, u32, offset, _u32)(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_u64offset_u64u10__SVBool_tPKmu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svldff1_gather_u64offset_u64(svbool_t pg, const uint64_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldff1_gather_u64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i64( [[PG]], i64* %base, %offsets) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, u64, offset, _u64)(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1_gather_u32offset_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_u32offset_f32u10__SVBool_tPKfu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svldff1_gather_u32offset_f32(svbool_t pg, const float32_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldff1_gather_u32offset_f32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4f32( [[PG]], float* %base, %offsets) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, u32, offset, _f32)(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1_gather_u64offset_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1_gather_u64offset_f64u10__SVBool_tPKdu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svldff1_gather_u64offset_f64(svbool_t pg, const float64_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldff1_gather_u64offset_f64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2f64( [[PG]], double* %base, %offsets) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, u64, offset, _f64)(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1_gather_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z38test_svldff1_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svldff1_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1_gather_u32base_offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z38test_svldff1_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svldff1_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1_gather_u64base_offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1_gather_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z38test_svldff1_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svldff1_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1_gather_u32base_offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z38test_svldff1_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svldff1_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1_gather_u64base_offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1_gather_u32base_offset_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z38test_svldff1_gather_u32base_offset_f32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svldff1_gather_u32base_offset_f32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1_gather_u32base_offset_f32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather, _u32base, _offset_f32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1_gather_u64base_offset_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z38test_svldff1_gather_u64base_offset_f64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svldff1_gather_u64base_offset_f64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1_gather_u64base_offset_f64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather, _u64base, _offset_f64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1_gather_s32index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_s32index_s32u10__SVBool_tPKiu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svldff1_gather_s32index_s32(svbool_t pg, const int32_t *base, svint32_t indices) { + // CHECK-LABEL: test_svldff1_gather_s32index_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32( [[PG]], i32* %base, %indices) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, s32, index, _s32)(pg, base, indices); } -// CHECK-LABEL: @test_svldff1_gather_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_s64index_s64u10__SVBool_tPKlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svldff1_gather_s64index_s64(svbool_t pg, const int64_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldff1_gather_s64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[PG]], i64* %base, %indices) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, s64, index, _s64)(pg, base, indices); } -// CHECK-LABEL: @test_svldff1_gather_s32index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_s32index_u32u10__SVBool_tPKju11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svldff1_gather_s32index_u32(svbool_t pg, const uint32_t *base, svint32_t indices) { + // CHECK-LABEL: test_svldff1_gather_s32index_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i32( [[PG]], i32* %base, %indices) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, s32, index, _u32)(pg, base, indices); } -// CHECK-LABEL: @test_svldff1_gather_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_s64index_u64u10__SVBool_tPKmu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svldff1_gather_s64index_u64(svbool_t pg, const uint64_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldff1_gather_s64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[PG]], i64* %base, %indices) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, s64, index, _u64)(pg, base, indices); } -// CHECK-LABEL: @test_svldff1_gather_s32index_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_s32index_f32u10__SVBool_tPKfu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svldff1_gather_s32index_f32(svbool_t pg, const float32_t *base, svint32_t indices) { + // CHECK-LABEL: test_svldff1_gather_s32index_f32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4f32( [[PG]], float* %base, %indices) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, s32, index, _f32)(pg, base, indices); } -// CHECK-LABEL: @test_svldff1_gather_s64index_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_s64index_f64u10__SVBool_tPKdu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svldff1_gather_s64index_f64(svbool_t pg, const float64_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldff1_gather_s64index_f64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2f64( [[PG]], double* %base, %indices) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, s64, index, _f64)(pg, base, indices); } -// CHECK-LABEL: @test_svldff1_gather_u32index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_u32index_s32u10__SVBool_tPKiu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svldff1_gather_u32index_s32(svbool_t pg, const int32_t *base, svuint32_t indices) { + // CHECK-LABEL: test_svldff1_gather_u32index_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32( [[PG]], i32* %base, %indices) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, u32, index, _s32)(pg, base, indices); } -// CHECK-LABEL: @test_svldff1_gather_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_u64index_s64u10__SVBool_tPKlu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svldff1_gather_u64index_s64(svbool_t pg, const int64_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldff1_gather_u64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[PG]], i64* %base, %indices) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, u64, index, _s64)(pg, base, indices); } -// CHECK-LABEL: @test_svldff1_gather_u32index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_u32index_u32u10__SVBool_tPKju12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svldff1_gather_u32index_u32(svbool_t pg, const uint32_t *base, svuint32_t indices) { + // CHECK-LABEL: test_svldff1_gather_u32index_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i32( [[PG]], i32* %base, %indices) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, u32, index, _u32)(pg, base, indices); } -// CHECK-LABEL: @test_svldff1_gather_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_u64index_u64u10__SVBool_tPKmu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svldff1_gather_u64index_u64(svbool_t pg, const uint64_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldff1_gather_u64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i64( [[PG]], i64* %base, %indices) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, u64, index, _u64)(pg, base, indices); } -// CHECK-LABEL: @test_svldff1_gather_u32index_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_u32index_f32u10__SVBool_tPKfu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svldff1_gather_u32index_f32(svbool_t pg, const float32_t *base, svuint32_t indices) { + // CHECK-LABEL: test_svldff1_gather_u32index_f32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4f32( [[PG]], float* %base, %indices) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, u32, index, _f32)(pg, base, indices); } -// CHECK-LABEL: @test_svldff1_gather_u64index_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z32test_svldff1_gather_u64index_f64u10__SVBool_tPKdu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svldff1_gather_u64index_f64(svbool_t pg, const float64_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldff1_gather_u64index_f64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2f64( [[PG]], double* %base, %indices) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather_, u64, index, _f64)(pg, base, indices); } -// CHECK-LABEL: @test_svldff1_gather_u32base_index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z37test_svldff1_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svldff1_gather_u32base_index_s32 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather, _u32base, _index_s32, )(pg, bases, index); } -// CHECK-LABEL: @test_svldff1_gather_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z37test_svldff1_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldff1_gather_u64base_index_s64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 3 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: @test_svldff1_gather_u32base_index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z37test_svldff1_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svldff1_gather_u32base_index_u32 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i32.nxv4i32( [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather, _u32base, _index_u32, )(pg, bases, index); } -// CHECK-LABEL: @test_svldff1_gather_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z37test_svldff1_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldff1_gather_u64base_index_u64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 3 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i64.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather, _u64base, _index_u64, )(pg, bases, index); } -// CHECK-LABEL: @test_svldff1_gather_u32base_index_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z37test_svldff1_gather_u32base_index_f32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svldff1_gather_u32base_index_f32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svldff1_gather_u32base_index_f32 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4f32.nxv4i32( [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather, _u32base, _index_f32, )(pg, bases, index); } -// CHECK-LABEL: @test_svldff1_gather_u64base_index_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z37test_svldff1_gather_u64base_index_f64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svldff1_gather_u64base_index_f64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldff1_gather_u64base_index_f64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 3 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2f64.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret [[LOAD]] return SVE_ACLE_FUNC(svldff1_gather, _u64base, _index_f64, )(pg, bases, index); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c index 7ebaf8455d01..745f97ca4adc 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sb.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,542 +13,278 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldff1sb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1sb_s16u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svldff1sb_s16(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svldff1sb_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sb_s16(pg, base); } -// CHECK-LABEL: @test_svldff1sb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1sb_s32u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1sb_s32(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svldff1sb_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sb_s32(pg, base); } -// CHECK-LABEL: @test_svldff1sb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1sb_s64u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sb_s64(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svldff1sb_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sb_s64(pg, base); } -// CHECK-LABEL: @test_svldff1sb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1sb_u16u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svldff1sb_u16(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svldff1sb_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sb_u16(pg, base); } -// CHECK-LABEL: @test_svldff1sb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1sb_u32u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1sb_u32(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svldff1sb_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sb_u32(pg, base); } -// CHECK-LABEL: @test_svldff1sb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1sb_u64u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sb_u64(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svldff1sb_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sb_u64(pg, base); } -// CHECK-LABEL: @test_svldff1sb_vnum_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1sb_vnum_s16u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint16_t test_svldff1sb_vnum_s16(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1sb_vnum_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sb_vnum_s16(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1sb_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1sb_vnum_s32u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint32_t test_svldff1sb_vnum_s32(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1sb_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sb_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1sb_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1sb_vnum_s64u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint64_t test_svldff1sb_vnum_s64(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1sb_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sb_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1sb_vnum_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1sb_vnum_u16u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint16_t test_svldff1sb_vnum_u16(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1sb_vnum_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sb_vnum_u16(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1sb_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1sb_vnum_u32u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint32_t test_svldff1sb_vnum_u32(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1sb_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sb_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1sb_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1sb_vnum_u64u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint64_t test_svldff1sb_vnum_u64(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1sb_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sb_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1sb_gather_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1sb_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1sb_gather_u32base_s32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldff1sb_gather_u32base_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sb_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: @test_svldff1sb_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1sb_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sb_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldff1sb_gather_u64base_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sb_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svldff1sb_gather_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1sb_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1sb_gather_u32base_u32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldff1sb_gather_u32base_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sb_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: @test_svldff1sb_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1sb_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sb_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldff1sb_gather_u64base_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sb_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svldff1sb_gather_s32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_s32offset_s32u10__SVBool_tPKau11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1sb_gather_s32offset_s32(svbool_t pg, const int8_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svldff1sb_gather_s32offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[PG]], i8* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sb_gather_, s32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sb_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_s64offset_s64u10__SVBool_tPKau11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sb_gather_s64offset_s64(svbool_t pg, const int8_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldff1sb_gather_s64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[PG]], i8* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sb_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sb_gather_s32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_s32offset_u32u10__SVBool_tPKau11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1sb_gather_s32offset_u32(svbool_t pg, const int8_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svldff1sb_gather_s32offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[PG]], i8* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sb_gather_, s32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sb_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_s64offset_u64u10__SVBool_tPKau11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sb_gather_s64offset_u64(svbool_t pg, const int8_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldff1sb_gather_s64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[PG]], i8* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sb_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sb_gather_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_u32offset_s32u10__SVBool_tPKau12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1sb_gather_u32offset_s32(svbool_t pg, const int8_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldff1sb_gather_u32offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[PG]], i8* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sb_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sb_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_u64offset_s64u10__SVBool_tPKau12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sb_gather_u64offset_s64(svbool_t pg, const int8_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldff1sb_gather_u64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[PG]], i8* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sb_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sb_gather_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_u32offset_u32u10__SVBool_tPKau12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1sb_gather_u32offset_u32(svbool_t pg, const int8_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldff1sb_gather_u32offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[PG]], i8* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sb_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sb_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sb_gather_u64offset_u64u10__SVBool_tPKau12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sb_gather_u64offset_u64(svbool_t pg, const int8_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldff1sb_gather_u64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[PG]], i8* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sb_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sb_gather_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1sb_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1sb_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1sb_gather_u32base_offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sb_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1sb_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1sb_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sb_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1sb_gather_u64base_offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sb_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1sb_gather_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1sb_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1sb_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1sb_gather_u32base_offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sb_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1sb_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1sb_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sb_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1sb_gather_u64base_offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sb_gather, _u64base, _offset_u64, )(pg, bases, offset); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c index ecac83d5e2ed..367ff5c7afb3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sh.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,682 +13,346 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldff1sh_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1sh_s32u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1sh_s32(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svldff1sh_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( %[[PG]], i16* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sh_s32(pg, base); } -// CHECK-LABEL: @test_svldff1sh_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1sh_s64u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sh_s64(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svldff1sh_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( %[[PG]], i16* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sh_s64(pg, base); } -// CHECK-LABEL: @test_svldff1sh_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1sh_u32u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1sh_u32(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svldff1sh_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( %[[PG]], i16* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sh_u32(pg, base); } -// CHECK-LABEL: @test_svldff1sh_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1sh_u64u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sh_u64(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svldff1sh_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( %[[PG]], i16* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sh_u64(pg, base); } -// CHECK-LABEL: @test_svldff1sh_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1sh_vnum_s32u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint32_t test_svldff1sh_vnum_s32(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1sh_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sh_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1sh_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1sh_vnum_s64u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint64_t test_svldff1sh_vnum_s64(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1sh_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sh_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1sh_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1sh_vnum_u32u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint32_t test_svldff1sh_vnum_u32(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1sh_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sh_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1sh_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1sh_vnum_u64u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint64_t test_svldff1sh_vnum_u64(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1sh_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sh_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1sh_gather_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1sh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1sh_gather_u32base_s32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldff1sh_gather_u32base_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: @test_svldff1sh_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1sh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sh_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldff1sh_gather_u64base_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svldff1sh_gather_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1sh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1sh_gather_u32base_u32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldff1sh_gather_u32base_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: @test_svldff1sh_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1sh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sh_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldff1sh_gather_u64base_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svldff1sh_gather_s32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_s32offset_s32u10__SVBool_tPKsu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1sh_gather_s32offset_s32(svbool_t pg, const int16_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svldff1sh_gather_s32offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[PG]], i16* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather_, s32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sh_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_s64offset_s64u10__SVBool_tPKsu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sh_gather_s64offset_s64(svbool_t pg, const int16_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldff1sh_gather_s64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[PG]], i16* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sh_gather_s32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_s32offset_u32u10__SVBool_tPKsu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1sh_gather_s32offset_u32(svbool_t pg, const int16_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svldff1sh_gather_s32offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[PG]], i16* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather_, s32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sh_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_s64offset_u64u10__SVBool_tPKsu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sh_gather_s64offset_u64(svbool_t pg, const int16_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldff1sh_gather_s64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[PG]], i16* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sh_gather_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_u32offset_s32u10__SVBool_tPKsu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1sh_gather_u32offset_s32(svbool_t pg, const int16_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldff1sh_gather_u32offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[PG]], i16* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sh_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_u64offset_s64u10__SVBool_tPKsu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sh_gather_u64offset_s64(svbool_t pg, const int16_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldff1sh_gather_u64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[PG]], i16* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sh_gather_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_u32offset_u32u10__SVBool_tPKsu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1sh_gather_u32offset_u32(svbool_t pg, const int16_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldff1sh_gather_u32offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[PG]], i16* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sh_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sh_gather_u64offset_u64u10__SVBool_tPKsu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sh_gather_u64offset_u64(svbool_t pg, const int16_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldff1sh_gather_u64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[PG]], i16* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sh_gather_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1sh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1sh_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1sh_gather_u32base_offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1sh_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1sh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sh_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1sh_gather_u64base_offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1sh_gather_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1sh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1sh_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1sh_gather_u32base_offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1sh_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1sh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sh_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1sh_gather_u64base_offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1sh_gather_s32index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_s32index_s32u10__SVBool_tPKsu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1sh_gather_s32index_s32(svbool_t pg, const int16_t *base, svint32_t indices) { + // CHECK-LABEL: test_svldff1sh_gather_s32index_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[PG]], i16* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather_, s32, index_s32, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1sh_gather_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_s64index_s64u10__SVBool_tPKsu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sh_gather_s64index_s64(svbool_t pg, const int16_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldff1sh_gather_s64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[PG]], i16* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1sh_gather_s32index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_s32index_u32u10__SVBool_tPKsu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1sh_gather_s32index_u32(svbool_t pg, const int16_t *base, svint32_t indices) { + // CHECK-LABEL: test_svldff1sh_gather_s32index_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[PG]], i16* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather_, s32, index_u32, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1sh_gather_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_s64index_u64u10__SVBool_tPKsu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sh_gather_s64index_u64(svbool_t pg, const int16_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldff1sh_gather_s64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[PG]], i16* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1sh_gather_u32index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_u32index_s32u10__SVBool_tPKsu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1sh_gather_u32index_s32(svbool_t pg, const int16_t *base, svuint32_t indices) { + // CHECK-LABEL: test_svldff1sh_gather_u32index_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[PG]], i16* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather_, u32, index_s32, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1sh_gather_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_u64index_s64u10__SVBool_tPKsu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sh_gather_u64index_s64(svbool_t pg, const int16_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldff1sh_gather_u64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[PG]], i16* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1sh_gather_u32index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_u32index_u32u10__SVBool_tPKsu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1sh_gather_u32index_u32(svbool_t pg, const int16_t *base, svuint32_t indices) { + // CHECK-LABEL: test_svldff1sh_gather_u32index_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[PG]], i16* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather_, u32, index_u32, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1sh_gather_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1sh_gather_u64index_u64u10__SVBool_tPKsu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sh_gather_u64index_u64(svbool_t pg, const int16_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldff1sh_gather_u64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[PG]], i16* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1sh_gather_u32base_index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldff1sh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svldff1sh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svldff1sh_gather_u32base_index_s32 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather, _u32base, _index_s32, )(pg, bases, index); } -// CHECK-LABEL: @test_svldff1sh_gather_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldff1sh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svldff1sh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldff1sh_gather_u64base_index_s64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: @test_svldff1sh_gather_u32base_index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldff1sh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svldff1sh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svldff1sh_gather_u32base_index_u32 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather, _u32base, _index_u32, )(pg, bases, index); } -// CHECK-LABEL: @test_svldff1sh_gather_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldff1sh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svldff1sh_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldff1sh_gather_u64base_index_u64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sh_gather, _u64base, _index_u64, )(pg, bases, index); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c index 76b2b56513fe..32d503344bc2 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1sw.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,342 +13,174 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldff1sw_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1sw_s64u10__SVBool_tPKi( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sw_s64(svbool_t pg, const int32_t *base) { + // CHECK-LABEL: test_svldff1sw_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( %[[PG]], i32* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sw_s64(pg, base); } -// CHECK-LABEL: @test_svldff1sw_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1sw_u64u10__SVBool_tPKi( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sw_u64(svbool_t pg, const int32_t *base) { + // CHECK-LABEL: test_svldff1sw_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( %[[PG]], i32* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sw_u64(pg, base); } -// CHECK-LABEL: @test_svldff1sw_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1sw_vnum_s64u10__SVBool_tPKil( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint64_t test_svldff1sw_vnum_s64(svbool_t pg, const int32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1sw_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( %[[PG]], i32* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sw_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1sw_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1sw_vnum_u64u10__SVBool_tPKil( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint64_t test_svldff1sw_vnum_u64(svbool_t pg, const int32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1sw_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( %[[PG]], i32* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldff1sw_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1sw_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1sw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sw_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldff1sw_gather_u64base_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sw_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svldff1sw_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1sw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sw_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldff1sw_gather_u64base_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sw_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svldff1sw_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sw_gather_s64offset_s64u10__SVBool_tPKiu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sw_gather_s64offset_s64(svbool_t pg, const int32_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldff1sw_gather_s64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[PG]], i32* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sw_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sw_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sw_gather_s64offset_u64u10__SVBool_tPKiu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sw_gather_s64offset_u64(svbool_t pg, const int32_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldff1sw_gather_s64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[PG]], i32* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sw_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sw_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sw_gather_u64offset_s64u10__SVBool_tPKiu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sw_gather_u64offset_s64(svbool_t pg, const int32_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldff1sw_gather_u64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[PG]], i32* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sw_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sw_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1sw_gather_u64offset_u64u10__SVBool_tPKiu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sw_gather_u64offset_u64(svbool_t pg, const int32_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldff1sw_gather_u64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[PG]], i32* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sw_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1sw_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1sw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sw_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1sw_gather_u64base_offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sw_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1sw_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1sw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sw_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1sw_gather_u64base_offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sw_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1sw_gather_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1sw_gather_s64index_s64u10__SVBool_tPKiu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sw_gather_s64index_s64(svbool_t pg, const int32_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldff1sw_gather_s64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[PG]], i32* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sw_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1sw_gather_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1sw_gather_s64index_u64u10__SVBool_tPKiu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sw_gather_s64index_u64(svbool_t pg, const int32_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldff1sw_gather_s64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[PG]], i32* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sw_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1sw_gather_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1sw_gather_u64index_s64u10__SVBool_tPKiu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1sw_gather_u64index_s64(svbool_t pg, const int32_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldff1sw_gather_u64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[PG]], i32* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sw_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1sw_gather_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1sw_gather_u64index_u64u10__SVBool_tPKiu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1sw_gather_u64index_u64(svbool_t pg, const int32_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldff1sw_gather_u64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[PG]], i32* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sw_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1sw_gather_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldff1sw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svldff1sw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldff1sw_gather_u64base_index_s64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sw_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: @test_svldff1sw_gather_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldff1sw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svldff1sw_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldff1sw_gather_u64base_index_u64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] return SVE_ACLE_FUNC(svldff1sw_gather, _u64base, _index_u64, )(pg, bases, index); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c index 2f1c56ac6c79..3477177783c3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1ub.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,542 +13,278 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldff1ub_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1ub_s16u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svldff1ub_s16(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svldff1ub_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( %[[PG]], i8* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1ub_s16(pg, base); } -// CHECK-LABEL: @test_svldff1ub_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1ub_s32u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1ub_s32(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svldff1ub_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( %[[PG]], i8* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1ub_s32(pg, base); } -// CHECK-LABEL: @test_svldff1ub_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1ub_s64u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1ub_s64(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svldff1ub_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( %[[PG]], i8* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1ub_s64(pg, base); } -// CHECK-LABEL: @test_svldff1ub_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1ub_u16u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svldff1ub_u16(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svldff1ub_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( %[[PG]], i8* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1ub_u16(pg, base); } -// CHECK-LABEL: @test_svldff1ub_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1ub_u32u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1ub_u32(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svldff1ub_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( %[[PG]], i8* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1ub_u32(pg, base); } -// CHECK-LABEL: @test_svldff1ub_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1ub_u64u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1ub_u64(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svldff1ub_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( %[[PG]], i8* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1ub_u64(pg, base); } -// CHECK-LABEL: @test_svldff1ub_vnum_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1ub_vnum_s16u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint16_t test_svldff1ub_vnum_s16(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1ub_vnum_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1ub_vnum_s16(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1ub_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1ub_vnum_s32u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint32_t test_svldff1ub_vnum_s32(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1ub_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1ub_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1ub_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1ub_vnum_s64u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint64_t test_svldff1ub_vnum_s64(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1ub_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1ub_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1ub_vnum_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1ub_vnum_u16u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint16_t test_svldff1ub_vnum_u16(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1ub_vnum_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv8i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1ub_vnum_u16(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1ub_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1ub_vnum_u32u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint32_t test_svldff1ub_vnum_u32(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1ub_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1ub_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1ub_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1ub_vnum_u64u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint64_t test_svldff1ub_vnum_u64(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1ub_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1ub_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1ub_gather_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1ub_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1ub_gather_u32base_s32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldff1ub_gather_u32base_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1ub_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: @test_svldff1ub_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1ub_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1ub_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldff1ub_gather_u64base_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1ub_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svldff1ub_gather_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1ub_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1ub_gather_u32base_u32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldff1ub_gather_u32base_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1ub_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: @test_svldff1ub_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1ub_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1ub_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldff1ub_gather_u64base_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1ub_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svldff1ub_gather_s32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_s32offset_s32u10__SVBool_tPKhu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1ub_gather_s32offset_s32(svbool_t pg, const uint8_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svldff1ub_gather_s32offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[PG]], i8* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1ub_gather_, s32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1ub_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_s64offset_s64u10__SVBool_tPKhu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1ub_gather_s64offset_s64(svbool_t pg, const uint8_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldff1ub_gather_s64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[PG]], i8* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1ub_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1ub_gather_s32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_s32offset_u32u10__SVBool_tPKhu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1ub_gather_s32offset_u32(svbool_t pg, const uint8_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svldff1ub_gather_s32offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i8( [[PG]], i8* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1ub_gather_, s32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1ub_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_s64offset_u64u10__SVBool_tPKhu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1ub_gather_s64offset_u64(svbool_t pg, const uint8_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldff1ub_gather_s64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[PG]], i8* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1ub_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1ub_gather_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_u32offset_s32u10__SVBool_tPKhu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1ub_gather_u32offset_s32(svbool_t pg, const uint8_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldff1ub_gather_u32offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[PG]], i8* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1ub_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1ub_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_u64offset_s64u10__SVBool_tPKhu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1ub_gather_u64offset_s64(svbool_t pg, const uint8_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldff1ub_gather_u64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[PG]], i8* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1ub_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1ub_gather_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_u32offset_u32u10__SVBool_tPKhu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1ub_gather_u32offset_u32(svbool_t pg, const uint8_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldff1ub_gather_u32offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i8( [[PG]], i8* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1ub_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1ub_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1ub_gather_u64offset_u64u10__SVBool_tPKhu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1ub_gather_u64offset_u64(svbool_t pg, const uint8_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldff1ub_gather_u64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i8( [[PG]], i8* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1ub_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1ub_gather_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1ub_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1ub_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1ub_gather_u32base_offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1ub_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1ub_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1ub_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1ub_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1ub_gather_u64base_offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1ub_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1ub_gather_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1ub_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1ub_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1ub_gather_u32base_offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i8.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1ub_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1ub_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1ub_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1ub_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1ub_gather_u64base_offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i8.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1ub_gather, _u64base, _offset_u64, )(pg, bases, offset); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c index 5c7eb04af5fa..8c7eef157192 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uh.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,682 +13,346 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldff1uh_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1uh_s32u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1uh_s32(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svldff1uh_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( %[[PG]], i16* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1uh_s32(pg, base); } -// CHECK-LABEL: @test_svldff1uh_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1uh_s64u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1uh_s64(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svldff1uh_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( %[[PG]], i16* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1uh_s64(pg, base); } -// CHECK-LABEL: @test_svldff1uh_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1uh_u32u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1uh_u32(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svldff1uh_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( %[[PG]], i16* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1uh_u32(pg, base); } -// CHECK-LABEL: @test_svldff1uh_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1uh_u64u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1uh_u64(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svldff1uh_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( %[[PG]], i16* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1uh_u64(pg, base); } -// CHECK-LABEL: @test_svldff1uh_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1uh_vnum_s32u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint32_t test_svldff1uh_vnum_s32(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1uh_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1uh_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1uh_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1uh_vnum_s64u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint64_t test_svldff1uh_vnum_s64(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1uh_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1uh_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1uh_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1uh_vnum_u32u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint32_t test_svldff1uh_vnum_u32(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1uh_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv4i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1uh_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1uh_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1uh_vnum_u64u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint64_t test_svldff1uh_vnum_u64(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1uh_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1uh_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1uh_gather_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1uh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1uh_gather_u32base_s32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldff1uh_gather_u32base_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: @test_svldff1uh_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1uh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1uh_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldff1uh_gather_u64base_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svldff1uh_gather_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1uh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1uh_gather_u32base_u32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldff1uh_gather_u32base_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: @test_svldff1uh_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1uh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1uh_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldff1uh_gather_u64base_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svldff1uh_gather_s32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_s32offset_s32u10__SVBool_tPKtu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1uh_gather_s32offset_s32(svbool_t pg, const uint16_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svldff1uh_gather_s32offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[PG]], i16* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather_, s32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1uh_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_s64offset_s64u10__SVBool_tPKtu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1uh_gather_s64offset_s64(svbool_t pg, const uint16_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldff1uh_gather_s64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[PG]], i16* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1uh_gather_s32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_s32offset_u32u10__SVBool_tPKtu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1uh_gather_s32offset_u32(svbool_t pg, const uint16_t *base, svint32_t offsets) { + // CHECK-LABEL: test_svldff1uh_gather_s32offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.nxv4i16( [[PG]], i16* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather_, s32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1uh_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_s64offset_u64u10__SVBool_tPKtu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1uh_gather_s64offset_u64(svbool_t pg, const uint16_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldff1uh_gather_s64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[PG]], i16* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1uh_gather_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_u32offset_s32u10__SVBool_tPKtu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1uh_gather_u32offset_s32(svbool_t pg, const uint16_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldff1uh_gather_u32offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[PG]], i16* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1uh_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_u64offset_s64u10__SVBool_tPKtu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1uh_gather_u64offset_s64(svbool_t pg, const uint16_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldff1uh_gather_u64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[PG]], i16* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1uh_gather_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_u32offset_u32u10__SVBool_tPKtu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1uh_gather_u32offset_u32(svbool_t pg, const uint16_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldff1uh_gather_u32offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.nxv4i16( [[PG]], i16* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1uh_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1uh_gather_u64offset_u64u10__SVBool_tPKtu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1uh_gather_u64offset_u64(svbool_t pg, const uint16_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldff1uh_gather_u64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i16( [[PG]], i16* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1uh_gather_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1uh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1uh_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1uh_gather_u32base_offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1uh_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1uh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1uh_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1uh_gather_u64base_offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1uh_gather_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1uh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1uh_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1uh_gather_u32base_offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1uh_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1uh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1uh_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1uh_gather_u64base_offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1uh_gather_s32index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_s32index_s32u10__SVBool_tPKtu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1uh_gather_s32index_s32(svbool_t pg, const uint16_t *base, svint32_t indices) { + // CHECK-LABEL: test_svldff1uh_gather_s32index_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[PG]], i16* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather_, s32, index_s32, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1uh_gather_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_s64index_s64u10__SVBool_tPKtu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1uh_gather_s64index_s64(svbool_t pg, const uint16_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldff1uh_gather_s64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[PG]], i16* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1uh_gather_s32index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_s32index_u32u10__SVBool_tPKtu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1uh_gather_s32index_u32(svbool_t pg, const uint16_t *base, svint32_t indices) { + // CHECK-LABEL: test_svldff1uh_gather_s32index_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.sxtw.index.nxv4i16( [[PG]], i16* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather_, s32, index_u32, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1uh_gather_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_s64index_u64u10__SVBool_tPKtu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1uh_gather_s64index_u64(svbool_t pg, const uint16_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldff1uh_gather_s64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[PG]], i16* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1uh_gather_u32index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_u32index_s32u10__SVBool_tPKtu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldff1uh_gather_u32index_s32(svbool_t pg, const uint16_t *base, svuint32_t indices) { + // CHECK-LABEL: test_svldff1uh_gather_u32index_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[PG]], i16* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather_, u32, index_s32, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1uh_gather_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_u64index_s64u10__SVBool_tPKtu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1uh_gather_u64index_s64(svbool_t pg, const uint16_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldff1uh_gather_u64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[PG]], i16* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1uh_gather_u32index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_u32index_u32u10__SVBool_tPKtu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldff1uh_gather_u32index_u32(svbool_t pg, const uint16_t *base, svuint32_t indices) { + // CHECK-LABEL: test_svldff1uh_gather_u32index_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.uxtw.index.nxv4i16( [[PG]], i16* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather_, u32, index_u32, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1uh_gather_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1uh_gather_u64index_u64u10__SVBool_tPKtu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1uh_gather_u64index_u64(svbool_t pg, const uint16_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldff1uh_gather_u64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i16( [[PG]], i16* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1uh_gather_u32base_index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldff1uh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svldff1uh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svldff1uh_gather_u32base_index_s32 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather, _u32base, _index_s32, )(pg, bases, index); } -// CHECK-LABEL: @test_svldff1uh_gather_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldff1uh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svldff1uh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldff1uh_gather_u64base_index_s64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: @test_svldff1uh_gather_u32base_index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldff1uh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svldff1uh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svldff1uh_gather_u32base_index_u32 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather, _u32base, _index_u32, )(pg, bases, index); } -// CHECK-LABEL: @test_svldff1uh_gather_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldff1uh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svldff1uh_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldff1uh_gather_u64base_index_u64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uh_gather, _u64base, _index_u64, )(pg, bases, index); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c index 7c9e08ed043a..8a38402f8af0 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldff1uw.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,342 +13,174 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldff1uw_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1uw_s64u10__SVBool_tPKj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1uw_s64(svbool_t pg, const uint32_t *base) { + // CHECK-LABEL: test_svldff1uw_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( %[[PG]], i32* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1uw_s64(pg, base); } -// CHECK-LABEL: @test_svldff1uw_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldff1uw_u64u10__SVBool_tPKj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1uw_u64(svbool_t pg, const uint32_t *base) { + // CHECK-LABEL: test_svldff1uw_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( %[[PG]], i32* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1uw_u64(pg, base); } -// CHECK-LABEL: @test_svldff1uw_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1uw_vnum_s64u10__SVBool_tPKjl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint64_t test_svldff1uw_vnum_s64(svbool_t pg, const uint32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1uw_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( %[[PG]], i32* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1uw_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1uw_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldff1uw_vnum_u64u10__SVBool_tPKjl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint64_t test_svldff1uw_vnum_u64(svbool_t pg, const uint32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldff1uw_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldff1.nxv2i32( %[[PG]], i32* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldff1uw_vnum_u64(pg, base, vnum); } -// CHECK-LABEL: @test_svldff1uw_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1uw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1uw_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldff1uw_gather_u64base_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svldff1uw_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldff1uw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1uw_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldff1uw_gather_u64base_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svldff1uw_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1uw_gather_s64offset_s64u10__SVBool_tPKju11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1uw_gather_s64offset_s64(svbool_t pg, const uint32_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldff1uw_gather_s64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[PG]], i32* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uw_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1uw_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1uw_gather_s64offset_u64u10__SVBool_tPKju11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1uw_gather_s64offset_u64(svbool_t pg, const uint32_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldff1uw_gather_s64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[PG]], i32* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uw_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1uw_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1uw_gather_u64offset_s64u10__SVBool_tPKju12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1uw_gather_u64offset_s64(svbool_t pg, const uint32_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldff1uw_gather_u64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[PG]], i32* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uw_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1uw_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldff1uw_gather_u64offset_u64u10__SVBool_tPKju12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1uw_gather_u64offset_u64(svbool_t pg, const uint32_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldff1uw_gather_u64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.nxv2i32( [[PG]], i32* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uw_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldff1uw_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1uw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1uw_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1uw_gather_u64base_offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1uw_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldff1uw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1uw_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldff1uw_gather_u64base_offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldff1uw_gather_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1uw_gather_s64index_s64u10__SVBool_tPKju11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1uw_gather_s64index_s64(svbool_t pg, const uint32_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldff1uw_gather_s64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[PG]], i32* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uw_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1uw_gather_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1uw_gather_s64index_u64u10__SVBool_tPKju11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1uw_gather_s64index_u64(svbool_t pg, const uint32_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldff1uw_gather_s64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[PG]], i32* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uw_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1uw_gather_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1uw_gather_u64index_s64u10__SVBool_tPKju12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldff1uw_gather_u64index_s64(svbool_t pg, const uint32_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldff1uw_gather_u64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[PG]], i32* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uw_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1uw_gather_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldff1uw_gather_u64index_u64u10__SVBool_tPKju12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldff1uw_gather_u64index_u64(svbool_t pg, const uint32_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldff1uw_gather_u64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.index.nxv2i32( [[PG]], i32* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uw_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldff1uw_gather_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldff1uw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svldff1uw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldff1uw_gather_u64base_index_s64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: @test_svldff1uw_gather_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldff1uw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svldff1uw_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldff1uw_gather_u64base_index_u64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldff1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] return SVE_ACLE_FUNC(svldff1uw_gather, _u64base, _index_u64, )(pg, bases, index); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c index c0cc7a6a16c8..005600a5de96 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -13,42 +12,24 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldnf1_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svldnf1_bf16u10__SVBool_tPKu6__bf16( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svldnf1_bf16(svbool_t pg, const bfloat16_t *base) { + // CHECK-LABEL: test_svldnf1_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv8bf16( %[[PG]], bfloat* %base) + // CHECK: ret %[[LOAD]] // expected-warning@+1 {{implicit declaration of function 'svldnf1_bf16'}} return SVE_ACLE_FUNC(svldnf1,_bf16,,)(pg, base); } -// CHECK-LABEL: @test_svldnf1_vnum_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z22test_svldnf1_vnum_bf16u10__SVBool_tPKu6__bf16l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbfloat16_t test_svldnf1_vnum_bf16(svbool_t pg, const bfloat16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1_vnum_bf16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast bfloat* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv8bf16( %[[PG]], bfloat* %[[GEP]]) + // CHECK: ret %[[LOAD]] // expected-warning@+1 {{implicit declaration of function 'svldnf1_vnum_bf16'}} return SVE_ACLE_FUNC(svldnf1_vnum,_bf16,,)(pg, base, vnum); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1.c index 17628fa2f0a9..b998b0b712c9 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,412 +13,218 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldnf1_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svldnf1_s8u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svldnf1_s8(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svldnf1_s8 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( %pg, i8* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1,_s8,,)(pg, base); } -// CHECK-LABEL: @test_svldnf1_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldnf1_s16u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svldnf1_s16(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svldnf1_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( %[[PG]], i16* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1,_s16,,)(pg, base); } -// CHECK-LABEL: @test_svldnf1_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldnf1_s32u10__SVBool_tPKi( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svldnf1_s32(svbool_t pg, const int32_t *base) { + // CHECK-LABEL: test_svldnf1_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( %[[PG]], i32* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1,_s32,,)(pg, base); } -// CHECK-LABEL: @test_svldnf1_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldnf1_s64u10__SVBool_tPKl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svldnf1_s64(svbool_t pg, const int64_t *base) { + // CHECK-LABEL: test_svldnf1_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( %[[PG]], i64* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1,_s64,,)(pg, base); } -// CHECK-LABEL: @test_svldnf1_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svldnf1_u8u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svldnf1_u8(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svldnf1_u8 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( %pg, i8* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1,_u8,,)(pg, base); } -// CHECK-LABEL: @test_svldnf1_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldnf1_u16u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svldnf1_u16(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svldnf1_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( %[[PG]], i16* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1,_u16,,)(pg, base); } -// CHECK-LABEL: @test_svldnf1_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldnf1_u32u10__SVBool_tPKj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svldnf1_u32(svbool_t pg, const uint32_t *base) { + // CHECK-LABEL: test_svldnf1_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( %[[PG]], i32* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1,_u32,,)(pg, base); } -// CHECK-LABEL: @test_svldnf1_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldnf1_u64u10__SVBool_tPKm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svldnf1_u64(svbool_t pg, const uint64_t *base) { + // CHECK-LABEL: test_svldnf1_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( %[[PG]], i64* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1,_u64,,)(pg, base); } -// CHECK-LABEL: @test_svldnf1_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldnf1_f16u10__SVBool_tPKDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svldnf1_f16(svbool_t pg, const float16_t *base) { + // CHECK-LABEL: test_svldnf1_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv8f16( %[[PG]], half* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1,_f16,,)(pg, base); } -// CHECK-LABEL: @test_svldnf1_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldnf1_f32u10__SVBool_tPKf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svldnf1_f32(svbool_t pg, const float32_t *base) { + // CHECK-LABEL: test_svldnf1_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4f32( %[[PG]], float* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1,_f32,,)(pg, base); } -// CHECK-LABEL: @test_svldnf1_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldnf1_f64u10__SVBool_tPKd( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svldnf1_f64(svbool_t pg, const float64_t *base) { + // CHECK-LABEL: test_svldnf1_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2f64( %[[PG]], double* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1,_f64,,)(pg, base); } -// CHECK-LABEL: @test_svldnf1_vnum_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svldnf1_vnum_s8u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svldnf1_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1_vnum_s8 + // CHECK: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( %pg, i8* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1_vnum,_s8,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1_vnum_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_s16u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svldnf1_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1_vnum_s16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( %[[PG]], i16* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1_vnum,_s16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_s32u10__SVBool_tPKil( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svldnf1_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1_vnum_s32 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( %[[PG]], i32* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1_vnum,_s32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_s64u10__SVBool_tPKll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svldnf1_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1_vnum_s64 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( %[[PG]], i64* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1_vnum,_s64,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1_vnum_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svldnf1_vnum_u8u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svldnf1_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1_vnum_u8 + // CHECK: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv16i8( %pg, i8* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1_vnum,_u8,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1_vnum_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_u16u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svldnf1_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1_vnum_u16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i16( %[[PG]], i16* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1_vnum,_u16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_u32u10__SVBool_tPKjl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svldnf1_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1_vnum_u32 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i32( %[[PG]], i32* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1_vnum,_u32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_u64u10__SVBool_tPKml( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svldnf1_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1_vnum_u64 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i64( %[[PG]], i64* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1_vnum,_u64,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1_vnum_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8f16( [[TMP0]], half* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_f16u10__SVBool_tPKDhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8f16( [[TMP0]], half* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svldnf1_vnum_f16(svbool_t pg, const float16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1_vnum_f16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast half* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv8f16( %[[PG]], half* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1_vnum,_f16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1_vnum_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4f32( [[TMP0]], float* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_f32u10__SVBool_tPKfl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4f32( [[TMP0]], float* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svldnf1_vnum_f32(svbool_t pg, const float32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1_vnum_f32 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast float* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4f32( %[[PG]], float* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1_vnum,_f32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1_vnum_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2f64( [[TMP0]], double* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldnf1_vnum_f64u10__SVBool_tPKdl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2f64( [[TMP0]], double* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svldnf1_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1_vnum_f64 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast double* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2f64( %[[PG]], double* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnf1_vnum,_f64,,)(pg, base, vnum); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c index 242532999dcb..dd206157eff0 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sb.c @@ -1,258 +1,137 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include -// CHECK-LABEL: @test_svldnf1sb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1sb_s16u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svldnf1sb_s16(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svldnf1sb_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sb_s16(pg, base); } -// CHECK-LABEL: @test_svldnf1sb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1sb_s32u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldnf1sb_s32(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svldnf1sb_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sb_s32(pg, base); } -// CHECK-LABEL: @test_svldnf1sb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1sb_s64u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnf1sb_s64(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svldnf1sb_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sb_s64(pg, base); } -// CHECK-LABEL: @test_svldnf1sb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1sb_u16u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svldnf1sb_u16(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svldnf1sb_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sb_u16(pg, base); } -// CHECK-LABEL: @test_svldnf1sb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1sb_u32u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldnf1sb_u32(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svldnf1sb_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sb_u32(pg, base); } -// CHECK-LABEL: @test_svldnf1sb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1sb_u64u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnf1sb_u64(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svldnf1sb_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( %[[PG]], i8* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sb_u64(pg, base); } -// CHECK-LABEL: @test_svldnf1sb_vnum_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1sb_vnum_s16u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint16_t test_svldnf1sb_vnum_s16(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1sb_vnum_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sb_vnum_s16(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1sb_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1sb_vnum_s32u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint32_t test_svldnf1sb_vnum_s32(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1sb_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sb_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1sb_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1sb_vnum_s64u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint64_t test_svldnf1sb_vnum_s64(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1sb_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sb_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1sb_vnum_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1sb_vnum_u16u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint16_t test_svldnf1sb_vnum_u16(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1sb_vnum_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sb_vnum_u16(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1sb_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1sb_vnum_u32u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint32_t test_svldnf1sb_vnum_u32(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1sb_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sb_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1sb_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1sb_vnum_u64u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint64_t test_svldnf1sb_vnum_u64(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1sb_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sb_vnum_u64(pg, base, vnum); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sh.c index bfbdfd58475c..2d200c3117de 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sh.c @@ -1,174 +1,93 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include -// CHECK-LABEL: @test_svldnf1sh_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1sh_s32u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldnf1sh_s32(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svldnf1sh_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( %[[PG]], i16* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sh_s32(pg, base); } -// CHECK-LABEL: @test_svldnf1sh_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1sh_s64u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnf1sh_s64(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svldnf1sh_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( %[[PG]], i16* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sh_s64(pg, base); } -// CHECK-LABEL: @test_svldnf1sh_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1sh_u32u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldnf1sh_u32(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svldnf1sh_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( %[[PG]], i16* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sh_u32(pg, base); } -// CHECK-LABEL: @test_svldnf1sh_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1sh_u64u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnf1sh_u64(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svldnf1sh_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( %[[PG]], i16* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sh_u64(pg, base); } -// CHECK-LABEL: @test_svldnf1sh_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1sh_vnum_s32u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint32_t test_svldnf1sh_vnum_s32(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1sh_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sh_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1sh_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1sh_vnum_s64u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint64_t test_svldnf1sh_vnum_s64(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1sh_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sh_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1sh_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1sh_vnum_u32u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint32_t test_svldnf1sh_vnum_u32(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1sh_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sh_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1sh_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1sh_vnum_u64u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint64_t test_svldnf1sh_vnum_u64(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1sh_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sh_vnum_u64(pg, base, vnum); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sw.c index 8eb3dcda9abf..2c68efeb7a5f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1sw.c @@ -1,90 +1,49 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include -// CHECK-LABEL: @test_svldnf1sw_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1sw_s64u10__SVBool_tPKi( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnf1sw_s64(svbool_t pg, const int32_t *base) { + // CHECK-LABEL: test_svldnf1sw_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( %[[PG]], i32* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sw_s64(pg, base); } -// CHECK-LABEL: @test_svldnf1sw_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1sw_u64u10__SVBool_tPKi( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnf1sw_u64(svbool_t pg, const int32_t *base) { + // CHECK-LABEL: test_svldnf1sw_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( %[[PG]], i32* %base) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sw_u64(pg, base); } -// CHECK-LABEL: @test_svldnf1sw_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1sw_vnum_s64u10__SVBool_tPKil( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint64_t test_svldnf1sw_vnum_s64(svbool_t pg, const int32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1sw_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( %[[PG]], i32* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sw_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1sw_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1sw_vnum_u64u10__SVBool_tPKil( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = sext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint64_t test_svldnf1sw_vnum_u64(svbool_t pg, const int32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1sw_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( %[[PG]], i32* %[[GEP]]) + // CHECK: %[[SEXT:.*]] = sext %[[LOAD]] to + // CHECK: ret %[[SEXT]] return svldnf1sw_vnum_u64(pg, base, vnum); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1ub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1ub.c index 005ba031b5fb..63407aa8cc34 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1ub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1ub.c @@ -1,258 +1,137 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include -// CHECK-LABEL: @test_svldnf1ub_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1ub_s16u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svldnf1ub_s16(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svldnf1ub_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( %[[PG]], i8* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1ub_s16(pg, base); } -// CHECK-LABEL: @test_svldnf1ub_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1ub_s32u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldnf1ub_s32(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svldnf1ub_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( %[[PG]], i8* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1ub_s32(pg, base); } -// CHECK-LABEL: @test_svldnf1ub_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1ub_s64u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnf1ub_s64(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svldnf1ub_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( %[[PG]], i8* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1ub_s64(pg, base); } -// CHECK-LABEL: @test_svldnf1ub_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1ub_u16u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svldnf1ub_u16(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svldnf1ub_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( %[[PG]], i8* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1ub_u16(pg, base); } -// CHECK-LABEL: @test_svldnf1ub_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1ub_u32u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldnf1ub_u32(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svldnf1ub_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( %[[PG]], i8* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1ub_u32(pg, base); } -// CHECK-LABEL: @test_svldnf1ub_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1ub_u64u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnf1ub_u64(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svldnf1ub_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( %[[PG]], i8* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1ub_u64(pg, base); } -// CHECK-LABEL: @test_svldnf1ub_vnum_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1ub_vnum_s16u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint16_t test_svldnf1ub_vnum_s16(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1ub_vnum_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1ub_vnum_s16(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1ub_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1ub_vnum_s32u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint32_t test_svldnf1ub_vnum_s32(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1ub_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1ub_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1ub_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1ub_vnum_s64u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint64_t test_svldnf1ub_vnum_s64(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1ub_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1ub_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1ub_vnum_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1ub_vnum_u16u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint16_t test_svldnf1ub_vnum_u16(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1ub_vnum_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv8i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1ub_vnum_u16(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1ub_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1ub_vnum_u32u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint32_t test_svldnf1ub_vnum_u32(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1ub_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1ub_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1ub_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1ub_vnum_u64u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( [[TMP0]], i8* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint64_t test_svldnf1ub_vnum_u64(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1ub_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i8( %[[PG]], i8* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1ub_vnum_u64(pg, base, vnum); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uh.c index eaca5add8933..d60710759dd4 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uh.c @@ -1,174 +1,93 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include -// CHECK-LABEL: @test_svldnf1uh_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1uh_s32u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldnf1uh_s32(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svldnf1uh_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( %[[PG]], i16* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1uh_s32(pg, base); } -// CHECK-LABEL: @test_svldnf1uh_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1uh_s64u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnf1uh_s64(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svldnf1uh_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( %[[PG]], i16* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1uh_s64(pg, base); } -// CHECK-LABEL: @test_svldnf1uh_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1uh_u32u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldnf1uh_u32(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svldnf1uh_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( %[[PG]], i16* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1uh_u32(pg, base); } -// CHECK-LABEL: @test_svldnf1uh_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1uh_u64u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnf1uh_u64(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svldnf1uh_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( %[[PG]], i16* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1uh_u64(pg, base); } -// CHECK-LABEL: @test_svldnf1uh_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1uh_vnum_s32u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint32_t test_svldnf1uh_vnum_s32(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1uh_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1uh_vnum_s32(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1uh_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1uh_vnum_s64u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint64_t test_svldnf1uh_vnum_s64(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1uh_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1uh_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1uh_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1uh_vnum_u32u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint32_t test_svldnf1uh_vnum_u32(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1uh_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv4i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1uh_vnum_u32(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1uh_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1uh_vnum_u64u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint64_t test_svldnf1uh_vnum_u64(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1uh_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i16( %[[PG]], i16* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1uh_vnum_u64(pg, base, vnum); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uw.c index 6f9d8b5080e2..9005268eb0b5 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnf1uw.c @@ -1,90 +1,49 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include -// CHECK-LABEL: @test_svldnf1uw_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1uw_s64u10__SVBool_tPKj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnf1uw_s64(svbool_t pg, const uint32_t *base) { + // CHECK-LABEL: test_svldnf1uw_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( %[[PG]], i32* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1uw_s64(pg, base); } -// CHECK-LABEL: @test_svldnf1uw_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svldnf1uw_u64u10__SVBool_tPKj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnf1uw_u64(svbool_t pg, const uint32_t *base) { + // CHECK-LABEL: test_svldnf1uw_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( %[[PG]], i32* %base) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1uw_u64(pg, base); } -// CHECK-LABEL: @test_svldnf1uw_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1uw_vnum_s64u10__SVBool_tPKjl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svint64_t test_svldnf1uw_vnum_s64(svbool_t pg, const uint32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1uw_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( %[[PG]], i32* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1uw_vnum_s64(pg, base, vnum); } -// CHECK-LABEL: @test_svldnf1uw_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CHECK-NEXT: ret [[TMP4]] -// -// CPP-CHECK-LABEL: @_Z23test_svldnf1uw_vnum_u64u10__SVBool_tPKjl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = zext [[TMP3]] to -// CPP-CHECK-NEXT: ret [[TMP4]] -// svuint64_t test_svldnf1uw_vnum_u64(svbool_t pg, const uint32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnf1uw_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnf1.nxv2i32( %[[PG]], i32* %[[GEP]]) + // CHECK: %[[ZEXT:.*]] = zext %[[LOAD]] to + // CHECK: ret %[[ZEXT]] return svldnf1uw_vnum_u64(pg, base, vnum); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c index 31755f85c56a..7d972a9dda84 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,42 +13,24 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldnt1_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svldnt1_bf16u10__SVBool_tPKu6__bf16( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8bf16( [[TMP0]], bfloat* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svldnt1_bf16(svbool_t pg, const bfloat16_t *base) { + // CHECK-LABEL: test_svldnt1_bf16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv8bf16( %[[PG]], bfloat* %base) + // CHECK: ret %[[LOAD]] // expected-warning@+1 {{implicit declaration of function 'svldnt1_bf16'}} return SVE_ACLE_FUNC(svldnt1,_bf16,,)(pg, base); } -// CHECK-LABEL: @test_svldnt1_vnum_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z22test_svldnt1_vnum_bf16u10__SVBool_tPKu6__bf16l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8bf16( [[TMP0]], bfloat* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbfloat16_t test_svldnt1_vnum_bf16(svbool_t pg, const bfloat16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnt1_vnum_bf16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast bfloat* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv8bf16( %[[PG]], bfloat* %[[GEP]]) + // CHECK: ret %[[LOAD]] // expected-warning@+1 {{implicit declaration of function 'svldnt1_vnum_bf16'}} return SVE_ACLE_FUNC(svldnt1_vnum,_bf16,,)(pg, base, vnum); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1.c index 037bb7273138..35f9f6377b05 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ldnt1.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include @@ -15,412 +14,218 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldnt1_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svldnt1_s8u10__SVBool_tPKa( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svldnt1_s8(svbool_t pg, const int8_t *base) { + // CHECK-LABEL: test_svldnt1_s8 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( %pg, i8* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1,_s8,,)(pg, base); } -// CHECK-LABEL: @test_svldnt1_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldnt1_s16u10__SVBool_tPKs( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svldnt1_s16(svbool_t pg, const int16_t *base) { + // CHECK-LABEL: test_svldnt1_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( %[[PG]], i16* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1,_s16,,)(pg, base); } -// CHECK-LABEL: @test_svldnt1_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldnt1_s32u10__SVBool_tPKi( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svldnt1_s32(svbool_t pg, const int32_t *base) { + // CHECK-LABEL: test_svldnt1_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( %[[PG]], i32* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1,_s32,,)(pg, base); } -// CHECK-LABEL: @test_svldnt1_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldnt1_s64u10__SVBool_tPKl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svldnt1_s64(svbool_t pg, const int64_t *base) { + // CHECK-LABEL: test_svldnt1_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( %[[PG]], i64* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1,_s64,,)(pg, base); } -// CHECK-LABEL: @test_svldnt1_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svldnt1_u8u10__SVBool_tPKh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svldnt1_u8(svbool_t pg, const uint8_t *base) { + // CHECK-LABEL: test_svldnt1_u8 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( %pg, i8* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1,_u8,,)(pg, base); } -// CHECK-LABEL: @test_svldnt1_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldnt1_u16u10__SVBool_tPKt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svldnt1_u16(svbool_t pg, const uint16_t *base) { + // CHECK-LABEL: test_svldnt1_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( %[[PG]], i16* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1,_u16,,)(pg, base); } -// CHECK-LABEL: @test_svldnt1_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldnt1_u32u10__SVBool_tPKj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svldnt1_u32(svbool_t pg, const uint32_t *base) { + // CHECK-LABEL: test_svldnt1_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( %[[PG]], i32* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1,_u32,,)(pg, base); } -// CHECK-LABEL: @test_svldnt1_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldnt1_u64u10__SVBool_tPKm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svldnt1_u64(svbool_t pg, const uint64_t *base) { + // CHECK-LABEL: test_svldnt1_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( %[[PG]], i64* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1,_u64,,)(pg, base); } -// CHECK-LABEL: @test_svldnt1_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldnt1_f16u10__SVBool_tPKDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8f16( [[TMP0]], half* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svldnt1_f16(svbool_t pg, const float16_t *base) { + // CHECK-LABEL: test_svldnt1_f16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv8f16( %[[PG]], half* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1,_f16,,)(pg, base); } -// CHECK-LABEL: @test_svldnt1_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldnt1_f32u10__SVBool_tPKf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4f32( [[TMP0]], float* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svldnt1_f32(svbool_t pg, const float32_t *base) { + // CHECK-LABEL: test_svldnt1_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv4f32( %[[PG]], float* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1,_f32,,)(pg, base); } -// CHECK-LABEL: @test_svldnt1_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svldnt1_f64u10__SVBool_tPKd( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2f64( [[TMP0]], double* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svldnt1_f64(svbool_t pg, const float64_t *base) { + // CHECK-LABEL: test_svldnt1_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv2f64( %[[PG]], double* %base) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1,_f64,,)(pg, base); } -// CHECK-LABEL: @test_svldnt1_vnum_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svldnt1_vnum_s8u10__SVBool_tPKal( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svldnt1_vnum_s8(svbool_t pg, const int8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnt1_vnum_s8 + // CHECK: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( %pg, i8* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1_vnum,_s8,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnt1_vnum_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_s16u10__SVBool_tPKsl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svldnt1_vnum_s16(svbool_t pg, const int16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnt1_vnum_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( %[[PG]], i16* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1_vnum,_s16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnt1_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_s32u10__SVBool_tPKil( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svldnt1_vnum_s32(svbool_t pg, const int32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnt1_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( %[[PG]], i32* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1_vnum,_s32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnt1_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_s64u10__SVBool_tPKll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svldnt1_vnum_s64(svbool_t pg, const int64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnt1_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( %[[PG]], i64* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1_vnum,_s64,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnt1_vnum_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svldnt1_vnum_u8u10__SVBool_tPKhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svldnt1_vnum_u8(svbool_t pg, const uint8_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnt1_vnum_u8 + // CHECK: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv16i8( %pg, i8* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1_vnum,_u8,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnt1_vnum_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_u16u10__SVBool_tPKtl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svldnt1_vnum_u16(svbool_t pg, const uint16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnt1_vnum_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv8i16( %[[PG]], i16* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1_vnum,_u16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnt1_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_u32u10__SVBool_tPKjl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svldnt1_vnum_u32(svbool_t pg, const uint32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnt1_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv4i32( %[[PG]], i32* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1_vnum,_u32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnt1_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_u64u10__SVBool_tPKml( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svldnt1_vnum_u64(svbool_t pg, const uint64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnt1_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv2i64( %[[PG]], i64* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1_vnum,_u64,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnt1_vnum_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8f16( [[TMP0]], half* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_f16u10__SVBool_tPKDhl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv8f16( [[TMP0]], half* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svldnt1_vnum_f16(svbool_t pg, const float16_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnt1_vnum_f16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast half* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv8f16( %[[PG]], half* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1_vnum,_f16,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnt1_vnum_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4f32( [[TMP0]], float* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_f32u10__SVBool_tPKfl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv4f32( [[TMP0]], float* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svldnt1_vnum_f32(svbool_t pg, const float32_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnt1_vnum_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast float* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv4f32( %[[PG]], float* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1_vnum,_f32,,)(pg, base, vnum); } -// CHECK-LABEL: @test_svldnt1_vnum_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2f64( [[TMP0]], double* [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z21test_svldnt1_vnum_f64u10__SVBool_tPKdl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.ldnt1.nxv2f64( [[TMP0]], double* [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svldnt1_vnum_f64(svbool_t pg, const float64_t *base, int64_t vnum) { + // CHECK-LABEL: test_svldnt1_vnum_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BITCAST:.*]] = bitcast double* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: %[[LOAD:.*]] = call @llvm.aarch64.sve.ldnt1.nxv2f64( %[[PG]], double* %[[GEP]]) + // CHECK: ret %[[LOAD]] return SVE_ACLE_FUNC(svldnt1_vnum,_f64,,)(pg, base, vnum); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c index c39ae2823835..ecba45608a7f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len-bfloat.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,20 +13,12 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svlen_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 3 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svlen_bf16u14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 3 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svlen_bf16(svbfloat16_t op) { + // CHECK-LABEL: test_svlen_bf16 + // CHECK: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64() + // CHECK: %[[SHL:.*]] = shl i64 %[[VSCALE]], 3 + // CHECK: ret i64 %[[SHL]] // expected-warning@+1 {{implicit declaration of function 'svlen_bf16'}} return SVE_ACLE_FUNC(svlen,_bf16,,)(op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c index 7b25b01c4390..115a176e18ae 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_len.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,189 +13,101 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svlen_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 4 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z13test_svlen_s8u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 4 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svlen_s8(svint8_t op) { + // CHECK-LABEL: test_svlen_s8 + // CHECK: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64() + // CHECK: %[[SHL:.*]] = shl i64 %[[VSCALE]], 4 + // CHECK: ret i64 %[[SHL]] return SVE_ACLE_FUNC(svlen,_s8,,)(op); } -// CHECK-LABEL: @test_svlen_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 3 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svlen_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 3 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svlen_s16(svint16_t op) { + // CHECK-LABEL: test_svlen_s16 + // CHECK: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64() + // CHECK: %[[SHL:.*]] = shl i64 %[[VSCALE]], 3 + // CHECK: ret i64 %[[SHL]] return SVE_ACLE_FUNC(svlen,_s16,,)(op); } -// CHECK-LABEL: @test_svlen_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 2 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svlen_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 2 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svlen_s32(svint32_t op) { + // CHECK-LABEL: test_svlen_s32 + // CHECK: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64() + // CHECK: %[[SHL:.*]] = shl i64 %[[VSCALE]], 2 + // CHECK: ret i64 %[[SHL]] return SVE_ACLE_FUNC(svlen,_s32,,)(op); } -// CHECK-LABEL: @test_svlen_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 1 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svlen_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 1 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svlen_s64(svint64_t op) { + // CHECK-LABEL: test_svlen_s64 + // CHECK: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64() + // CHECK: %[[SHL:.*]] = shl i64 %[[VSCALE]], 1 + // CHECK: ret i64 %[[SHL]] return SVE_ACLE_FUNC(svlen,_s64,,)(op); } -// CHECK-LABEL: @test_svlen_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 4 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z13test_svlen_u8u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 4 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svlen_u8(svuint8_t op) { + // CHECK-LABEL: test_svlen_u8 + // CHECK: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64() + // CHECK: %[[SHL:.*]] = shl i64 %[[VSCALE]], 4 + // CHECK: ret i64 %[[SHL]] return SVE_ACLE_FUNC(svlen,_u8,,)(op); } -// CHECK-LABEL: @test_svlen_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 3 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svlen_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 3 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svlen_u16(svuint16_t op) { + // CHECK-LABEL: test_svlen_u16 + // CHECK: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64() + // CHECK: %[[SHL:.*]] = shl i64 %[[VSCALE]], 3 + // CHECK: ret i64 %[[SHL]] return SVE_ACLE_FUNC(svlen,_u16,,)(op); } -// CHECK-LABEL: @test_svlen_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 2 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svlen_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 2 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svlen_u32(svuint32_t op) { + // CHECK-LABEL: test_svlen_u32 + // CHECK: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64() + // CHECK: %[[SHL:.*]] = shl i64 %[[VSCALE]], 2 + // CHECK: ret i64 %[[SHL]] return SVE_ACLE_FUNC(svlen,_u32,,)(op); } -// CHECK-LABEL: @test_svlen_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 1 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svlen_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 1 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svlen_u64(svuint64_t op) { + // CHECK-LABEL: test_svlen_u64 + // CHECK: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64() + // CHECK: %[[SHL:.*]] = shl i64 %[[VSCALE]], 1 + // CHECK: ret i64 %[[SHL]] return SVE_ACLE_FUNC(svlen,_u64,,)(op); } -// CHECK-LABEL: @test_svlen_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 3 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svlen_f16u13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 3 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svlen_f16(svfloat16_t op) { + // CHECK-LABEL: test_svlen_f16 + // CHECK: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64() + // CHECK: %[[SHL:.*]] = shl i64 %[[VSCALE]], 3 + // CHECK: ret i64 %[[SHL]] return SVE_ACLE_FUNC(svlen,_f16,,)(op); } -// CHECK-LABEL: @test_svlen_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 2 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svlen_f32u13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 2 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svlen_f32(svfloat32_t op) { + // CHECK-LABEL: test_svlen_f32 + // CHECK: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64() + // CHECK: %[[SHL:.*]] = shl i64 %[[VSCALE]], 2 + // CHECK: ret i64 %[[SHL]] return SVE_ACLE_FUNC(svlen,_f32,,)(op); } -// CHECK-LABEL: @test_svlen_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 1 -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svlen_f64u13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[TMP0]], 1 -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svlen_f64(svfloat64_t op) { + // CHECK-LABEL: test_svlen_f64 + // CHECK: %[[VSCALE:.*]] = call i64 @llvm.vscale.i64() + // CHECK: %[[SHL:.*]] = shl i64 %[[VSCALE]], 1 + // CHECK: ret i64 %[[SHL]] return SVE_ACLE_FUNC(svlen,_f64,,)(op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c index cb212faa0c03..9fd6c0d28303 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsl.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,891 +13,472 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svlsl_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svlsl_s8_zu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svlsl_s8_z(svbool_t pg, svint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svlsl_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsl_s16_zu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svlsl_s16_z(svbool_t pg, svint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svlsl_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsl_s32_zu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svlsl_s32_z(svbool_t pg, svint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svlsl_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsl_s64_zu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svlsl_s64_z(svbool_t pg, svint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svlsl_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svlsl_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svlsl_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsl_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svlsl_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svlsl_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsl_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svlsl_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svlsl_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsl_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svlsl_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svlsl_s8_mu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svlsl_s8_m(svbool_t pg, svint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svlsl_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsl_s16_mu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svlsl_s16_m(svbool_t pg, svint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svlsl_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsl_s32_mu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svlsl_s32_m(svbool_t pg, svint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svlsl_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsl_s64_mu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svlsl_s64_m(svbool_t pg, svint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svlsl_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svlsl_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svlsl_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsl_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svlsl_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svlsl_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsl_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svlsl_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svlsl_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsl_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svlsl_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svlsl_s8_xu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svlsl_s8_x(svbool_t pg, svint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svlsl_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsl_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svlsl_s16_x(svbool_t pg, svint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svlsl_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsl_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svlsl_s32_x(svbool_t pg, svint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svlsl_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsl_s64_xu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svlsl_s64_x(svbool_t pg, svint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svlsl_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svlsl_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svlsl_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsl_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svlsl_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svlsl_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsl_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svlsl_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svlsl_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsl_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svlsl_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svlsl_wide_s8_zu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svlsl_wide_s8_z(svbool_t pg, svint8_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s16_zu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svlsl_wide_s16_z(svbool_t pg, svint16_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s32_zu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svlsl_wide_s32_z(svbool_t pg, svint32_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svlsl_wide_u8_zu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svlsl_wide_u8_z(svbool_t pg, svuint8_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svlsl_wide_u16_z(svbool_t pg, svuint16_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svlsl_wide_u32_z(svbool_t pg, svuint32_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svlsl_wide_s8_mu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svlsl_wide_s8_m(svbool_t pg, svint8_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s16_mu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svlsl_wide_s16_m(svbool_t pg, svint16_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s32_mu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svlsl_wide_s32_m(svbool_t pg, svint32_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svlsl_wide_u8_mu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svlsl_wide_u8_m(svbool_t pg, svuint8_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svlsl_wide_u16_m(svbool_t pg, svuint16_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svlsl_wide_u32_m(svbool_t pg, svuint32_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svlsl_wide_s8_xu10__SVBool_tu10__SVInt8_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svlsl_wide_s8_x(svbool_t pg, svint8_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s16_xu10__SVBool_tu11__SVInt16_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svlsl_wide_s16_x(svbool_t pg, svint16_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_s32_xu10__SVBool_tu11__SVInt32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svlsl_wide_s32_x(svbool_t pg, svint32_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svlsl_wide_u8_xu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svlsl_wide_u8_x(svbool_t pg, svuint8_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svlsl_wide_u16_x(svbool_t pg, svuint16_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svlsl_wide_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svlsl_wide_u32_x(svbool_t pg, svuint32_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svlsl_wide_n_s8_mu10__SVBool_tu10__SVInt8_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svlsl_wide_n_s8_m(svbool_t pg, svint8_t op1, uint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s16_mu10__SVBool_tu11__SVInt16_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svlsl_wide_n_s16_m(svbool_t pg, svint16_t op1, uint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s32_mu10__SVBool_tu11__SVInt32_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svlsl_wide_n_s32_m(svbool_t pg, svint32_t op1, uint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z22test_svlsl_wide_n_s8_zu10__SVBool_tu10__SVInt8_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svlsl_wide_n_s8_z(svbool_t pg, svint8_t op1, uint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %[[PG]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s16_zu10__SVBool_tu11__SVInt16_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svlsl_wide_n_s16_z(svbool_t pg, svint16_t op1, uint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %[[OP]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s32_zu10__SVBool_tu11__SVInt32_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svlsl_wide_n_s32_z(svbool_t pg, svint32_t op1, uint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %[[OP]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svlsl_wide_n_s8_xu10__SVBool_tu10__SVInt8_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svlsl_wide_n_s8_x(svbool_t pg, svint8_t op1, uint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s16_xu10__SVBool_tu11__SVInt16_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svlsl_wide_n_s16_x(svbool_t pg, svint16_t op1, uint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsl_wide_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z23test_svlsl_wide_n_s32_xu10__SVBool_tu11__SVInt32_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svlsl_wide_n_s32_x(svbool_t pg, svint32_t op1, uint64_t op2) { + // CHECK-LABEL: test_svlsl_wide_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsl.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsl_wide,_n_s32,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c index 3dd34eabf008..4357f1a87cd3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_lsr.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,532 +13,282 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svlsr_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svlsr_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svlsr_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svlsr_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsr_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svlsr_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svlsr_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svlsr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svlsr_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svlsr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsr_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svlsr_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svlsr_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svlsr_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsr_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svlsr_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svlsr_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svlsr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svlsr_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svlsr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsr_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svlsr_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svlsr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svlsr_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsr_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svlsr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svlsr_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svlsr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svlsr_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svlsr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svlsr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsr_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_wide_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svlsr_wide_u8_zu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svlsr_wide_u8_z(svbool_t pg, svuint8_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsr_wide_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_wide_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svlsr_wide_u16_z(svbool_t pg, svuint16_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsr_wide_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_wide_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svlsr_wide_u32_z(svbool_t pg, svuint32_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsr_wide_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_wide_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svlsr_wide_u8_mu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svlsr_wide_u8_m(svbool_t pg, svuint8_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsr_wide_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_wide_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svlsr_wide_u16_m(svbool_t pg, svuint16_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsr_wide_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_wide_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svlsr_wide_u32_m(svbool_t pg, svuint32_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsr_wide_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_wide_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svlsr_wide_u8_xu10__SVBool_tu11__SVUint8_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svlsr_wide_u8_x(svbool_t pg, svuint8_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsr_wide_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_wide_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svlsr_wide_u16_x(svbool_t pg, svuint16_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsr_wide_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_wide_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svlsr_wide_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svlsr_wide_u32_x(svbool_t pg, svuint32_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svlsr_wide_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_wide_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svlsr_wide_n_u8_mu10__SVBool_tu11__SVUint8_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svlsr_wide_n_u8_m(svbool_t pg, svuint8_t op1, uint64_t op2) { + // CHECK-LABEL: test_svlsr_wide_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_wide_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u16_mu10__SVBool_tu12__SVUint16_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svlsr_wide_n_u16_m(svbool_t pg, svuint16_t op1, uint64_t op2) { + // CHECK-LABEL: test_svlsr_wide_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_wide_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u32_mu10__SVBool_tu12__SVUint32_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svlsr_wide_n_u32_m(svbool_t pg, svuint32_t op1, uint64_t op2) { + // CHECK-LABEL: test_svlsr_wide_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_wide_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z22test_svlsr_wide_n_u8_zu10__SVBool_tu11__SVUint8_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svlsr_wide_n_u8_z(svbool_t pg, svuint8_t op1, uint64_t op2) { + // CHECK-LABEL: test_svlsr_wide_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( %pg, %[[PG]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_wide_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u16_zu10__SVBool_tu12__SVUint16_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svlsr_wide_n_u16_z(svbool_t pg, svuint16_t op1, uint64_t op2) { + // CHECK-LABEL: test_svlsr_wide_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( %[[PG]], %[[OP]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_wide_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u32_zu10__SVBool_tu12__SVUint32_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svlsr_wide_n_u32_z(svbool_t pg, svuint32_t op1, uint64_t op2) { + // CHECK-LABEL: test_svlsr_wide_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( %[[PG]], %[[OP]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_wide_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svlsr_wide_n_u8_xu10__SVBool_tu11__SVUint8_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svlsr_wide_n_u8_x(svbool_t pg, svuint8_t op1, uint64_t op2) { + // CHECK-LABEL: test_svlsr_wide_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_wide_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u16_xu10__SVBool_tu12__SVUint16_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svlsr_wide_n_u16_x(svbool_t pg, svuint16_t op1, uint64_t op2) { + // CHECK-LABEL: test_svlsr_wide_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svlsr_wide_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z23test_svlsr_wide_n_u32_xu10__SVBool_tu12__SVUint32_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svlsr_wide_n_u32_x(svbool_t pg, svuint32_t op1, uint64_t op2) { + // CHECK-LABEL: test_svlsr_wide_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.lsr.wide.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svlsr_wide,_n_u32,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c index 269d3918d026..49bd973c93d9 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mad.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,1210 +13,637 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmad_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmad_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmad_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svmad_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s8,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmad_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmad_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmad_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmad_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmad_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svmad_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmad_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmad_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svmad_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u8,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmad_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmad_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmad_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmad_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmad_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svmad_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmad_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svmad_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svmad_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s8,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmad_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmad_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmad_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmad_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmad_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svmad_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmad_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svmad_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svmad_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u8,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmad_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmad_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmad_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmad_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmad_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svmad_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmad_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svmad_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svmad_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s8,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmad_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmad_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmad_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmad_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmad_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svmad_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_s64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmad_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svmad_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svmad_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u8,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmad_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmad_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmad_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmad_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmad_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svmad_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_u64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmad_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svmad_n_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svmad_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s8,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svmad_n_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svmad_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svmad_n_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svmad_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svmad_n_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svmad_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmad_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svmad_n_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svmad_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u8,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svmad_n_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svmad_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svmad_n_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svmad_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svmad_n_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svmad_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmad_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmad_n_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svmad_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s8,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmad_n_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svmad_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmad_n_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svmad_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmad_n_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svmad_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmad_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmad_n_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svmad_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u8,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmad_n_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svmad_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmad_n_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svmad_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmad_n_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svmad_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmad_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmad_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svmad_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s8,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmad_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svmad_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmad_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svmad_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmad_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svmad_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_s64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmad_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mad.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmad_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svmad_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv16i8( %pg, %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u8,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmad_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svmad_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmad_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svmad_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mad.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmad_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svmad_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mad.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_u64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmad_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmad_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmad_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svmad_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmad_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svmad_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmad_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmad_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmad_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svmad_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmad_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svmad_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmad_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmad_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmad_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svmad_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmad_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmad_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svmad_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_f64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svmad_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svmad_n_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svmad_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svmad_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svmad_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svmad_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmad_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svmad_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmad_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svmad_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmad_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svmad_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmad_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svmad_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmad_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svmad_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmad_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmad_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmad_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svmad_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmad.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmad,_n_f64,_x,)(pg, op1, op2, op3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c index 4ced3aa2063a..545c9f4d5d99 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp32.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +f32mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f32mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f32mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -target-feature +f32mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f32mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f32mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,16 +12,9 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmmla_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmmla.nxv4f32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmmla_f32u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmmla.nxv4f32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmmla_f32(svfloat32_t x, svfloat32_t y, svfloat32_t z) { + // CHECK-LABEL: test_svmmla_f32 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.fmmla.nxv4f32( %x, %y, %z) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svmmla,_f32,,)(x, y, z); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c index 1a798c0cf5ba..1682a53ad4d8 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_matmul_fp64.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,16 +12,9 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmmla_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmmla.nxv2f64( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmmla_f64u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmmla.nxv2f64( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svmmla_f64(svfloat64_t x, svfloat64_t y, svfloat64_t z) { + // CHECK-LABEL: test_svmmla_f64 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.fmmla.nxv2f64( %x, %y, %z) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svmmla,_f64,,)(x, y, z); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c index 3ba13569c178..246a025fa81c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_max.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,1210 +13,638 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmax_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmax_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmax_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svmax_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmax_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmax_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmax_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmax_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmax_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svmax_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmax_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmax_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svmax_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmax_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmax_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmax_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmax_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmax_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svmax_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmax_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svmax_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svmax_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmax_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmax_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmax_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmax_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmax_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svmax_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmax_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svmax_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svmax_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmax_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmax_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmax_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmax_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmax_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svmax_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmax_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svmax_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svmax_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmax_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmax_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmax_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmax_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmax_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svmax_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmax_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svmax_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svmax_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmax_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmax_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmax_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmax_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmax_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svmax_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmax_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svmax_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svmax_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svmax_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svmax_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svmax_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svmax_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svmax_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svmax_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmax_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svmax_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svmax_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svmax_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svmax_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svmax_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svmax_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svmax_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svmax_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmax_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmax_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svmax_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmax_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svmax_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmax_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svmax_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmax_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svmax_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmax_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmax_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svmax_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmax_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svmax_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmax_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svmax_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmax_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svmax_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmax_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmax_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svmax_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmax_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svmax_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmax_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svmax_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmax_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svmax_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smax.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmax_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umax.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmax_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svmax_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmax_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svmax_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmax_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svmax_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umax.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmax_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svmax_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umax.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmax_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmax_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmax_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmax_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmax_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmax_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmax_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmax_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmax_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmax_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmax_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmax_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmax_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmax_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmax_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmax_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmax_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmax_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmax_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_f64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svmax_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svmax_n_f16_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_f32_zu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svmax_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svmax_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_f64_zu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svmax_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svmax_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmax_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svmax_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_f32_mu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmax_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svmax_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_f64_mu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmax_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svmax_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmax_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svmax_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_f32_xu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmax_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svmax_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmax_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmax_n_f64_xu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmax_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svmax_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmax.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmax,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c index 3ff6c42b20e2..881ebec77034 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnm.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,338 +13,178 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmaxnm_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmaxnm_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmaxnm_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnm_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmaxnm_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmaxnm_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnm_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmaxnm_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmaxnm_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnm_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmaxnm_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmaxnm_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnm_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmaxnm_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmaxnm_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnm_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmaxnm_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmaxnm_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnm_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmaxnm_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmaxnm_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnm_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmaxnm_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmaxnm_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnm_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmaxnm_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmaxnm_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmaxnm_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_f64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnm_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svmaxnm_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svmaxnm_n_f16_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnm_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f32_zu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svmaxnm_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svmaxnm_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnm_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f64_zu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svmaxnm_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svmaxnm_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnm_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmaxnm_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svmaxnm_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnm_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f32_mu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmaxnm_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svmaxnm_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnm_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f64_mu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmaxnm_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svmaxnm_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnm_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmaxnm_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svmaxnm_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnm_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f32_xu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmaxnm_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svmaxnm_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnm_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svmaxnm_n_f64_xu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmaxnm_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svmaxnm_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnm.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnm,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnmv.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnmv.c index b9f1c9c04134..933b46497745 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnmv.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxnmv.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include @@ -15,53 +14,29 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmaxnmv_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fmaxnmv.nxv8f16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret half [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxnmv_f16u10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fmaxnmv.nxv8f16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret half [[TMP1]] -// float16_t test_svmaxnmv_f16(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svmaxnmv_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call half @llvm.aarch64.sve.fmaxnmv.nxv8f16( %[[PG]], %op) + // CHECK: ret half %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnmv,_f16,,)(pg, op); } -// CHECK-LABEL: @test_svmaxnmv_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fmaxnmv.nxv4f32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret float [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxnmv_f32u10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fmaxnmv.nxv4f32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret float [[TMP1]] -// float32_t test_svmaxnmv_f32(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svmaxnmv_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call float @llvm.aarch64.sve.fmaxnmv.nxv4f32( %[[PG]], %op) + // CHECK: ret float %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnmv,_f32,,)(pg, op); } -// CHECK-LABEL: @test_svmaxnmv_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fmaxnmv.nxv2f64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret double [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxnmv_f64u10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fmaxnmv.nxv2f64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret double [[TMP1]] -// float64_t test_svmaxnmv_f64(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svmaxnmv_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call double @llvm.aarch64.sve.fmaxnmv.nxv2f64( %[[PG]], %op) + // CHECK: ret double %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxnmv,_f64,,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxv.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxv.c index e0dced690a59..85cd5329bf56 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxv.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_maxv.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include @@ -15,185 +14,99 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmaxv_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.smaxv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i8 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svmaxv_s8u10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.smaxv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i8 [[TMP0]] -// int8_t test_svmaxv_s8(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svmaxv_s8 + // CHECK: %[[INTRINSIC:.*]] = call i8 @llvm.aarch64.sve.smaxv.nxv16i8( %pg, %op) + // CHECK: ret i8 %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxv,_s8,,)(pg, op); } -// CHECK-LABEL: @test_svmaxv_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.smaxv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i16 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmaxv_s16u10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.smaxv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i16 [[TMP1]] -// int16_t test_svmaxv_s16(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svmaxv_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i16 @llvm.aarch64.sve.smaxv.nxv8i16( %[[PG]], %op) + // CHECK: ret i16 %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxv,_s16,,)(pg, op); } -// CHECK-LABEL: @test_svmaxv_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.smaxv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmaxv_s32u10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.smaxv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// int32_t test_svmaxv_s32(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svmaxv_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.smaxv.nxv4i32( %[[PG]], %op) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxv,_s32,,)(pg, op); } -// CHECK-LABEL: @test_svmaxv_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.smaxv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmaxv_s64u10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.smaxv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// int64_t test_svmaxv_s64(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svmaxv_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.smaxv.nxv2i64( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxv,_s64,,)(pg, op); } -// CHECK-LABEL: @test_svmaxv_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.umaxv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i8 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svmaxv_u8u10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.umaxv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i8 [[TMP0]] -// uint8_t test_svmaxv_u8(svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svmaxv_u8 + // CHECK: %[[INTRINSIC:.*]] = call i8 @llvm.aarch64.sve.umaxv.nxv16i8( %pg, %op) + // CHECK: ret i8 %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxv,_u8,,)(pg, op); } -// CHECK-LABEL: @test_svmaxv_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.umaxv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i16 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmaxv_u16u10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.umaxv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i16 [[TMP1]] -// uint16_t test_svmaxv_u16(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svmaxv_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i16 @llvm.aarch64.sve.umaxv.nxv8i16( %[[PG]], %op) + // CHECK: ret i16 %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxv,_u16,,)(pg, op); } -// CHECK-LABEL: @test_svmaxv_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.umaxv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmaxv_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.umaxv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// uint32_t test_svmaxv_u32(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svmaxv_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.umaxv.nxv4i32( %[[PG]], %op) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxv,_u32,,)(pg, op); } -// CHECK-LABEL: @test_svmaxv_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.umaxv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmaxv_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.umaxv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svmaxv_u64(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svmaxv_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.umaxv.nxv2i64( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxv,_u64,,)(pg, op); } -// CHECK-LABEL: @test_svmaxv_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fmaxv.nxv8f16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret half [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmaxv_f16u10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fmaxv.nxv8f16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret half [[TMP1]] -// float16_t test_svmaxv_f16(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svmaxv_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call half @llvm.aarch64.sve.fmaxv.nxv8f16( %[[PG]], %op) + // CHECK: ret half %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxv,_f16,,)(pg, op); } -// CHECK-LABEL: @test_svmaxv_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fmaxv.nxv4f32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret float [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmaxv_f32u10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fmaxv.nxv4f32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret float [[TMP1]] -// float32_t test_svmaxv_f32(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svmaxv_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call float @llvm.aarch64.sve.fmaxv.nxv4f32( %[[PG]], %op) + // CHECK: ret float %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxv,_f32,,)(pg, op); } -// CHECK-LABEL: @test_svmaxv_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fmaxv.nxv2f64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret double [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmaxv_f64u10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fmaxv.nxv2f64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret double [[TMP1]] -// float64_t test_svmaxv_f64(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svmaxv_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call double @llvm.aarch64.sve.fmaxv.nxv2f64( %[[PG]], %op) + // CHECK: ret double %[[INTRINSIC]] return SVE_ACLE_FUNC(svmaxv,_f64,,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c index d4c15435ba1b..0e124707c97a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_min.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,1210 +13,638 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmin_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmin_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmin_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svmin_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmin_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmin_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmin_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmin_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmin_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svmin_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmin_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmin_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svmin_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmin_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmin_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmin_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmin_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmin_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svmin_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmin_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svmin_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svmin_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmin_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmin_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmin_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmin_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmin_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svmin_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmin_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svmin_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svmin_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmin_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmin_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmin_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmin_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmin_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svmin_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmin_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svmin_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svmin_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmin_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmin_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmin_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmin_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmin_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svmin_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmin_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svmin_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svmin_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmin_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmin_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmin_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmin_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmin_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svmin_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmin_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svmin_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svmin_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svmin_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svmin_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svmin_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svmin_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svmin_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svmin_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmin_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svmin_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svmin_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svmin_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svmin_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svmin_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svmin_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svmin_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svmin_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmin_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmin_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svmin_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmin_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svmin_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmin_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svmin_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmin_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svmin_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmin_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmin_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svmin_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmin_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svmin_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmin_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svmin_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmin_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svmin_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmin_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmin_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svmin_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmin_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svmin_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmin_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svmin_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmin_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svmin_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smin.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmin_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umin.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmin_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svmin_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmin_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svmin_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmin_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svmin_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umin.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmin_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svmin_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umin.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmin_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmin_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmin_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmin_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmin_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmin_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmin_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmin_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmin_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmin_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmin_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmin_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmin_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmin_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmin_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmin_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmin_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmin_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmin_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_f64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svmin_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svmin_n_f16_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_f32_zu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svmin_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svmin_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_f64_zu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svmin_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svmin_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmin_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svmin_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_f32_mu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmin_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svmin_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_f64_mu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmin_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svmin_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmin_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svmin_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_f32_xu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmin_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svmin_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmin_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmin_n_f64_xu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmin_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svmin_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmin.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmin,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c index e1a353ea427e..6dbd5e89823d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnm.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,338 +13,178 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svminnm_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svminnm_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svminnm_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svminnm_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnm_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svminnm_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svminnm_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svminnm_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnm_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svminnm_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svminnm_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svminnm_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnm_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svminnm_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svminnm_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svminnm_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnm_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svminnm_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svminnm_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svminnm_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnm_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svminnm_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svminnm_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svminnm_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnm_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svminnm_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svminnm_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svminnm_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnm_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svminnm_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svminnm_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svminnm_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnm_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svminnm_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svminnm_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svminnm_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_f64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnm_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svminnm_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svminnm_n_f16_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnm_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f32_zu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svminnm_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svminnm_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnm_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f64_zu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svminnm_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svminnm_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnm_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svminnm_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svminnm_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnm_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f32_mu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svminnm_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svminnm_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnm_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f64_mu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svminnm_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svminnm_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnm_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svminnm_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svminnm_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnm_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f32_xu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svminnm_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svminnm_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnm_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svminnm_n_f64_xu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svminnm_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svminnm_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnm.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnm,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnmv.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnmv.c index 7054ae9ed63a..43825d79cb30 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnmv.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minnmv.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include @@ -15,53 +14,29 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svminnmv_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fminnmv.nxv8f16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret half [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminnmv_f16u10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fminnmv.nxv8f16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret half [[TMP1]] -// float16_t test_svminnmv_f16(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svminnmv_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call half @llvm.aarch64.sve.fminnmv.nxv8f16( %[[PG]], %op) + // CHECK: ret half %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnmv,_f16,,)(pg, op); } -// CHECK-LABEL: @test_svminnmv_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fminnmv.nxv4f32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret float [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminnmv_f32u10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fminnmv.nxv4f32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret float [[TMP1]] -// float32_t test_svminnmv_f32(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svminnmv_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call float @llvm.aarch64.sve.fminnmv.nxv4f32( %[[PG]], %op) + // CHECK: ret float %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnmv,_f32,,)(pg, op); } -// CHECK-LABEL: @test_svminnmv_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fminnmv.nxv2f64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret double [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminnmv_f64u10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fminnmv.nxv2f64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret double [[TMP1]] -// float64_t test_svminnmv_f64(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svminnmv_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call double @llvm.aarch64.sve.fminnmv.nxv2f64( %[[PG]], %op) + // CHECK: ret double %[[INTRINSIC]] return SVE_ACLE_FUNC(svminnmv,_f64,,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minv.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minv.c index 2f3c04e3749d..248e3970806e 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minv.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_minv.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include @@ -15,185 +14,99 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svminv_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.sminv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i8 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svminv_s8u10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.sminv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i8 [[TMP0]] -// int8_t test_svminv_s8(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svminv_s8 + // CHECK: %[[INTRINSIC:.*]] = call i8 @llvm.aarch64.sve.sminv.nxv16i8( %pg, %op) + // CHECK: ret i8 %[[INTRINSIC]] return SVE_ACLE_FUNC(svminv,_s8,,)(pg, op); } -// CHECK-LABEL: @test_svminv_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.sminv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i16 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svminv_s16u10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.sminv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i16 [[TMP1]] -// int16_t test_svminv_s16(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svminv_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i16 @llvm.aarch64.sve.sminv.nxv8i16( %[[PG]], %op) + // CHECK: ret i16 %[[INTRINSIC]] return SVE_ACLE_FUNC(svminv,_s16,,)(pg, op); } -// CHECK-LABEL: @test_svminv_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sminv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svminv_s32u10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sminv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// int32_t test_svminv_s32(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svminv_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sminv.nxv4i32( %[[PG]], %op) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svminv,_s32,,)(pg, op); } -// CHECK-LABEL: @test_svminv_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sminv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svminv_s64u10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sminv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// int64_t test_svminv_s64(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svminv_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sminv.nxv2i64( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svminv,_s64,,)(pg, op); } -// CHECK-LABEL: @test_svminv_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.uminv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i8 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svminv_u8u10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.uminv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i8 [[TMP0]] -// uint8_t test_svminv_u8(svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svminv_u8 + // CHECK: %[[INTRINSIC:.*]] = call i8 @llvm.aarch64.sve.uminv.nxv16i8( %pg, %op) + // CHECK: ret i8 %[[INTRINSIC]] return SVE_ACLE_FUNC(svminv,_u8,,)(pg, op); } -// CHECK-LABEL: @test_svminv_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.uminv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i16 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svminv_u16u10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.uminv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i16 [[TMP1]] -// uint16_t test_svminv_u16(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svminv_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i16 @llvm.aarch64.sve.uminv.nxv8i16( %[[PG]], %op) + // CHECK: ret i16 %[[INTRINSIC]] return SVE_ACLE_FUNC(svminv,_u16,,)(pg, op); } -// CHECK-LABEL: @test_svminv_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uminv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svminv_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uminv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// uint32_t test_svminv_u32(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svminv_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uminv.nxv4i32( %[[PG]], %op) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svminv,_u32,,)(pg, op); } -// CHECK-LABEL: @test_svminv_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uminv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svminv_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uminv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svminv_u64(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svminv_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uminv.nxv2i64( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svminv,_u64,,)(pg, op); } -// CHECK-LABEL: @test_svminv_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fminv.nxv8f16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret half [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svminv_f16u10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call half @llvm.aarch64.sve.fminv.nxv8f16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret half [[TMP1]] -// float16_t test_svminv_f16(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svminv_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call half @llvm.aarch64.sve.fminv.nxv8f16( %[[PG]], %op) + // CHECK: ret half %[[INTRINSIC]] return SVE_ACLE_FUNC(svminv,_f16,,)(pg, op); } -// CHECK-LABEL: @test_svminv_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fminv.nxv4f32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret float [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svminv_f32u10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call float @llvm.aarch64.sve.fminv.nxv4f32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret float [[TMP1]] -// float32_t test_svminv_f32(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svminv_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call float @llvm.aarch64.sve.fminv.nxv4f32( %[[PG]], %op) + // CHECK: ret float %[[INTRINSIC]] return SVE_ACLE_FUNC(svminv,_f32,,)(pg, op); } -// CHECK-LABEL: @test_svminv_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fminv.nxv2f64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret double [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svminv_f64u10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call double @llvm.aarch64.sve.fminv.nxv2f64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret double [[TMP1]] -// float64_t test_svminv_f64(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svminv_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call double @llvm.aarch64.sve.fminv.nxv2f64( %[[PG]], %op) + // CHECK: ret double %[[INTRINSIC]] return SVE_ACLE_FUNC(svminv,_f64,,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c index 9d16676a7bb2..cbf591b75ecc 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mla.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,1300 +13,685 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmla_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmla_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmla_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svmla_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s8,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmla_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmla_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmla_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmla_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmla_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svmla_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmla_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmla_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svmla_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u8,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmla_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmla_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmla_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmla_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmla_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svmla_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmla_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svmla_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svmla_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s8,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmla_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmla_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmla_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmla_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmla_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svmla_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmla_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svmla_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svmla_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u8,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmla_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmla_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmla_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmla_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmla_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svmla_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmla_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svmla_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svmla_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s8,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmla_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmla_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmla_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmla_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmla_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svmla_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_s64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmla_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svmla_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svmla_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u8,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmla_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmla_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmla_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmla_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmla_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svmla_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_u64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmla_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svmla_n_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svmla_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s8,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svmla_n_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svmla_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svmla_n_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svmla_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svmla_n_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svmla_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmla_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svmla_n_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svmla_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u8,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svmla_n_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svmla_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svmla_n_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svmla_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svmla_n_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svmla_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmla_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmla_n_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svmla_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s8,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmla_n_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svmla_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmla_n_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svmla_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmla_n_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svmla_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmla_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmla_n_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svmla_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u8,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmla_n_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svmla_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmla_n_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svmla_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmla_n_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svmla_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmla_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmla_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svmla_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s8,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmla_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svmla_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmla_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svmla_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmla_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svmla_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_s64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmla_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mla.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmla_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svmla_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv16i8( %pg, %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u8,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmla_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svmla_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmla_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svmla_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mla.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmla_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svmla_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_u64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmla_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmla_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmla_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svmla_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmla_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svmla_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmla_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmla_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmla_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svmla_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmla_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svmla_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmla_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmla_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmla_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svmla_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmla_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmla_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svmla_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_f64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svmla_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svmla_n_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svmla_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svmla_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svmla_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svmla_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmla_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svmla_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmla_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svmla_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmla_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svmla_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmla_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svmla_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmla_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svmla_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmla_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmla_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svmla_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla,_n_f64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmla_lane_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmla_lane_f16u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svmla_lane_f16(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmla_lane_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla_lane,_f16,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmla_lane_f16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmla_lane_f16_1u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svmla_lane_f16_1(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmla_lane_f16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.lane.nxv8f16( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla_lane,_f16,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svmla_lane_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmla_lane_f32u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmla_lane_f32(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svmla_lane_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla_lane,_f32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmla_lane_f32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmla_lane_f32_1u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmla_lane_f32_1(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svmla_lane_f32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.lane.nxv4f32( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla_lane,_f32,,)(op1, op2, op3, 3); } -// CHECK-LABEL: @test_svmla_lane_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmla_lane_f64u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svmla_lane_f64(svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svmla_lane_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla_lane,_f64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmla_lane_f64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmla_lane_f64_1u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svmla_lane_f64_1(svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svmla_lane_f64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmla.lane.nxv2f64( %op1, %op2, %op3, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmla_lane,_f64,,)(op1, op2, op3, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c index badd6eca3660..033b062dad71 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mls.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,1300 +13,685 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmls_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmls_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmls_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svmls_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s8,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmls_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmls_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmls_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmls_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmls_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svmls_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmls_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmls_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svmls_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u8,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmls_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmls_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmls_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmls_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmls_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svmls_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmls_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svmls_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svmls_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s8,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmls_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmls_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmls_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmls_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmls_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svmls_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmls_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svmls_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svmls_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u8,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmls_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmls_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmls_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmls_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmls_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svmls_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmls_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svmls_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svmls_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s8,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmls_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmls_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmls_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmls_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmls_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svmls_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_s64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmls_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svmls_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svmls_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u8,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmls_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmls_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmls_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmls_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmls_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svmls_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_u64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmls_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svmls_n_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svmls_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s8,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svmls_n_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svmls_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svmls_n_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svmls_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svmls_n_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svmls_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmls_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svmls_n_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svmls_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u8,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svmls_n_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svmls_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svmls_n_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svmls_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svmls_n_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svmls_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmls_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmls_n_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svmls_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s8,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmls_n_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svmls_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmls_n_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svmls_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmls_n_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svmls_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmls_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmls_n_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svmls_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u8,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmls_n_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svmls_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmls_n_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svmls_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmls_n_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svmls_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmls_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmls_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svmls_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s8,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmls_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svmls_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmls_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svmls_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmls_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svmls_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_s64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmls_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mls.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmls_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svmls_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv16i8( %pg, %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u8,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmls_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svmls_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmls_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svmls_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mls.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmls_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svmls_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_u64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmls_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmls_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmls_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svmls_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmls_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svmls_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmls_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmls_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmls_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svmls_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmls_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svmls_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmls_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmls_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmls_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svmls_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmls_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmls_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svmls_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_f64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svmls_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svmls_n_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svmls_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svmls_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svmls_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svmls_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmls_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svmls_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmls_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svmls_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmls_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svmls_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmls_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svmls_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmls_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svmls_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmls_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmls_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svmls_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls,_n_f64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmls_lane_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmls_lane_f16u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svmls_lane_f16(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmls_lane_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls_lane,_f16,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmls_lane_f16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmls_lane_f16_1u13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svmls_lane_f16_1(svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmls_lane_f16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.lane.nxv8f16( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls_lane,_f16,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svmls_lane_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmls_lane_f32u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmls_lane_f32(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svmls_lane_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls_lane,_f32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmls_lane_f32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmls_lane_f32_1u13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmls_lane_f32_1(svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svmls_lane_f32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.lane.nxv4f32( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls_lane,_f32,,)(op1, op2, op3, 3); } -// CHECK-LABEL: @test_svmls_lane_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmls_lane_f64u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svmls_lane_f64(svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svmls_lane_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls_lane,_f64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmls_lane_f64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmls_lane_f64_1u13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svmls_lane_f64_1(svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svmls_lane_f64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmls.lane.nxv2f64( %op1, %op2, %op3, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmls_lane,_f64,,)(op1, op2, op3, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c index 273402e38e4c..6716fa3225aa 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mmla.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,44 +12,23 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmmla_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smmla.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmmla_s32u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smmla.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmmla_s32(svint32_t x, svint8_t y, svint8_t z) { + // CHECK-LABEL: test_svmmla_s32 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.smmla.nxv4i32( %x, %y, %z) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svmmla,_s32,,)(x, y, z); } -// CHECK-LABEL: @test_svmmla_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ummla.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmmla_u32u12__SVUint32_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ummla.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmmla_u32(svuint32_t x, svuint8_t y, svuint8_t z) { + // CHECK-LABEL: test_svmmla_u32 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.ummla.nxv4i32( %x, %y, %z) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svmmla,_u32,,)(x, y, z); } -// CHECK-LABEL: @test_svusmmla_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usmmla.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svusmmla_s32u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usmmla.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svusmmla_s32(svint32_t x, svuint8_t y, svint8_t z) { + // CHECK-LABEL: test_svusmmla_s32 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usmmla.nxv4i32( %x, %y, %z) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusmmla,_s32,,)(x, y, z); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mov.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mov.c index 98cc79483be3..b66525158052 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mov.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mov.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,17 +13,10 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmov_b_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.z.nxv16i1( [[PG:%.*]], [[OP:%.*]], [[OP]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svmov_b_zu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.and.z.nxv16i1( [[PG:%.*]], [[OP:%.*]], [[OP]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svmov_b_z(svbool_t pg, svbool_t op) { + // CHECK-LABEL: test_svmov_b_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.and.z.nxv16i1( %pg, %op, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmov,_b,_z,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c index 3d90b3703bbf..24c9deb86a50 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_msb.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,1210 +13,637 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmsb_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmsb_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmsb_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svmsb_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s8,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmsb_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmsb_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmsb_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmsb_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmsb_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svmsb_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmsb_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmsb_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svmsb_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u8,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmsb_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmsb_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmsb_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmsb_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmsb_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svmsb_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmsb_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svmsb_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svmsb_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s8,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmsb_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmsb_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmsb_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmsb_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmsb_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svmsb_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmsb_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svmsb_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svmsb_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u8,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmsb_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmsb_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmsb_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmsb_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmsb_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svmsb_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmsb_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svmsb_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svmsb_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s8,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmsb_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmsb_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmsb_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmsb_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmsb_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svmsb_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_s64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmsb_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svmsb_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svmsb_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u8,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmsb_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmsb_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmsb_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmsb_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmsb_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svmsb_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_u64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmsb_n_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svmsb_n_s8_z(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svmsb_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s8,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svmsb_n_s16_z(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svmsb_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svmsb_n_s32_z(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svmsb_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svmsb_n_s64_z(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svmsb_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmsb_n_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG]], [[TMP1]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svmsb_n_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svmsb_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u8,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svmsb_n_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svmsb_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svmsb_n_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svmsb_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svmsb_n_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svmsb_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmsb_n_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmsb_n_s8_m(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svmsb_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s8,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmsb_n_s16_m(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svmsb_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmsb_n_s32_m(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svmsb_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmsb_n_s64_m(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svmsb_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmsb_n_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmsb_n_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svmsb_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u8,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmsb_n_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svmsb_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmsb_n_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svmsb_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmsb_n_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svmsb_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmsb_n_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmsb_n_s8_x(svbool_t pg, svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svmsb_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s8,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmsb_n_s16_x(svbool_t pg, svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svmsb_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmsb_n_s32_x(svbool_t pg, svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svmsb_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmsb_n_s64_x(svbool_t pg, svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svmsb_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_s64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmsb_n_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.msb.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmsb_n_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svmsb_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv16i8( %pg, %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u8,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmsb_n_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svmsb_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv8i16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmsb_n_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svmsb_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv4i32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.msb.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmsb_n_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svmsb_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.msb.nxv2i64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_u64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmsb_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmsb_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmsb_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svmsb_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmsb_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svmsb_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmsb_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmsb_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmsb_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svmsb_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmsb_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svmsb_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmsb_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmsb_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmsb_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svmsb_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmsb_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmsb_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svmsb_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_f64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svmsb_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svmsb_n_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svmsb_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svmsb_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svmsb_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svmsb_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmsb_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svmsb_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmsb_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svmsb_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmsb_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svmsb_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmsb_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svmsb_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmsb_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svmsb_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svmsb_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmsb_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmsb_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svmsb_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmsb.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmsb,_n_f64,_x,)(pg, op1, op2, op3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c index 23d1a8789173..d2110cd1819b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mul.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,1300 +13,687 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmul_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmul_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmul_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svmul_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmul_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmul_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmul_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmul_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmul_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svmul_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svmul_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmul_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svmul_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmul_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmul_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmul_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmul_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmul_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svmul_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmul_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svmul_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svmul_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmul_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmul_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmul_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmul_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmul_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svmul_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmul_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svmul_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svmul_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmul_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmul_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmul_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmul_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmul_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svmul_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmul_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svmul_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svmul_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmul_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmul_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmul_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmul_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmul_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svmul_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmul_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svmul_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svmul_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmul_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmul_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmul_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmul_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmul_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svmul_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmul_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svmul_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svmul_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svmul_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svmul_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svmul_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svmul_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svmul_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svmul_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmul_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svmul_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svmul_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svmul_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svmul_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svmul_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svmul_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svmul_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svmul_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmul_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmul_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svmul_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmul_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svmul_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmul_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svmul_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmul_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svmul_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmul_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmul_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svmul_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmul_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svmul_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmul_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svmul_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmul_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svmul_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmul_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmul_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svmul_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmul_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svmul_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmul_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svmul_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmul_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svmul_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmul_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.mul.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmul_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svmul_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmul_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svmul_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmul_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svmul_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.mul.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmul_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svmul_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmul_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmul_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmul_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmul_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmul_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmul_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmul_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmul_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmul_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmul_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmul_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmul_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmul_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmul_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmul_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmul_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmul_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmul_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmul_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_f64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svmul_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svmul_n_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_f32_zu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svmul_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svmul_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_f64_zu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svmul_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svmul_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmul_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svmul_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_f32_mu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmul_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svmul_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_f64_mu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmul_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svmul_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmul_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svmul_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_f32_xu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmul_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svmul_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmul_n_f64_xu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmul_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svmul_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul,_n_f64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmul_lane_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmul_lane_f16u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svmul_lane_f16(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmul_lane_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul_lane,_f16,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svmul_lane_f16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmul_lane_f16_1u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svmul_lane_f16_1(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmul_lane_f16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.lane.nxv8f16( %op1, %op2, i32 7) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul_lane,_f16,,)(op1, op2, 7); } -// CHECK-LABEL: @test_svmul_lane_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmul_lane_f32u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmul_lane_f32(svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmul_lane_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul_lane,_f32,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svmul_lane_f32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmul_lane_f32_1u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmul_lane_f32_1(svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmul_lane_f32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.lane.nxv4f32( %op1, %op2, i32 3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul_lane,_f32,,)(op1, op2, 3); } -// CHECK-LABEL: @test_svmul_lane_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmul_lane_f64u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svmul_lane_f64(svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmul_lane_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul_lane,_f64,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svmul_lane_f64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmul_lane_f64_1u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svmul_lane_f64_1(svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmul_lane_f64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmul.lane.nxv2f64( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmul_lane,_f64,,)(op1, op2, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c index 68827598b367..2614be69dec7 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulh.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,874 +13,462 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmulh_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmulh_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmulh_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svmulh_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulh_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmulh_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmulh_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulh_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmulh_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmulh_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulh_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmulh_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svmulh_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svmulh_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmulh_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svmulh_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulh_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmulh_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmulh_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulh_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmulh_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmulh_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulh_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmulh_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svmulh_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmulh_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svmulh_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svmulh_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulh_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmulh_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmulh_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulh_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmulh_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmulh_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulh_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmulh_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svmulh_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmulh_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svmulh_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svmulh_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulh_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmulh_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmulh_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulh_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmulh_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmulh_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulh_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmulh_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svmulh_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmulh_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svmulh_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svmulh_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulh_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmulh_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmulh_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulh_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmulh_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmulh_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulh_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmulh_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svmulh_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmulh_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svmulh_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svmulh_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulh_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmulh_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmulh_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulh_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmulh_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmulh_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulh_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmulh_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svmulh_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmulh_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svmulh_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svmulh_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svmulh_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svmulh_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svmulh_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svmulh_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svmulh_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svmulh_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svmulh_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svmulh_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svmulh_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svmulh_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svmulh_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svmulh_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svmulh_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svmulh_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svmulh_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmulh_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmulh_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svmulh_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmulh_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svmulh_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmulh_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svmulh_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmulh_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svmulh_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmulh_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmulh_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svmulh_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmulh_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svmulh_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmulh_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svmulh_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmulh_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svmulh_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmulh_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svmulh_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svmulh_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svmulh_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svmulh_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svmulh_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svmulh_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulh_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svmulh_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svmulh_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smulh.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmulh_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svmulh_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svmulh_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svmulh_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svmulh_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svmulh_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svmulh_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulh_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulh_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svmulh_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svmulh_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umulh.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulh,_n_u64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c index 86a972b2505e..1fb72675273c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_mulx.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,338 +13,179 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmulx_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulx_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmulx_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmulx_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulx_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulx_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmulx_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmulx_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulx_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulx_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmulx_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmulx_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulx_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulx_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmulx_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmulx_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulx_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulx_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmulx_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmulx_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulx_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulx_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmulx_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmulx_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulx_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulx_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmulx_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmulx_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulx_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulx_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmulx_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmulx_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulx_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmulx_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmulx_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmulx_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_f64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulx_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svmulx_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svmulx_n_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulx_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f32_zu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svmulx_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svmulx_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulx_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f64_zu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svmulx_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svmulx_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulx_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmulx_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svmulx_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulx_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f32_mu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmulx_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svmulx_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulx_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f64_mu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmulx_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svmulx_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulx_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svmulx_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svmulx_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulx_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f32_xu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svmulx_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svmulx_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmulx_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svmulx_n_f64_xu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svmulx_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svmulx_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmulx.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svmulx,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nand.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nand.c index 5c70b9daf754..95d3f906ea84 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nand.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nand.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,17 +13,10 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svnand_b_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nand.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svnand_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nand.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svnand_b_z(svbool_t pg, svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svnand_b_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nand.z.nxv16i1( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnand,_b,_z,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_neg.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_neg.c index 16729b7dee9d..362fd4d9e30b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_neg.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_neg.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,353 +13,188 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svneg_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.neg.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svneg_s8_zu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.neg.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svneg_s8_z(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svneg_s8_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.neg.nxv16i8( zeroinitializer, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_s8,_z,)(pg, op); } -// CHECK-LABEL: @test_svneg_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svneg_s16_zu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svneg_s16_z(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svneg_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.neg.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_s16,_z,)(pg, op); } -// CHECK-LABEL: @test_svneg_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svneg_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svneg_s32_z(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svneg_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.neg.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_s32,_z,)(pg, op); } -// CHECK-LABEL: @test_svneg_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svneg_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svneg_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svneg_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.neg.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svneg_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.neg.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svneg_s8_mu10__SVInt8_tu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.neg.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svneg_s8_m(svint8_t inactive, svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svneg_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.neg.nxv16i8( %inactive, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_s8,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svneg_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svneg_s16_mu11__SVInt16_tu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svneg_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svneg_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.neg.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_s16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svneg_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svneg_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svneg_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svneg_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.neg.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_s32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svneg_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svneg_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svneg_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svneg_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.neg.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svneg_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.neg.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svneg_s8_xu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.neg.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svneg_s8_x(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svneg_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.neg.nxv16i8( undef, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_s8,_x,)(pg, op); } -// CHECK-LABEL: @test_svneg_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svneg_s16_xu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svneg_s16_x(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svneg_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.neg.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_s16,_x,)(pg, op); } -// CHECK-LABEL: @test_svneg_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svneg_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svneg_s32_x(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svneg_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.neg.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_s32,_x,)(pg, op); } -// CHECK-LABEL: @test_svneg_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svneg_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.neg.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svneg_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svneg_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.neg.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_s64,_x,)(pg, op); } -// CHECK-LABEL: @test_svneg_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svneg_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svneg_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svneg_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fneg.nxv8f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svneg_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svneg_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svneg_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svneg_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fneg.nxv4f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svneg_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svneg_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svneg_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svneg_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fneg.nxv2f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svneg_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svneg_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svneg_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svneg_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fneg.nxv8f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svneg_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svneg_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svneg_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svneg_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fneg.nxv4f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svneg_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svneg_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svneg_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svneg_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fneg.nxv2f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svneg_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svneg_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svneg_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svneg_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fneg.nxv8f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svneg_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svneg_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svneg_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svneg_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fneg.nxv4f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svneg_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svneg_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fneg.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svneg_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svneg_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fneg.nxv2f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svneg,_f64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c index 5e708bdc2604..80a8f19506dd 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmad.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,338 +13,179 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svnmad_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmad_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svnmad_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svnmad_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmad_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmad_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svnmad_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svnmad_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmad_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmad_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svnmad_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svnmad_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmad_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmad_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svnmad_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svnmad_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmad_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmad_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svnmad_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svnmad_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmad_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmad_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svnmad_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svnmad_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmad_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmad_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svnmad_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svnmad_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmad_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmad_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svnmad_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svnmad_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmad_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmad_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svnmad_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svnmad_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_f64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmad_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svnmad_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svnmad_n_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmad_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svnmad_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svnmad_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmad_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svnmad_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svnmad_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmad_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svnmad_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svnmad_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmad_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svnmad_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svnmad_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmad_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svnmad_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svnmad_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmad_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svnmad_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svnmad_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmad_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svnmad_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svnmad_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmad_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmad_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svnmad_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svnmad_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmad.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmad,_n_f64,_x,)(pg, op1, op2, op3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c index a2ed49a4633b..8647fae29868 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmla.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,338 +13,179 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svnmla_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmla_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svnmla_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svnmla_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmla_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmla_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svnmla_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svnmla_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmla_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmla_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svnmla_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svnmla_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmla_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmla_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svnmla_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svnmla_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmla_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmla_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svnmla_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svnmla_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmla_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmla_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svnmla_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svnmla_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmla_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmla_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svnmla_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svnmla_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmla_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmla_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svnmla_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svnmla_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmla_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmla_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svnmla_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svnmla_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_f64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmla_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svnmla_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svnmla_n_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmla_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svnmla_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svnmla_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmla_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svnmla_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svnmla_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmla_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svnmla_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svnmla_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmla_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svnmla_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svnmla_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmla_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svnmla_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svnmla_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmla_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svnmla_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svnmla_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmla_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svnmla_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svnmla_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmla_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmla_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svnmla_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svnmla_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmla.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmla,_n_f64,_x,)(pg, op1, op2, op3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c index c4698f529bdb..37547faba3d2 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmls.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,338 +13,179 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svnmls_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmls_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svnmls_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svnmls_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmls_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmls_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svnmls_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svnmls_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmls_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmls_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svnmls_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svnmls_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmls_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmls_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svnmls_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svnmls_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmls_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmls_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svnmls_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svnmls_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmls_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmls_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svnmls_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svnmls_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmls_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmls_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svnmls_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svnmls_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmls_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmls_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svnmls_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svnmls_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmls_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmls_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svnmls_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svnmls_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_f64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmls_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svnmls_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svnmls_n_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmls_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svnmls_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svnmls_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmls_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svnmls_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svnmls_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmls_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svnmls_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svnmls_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmls_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svnmls_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svnmls_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmls_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svnmls_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svnmls_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmls_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svnmls_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svnmls_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmls_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svnmls_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svnmls_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmls_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmls_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svnmls_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svnmls_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmls.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmls,_n_f64,_x,)(pg, op1, op2, op3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c index c16c0cfe16b8..e814a0925ccc 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nmsb.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,338 +13,179 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svnmsb_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmsb_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svnmsb_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svnmsb_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmsb_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmsb_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svnmsb_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svnmsb_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmsb_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmsb_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svnmsb_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svnmsb_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( %[[PG]], %[[SEL]], %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmsb_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmsb_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svnmsb_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svnmsb_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmsb_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmsb_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svnmsb_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svnmsb_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmsb_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmsb_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svnmsb_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svnmsb_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmsb_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmsb_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svnmsb_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svnmsb_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmsb_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmsb_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svnmsb_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, svfloat32_t op3) { + // CHECK-LABEL: test_svnmsb_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmsb_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmsb_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svnmsb_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, svfloat64_t op3) { + // CHECK-LABEL: test_svnmsb_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( %[[PG]], %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_f64,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmsb_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svnmsb_n_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svnmsb_n_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f16,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmsb_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svnmsb_n_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svnmsb_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f32,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmsb_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[TMP2]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svnmsb_n_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svnmsb_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( %[[PG]], %[[SEL]], %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f64,_z,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmsb_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svnmsb_n_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svnmsb_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f16,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmsb_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svnmsb_n_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svnmsb_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f32,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmsb_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svnmsb_n_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svnmsb_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f64,_m,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmsb_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svnmsb_n_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svnmsb_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv8f16( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f16,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmsb_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svnmsb_n_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2, float32_t op3) { + // CHECK-LABEL: test_svnmsb_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv4f32( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f32,_x,)(pg, op1, op2, op3); } -// CHECK-LABEL: @test_svnmsb_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svnmsb_n_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svnmsb_n_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2, float64_t op3) { + // CHECK-LABEL: test_svnmsb_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fnmsb.nxv2f64( %[[PG]], %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnmsb,_n_f64,_x,)(pg, op1, op2, op3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nor.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nor.c index f22cff4d3641..bc274f3b20b7 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nor.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_nor.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,17 +13,10 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svnor_b_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nor.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svnor_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nor.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svnor_b_z(svbool_t pg, svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svnor_b_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nor.z.nxv16i1( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnor,_b,_z,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_not.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_not.c index 4b1fc06a3311..3e6c49f766a9 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_not.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_not.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,413 +13,220 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svnot_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svnot_s8_zu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svnot_s8_z(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svnot_s8_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv16i8( zeroinitializer, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_s8,_z,)(pg, op); } -// CHECK-LABEL: @test_svnot_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnot_s16_zu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svnot_s16_z(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svnot_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_s16,_z,)(pg, op); } -// CHECK-LABEL: @test_svnot_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnot_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svnot_s32_z(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svnot_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_s32,_z,)(pg, op); } -// CHECK-LABEL: @test_svnot_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnot_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svnot_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svnot_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svnot_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svnot_u8_zu10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svnot_u8_z(svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svnot_u8_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv16i8( zeroinitializer, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_u8,_z,)(pg, op); } -// CHECK-LABEL: @test_svnot_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnot_u16_zu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svnot_u16_z(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svnot_u16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_u16,_z,)(pg, op); } -// CHECK-LABEL: @test_svnot_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnot_u32_zu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svnot_u32_z(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svnot_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_u32,_z,)(pg, op); } -// CHECK-LABEL: @test_svnot_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnot_u64_zu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svnot_u64_z(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svnot_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_u64,_z,)(pg, op); } -// CHECK-LABEL: @test_svnot_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svnot_s8_mu10__SVInt8_tu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svnot_s8_m(svint8_t inactive, svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svnot_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv16i8( %inactive, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_s8,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svnot_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnot_s16_mu11__SVInt16_tu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svnot_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svnot_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_s16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svnot_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnot_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svnot_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svnot_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_s32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svnot_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnot_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svnot_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svnot_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svnot_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svnot_u8_mu11__SVUint8_tu10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svnot_u8_m(svuint8_t inactive, svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svnot_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv16i8( %inactive, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_u8,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svnot_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnot_u16_mu12__SVUint16_tu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svnot_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svnot_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_u16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svnot_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnot_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svnot_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svnot_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_u32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svnot_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnot_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svnot_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svnot_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_u64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svnot_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svnot_s8_xu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svnot_s8_x(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svnot_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv16i8( undef, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_s8,_x,)(pg, op); } -// CHECK-LABEL: @test_svnot_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnot_s16_xu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svnot_s16_x(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svnot_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_s16,_x,)(pg, op); } -// CHECK-LABEL: @test_svnot_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnot_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svnot_s32_x(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svnot_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_s32,_x,)(pg, op); } -// CHECK-LABEL: @test_svnot_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnot_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svnot_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svnot_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_s64,_x,)(pg, op); } -// CHECK-LABEL: @test_svnot_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svnot_u8_xu10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.not.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svnot_u8_x(svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svnot_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv16i8( undef, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_u8,_x,)(pg, op); } -// CHECK-LABEL: @test_svnot_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnot_u16_xu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svnot_u16_x(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svnot_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_u16,_x,)(pg, op); } -// CHECK-LABEL: @test_svnot_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnot_u32_xu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svnot_u32_x(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svnot_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_u32,_x,)(pg, op); } -// CHECK-LABEL: @test_svnot_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnot_u64_xu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.not.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svnot_u64_x(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svnot_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.not.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_u64,_x,)(pg, op); } -// CHECK-LABEL: @test_svnot_b_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.z.nxv16i1( [[PG:%.*]], [[OP:%.*]], [[PG]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svnot_b_zu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor.z.nxv16i1( [[PG:%.*]], [[OP:%.*]], [[PG]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svnot_b_z(svbool_t pg, svbool_t op) { + // CHECK-LABEL: test_svnot_b_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor.z.nxv16i1( %pg, %op, %pg) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svnot,_b,_z,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orn.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orn.c index ec71c9701096..5970a3238e61 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orn.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orn.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,17 +13,10 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svorn_b_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orn.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svorn_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orn.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svorn_b_z(svbool_t pg, svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svorn_b_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orn.z.nxv16i1( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorn,_b,_z,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c index 2a8d656a7830..3727afcd3808 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orr.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,889 +13,470 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svorr_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svorr_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svorr_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svorr_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svorr_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svorr_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svorr_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svorr_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svorr_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svorr_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svorr_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svorr_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svorr_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svorr_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svorr_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svorr_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svorr_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svorr_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svorr_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svorr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svorr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svorr_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svorr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svorr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svorr_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svorr_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svorr_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svorr_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svorr_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svorr_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svorr_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svorr_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svorr_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svorr_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svorr_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svorr_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svorr_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svorr_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svorr_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svorr_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svorr_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svorr_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svorr_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svorr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svorr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svorr_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svorr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svorr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svorr_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svorr_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svorr_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svorr_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svorr_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svorr_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svorr_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svorr_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svorr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svorr_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svorr_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svorr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svorr_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svorr_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svorr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svorr_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svorr_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svorr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svorr_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svorr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svorr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svorr_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svorr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svorr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svorr_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svorr_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svorr_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svorr_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svorr_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svorr_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svorr_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svorr_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svorr_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svorr_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svorr_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svorr_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svorr_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svorr_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svorr_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svorr_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svorr_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svorr_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svorr_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svorr_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svorr_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svorr_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svorr_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svorr_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svorr_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svorr_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svorr_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svorr_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svorr_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svorr_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svorr_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svorr_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svorr_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svorr_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svorr_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svorr_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svorr_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svorr_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svorr_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svorr_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svorr_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svorr_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svorr_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svorr_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svorr_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svorr_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svorr_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svorr_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svorr_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svorr_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svorr_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svorr_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svorr_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svorr_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svorr_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svorr_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svorr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svorr_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svorr_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svorr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svorr_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svorr_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.orr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svorr_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svorr_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svorr_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svorr_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svorr_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svorr_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svorr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svorr_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svorr_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.orr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svorr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svorr_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_n_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svorr_b_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svorr_b_zu10__SVBool_tu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.orr.z.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svorr_b_z(svbool_t pg, svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svorr_b_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.orr.z.nxv16i1( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svorr,_b,_z,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orv.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orv.c index 6bbc6cc52e01..6bb9cd0928ec 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orv.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_orv.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,134 +13,72 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svorv_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.orv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i8 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svorv_s8u10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.orv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i8 [[TMP0]] -// int8_t test_svorv_s8(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svorv_s8 + // CHECK: %[[INTRINSIC:.*]] = call i8 @llvm.aarch64.sve.orv.nxv16i8( %pg, %op) + // CHECK: ret i8 %[[INTRINSIC]] return SVE_ACLE_FUNC(svorv,_s8,,)(pg, op); } -// CHECK-LABEL: @test_svorv_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.orv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i16 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svorv_s16u10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.orv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i16 [[TMP1]] -// int16_t test_svorv_s16(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svorv_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i16 @llvm.aarch64.sve.orv.nxv8i16( %[[PG]], %op) + // CHECK: ret i16 %[[INTRINSIC]] return SVE_ACLE_FUNC(svorv,_s16,,)(pg, op); } -// CHECK-LABEL: @test_svorv_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.orv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svorv_s32u10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.orv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// int32_t test_svorv_s32(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svorv_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.orv.nxv4i32( %[[PG]], %op) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svorv,_s32,,)(pg, op); } -// CHECK-LABEL: @test_svorv_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.orv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svorv_s64u10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.orv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// int64_t test_svorv_s64(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svorv_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.orv.nxv2i64( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svorv,_s64,,)(pg, op); } -// CHECK-LABEL: @test_svorv_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.orv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i8 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svorv_u8u10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i8 @llvm.aarch64.sve.orv.nxv16i8( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i8 [[TMP0]] -// uint8_t test_svorv_u8(svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svorv_u8 + // CHECK: %[[INTRINSIC:.*]] = call i8 @llvm.aarch64.sve.orv.nxv16i8( %pg, %op) + // CHECK: ret i8 %[[INTRINSIC]] return SVE_ACLE_FUNC(svorv,_u8,,)(pg, op); } -// CHECK-LABEL: @test_svorv_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.orv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i16 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svorv_u16u10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.aarch64.sve.orv.nxv8i16( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i16 [[TMP1]] -// uint16_t test_svorv_u16(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svorv_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i16 @llvm.aarch64.sve.orv.nxv8i16( %[[PG]], %op) + // CHECK: ret i16 %[[INTRINSIC]] return SVE_ACLE_FUNC(svorv,_u16,,)(pg, op); } -// CHECK-LABEL: @test_svorv_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.orv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svorv_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.orv.nxv4i32( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// uint32_t test_svorv_u32(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svorv_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.orv.nxv4i32( %[[PG]], %op) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svorv,_u32,,)(pg, op); } -// CHECK-LABEL: @test_svorv_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.orv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svorv_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.orv.nxv2i64( [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svorv_u64(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svorv_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.orv.nxv2i64( %[[PG]], %op) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svorv,_u64,,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfalse.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfalse.c index cc871ad2120b..6d731d7176da 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfalse.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfalse.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,15 +13,9 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svpfalse_b( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret zeroinitializer -// -// CPP-CHECK-LABEL: @_Z15test_svpfalse_bv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret zeroinitializer -// svbool_t test_svpfalse_b() { + // CHECK-LABEL: test_svpfalse_b + // CHECK: ret zeroinitializer return SVE_ACLE_FUNC(svpfalse,_b,,)(); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfirst.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfirst.c index 5376bf32ed93..c69b406798f1 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfirst.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pfirst.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,17 +13,10 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svpfirst_b( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pfirst.nxv16i1( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svpfirst_bu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pfirst.nxv16i1( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svpfirst_b(svbool_t pg, svbool_t op) { + // CHECK-LABEL: test_svpfirst_b + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pfirst.nxv16i1( %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svpfirst,_b,,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pnext.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pnext.c index 86996b20c551..c9469845831a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pnext.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_pnext.c @@ -1,84 +1,46 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include -// CHECK-LABEL: @test_svpnext_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pnext.nxv16i1( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svpnext_b8u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pnext.nxv16i1( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svpnext_b8(svbool_t pg, svbool_t op) { + // CHECK-LABEL: test_svpnext_b8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pnext.nxv16i1( %pg, %op) + // CHECK: ret %[[INTRINSIC]] return svpnext_b8(pg, op); } -// CHECK-LABEL: @test_svpnext_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.pnext.nxv8i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z16test_svpnext_b16u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.pnext.nxv8i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svpnext_b16(svbool_t pg, svbool_t op) { + // CHECK-LABEL: test_svpnext_b16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %op) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pnext.nxv8i1( %[[PG]], %[[OP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svpnext_b16(pg, op); } -// CHECK-LABEL: @test_svpnext_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.pnext.nxv4i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z16test_svpnext_b32u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.pnext.nxv4i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svpnext_b32(svbool_t pg, svbool_t op) { + // CHECK-LABEL: test_svpnext_b32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %op) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pnext.nxv4i1( %[[PG]], %[[OP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svpnext_b32(pg, op); } -// CHECK-LABEL: @test_svpnext_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.pnext.nxv2i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z16test_svpnext_b64u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.pnext.nxv2i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svpnext_b64(svbool_t pg, svbool_t op) { + // CHECK-LABEL: test_svpnext_b64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[OP:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %op) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pnext.nxv2i1( %[[PG]], %[[OP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svpnext_b64(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c index cf133103df4e..3323eaf112ad 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfb.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,338 +13,168 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svprfb( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z11test_svprfbu10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfb(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfb + // CHECK: @llvm.aarch64.sve.prf.nxv16i1( %pg, i8* %base, i32 0) return svprfb(pg, base, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfb_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 1) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfb_1u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 1) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_1(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfb_1 + // CHECK: @llvm.aarch64.sve.prf.nxv16i1( %pg, i8* %base, i32 1) return svprfb(pg, base, SV_PLDL1STRM); } -// CHECK-LABEL: @test_svprfb_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 2) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfb_2u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 2) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_2(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfb_2 + // CHECK: @llvm.aarch64.sve.prf.nxv16i1( %pg, i8* %base, i32 2) return svprfb(pg, base, SV_PLDL2KEEP); } -// CHECK-LABEL: @test_svprfb_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 3) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfb_3u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 3) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_3(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfb_3 + // CHECK: @llvm.aarch64.sve.prf.nxv16i1( %pg, i8* %base, i32 3) return svprfb(pg, base, SV_PLDL2STRM); } -// CHECK-LABEL: @test_svprfb_4( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 4) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfb_4u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 4) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_4(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfb_4 + // CHECK: @llvm.aarch64.sve.prf.nxv16i1( %pg, i8* %base, i32 4) return svprfb(pg, base, SV_PLDL3KEEP); } -// CHECK-LABEL: @test_svprfb_5( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 5) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfb_5u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 5) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_5(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfb_5 + // CHECK: @llvm.aarch64.sve.prf.nxv16i1( %pg, i8* %base, i32 5) return svprfb(pg, base, SV_PLDL3STRM); } -// CHECK-LABEL: @test_svprfb_6( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 8) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfb_6u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 8) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_6(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfb_6 + // CHECK: @llvm.aarch64.sve.prf.nxv16i1( %pg, i8* %base, i32 8) return svprfb(pg, base, SV_PSTL1KEEP); } -// CHECK-LABEL: @test_svprfb_7( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 9) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfb_7u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 9) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_7(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfb_7 + // CHECK: @llvm.aarch64.sve.prf.nxv16i1( %pg, i8* %base, i32 9) return svprfb(pg, base, SV_PSTL1STRM); } -// CHECK-LABEL: @test_svprfb_8( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 10) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfb_8u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 10) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_8(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfb_8 + // CHECK: @llvm.aarch64.sve.prf.nxv16i1( %pg, i8* %base, i32 10) return svprfb(pg, base, SV_PSTL2KEEP); } -// CHECK-LABEL: @test_svprfb_9( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 11) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfb_9u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 11) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_9(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfb_9 + // CHECK: @llvm.aarch64.sve.prf.nxv16i1( %pg, i8* %base, i32 11) return svprfb(pg, base, SV_PSTL2STRM); } -// CHECK-LABEL: @test_svprfb_10( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 12) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svprfb_10u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 12) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_10(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfb_10 + // CHECK: @llvm.aarch64.sve.prf.nxv16i1( %pg, i8* %base, i32 12) return svprfb(pg, base, SV_PSTL3KEEP); } -// CHECK-LABEL: @test_svprfb_11( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 13) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svprfb_11u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[BASE:%.*]], i32 13) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_11(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfb_11 + // CHECK: @llvm.aarch64.sve.prf.nxv16i1( %pg, i8* %base, i32 13) return svprfb(pg, base, SV_PSTL3STRM); } -// CHECK-LABEL: @test_svprfb_vnum( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[TMP1]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z16test_svprfb_vnumu10__SVBool_tPKvl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv16i1( [[PG:%.*]], i8* [[TMP1]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_vnum(svbool_t pg, const void *base, int64_t vnum) { + // CHECK-LABEL: test_svprfb_vnum + // CHECK: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: @llvm.aarch64.sve.prf.nxv16i1( %pg, i8* %[[GEP]], i32 0) return svprfb_vnum(pg, base, vnum, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfb_gather_u32base( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z26test_svprfb_gather_u32baseu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_gather_u32base(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svprfb_gather_u32base + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32( %[[PG]], %bases, i64 0, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfb_gather,_u32base,,)(pg, bases, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfb_gather_u64base( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z26test_svprfb_gather_u64baseu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_gather_u64base(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svprfb_gather_u64base + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64( %[[PG]], %bases, i64 0, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfb_gather,_u64base,,)(pg, bases, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfb_gather_s32offset( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z28test_svprfb_gather_s32offsetu10__SVBool_tPKvu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_gather_s32offset(svbool_t pg, const void *base, svint32_t offsets) { + // CHECK-LABEL: test_svprfb_gather_s32offset + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfb.gather.sxtw.index.nxv4i32( %[[PG]], i8* %base, %offsets, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfb_gather_,s32,offset,)(pg, base, offsets, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfb_gather_s64offset( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z28test_svprfb_gather_s64offsetu10__SVBool_tPKvu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_gather_s64offset(svbool_t pg, const void *base, svint64_t offsets) { + // CHECK-LABEL: test_svprfb_gather_s64offset + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64( %[[PG]], i8* %base, %offsets, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfb_gather_,s64,offset,)(pg, base, offsets, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfb_gather_u32offset( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z28test_svprfb_gather_u32offsetu10__SVBool_tPKvu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_gather_u32offset(svbool_t pg, const void *base, svuint32_t offsets) { + // CHECK-LABEL: test_svprfb_gather_u32offset + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfb.gather.uxtw.index.nxv4i32( %[[PG]], i8* %base, %offsets, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfb_gather_,u32,offset,)(pg, base, offsets, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfb_gather_u64offset( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z28test_svprfb_gather_u64offsetu10__SVBool_tPKvu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_gather_u64offset(svbool_t pg, const void *base, svuint64_t offsets) { + // CHECK-LABEL: test_svprfb_gather_u64offset + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfb.gather.index.nxv2i64( %[[PG]], i8* %base, %offsets, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfb_gather_,u64,offset,)(pg, base, offsets, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfb_gather_u32base_offset( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z33test_svprfb_gather_u32base_offsetu10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_gather_u32base_offset(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svprfb_gather_u32base_offset + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv4i32( %[[PG]], %bases, i64 %offset, i32 0) + // CHECK: ret void return svprfb_gather_u32base_offset(pg, bases, offset, SV_PLDL1KEEP); return SVE_ACLE_FUNC(svprfb_gather,_u32base,_offset,)(pg, bases, offset, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfb_gather_u64base_offset( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z33test_svprfb_gather_u64base_offsetu10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfb_gather_u64base_offset(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svprfb_gather_u64base_offset + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfb.gather.scalar.offset.nxv2i64( %[[PG]], %bases, i64 %offset, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfb_gather,_u64base,_offset,)(pg, bases, offset, SV_PLDL1KEEP); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c index 5a71299f1b70..9c331696998c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfd.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,369 +13,183 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svprfd( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z11test_svprfdu10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfd(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfd + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv2i1( %[[PG]], i8* %base, i32 0) return svprfd(pg, base, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfd_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 1) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfd_1u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 1) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_1(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfd_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv2i1( %[[PG]], i8* %base, i32 1) return svprfd(pg, base, SV_PLDL1STRM); } -// CHECK-LABEL: @test_svprfd_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 2) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfd_2u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 2) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_2(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfd_2 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv2i1( %[[PG]], i8* %base, i32 2) return svprfd(pg, base, SV_PLDL2KEEP); } -// CHECK-LABEL: @test_svprfd_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 3) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfd_3u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 3) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_3(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfd_3 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv2i1( %[[PG]], i8* %base, i32 3) return svprfd(pg, base, SV_PLDL2STRM); } -// CHECK-LABEL: @test_svprfd_4( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 4) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfd_4u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 4) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_4(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfd_4 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv2i1( %[[PG]], i8* %base, i32 4) return svprfd(pg, base, SV_PLDL3KEEP); } -// CHECK-LABEL: @test_svprfd_5( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 5) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfd_5u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 5) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_5(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfd_5 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv2i1( %[[PG]], i8* %base, i32 5) return svprfd(pg, base, SV_PLDL3STRM); } -// CHECK-LABEL: @test_svprfd_6( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 8) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfd_6u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 8) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_6(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfd_6 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv2i1( %[[PG]], i8* %base, i32 8) return svprfd(pg, base, SV_PSTL1KEEP); } -// CHECK-LABEL: @test_svprfd_7( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 9) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfd_7u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 9) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_7(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfd_7 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv2i1( %[[PG]], i8* %base, i32 9) return svprfd(pg, base, SV_PSTL1STRM); } -// CHECK-LABEL: @test_svprfd_8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 10) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfd_8u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 10) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_8(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfd_8 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv2i1( %[[PG]], i8* %base, i32 10) return svprfd(pg, base, SV_PSTL2KEEP); } -// CHECK-LABEL: @test_svprfd_9( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 11) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfd_9u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 11) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_9(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfd_9 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv2i1( %[[PG]], i8* %base, i32 11) return svprfd(pg, base, SV_PSTL2STRM); } -// CHECK-LABEL: @test_svprfd_10( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 12) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svprfd_10u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 12) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_10(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfd_10 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv2i1( %[[PG]], i8* %base, i32 12) return svprfd(pg, base, SV_PSTL3KEEP); } -// CHECK-LABEL: @test_svprfd_11( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 13) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svprfd_11u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[BASE:%.*]], i32 13) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_11(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfd_11 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv2i1( %[[PG]], i8* %base, i32 13) return svprfd(pg, base, SV_PSTL3STRM); } -// CHECK-LABEL: @test_svprfd_vnum( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]] -// CHECK-NEXT: [[TMP3:%.*]] = bitcast * [[TMP2]] to i8* -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[TMP3]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z16test_svprfd_vnumu10__SVBool_tPKvl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]] -// CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast * [[TMP2]] to i8* -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv2i1( [[TMP0]], i8* [[TMP3]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_vnum(svbool_t pg, const void *base, int64_t vnum) { + // CHECK-LABEL: test_svprfd_vnum + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum + // CHECK-DAG: %[[I8_BASE:.*]] = bitcast * %[[GEP]] to i8* + // CHECK: @llvm.aarch64.sve.prf.nxv2i1( %[[PG]], i8* %[[I8_BASE]], i32 0) return svprfd_vnum(pg, base, vnum, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfd_gather_u32base( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z26test_svprfd_gather_u32baseu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_gather_u32base(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svprfd_gather_u32base + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv4i32( %[[PG]], %bases, i64 0, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfd_gather,_u32base,,)(pg, bases, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfd_gather_u64base( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z26test_svprfd_gather_u64baseu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_gather_u64base(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svprfd_gather_u64base + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv2i64( %[[PG]], %bases, i64 0, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfd_gather,_u64base,,)(pg, bases, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfd_gather_s32index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z27test_svprfd_gather_s32indexu10__SVBool_tPKvu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_gather_s32index(svbool_t pg, const void *base, svint32_t indices) { + // CHECK-LABEL: test_svprfd_gather_s32index + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfd.gather.sxtw.index.nxv4i32( %[[PG]], i8* %base, %indices, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfd_gather_,s32,index,)(pg, base, indices, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfd_gather_s64index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z27test_svprfd_gather_s64indexu10__SVBool_tPKvu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_gather_s64index(svbool_t pg, const void *base, svint64_t indices) { + // CHECK-LABEL: test_svprfd_gather_s64index + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfd.gather.index.nxv2i64( %[[PG]], i8* %base, %indices, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfd_gather_,s64,index,)(pg, base, indices, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfd_gather_u32index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z27test_svprfd_gather_u32indexu10__SVBool_tPKvu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_gather_u32index(svbool_t pg, const void *base, svuint32_t indices) { + // CHECK-LABEL: test_svprfd_gather_u32index + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfd.gather.uxtw.index.nxv4i32( %[[PG]], i8* %base, %indices, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfd_gather_,u32,index,)(pg, base, indices, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfd_gather_u64index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z27test_svprfd_gather_u64indexu10__SVBool_tPKvu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_gather_u64index(svbool_t pg, const void *base, svuint64_t indices) { + // CHECK-LABEL: test_svprfd_gather_u64index + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfd.gather.index.nxv2i64( %[[PG]], i8* %base, %indices, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfd_gather_,u64,index,)(pg, base, indices, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfd_gather_u32base_index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svprfd_gather_u32base_indexu10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_gather_u32base_index(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svprfd_gather_u32base_index + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 3 + // CHECK: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv4i32( %[[PG]], %bases, i64 %[[SHL]], i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfd_gather,_u32base,_index,)(pg, bases, index, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfd_gather_u64base_index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svprfd_gather_u64base_indexu10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfd_gather_u64base_index(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svprfd_gather_u64base_index + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 3 + // CHECK: call void @llvm.aarch64.sve.prfd.gather.scalar.offset.nxv2i64( %[[PG]], %bases, i64 %[[SHL]], i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfd_gather,_u64base,_index,)(pg, bases, index, SV_PLDL1KEEP); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c index 64739a942b3b..ac4c8952e93d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfh.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,369 +13,181 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svprfh( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z11test_svprfhu10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfh(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfh + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv8i1( %[[PG]], i8* %base, i32 0) return svprfh(pg, base, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfh_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 1) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfh_1u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 1) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_1(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfh_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv8i1( %[[PG]], i8* %base, i32 1) return svprfh(pg, base, SV_PLDL1STRM); } -// CHECK-LABEL: @test_svprfh_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 2) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfh_2u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 2) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_2(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfh_2 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv8i1( %[[PG]], i8* %base, i32 2) return svprfh(pg, base, SV_PLDL2KEEP); } -// CHECK-LABEL: @test_svprfh_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 3) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfh_3u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 3) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_3(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfh_3 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv8i1( %[[PG]], i8* %base, i32 3) return svprfh(pg, base, SV_PLDL2STRM); } -// CHECK-LABEL: @test_svprfh_4( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 4) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfh_4u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 4) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_4(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfh_4 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv8i1( %[[PG]], i8* %base, i32 4) return svprfh(pg, base, SV_PLDL3KEEP); } -// CHECK-LABEL: @test_svprfh_5( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 5) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfh_5u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 5) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_5(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfh_5 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv8i1( %[[PG]], i8* %base, i32 5) return svprfh(pg, base, SV_PLDL3STRM); } -// CHECK-LABEL: @test_svprfh_6( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 8) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfh_6u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 8) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_6(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfh_6 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv8i1( %[[PG]], i8* %base, i32 8) return svprfh(pg, base, SV_PSTL1KEEP); } -// CHECK-LABEL: @test_svprfh_7( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 9) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfh_7u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 9) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_7(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfh_7 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv8i1( %[[PG]], i8* %base, i32 9) return svprfh(pg, base, SV_PSTL1STRM); } -// CHECK-LABEL: @test_svprfh_8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 10) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfh_8u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 10) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_8(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfh_8 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv8i1( %[[PG]], i8* %base, i32 10) return svprfh(pg, base, SV_PSTL2KEEP); } -// CHECK-LABEL: @test_svprfh_9( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 11) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfh_9u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 11) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_9(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfh_9 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv8i1( %[[PG]], i8* %base, i32 11) return svprfh(pg, base, SV_PSTL2STRM); } -// CHECK-LABEL: @test_svprfh_10( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 12) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svprfh_10u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 12) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_10(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfh_10 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv8i1( %[[PG]], i8* %base, i32 12) return svprfh(pg, base, SV_PSTL3KEEP); } -// CHECK-LABEL: @test_svprfh_11( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 13) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svprfh_11u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[BASE:%.*]], i32 13) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_11(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfh_11 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv8i1( %[[PG]], i8* %base, i32 13) return svprfh(pg, base, SV_PSTL3STRM); } -// CHECK-LABEL: @test_svprfh_vnum( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]] -// CHECK-NEXT: [[TMP3:%.*]] = bitcast * [[TMP2]] to i8* -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[TMP3]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z16test_svprfh_vnumu10__SVBool_tPKvl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]] -// CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast * [[TMP2]] to i8* -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv8i1( [[TMP0]], i8* [[TMP3]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_vnum(svbool_t pg, const void *base, int64_t vnum) { + // CHECK-LABEL: test_svprfh_vnum + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum + // CHECK-DAG: %[[I8_BASE:.*]] = bitcast * %[[GEP]] to i8* + // CHECK: @llvm.aarch64.sve.prf.nxv8i1( %[[PG]], i8* %[[I8_BASE]], i32 0) return svprfh_vnum(pg, base, vnum, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfh_gather_u32base( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z26test_svprfh_gather_u32baseu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_gather_u32base(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svprfh_gather_u32base + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv4i32( %[[PG]], %bases, i64 0, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfh_gather,_u32base,,)(pg, bases, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfh_gather_u64base( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z26test_svprfh_gather_u64baseu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_gather_u64base(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svprfh_gather_u64base + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv2i64( %[[PG]], %bases, i64 0, i32 0) return SVE_ACLE_FUNC(svprfh_gather,_u64base,,)(pg, bases, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfh_gather_s32index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z27test_svprfh_gather_s32indexu10__SVBool_tPKvu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_gather_s32index(svbool_t pg, const void *base, svint32_t indices) { + // CHECK-LABEL: test_svprfh_gather_s32index + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfh.gather.sxtw.index.nxv4i32( %[[PG]], i8* %base, %indices, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfh_gather_,s32,index,)(pg, base, indices, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfh_gather_s64index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z27test_svprfh_gather_s64indexu10__SVBool_tPKvu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_gather_s64index(svbool_t pg, const void *base, svint64_t indices) { + // CHECK-LABEL: test_svprfh_gather_s64index + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfh.gather.index.nxv2i64( %[[PG]], i8* %base, %indices, i32 0) return SVE_ACLE_FUNC(svprfh_gather_,s64,index,)(pg, base, indices, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfh_gather_u32index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z27test_svprfh_gather_u32indexu10__SVBool_tPKvu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_gather_u32index(svbool_t pg, const void *base, svuint32_t indices) { + // CHECK-LABEL: test_svprfh_gather_u32index + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfh.gather.uxtw.index.nxv4i32( %[[PG]], i8* %base, %indices, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfh_gather_,u32,index,)(pg, base, indices, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfh_gather_u64index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z27test_svprfh_gather_u64indexu10__SVBool_tPKvu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_gather_u64index(svbool_t pg, const void *base, svuint64_t indices) { + // CHECK-LABEL: test_svprfh_gather_u64index + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfh.gather.index.nxv2i64( %[[PG]], i8* %base, %indices, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfh_gather_,u64,index,)(pg, base, indices, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfh_gather_u32base_index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svprfh_gather_u32base_indexu10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_gather_u32base_index(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svprfh_gather_u32base_index + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1 + // CHECK: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv4i32( %[[PG]], %bases, i64 %[[SHL]], i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfh_gather,_u32base,_index,)(pg, bases, index, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfh_gather_u64base_index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svprfh_gather_u64base_indexu10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfh_gather_u64base_index(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svprfh_gather_u64base_index + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 1 + // CHECK: call void @llvm.aarch64.sve.prfh.gather.scalar.offset.nxv2i64( %[[PG]], %bases, i64 %[[SHL]], i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfh_gather,_u64base,_index,)(pg, bases, index, SV_PLDL1KEEP); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c index 8850f85a4772..223233aeb6cf 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_prfw.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,369 +13,183 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svprfw( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z11test_svprfwu10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfw(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfw + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv4i1( %[[PG]], i8* %base, i32 0) return svprfw(pg, base, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfw_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 1) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfw_1u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 1) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_1(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfw_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv4i1( %[[PG]], i8* %base, i32 1) return svprfw(pg, base, SV_PLDL1STRM); } -// CHECK-LABEL: @test_svprfw_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 2) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfw_2u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 2) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_2(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfw_2 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv4i1( %[[PG]], i8* %base, i32 2) return svprfw(pg, base, SV_PLDL2KEEP); } -// CHECK-LABEL: @test_svprfw_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 3) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfw_3u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 3) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_3(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfw_3 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv4i1( %[[PG]], i8* %base, i32 3) return svprfw(pg, base, SV_PLDL2STRM); } -// CHECK-LABEL: @test_svprfw_4( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 4) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfw_4u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 4) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_4(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfw_4 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv4i1( %[[PG]], i8* %base, i32 4) return svprfw(pg, base, SV_PLDL3KEEP); } -// CHECK-LABEL: @test_svprfw_5( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 5) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfw_5u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 5) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_5(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfw_5 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv4i1( %[[PG]], i8* %base, i32 5) return svprfw(pg, base, SV_PLDL3STRM); } -// CHECK-LABEL: @test_svprfw_6( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 8) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfw_6u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 8) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_6(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfw_6 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv4i1( %[[PG]], i8* %base, i32 8) return svprfw(pg, base, SV_PSTL1KEEP); } -// CHECK-LABEL: @test_svprfw_7( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 9) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfw_7u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 9) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_7(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfw_7 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv4i1( %[[PG]], i8* %base, i32 9) return svprfw(pg, base, SV_PSTL1STRM); } -// CHECK-LABEL: @test_svprfw_8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 10) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfw_8u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 10) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_8(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfw_8 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv4i1( %[[PG]], i8* %base, i32 10) return svprfw(pg, base, SV_PSTL2KEEP); } -// CHECK-LABEL: @test_svprfw_9( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 11) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svprfw_9u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 11) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_9(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfw_9 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv4i1( %[[PG]], i8* %base, i32 11) return svprfw(pg, base, SV_PSTL2STRM); } -// CHECK-LABEL: @test_svprfw_10( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 12) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svprfw_10u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 12) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_10(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfw_10 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv4i1( %[[PG]], i8* %base, i32 12) return svprfw(pg, base, SV_PSTL3KEEP); } -// CHECK-LABEL: @test_svprfw_11( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 13) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svprfw_11u10__SVBool_tPKv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[BASE:%.*]], i32 13) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_11(svbool_t pg, const void *base) { + // CHECK-LABEL: test_svprfw_11 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: @llvm.aarch64.sve.prf.nxv4i1( %[[PG]], i8* %base, i32 13) return svprfw(pg, base, SV_PSTL3STRM); } -// CHECK-LABEL: @test_svprfw_vnum( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]] -// CHECK-NEXT: [[TMP3:%.*]] = bitcast * [[TMP2]] to i8* -// CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[TMP3]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z16test_svprfw_vnumu10__SVBool_tPKvl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]] -// CPP-CHECK-NEXT: [[TMP3:%.*]] = bitcast * [[TMP2]] to i8* -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prf.nxv4i1( [[TMP0]], i8* [[TMP3]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_vnum(svbool_t pg, const void *base, int64_t vnum) { + // CHECK-LABEL: test_svprfw_vnum + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum + // CHECK-DAG: %[[I8_BASE:.*]] = bitcast * %[[GEP]] to i8* + // CHECK: @llvm.aarch64.sve.prf.nxv4i1( %[[PG]], i8* %[[I8_BASE]], i32 0) return svprfw_vnum(pg, base, vnum, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfw_gather_u32base( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z26test_svprfw_gather_u32baseu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_gather_u32base(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svprfw_gather_u32base + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv4i32( %[[PG]], %bases, i64 0, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfw_gather,_u32base,,)(pg, bases, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfw_gather_u64base( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z26test_svprfw_gather_u64baseu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0, i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_gather_u64base(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svprfw_gather_u64base + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv2i64( %[[PG]], %bases, i64 0, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfw_gather,_u64base,,)(pg, bases, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfw_gather_s32index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z27test_svprfw_gather_s32indexu10__SVBool_tPKvu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.sxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_gather_s32index(svbool_t pg, const void *base, svint32_t indices) { + // CHECK-LABEL: test_svprfw_gather_s32index + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfw.gather.sxtw.index.nxv4i32( %[[PG]], i8* %base, %indices, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfw_gather_,s32,index,)(pg, base, indices, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfw_gather_s64index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z27test_svprfw_gather_s64indexu10__SVBool_tPKvu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_gather_s64index(svbool_t pg, const void *base, svint64_t indices) { + // CHECK-LABEL: test_svprfw_gather_s64index + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfw.gather.index.nxv2i64( %[[PG]], i8* %base, %indices, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfw_gather_,s64,index,)(pg, base, indices, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfw_gather_u32index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z27test_svprfw_gather_u32indexu10__SVBool_tPKvu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.uxtw.index.nxv4i32( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_gather_u32index(svbool_t pg, const void *base, svuint32_t indices) { + // CHECK-LABEL: test_svprfw_gather_u32index + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfw.gather.uxtw.index.nxv4i32( %[[PG]], i8* %base, %indices, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfw_gather_,u32,index,)(pg, base, indices, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfw_gather_u64index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z27test_svprfw_gather_u64indexu10__SVBool_tPKvu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.index.nxv2i64( [[TMP0]], i8* [[BASE:%.*]], [[INDICES:%.*]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_gather_u64index(svbool_t pg, const void *base, svuint64_t indices) { + // CHECK-LABEL: test_svprfw_gather_u64index + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.prfw.gather.index.nxv2i64( %[[PG]], i8* %base, %indices, i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfw_gather_,u64,index,)(pg, base, indices, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfw_gather_u32base_index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svprfw_gather_u32base_indexu10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_gather_u32base_index(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svprfw_gather_u32base_index + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2 + // CHECK: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv4i32( %[[PG]], %bases, i64 %[[SHL]], i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfw_gather,_u32base,_index,)(pg, bases, index, SV_PLDL1KEEP); } -// CHECK-LABEL: @test_svprfw_gather_u64base_index( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svprfw_gather_u64base_indexu10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]], i32 0) -// CPP-CHECK-NEXT: ret void -// void test_svprfw_gather_u64base_index(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svprfw_gather_u64base_index + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2 + // CHECK: call void @llvm.aarch64.sve.prfw.gather.scalar.offset.nxv2i64( %[[PG]], %bases, i64 %[[SHL]], i32 0) + // CHECK: ret void return SVE_ACLE_FUNC(svprfw_gather,_u64base,_index,)(pg, bases, index, SV_PLDL1KEEP); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptest.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptest.c index 8d6ec123a305..faa37b93fbfa 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptest.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptest.c @@ -1,51 +1,29 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include -// CHECK-LABEL: @test_svptest_any( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i1 @llvm.aarch64.sve.ptest.any.nxv16i1( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i1 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svptest_anyu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i1 @llvm.aarch64.sve.ptest.any.nxv16i1( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i1 [[TMP0]] -// bool test_svptest_any(svbool_t pg, svbool_t op) { + // CHECK-LABEL: test_svptest_any + // CHECK: %[[INTRINSIC:.*]] = call i1 @llvm.aarch64.sve.ptest.any{{(.nxv16i1)?}}( %pg, %op) + // CHECK: ret i1 %[[INTRINSIC]] return svptest_any(pg, op); } -// CHECK-LABEL: @test_svptest_first( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i1 @llvm.aarch64.sve.ptest.first.nxv16i1( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i1 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svptest_firstu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i1 @llvm.aarch64.sve.ptest.first.nxv16i1( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i1 [[TMP0]] -// bool test_svptest_first(svbool_t pg, svbool_t op) { + // CHECK-LABEL: test_svptest_first + // CHECK: %[[INTRINSIC:.*]] = call i1 @llvm.aarch64.sve.ptest.first{{(.nxv16i1)?}}( %pg, %op) + // CHECK: ret i1 %[[INTRINSIC]] return svptest_first(pg, op); } -// CHECK-LABEL: @test_svptest_last( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i1 @llvm.aarch64.sve.ptest.last.nxv16i1( [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret i1 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svptest_lastu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i1 @llvm.aarch64.sve.ptest.last.nxv16i1( [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret i1 [[TMP0]] -// bool test_svptest_last(svbool_t pg, svbool_t op) { + // CHECK-LABEL: test_svptest_last + // CHECK: %[[INTRINSIC:.*]] = call i1 @llvm.aarch64.sve.ptest.last{{(.nxv16i1)?}}( %pg, %op) + // CHECK: ret i1 %[[INTRINSIC]] return svptest_last(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptrue.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptrue.c index 287061484358..70f9dbf3bb2f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptrue.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_ptrue.c @@ -1,378 +1,203 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include -// CHECK-LABEL: @test_svptrue_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svptrue_b8v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svptrue_b8() { + // CHECK-LABEL: test_svptrue_b8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) + // CHECK: ret %[[INTRINSIC]] return svptrue_b8(); } -// CHECK-LABEL: @test_svptrue_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svptrue_b16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svptrue_b16() { + // CHECK-LABEL: test_svptrue_b16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 31) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svptrue_b16(); } -// CHECK-LABEL: @test_svptrue_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svptrue_b32v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svptrue_b32() { + // CHECK-LABEL: test_svptrue_b32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 31) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svptrue_b32(); } -// CHECK-LABEL: @test_svptrue_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svptrue_b64v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svptrue_b64() { + // CHECK-LABEL: test_svptrue_b64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 31) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svptrue_b64(); } -// CHECK-LABEL: @test_svptrue_pat_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svptrue_pat_b8v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svptrue_pat_b8() { + // CHECK-LABEL: test_svptrue_pat_b8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 0) + // CHECK: ret %[[INTRINSIC]] return svptrue_pat_b8(SV_POW2); } -// CHECK-LABEL: @test_svptrue_pat_b8_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svptrue_pat_b8_1v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svptrue_pat_b8_1() { + // CHECK-LABEL: test_svptrue_pat_b8_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 1) + // CHECK: ret %[[INTRINSIC]] return svptrue_pat_b8(SV_VL1); } -// CHECK-LABEL: @test_svptrue_pat_b8_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 2) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svptrue_pat_b8_2v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 2) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svptrue_pat_b8_2() { + // CHECK-LABEL: test_svptrue_pat_b8_2 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 2) + // CHECK: ret %[[INTRINSIC]] return svptrue_pat_b8(SV_VL2); } -// CHECK-LABEL: @test_svptrue_pat_b8_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svptrue_pat_b8_3v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svptrue_pat_b8_3() { + // CHECK-LABEL: test_svptrue_pat_b8_3 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 3) + // CHECK: ret %[[INTRINSIC]] return svptrue_pat_b8(SV_VL3); } -// CHECK-LABEL: @test_svptrue_pat_b8_4( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 4) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svptrue_pat_b8_4v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 4) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svptrue_pat_b8_4() { + // CHECK-LABEL: test_svptrue_pat_b8_4 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 4) + // CHECK: ret %[[INTRINSIC]] return svptrue_pat_b8(SV_VL4); } -// CHECK-LABEL: @test_svptrue_pat_b8_5( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 5) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svptrue_pat_b8_5v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 5) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svptrue_pat_b8_5() { + // CHECK-LABEL: test_svptrue_pat_b8_5 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 5) + // CHECK: ret %[[INTRINSIC]] return svptrue_pat_b8(SV_VL5); } -// CHECK-LABEL: @test_svptrue_pat_b8_6( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 6) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svptrue_pat_b8_6v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 6) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svptrue_pat_b8_6() { + // CHECK-LABEL: test_svptrue_pat_b8_6 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 6) + // CHECK: ret %[[INTRINSIC]] return svptrue_pat_b8(SV_VL6); } -// CHECK-LABEL: @test_svptrue_pat_b8_7( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svptrue_pat_b8_7v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svptrue_pat_b8_7() { + // CHECK-LABEL: test_svptrue_pat_b8_7 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 7) + // CHECK: ret %[[INTRINSIC]] return svptrue_pat_b8(SV_VL7); } -// CHECK-LABEL: @test_svptrue_pat_b8_8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svptrue_pat_b8_8v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svptrue_pat_b8_8() { + // CHECK-LABEL: test_svptrue_pat_b8_8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 8) + // CHECK: ret %[[INTRINSIC]] return svptrue_pat_b8(SV_VL8); } -// CHECK-LABEL: @test_svptrue_pat_b8_9( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 9) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svptrue_pat_b8_9v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 9) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svptrue_pat_b8_9() { + // CHECK-LABEL: test_svptrue_pat_b8_9 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 9) + // CHECK: ret %[[INTRINSIC]] return svptrue_pat_b8(SV_VL16); } -// CHECK-LABEL: @test_svptrue_pat_b8_10( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 10) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svptrue_pat_b8_10v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 10) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svptrue_pat_b8_10() { + // CHECK-LABEL: test_svptrue_pat_b8_10 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 10) + // CHECK: ret %[[INTRINSIC]] return svptrue_pat_b8(SV_VL32); } -// CHECK-LABEL: @test_svptrue_pat_b8_11( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 11) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svptrue_pat_b8_11v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 11) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svptrue_pat_b8_11() { + // CHECK-LABEL: test_svptrue_pat_b8_11 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 11) + // CHECK: ret %[[INTRINSIC]] return svptrue_pat_b8(SV_VL64); } -// CHECK-LABEL: @test_svptrue_pat_b8_12( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 12) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svptrue_pat_b8_12v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 12) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svptrue_pat_b8_12() { + // CHECK-LABEL: test_svptrue_pat_b8_12 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 12) + // CHECK: ret %[[INTRINSIC]] return svptrue_pat_b8(SV_VL128); } -// CHECK-LABEL: @test_svptrue_pat_b8_13( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 13) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svptrue_pat_b8_13v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 13) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svptrue_pat_b8_13() { + // CHECK-LABEL: test_svptrue_pat_b8_13 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 13) + // CHECK: ret %[[INTRINSIC]] return svptrue_pat_b8(SV_VL256); } -// CHECK-LABEL: @test_svptrue_pat_b8_14( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 29) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svptrue_pat_b8_14v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 29) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svptrue_pat_b8_14() { + // CHECK-LABEL: test_svptrue_pat_b8_14 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 29) + // CHECK: ret %[[INTRINSIC]] return svptrue_pat_b8(SV_MUL4); } -// CHECK-LABEL: @test_svptrue_pat_b8_15( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 30) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svptrue_pat_b8_15v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 30) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svptrue_pat_b8_15() { + // CHECK-LABEL: test_svptrue_pat_b8_15 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 30) + // CHECK: ret %[[INTRINSIC]] return svptrue_pat_b8(SV_MUL3); } -// CHECK-LABEL: @test_svptrue_pat_b8_16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svptrue_pat_b8_16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svptrue_pat_b8_16() { + // CHECK-LABEL: test_svptrue_pat_b8_16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) + // CHECK: ret %[[INTRINSIC]] return svptrue_pat_b8(SV_ALL); } -// CHECK-LABEL: @test_svptrue_pat_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svptrue_pat_b16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svptrue_pat_b16() { + // CHECK-LABEL: test_svptrue_pat_b16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv8i1(i32 0) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svptrue_pat_b16(SV_POW2); } -// CHECK-LABEL: @test_svptrue_pat_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 1) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svptrue_pat_b32v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 1) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svptrue_pat_b32() { + // CHECK-LABEL: test_svptrue_pat_b32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv4i1(i32 1) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svptrue_pat_b32(SV_VL1); } -// CHECK-LABEL: @test_svptrue_pat_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 2) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svptrue_pat_b64v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 2) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svptrue_pat_b64() { + // CHECK-LABEL: test_svptrue_pat_b64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ptrue.nxv2i1(i32 2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svptrue_pat_b64(SV_VL2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c index 08e0c071952a..3cb66cc0b85a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qadd.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,258 +13,138 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqadd_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svqadd_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqadd_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqadd_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_s8,,)(op1, op2); } -// CHECK-LABEL: @test_svqadd_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svqadd_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqadd_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqadd_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svqadd_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svqadd_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqadd_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqadd_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svqadd_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svqadd_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqadd_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqadd_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svqadd_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svqadd_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqadd_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svqadd_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svqadd_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svqadd_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqadd_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svqadd_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svqadd_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svqadd_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqadd_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svqadd_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svqadd_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svqadd_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svqadd_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svqadd_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svqadd_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqadd_n_s8u10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqadd_n_s8(svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqadd_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv16i8( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_s8,,)(op1, op2); } -// CHECK-LABEL: @test_svqadd_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_n_s16u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqadd_n_s16(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqadd_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svqadd_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_n_s32u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqadd_n_s32(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqadd_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svqadd_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_n_s64u11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqadd_n_s64(svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqadd_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.x.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svqadd_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqadd_n_u8u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqadd_n_u8(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svqadd_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv16i8( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svqadd_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_n_u16u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svqadd_n_u16(svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svqadd_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svqadd_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_n_u32u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svqadd_n_u32(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svqadd_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svqadd_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_n_u64u12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svqadd_n_u64(svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svqadd_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.x.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqadd,_n_u64,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c index b39e51d016e6..f6c3dbb201ec 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecb.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,137 +13,74 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqdecb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdecb_n_s32i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqdecb_n_s32(int32_t op) { + // CHECK-LABEL: test_svqdecb_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecb.n32(i32 %op, i32 31, i32 1) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecb,_n_s32,,)(op, 1); } -// CHECK-LABEL: @test_svqdecb_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdecb_n_s32_1i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqdecb_n_s32_1(int32_t op) { + // CHECK-LABEL: test_svqdecb_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecb.n32(i32 %op, i32 31, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecb,_n_s32,,)(op, 16); } -// CHECK-LABEL: @test_svqdecb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecb.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdecb_n_s64l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecb.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svqdecb_n_s64(int64_t op) { + // CHECK-LABEL: test_svqdecb_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecb.n64(i64 %op, i32 31, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecb,_n_s64,,)(op, 1); } -// CHECK-LABEL: @test_svqdecb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecb.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdecb_n_u32j( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecb.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// uint32_t test_svqdecb_n_u32(uint32_t op) { + // CHECK-LABEL: test_svqdecb_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecb.n32(i32 %op, i32 31, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecb,_n_u32,,)(op, 16); } -// CHECK-LABEL: @test_svqdecb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecb.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdecb_n_u64m( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecb.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svqdecb_n_u64(uint64_t op) { + // CHECK-LABEL: test_svqdecb_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecb.n64(i64 %op, i32 31, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecb,_n_u64,,)(op, 1); } -// CHECK-LABEL: @test_svqdecb_pat_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 0, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecb_pat_n_s32i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecb.n32(i32 [[OP:%.*]], i32 0, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqdecb_pat_n_s32(int32_t op) { + // CHECK-LABEL: test_svqdecb_pat_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecb.n32(i32 %op, i32 0, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecb_pat,_n_s32,,)(op, SV_POW2, 16); } -// CHECK-LABEL: @test_svqdecb_pat_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecb.n64(i64 [[OP:%.*]], i32 1, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecb_pat_n_s64l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecb.n64(i64 [[OP:%.*]], i32 1, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svqdecb_pat_n_s64(int64_t op) { + // CHECK-LABEL: test_svqdecb_pat_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecb.n64(i64 %op, i32 1, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecb_pat,_n_s64,,)(op, SV_VL1, 1); } -// CHECK-LABEL: @test_svqdecb_pat_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecb.n32(i32 [[OP:%.*]], i32 2, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecb_pat_n_u32j( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecb.n32(i32 [[OP:%.*]], i32 2, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// uint32_t test_svqdecb_pat_n_u32(uint32_t op) { + // CHECK-LABEL: test_svqdecb_pat_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecb.n32(i32 %op, i32 2, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecb_pat,_n_u32,,)(op, SV_VL2, 16); } -// CHECK-LABEL: @test_svqdecb_pat_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecb.n64(i64 [[OP:%.*]], i32 3, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecb_pat_n_u64m( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecb.n64(i64 [[OP:%.*]], i32 3, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svqdecb_pat_n_u64(uint64_t op) { + // CHECK-LABEL: test_svqdecb_pat_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecb.n64(i64 %op, i32 3, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecb_pat,_n_u64,,)(op, SV_VL3, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecd.c index c948a17595dd..fa9def9eb39e 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecd.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,197 +13,106 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqdecd_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecd.n32(i32 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdecd_n_s32i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecd.n32(i32 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqdecd_n_s32(int32_t op) { + // CHECK-LABEL: test_svqdecd_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecd.n32(i32 %op, i32 31, i32 1) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecd,_n_s32,,)(op, 1); } -// CHECK-LABEL: @test_svqdecd_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecd.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdecd_n_s32_1i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecd.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqdecd_n_s32_1(int32_t op) { + // CHECK-LABEL: test_svqdecd_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecd.n32(i32 %op, i32 31, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecd,_n_s32,,)(op, 16); } -// CHECK-LABEL: @test_svqdecd_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecd.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdecd_n_s64l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecd.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svqdecd_n_s64(int64_t op) { + // CHECK-LABEL: test_svqdecd_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecd.n64(i64 %op, i32 31, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecd,_n_s64,,)(op, 1); } -// CHECK-LABEL: @test_svqdecd_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecd.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdecd_n_u32j( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecd.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// uint32_t test_svqdecd_n_u32(uint32_t op) { + // CHECK-LABEL: test_svqdecd_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecd.n32(i32 %op, i32 31, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecd,_n_u32,,)(op, 16); } -// CHECK-LABEL: @test_svqdecd_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecd.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdecd_n_u64m( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecd.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svqdecd_n_u64(uint64_t op) { + // CHECK-LABEL: test_svqdecd_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecd.n64(i64 %op, i32 31, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecd,_n_u64,,)(op, 1); } -// CHECK-LABEL: @test_svqdecd_pat_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecd.n32(i32 [[OP:%.*]], i32 4, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecd_pat_n_s32i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecd.n32(i32 [[OP:%.*]], i32 4, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqdecd_pat_n_s32(int32_t op) { + // CHECK-LABEL: test_svqdecd_pat_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecd.n32(i32 %op, i32 4, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecd_pat,_n_s32,,)(op, SV_VL4, 16); } -// CHECK-LABEL: @test_svqdecd_pat_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecd.n64(i64 [[OP:%.*]], i32 5, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecd_pat_n_s64l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecd.n64(i64 [[OP:%.*]], i32 5, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svqdecd_pat_n_s64(int64_t op) { + // CHECK-LABEL: test_svqdecd_pat_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecd.n64(i64 %op, i32 5, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecd_pat,_n_s64,,)(op, SV_VL5, 1); } -// CHECK-LABEL: @test_svqdecd_pat_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecd.n32(i32 [[OP:%.*]], i32 6, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecd_pat_n_u32j( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecd.n32(i32 [[OP:%.*]], i32 6, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// uint32_t test_svqdecd_pat_n_u32(uint32_t op) { + // CHECK-LABEL: test_svqdecd_pat_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecd.n32(i32 %op, i32 6, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecd_pat,_n_u32,,)(op, SV_VL6, 16); } -// CHECK-LABEL: @test_svqdecd_pat_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecd.n64(i64 [[OP:%.*]], i32 7, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecd_pat_n_u64m( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecd.n64(i64 [[OP:%.*]], i32 7, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svqdecd_pat_n_u64(uint64_t op) { + // CHECK-LABEL: test_svqdecd_pat_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecd.n64(i64 %op, i32 7, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecd_pat,_n_u64,,)(op, SV_VL7, 1); } -// CHECK-LABEL: @test_svqdecd_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdecd.nxv2i64( [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqdecd_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdecd.nxv2i64( [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdecd_s64(svint64_t op) { + // CHECK-LABEL: test_svqdecd_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdecd.nxv2i64( %op, i32 31, i32 16) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecd,_s64,,)(op, 16); } -// CHECK-LABEL: @test_svqdecd_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdecd.nxv2i64( [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqdecd_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdecd.nxv2i64( [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svqdecd_u64(svuint64_t op) { + // CHECK-LABEL: test_svqdecd_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqdecd.nxv2i64( %op, i32 31, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecd,_u64,,)(op, 1); } -// CHECK-LABEL: @test_svqdecd_pat_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdecd.nxv2i64( [[OP:%.*]], i32 8, i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdecd_pat_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdecd.nxv2i64( [[OP:%.*]], i32 8, i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdecd_pat_s64(svint64_t op) { + // CHECK-LABEL: test_svqdecd_pat_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdecd.nxv2i64( %op, i32 8, i32 16) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecd_pat,_s64,,)(op, SV_VL8, 16); } -// CHECK-LABEL: @test_svqdecd_pat_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdecd.nxv2i64( [[OP:%.*]], i32 9, i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdecd_pat_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdecd.nxv2i64( [[OP:%.*]], i32 9, i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svqdecd_pat_u64(svuint64_t op) { + // CHECK-LABEL: test_svqdecd_pat_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqdecd.nxv2i64( %op, i32 9, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecd_pat,_u64,,)(op, SV_VL16, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdech.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdech.c index a406e38ca1d5..e29c38516350 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdech.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdech.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,197 +13,106 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqdech_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdech.n32(i32 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdech_n_s32i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdech.n32(i32 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqdech_n_s32(int32_t op) { + // CHECK-LABEL: test_svqdech_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdech.n32(i32 %op, i32 31, i32 1) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdech,_n_s32,,)(op, 1); } -// CHECK-LABEL: @test_svqdech_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdech.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdech_n_s32_1i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdech.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqdech_n_s32_1(int32_t op) { + // CHECK-LABEL: test_svqdech_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdech.n32(i32 %op, i32 31, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdech,_n_s32,,)(op, 16); } -// CHECK-LABEL: @test_svqdech_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdech.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdech_n_s64l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdech.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svqdech_n_s64(int64_t op) { + // CHECK-LABEL: test_svqdech_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdech.n64(i64 %op, i32 31, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdech,_n_s64,,)(op, 1); } -// CHECK-LABEL: @test_svqdech_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdech.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdech_n_u32j( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdech.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// uint32_t test_svqdech_n_u32(uint32_t op) { + // CHECK-LABEL: test_svqdech_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdech.n32(i32 %op, i32 31, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdech,_n_u32,,)(op, 16); } -// CHECK-LABEL: @test_svqdech_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdech.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdech_n_u64m( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdech.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svqdech_n_u64(uint64_t op) { + // CHECK-LABEL: test_svqdech_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdech.n64(i64 %op, i32 31, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdech,_n_u64,,)(op, 1); } -// CHECK-LABEL: @test_svqdech_pat_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdech.n32(i32 [[OP:%.*]], i32 10, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdech_pat_n_s32i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdech.n32(i32 [[OP:%.*]], i32 10, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqdech_pat_n_s32(int32_t op) { + // CHECK-LABEL: test_svqdech_pat_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdech.n32(i32 %op, i32 10, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdech_pat,_n_s32,,)(op, SV_VL32, 16); } -// CHECK-LABEL: @test_svqdech_pat_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdech.n64(i64 [[OP:%.*]], i32 11, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdech_pat_n_s64l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdech.n64(i64 [[OP:%.*]], i32 11, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svqdech_pat_n_s64(int64_t op) { + // CHECK-LABEL: test_svqdech_pat_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdech.n64(i64 %op, i32 11, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdech_pat,_n_s64,,)(op, SV_VL64, 1); } -// CHECK-LABEL: @test_svqdech_pat_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdech.n32(i32 [[OP:%.*]], i32 12, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdech_pat_n_u32j( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdech.n32(i32 [[OP:%.*]], i32 12, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// uint32_t test_svqdech_pat_n_u32(uint32_t op) { + // CHECK-LABEL: test_svqdech_pat_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdech.n32(i32 %op, i32 12, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdech_pat,_n_u32,,)(op, SV_VL128, 16); } -// CHECK-LABEL: @test_svqdech_pat_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdech.n64(i64 [[OP:%.*]], i32 13, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdech_pat_n_u64m( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdech.n64(i64 [[OP:%.*]], i32 13, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svqdech_pat_n_u64(uint64_t op) { + // CHECK-LABEL: test_svqdech_pat_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdech.n64(i64 %op, i32 13, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdech_pat,_n_u64,,)(op, SV_VL256, 1); } -// CHECK-LABEL: @test_svqdech_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdech.nxv8i16( [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqdech_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdech.nxv8i16( [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqdech_s16(svint16_t op) { + // CHECK-LABEL: test_svqdech_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdech.nxv8i16( %op, i32 31, i32 16) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdech,_s16,,)(op, 16); } -// CHECK-LABEL: @test_svqdech_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdech.nxv8i16( [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqdech_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdech.nxv8i16( [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqdech_u16(svuint16_t op) { + // CHECK-LABEL: test_svqdech_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqdech.nxv8i16( %op, i32 31, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdech,_u16,,)(op, 1); } -// CHECK-LABEL: @test_svqdech_pat_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdech.nxv8i16( [[OP:%.*]], i32 29, i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdech_pat_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdech.nxv8i16( [[OP:%.*]], i32 29, i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqdech_pat_s16(svint16_t op) { + // CHECK-LABEL: test_svqdech_pat_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdech.nxv8i16( %op, i32 29, i32 16) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdech_pat,_s16,,)(op, SV_MUL4, 16); } -// CHECK-LABEL: @test_svqdech_pat_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdech.nxv8i16( [[OP:%.*]], i32 30, i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdech_pat_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdech.nxv8i16( [[OP:%.*]], i32 30, i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqdech_pat_u16(svuint16_t op) { + // CHECK-LABEL: test_svqdech_pat_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqdech.nxv8i16( %op, i32 30, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdech_pat,_u16,,)(op, SV_MUL3, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecp.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecp.c index e164504fddee..e6417e41eb2d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecp.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecp.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,368 +13,196 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqdecp_n_s32_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqdecp_n_s32_b8iu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqdecp_n_s32_b8(int32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_n_s32_b8 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv16i1(i32 %op, %pg) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_n_s32,_b8,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_n_s32_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_s32_b16iu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// int32_t test_svqdecp_n_s32_b16(int32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_n_s32_b16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv8i1(i32 %op, %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_n_s32,_b16,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_n_s32_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_s32_b32iu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// int32_t test_svqdecp_n_s32_b32(int32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_n_s32_b32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv4i1(i32 %op, %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_n_s32,_b32,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_n_s32_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_s32_b64iu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// int32_t test_svqdecp_n_s32_b64(int32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_n_s32_b64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecp.n32.nxv2i1(i32 %op, %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_n_s32,_b64,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_n_s64_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqdecp_n_s64_b8lu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svqdecp_n_s64_b8(int64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_n_s64_b8 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv16i1(i64 %op, %pg) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_n_s64,_b8,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_n_s64_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_s64_b16lu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// int64_t test_svqdecp_n_s64_b16(int64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_n_s64_b16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv8i1(i64 %op, %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_n_s64,_b16,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_n_s64_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_s64_b32lu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// int64_t test_svqdecp_n_s64_b32(int64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_n_s64_b32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv4i1(i64 %op, %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_n_s64,_b32,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_n_s64_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_s64_b64lu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// int64_t test_svqdecp_n_s64_b64(int64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_n_s64_b64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecp.n64.nxv2i1(i64 %op, %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_n_s64,_b64,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_n_u32_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqdecp_n_u32_b8ju10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// uint32_t test_svqdecp_n_u32_b8(uint32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_n_u32_b8 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv16i1(i32 %op, %pg) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_n_u32,_b8,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_n_u32_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_u32_b16ju10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// uint32_t test_svqdecp_n_u32_b16(uint32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_n_u32_b16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv8i1(i32 %op, %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_n_u32,_b16,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_n_u32_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_u32_b32ju10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// uint32_t test_svqdecp_n_u32_b32(uint32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_n_u32_b32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv4i1(i32 %op, %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_n_u32,_b32,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_n_u32_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_u32_b64ju10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// uint32_t test_svqdecp_n_u32_b64(uint32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_n_u32_b64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecp.n32.nxv2i1(i32 %op, %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_n_u32,_b64,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_n_u64_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqdecp_n_u64_b8mu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svqdecp_n_u64_b8(uint64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_n_u64_b8 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv16i1(i64 %op, %pg) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_n_u64,_b8,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_n_u64_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_u64_b16mu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svqdecp_n_u64_b16(uint64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_n_u64_b16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv8i1(i64 %op, %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_n_u64,_b16,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_n_u64_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_u64_b32mu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svqdecp_n_u64_b32(uint64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_n_u64_b32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv4i1(i64 %op, %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_n_u64,_b32,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_n_u64_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecp_n_u64_b64mu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svqdecp_n_u64_b64(uint64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_n_u64_b64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecp.n64.nxv2i1(i64 %op, %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_n_u64,_b64,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdecp.nxv8i16( [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqdecp_s16u11__SVInt16_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdecp.nxv8i16( [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqdecp_s16(svint16_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdecp.nxv8i16( %op, %[[PG]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_s16,,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdecp.nxv4i32( [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqdecp_s32u11__SVInt32_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdecp.nxv4i32( [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqdecp_s32(svint32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdecp.nxv4i32( %op, %[[PG]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_s32,,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdecp.nxv2i64( [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqdecp_s64u11__SVInt64_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdecp.nxv2i64( [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqdecp_s64(svint64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdecp.nxv2i64( %op, %[[PG]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_s64,,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqdecp.nxv8i16( [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqdecp_u16u12__SVUint16_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqdecp.nxv8i16( [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svqdecp_u16(svuint16_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqdecp.nxv8i16( %op, %[[PG]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_u16,,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqdecp.nxv4i32( [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqdecp_u32u12__SVUint32_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqdecp.nxv4i32( [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svqdecp_u32(svuint32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqdecp.nxv4i32( %op, %[[PG]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_u32,,)(op, pg); } -// CHECK-LABEL: @test_svqdecp_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqdecp.nxv2i64( [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqdecp_u64u12__SVUint64_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqdecp.nxv2i64( [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svqdecp_u64(svuint64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqdecp_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqdecp.nxv2i64( %op, %[[PG]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecp,_u64,,)(op, pg); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecw.c index b3f0303bbf3c..1208459f17d7 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qdecw.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,197 +13,106 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqdecw_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecw.n32(i32 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdecw_n_s32i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecw.n32(i32 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqdecw_n_s32(int32_t op) { + // CHECK-LABEL: test_svqdecw_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecw.n32(i32 %op, i32 31, i32 1) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecw,_n_s32,,)(op, 1); } -// CHECK-LABEL: @test_svqdecw_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecw.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdecw_n_s32_1i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecw.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqdecw_n_s32_1(int32_t op) { + // CHECK-LABEL: test_svqdecw_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecw.n32(i32 %op, i32 31, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecw,_n_s32,,)(op, 16); } -// CHECK-LABEL: @test_svqdecw_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecw.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdecw_n_s64l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecw.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svqdecw_n_s64(int64_t op) { + // CHECK-LABEL: test_svqdecw_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecw.n64(i64 %op, i32 31, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecw,_n_s64,,)(op, 1); } -// CHECK-LABEL: @test_svqdecw_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecw.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdecw_n_u32j( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecw.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// uint32_t test_svqdecw_n_u32(uint32_t op) { + // CHECK-LABEL: test_svqdecw_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecw.n32(i32 %op, i32 31, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecw,_n_u32,,)(op, 16); } -// CHECK-LABEL: @test_svqdecw_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecw.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdecw_n_u64m( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecw.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svqdecw_n_u64(uint64_t op) { + // CHECK-LABEL: test_svqdecw_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecw.n64(i64 %op, i32 31, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecw,_n_u64,,)(op, 1); } -// CHECK-LABEL: @test_svqdecw_pat_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecw.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecw_pat_n_s32i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqdecw.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqdecw_pat_n_s32(int32_t op) { + // CHECK-LABEL: test_svqdecw_pat_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqdecw.n32(i32 %op, i32 31, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecw_pat,_n_s32,,)(op, SV_ALL, 16); } -// CHECK-LABEL: @test_svqdecw_pat_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecw.n64(i64 [[OP:%.*]], i32 0, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecw_pat_n_s64l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqdecw.n64(i64 [[OP:%.*]], i32 0, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svqdecw_pat_n_s64(int64_t op) { + // CHECK-LABEL: test_svqdecw_pat_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqdecw.n64(i64 %op, i32 0, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecw_pat,_n_s64,,)(op, SV_POW2, 1); } -// CHECK-LABEL: @test_svqdecw_pat_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecw.n32(i32 [[OP:%.*]], i32 1, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecw_pat_n_u32j( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqdecw.n32(i32 [[OP:%.*]], i32 1, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// uint32_t test_svqdecw_pat_n_u32(uint32_t op) { + // CHECK-LABEL: test_svqdecw_pat_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqdecw.n32(i32 %op, i32 1, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecw_pat,_n_u32,,)(op, SV_VL1, 16); } -// CHECK-LABEL: @test_svqdecw_pat_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecw.n64(i64 [[OP:%.*]], i32 2, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdecw_pat_n_u64m( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqdecw.n64(i64 [[OP:%.*]], i32 2, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svqdecw_pat_n_u64(uint64_t op) { + // CHECK-LABEL: test_svqdecw_pat_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqdecw.n64(i64 %op, i32 2, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecw_pat,_n_u64,,)(op, SV_VL2, 1); } -// CHECK-LABEL: @test_svqdecw_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdecw.nxv4i32( [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqdecw_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdecw.nxv4i32( [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdecw_s32(svint32_t op) { + // CHECK-LABEL: test_svqdecw_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdecw.nxv4i32( %op, i32 31, i32 16) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecw,_s32,,)(op, 16); } -// CHECK-LABEL: @test_svqdecw_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdecw.nxv4i32( [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqdecw_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdecw.nxv4i32( [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqdecw_u32(svuint32_t op) { + // CHECK-LABEL: test_svqdecw_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqdecw.nxv4i32( %op, i32 31, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecw,_u32,,)(op, 1); } -// CHECK-LABEL: @test_svqdecw_pat_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdecw.nxv4i32( [[OP:%.*]], i32 3, i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdecw_pat_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdecw.nxv4i32( [[OP:%.*]], i32 3, i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdecw_pat_s32(svint32_t op) { + // CHECK-LABEL: test_svqdecw_pat_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdecw.nxv4i32( %op, i32 3, i32 16) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecw_pat,_s32,,)(op, SV_VL3, 16); } -// CHECK-LABEL: @test_svqdecw_pat_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdecw.nxv4i32( [[OP:%.*]], i32 4, i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdecw_pat_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqdecw.nxv4i32( [[OP:%.*]], i32 4, i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqdecw_pat_u32(svuint32_t op) { + // CHECK-LABEL: test_svqdecw_pat_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqdecw.nxv4i32( %op, i32 4, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqdecw_pat,_u32,,)(op, SV_VL4, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincb.c index 9e24a54665c8..3a1891102921 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincb.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,137 +13,74 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqincb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincb.n32(i32 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqincb_n_s32i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincb.n32(i32 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqincb_n_s32(int32_t op) { + // CHECK-LABEL: test_svqincb_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincb.n32(i32 %op, i32 31, i32 1) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincb,_n_s32,,)(op, 1); } -// CHECK-LABEL: @test_svqincb_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincb.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqincb_n_s32_1i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincb.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqincb_n_s32_1(int32_t op) { + // CHECK-LABEL: test_svqincb_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincb.n32(i32 %op, i32 31, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincb,_n_s32,,)(op, 16); } -// CHECK-LABEL: @test_svqincb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincb.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqincb_n_s64l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincb.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svqincb_n_s64(int64_t op) { + // CHECK-LABEL: test_svqincb_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincb.n64(i64 %op, i32 31, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincb,_n_s64,,)(op, 1); } -// CHECK-LABEL: @test_svqincb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincb.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqincb_n_u32j( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincb.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// uint32_t test_svqincb_n_u32(uint32_t op) { + // CHECK-LABEL: test_svqincb_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincb.n32(i32 %op, i32 31, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincb,_n_u32,,)(op, 16); } -// CHECK-LABEL: @test_svqincb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincb.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqincb_n_u64m( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincb.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svqincb_n_u64(uint64_t op) { + // CHECK-LABEL: test_svqincb_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincb.n64(i64 %op, i32 31, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincb,_n_u64,,)(op, 1); } -// CHECK-LABEL: @test_svqincb_pat_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincb.n32(i32 [[OP:%.*]], i32 5, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincb_pat_n_s32i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincb.n32(i32 [[OP:%.*]], i32 5, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqincb_pat_n_s32(int32_t op) { + // CHECK-LABEL: test_svqincb_pat_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincb.n32(i32 %op, i32 5, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincb_pat,_n_s32,,)(op, SV_VL5, 16); } -// CHECK-LABEL: @test_svqincb_pat_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincb.n64(i64 [[OP:%.*]], i32 6, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincb_pat_n_s64l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincb.n64(i64 [[OP:%.*]], i32 6, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svqincb_pat_n_s64(int64_t op) { + // CHECK-LABEL: test_svqincb_pat_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincb.n64(i64 %op, i32 6, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincb_pat,_n_s64,,)(op, SV_VL6, 1); } -// CHECK-LABEL: @test_svqincb_pat_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincb.n32(i32 [[OP:%.*]], i32 7, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincb_pat_n_u32j( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincb.n32(i32 [[OP:%.*]], i32 7, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// uint32_t test_svqincb_pat_n_u32(uint32_t op) { + // CHECK-LABEL: test_svqincb_pat_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincb.n32(i32 %op, i32 7, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincb_pat,_n_u32,,)(op, SV_VL7, 16); } -// CHECK-LABEL: @test_svqincb_pat_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincb.n64(i64 [[OP:%.*]], i32 8, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincb_pat_n_u64m( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincb.n64(i64 [[OP:%.*]], i32 8, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svqincb_pat_n_u64(uint64_t op) { + // CHECK-LABEL: test_svqincb_pat_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincb.n64(i64 %op, i32 8, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincb_pat,_n_u64,,)(op, SV_VL8, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincd.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincd.c index c46818ce1ff7..17f29bae301e 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincd.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincd.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,197 +13,106 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqincd_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincd.n32(i32 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqincd_n_s32i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincd.n32(i32 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqincd_n_s32(int32_t op) { + // CHECK-LABEL: test_svqincd_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincd.n32(i32 %op, i32 31, i32 1) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincd,_n_s32,,)(op, 1); } -// CHECK-LABEL: @test_svqincd_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincd.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqincd_n_s32_1i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincd.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqincd_n_s32_1(int32_t op) { + // CHECK-LABEL: test_svqincd_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincd.n32(i32 %op, i32 31, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincd,_n_s32,,)(op, 16); } -// CHECK-LABEL: @test_svqincd_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincd.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqincd_n_s64l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincd.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svqincd_n_s64(int64_t op) { + // CHECK-LABEL: test_svqincd_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincd.n64(i64 %op, i32 31, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincd,_n_s64,,)(op, 1); } -// CHECK-LABEL: @test_svqincd_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincd.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqincd_n_u32j( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincd.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// uint32_t test_svqincd_n_u32(uint32_t op) { + // CHECK-LABEL: test_svqincd_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincd.n32(i32 %op, i32 31, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincd,_n_u32,,)(op, 16); } -// CHECK-LABEL: @test_svqincd_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincd.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqincd_n_u64m( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincd.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svqincd_n_u64(uint64_t op) { + // CHECK-LABEL: test_svqincd_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincd.n64(i64 %op, i32 31, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincd,_n_u64,,)(op, 1); } -// CHECK-LABEL: @test_svqincd_pat_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincd.n32(i32 [[OP:%.*]], i32 9, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincd_pat_n_s32i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincd.n32(i32 [[OP:%.*]], i32 9, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqincd_pat_n_s32(int32_t op) { + // CHECK-LABEL: test_svqincd_pat_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincd.n32(i32 %op, i32 9, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincd_pat,_n_s32,,)(op, SV_VL16, 16); } -// CHECK-LABEL: @test_svqincd_pat_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincd.n64(i64 [[OP:%.*]], i32 10, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincd_pat_n_s64l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincd.n64(i64 [[OP:%.*]], i32 10, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svqincd_pat_n_s64(int64_t op) { + // CHECK-LABEL: test_svqincd_pat_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincd.n64(i64 %op, i32 10, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincd_pat,_n_s64,,)(op, SV_VL32, 1); } -// CHECK-LABEL: @test_svqincd_pat_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincd.n32(i32 [[OP:%.*]], i32 11, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincd_pat_n_u32j( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincd.n32(i32 [[OP:%.*]], i32 11, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// uint32_t test_svqincd_pat_n_u32(uint32_t op) { + // CHECK-LABEL: test_svqincd_pat_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincd.n32(i32 %op, i32 11, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincd_pat,_n_u32,,)(op, SV_VL64, 16); } -// CHECK-LABEL: @test_svqincd_pat_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincd.n64(i64 [[OP:%.*]], i32 12, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincd_pat_n_u64m( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincd.n64(i64 [[OP:%.*]], i32 12, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svqincd_pat_n_u64(uint64_t op) { + // CHECK-LABEL: test_svqincd_pat_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincd.n64(i64 %op, i32 12, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincd_pat,_n_u64,,)(op, SV_VL128, 1); } -// CHECK-LABEL: @test_svqincd_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqincd.nxv2i64( [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqincd_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqincd.nxv2i64( [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqincd_s64(svint64_t op) { + // CHECK-LABEL: test_svqincd_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqincd.nxv2i64( %op, i32 31, i32 16) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincd,_s64,,)(op, 16); } -// CHECK-LABEL: @test_svqincd_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqincd.nxv2i64( [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqincd_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqincd.nxv2i64( [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svqincd_u64(svuint64_t op) { + // CHECK-LABEL: test_svqincd_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqincd.nxv2i64( %op, i32 31, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincd,_u64,,)(op, 1); } -// CHECK-LABEL: @test_svqincd_pat_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqincd.nxv2i64( [[OP:%.*]], i32 13, i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqincd_pat_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqincd.nxv2i64( [[OP:%.*]], i32 13, i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqincd_pat_s64(svint64_t op) { + // CHECK-LABEL: test_svqincd_pat_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqincd.nxv2i64( %op, i32 13, i32 16) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincd_pat,_s64,,)(op, SV_VL256, 16); } -// CHECK-LABEL: @test_svqincd_pat_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqincd.nxv2i64( [[OP:%.*]], i32 29, i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqincd_pat_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqincd.nxv2i64( [[OP:%.*]], i32 29, i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svqincd_pat_u64(svuint64_t op) { + // CHECK-LABEL: test_svqincd_pat_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqincd.nxv2i64( %op, i32 29, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincd_pat,_u64,,)(op, SV_MUL4, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qinch.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qinch.c index c1ab033bb9ec..b5ccf09237c2 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qinch.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qinch.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,197 +13,106 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqinch_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqinch_n_s32i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqinch_n_s32(int32_t op) { + // CHECK-LABEL: test_svqinch_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 %op, i32 31, i32 1) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqinch,_n_s32,,)(op, 1); } -// CHECK-LABEL: @test_svqinch_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqinch_n_s32_1i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqinch_n_s32_1(int32_t op) { + // CHECK-LABEL: test_svqinch_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 %op, i32 31, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqinch,_n_s32,,)(op, 16); } -// CHECK-LABEL: @test_svqinch_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqinch.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqinch_n_s64l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqinch.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svqinch_n_s64(int64_t op) { + // CHECK-LABEL: test_svqinch_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqinch.n64(i64 %op, i32 31, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqinch,_n_s64,,)(op, 1); } -// CHECK-LABEL: @test_svqinch_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqinch.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqinch_n_u32j( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqinch.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// uint32_t test_svqinch_n_u32(uint32_t op) { + // CHECK-LABEL: test_svqinch_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqinch.n32(i32 %op, i32 31, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqinch,_n_u32,,)(op, 16); } -// CHECK-LABEL: @test_svqinch_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqinch.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqinch_n_u64m( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqinch.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svqinch_n_u64(uint64_t op) { + // CHECK-LABEL: test_svqinch_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqinch.n64(i64 %op, i32 31, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqinch,_n_u64,,)(op, 1); } -// CHECK-LABEL: @test_svqinch_pat_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 [[OP:%.*]], i32 30, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqinch_pat_n_s32i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 [[OP:%.*]], i32 30, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqinch_pat_n_s32(int32_t op) { + // CHECK-LABEL: test_svqinch_pat_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqinch.n32(i32 %op, i32 30, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqinch_pat,_n_s32,,)(op, SV_MUL3, 16); } -// CHECK-LABEL: @test_svqinch_pat_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqinch.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqinch_pat_n_s64l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqinch.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svqinch_pat_n_s64(int64_t op) { + // CHECK-LABEL: test_svqinch_pat_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqinch.n64(i64 %op, i32 31, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqinch_pat,_n_s64,,)(op, SV_ALL, 1); } -// CHECK-LABEL: @test_svqinch_pat_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqinch.n32(i32 [[OP:%.*]], i32 0, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqinch_pat_n_u32j( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqinch.n32(i32 [[OP:%.*]], i32 0, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// uint32_t test_svqinch_pat_n_u32(uint32_t op) { + // CHECK-LABEL: test_svqinch_pat_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqinch.n32(i32 %op, i32 0, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqinch_pat,_n_u32,,)(op, SV_POW2, 16); } -// CHECK-LABEL: @test_svqinch_pat_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqinch.n64(i64 [[OP:%.*]], i32 1, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqinch_pat_n_u64m( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqinch.n64(i64 [[OP:%.*]], i32 1, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svqinch_pat_n_u64(uint64_t op) { + // CHECK-LABEL: test_svqinch_pat_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqinch.n64(i64 %op, i32 1, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqinch_pat,_n_u64,,)(op, SV_VL1, 1); } -// CHECK-LABEL: @test_svqinch_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqinch.nxv8i16( [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqinch_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqinch.nxv8i16( [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqinch_s16(svint16_t op) { + // CHECK-LABEL: test_svqinch_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqinch.nxv8i16( %op, i32 31, i32 16) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqinch,_s16,,)(op, 16); } -// CHECK-LABEL: @test_svqinch_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqinch.nxv8i16( [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqinch_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqinch.nxv8i16( [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqinch_u16(svuint16_t op) { + // CHECK-LABEL: test_svqinch_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqinch.nxv8i16( %op, i32 31, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqinch,_u16,,)(op, 1); } -// CHECK-LABEL: @test_svqinch_pat_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqinch.nxv8i16( [[OP:%.*]], i32 2, i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqinch_pat_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqinch.nxv8i16( [[OP:%.*]], i32 2, i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqinch_pat_s16(svint16_t op) { + // CHECK-LABEL: test_svqinch_pat_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqinch.nxv8i16( %op, i32 2, i32 16) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqinch_pat,_s16,,)(op, SV_VL2, 16); } -// CHECK-LABEL: @test_svqinch_pat_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqinch.nxv8i16( [[OP:%.*]], i32 3, i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqinch_pat_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqinch.nxv8i16( [[OP:%.*]], i32 3, i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqinch_pat_u16(svuint16_t op) { + // CHECK-LABEL: test_svqinch_pat_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqinch.nxv8i16( %op, i32 3, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqinch_pat,_u16,,)(op, SV_VL3, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincp.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincp.c index f6bcd75332ad..55bbd48f4a19 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincp.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincp.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,368 +13,196 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqincp_n_s32_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqincp_n_s32_b8iu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqincp_n_s32_b8(int32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_n_s32_b8 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv16i1(i32 %op, %pg) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_n_s32,_b8,)(op, pg); } -// CHECK-LABEL: @test_svqincp_n_s32_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincp_n_s32_b16iu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// int32_t test_svqincp_n_s32_b16(int32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_n_s32_b16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv8i1(i32 %op, %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_n_s32,_b16,)(op, pg); } -// CHECK-LABEL: @test_svqincp_n_s32_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincp_n_s32_b32iu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// int32_t test_svqincp_n_s32_b32(int32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_n_s32_b32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv4i1(i32 %op, %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_n_s32,_b32,)(op, pg); } -// CHECK-LABEL: @test_svqincp_n_s32_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincp_n_s32_b64iu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// int32_t test_svqincp_n_s32_b64(int32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_n_s32_b64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincp.n32.nxv2i1(i32 %op, %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_n_s32,_b64,)(op, pg); } -// CHECK-LABEL: @test_svqincp_n_s64_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqincp_n_s64_b8lu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svqincp_n_s64_b8(int64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_n_s64_b8 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv16i1(i64 %op, %pg) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_n_s64,_b8,)(op, pg); } -// CHECK-LABEL: @test_svqincp_n_s64_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincp_n_s64_b16lu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// int64_t test_svqincp_n_s64_b16(int64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_n_s64_b16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv8i1(i64 %op, %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_n_s64,_b16,)(op, pg); } -// CHECK-LABEL: @test_svqincp_n_s64_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincp_n_s64_b32lu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// int64_t test_svqincp_n_s64_b32(int64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_n_s64_b32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv4i1(i64 %op, %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_n_s64,_b32,)(op, pg); } -// CHECK-LABEL: @test_svqincp_n_s64_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincp_n_s64_b64lu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// int64_t test_svqincp_n_s64_b64(int64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_n_s64_b64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincp.n64.nxv2i1(i64 %op, %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_n_s64,_b64,)(op, pg); } -// CHECK-LABEL: @test_svqincp_n_u32_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqincp_n_u32_b8ju10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv16i1(i32 [[OP:%.*]], [[PG:%.*]]) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// uint32_t test_svqincp_n_u32_b8(uint32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_n_u32_b8 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv16i1(i32 %op, %pg) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_n_u32,_b8,)(op, pg); } -// CHECK-LABEL: @test_svqincp_n_u32_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincp_n_u32_b16ju10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv8i1(i32 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// uint32_t test_svqincp_n_u32_b16(uint32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_n_u32_b16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv8i1(i32 %op, %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_n_u32,_b16,)(op, pg); } -// CHECK-LABEL: @test_svqincp_n_u32_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincp_n_u32_b32ju10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv4i1(i32 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// uint32_t test_svqincp_n_u32_b32(uint32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_n_u32_b32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv4i1(i32 %op, %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_n_u32,_b32,)(op, pg); } -// CHECK-LABEL: @test_svqincp_n_u32_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i32 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincp_n_u32_b64ju10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv2i1(i32 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i32 [[TMP1]] -// uint32_t test_svqincp_n_u32_b64(uint32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_n_u32_b64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincp.n32.nxv2i1(i32 %op, %[[PG]]) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_n_u32,_b64,)(op, pg); } -// CHECK-LABEL: @test_svqincp_n_u64_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqincp_n_u64_b8mu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv16i1(i64 [[OP:%.*]], [[PG:%.*]]) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svqincp_n_u64_b8(uint64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_n_u64_b8 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv16i1(i64 %op, %pg) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_n_u64,_b8,)(op, pg); } -// CHECK-LABEL: @test_svqincp_n_u64_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincp_n_u64_b16mu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv8i1(i64 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svqincp_n_u64_b16(uint64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_n_u64_b16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv8i1(i64 %op, %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_n_u64,_b16,)(op, pg); } -// CHECK-LABEL: @test_svqincp_n_u64_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincp_n_u64_b32mu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv4i1(i64 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svqincp_n_u64_b32(uint64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_n_u64_b32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv4i1(i64 %op, %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_n_u64,_b32,)(op, pg); } -// CHECK-LABEL: @test_svqincp_n_u64_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret i64 [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincp_n_u64_b64mu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv2i1(i64 [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret i64 [[TMP1]] -// uint64_t test_svqincp_n_u64_b64(uint64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_n_u64_b64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincp.n64.nxv2i1(i64 %op, %[[PG]]) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_n_u64,_b64,)(op, pg); } -// CHECK-LABEL: @test_svqincp_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqincp.nxv8i16( [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqincp_s16u11__SVInt16_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqincp.nxv8i16( [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqincp_s16(svint16_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqincp.nxv8i16( %op, %[[PG]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_s16,,)(op, pg); } -// CHECK-LABEL: @test_svqincp_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqincp.nxv4i32( [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqincp_s32u11__SVInt32_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqincp.nxv4i32( [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqincp_s32(svint32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqincp.nxv4i32( %op, %[[PG]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_s32,,)(op, pg); } -// CHECK-LABEL: @test_svqincp_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqincp.nxv2i64( [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqincp_s64u11__SVInt64_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqincp.nxv2i64( [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqincp_s64(svint64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqincp.nxv2i64( %op, %[[PG]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_s64,,)(op, pg); } -// CHECK-LABEL: @test_svqincp_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqincp.nxv8i16( [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqincp_u16u12__SVUint16_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqincp.nxv8i16( [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svqincp_u16(svuint16_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqincp.nxv8i16( %op, %[[PG]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_u16,,)(op, pg); } -// CHECK-LABEL: @test_svqincp_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqincp.nxv4i32( [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqincp_u32u12__SVUint32_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqincp.nxv4i32( [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svqincp_u32(svuint32_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqincp.nxv4i32( %op, %[[PG]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_u32,,)(op, pg); } -// CHECK-LABEL: @test_svqincp_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqincp.nxv2i64( [[OP:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqincp_u64u12__SVUint64_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqincp.nxv2i64( [[OP:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svqincp_u64(svuint64_t op, svbool_t pg) { + // CHECK-LABEL: test_svqincp_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqincp.nxv2i64( %op, %[[PG]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincp,_u64,,)(op, pg); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincw.c index 990ea55a5556..712bdfa52142 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qincw.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,197 +13,106 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqincw_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincw.n32(i32 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqincw_n_s32i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincw.n32(i32 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqincw_n_s32(int32_t op) { + // CHECK-LABEL: test_svqincw_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincw.n32(i32 %op, i32 31, i32 1) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincw,_n_s32,,)(op, 1); } -// CHECK-LABEL: @test_svqincw_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincw.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqincw_n_s32_1i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincw.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqincw_n_s32_1(int32_t op) { + // CHECK-LABEL: test_svqincw_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincw.n32(i32 %op, i32 31, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincw,_n_s32,,)(op, 16); } -// CHECK-LABEL: @test_svqincw_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincw.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqincw_n_s64l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincw.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svqincw_n_s64(int64_t op) { + // CHECK-LABEL: test_svqincw_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincw.n64(i64 %op, i32 31, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincw,_n_s64,,)(op, 1); } -// CHECK-LABEL: @test_svqincw_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincw.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqincw_n_u32j( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincw.n32(i32 [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// uint32_t test_svqincw_n_u32(uint32_t op) { + // CHECK-LABEL: test_svqincw_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincw.n32(i32 %op, i32 31, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincw,_n_u32,,)(op, 16); } -// CHECK-LABEL: @test_svqincw_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincw.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqincw_n_u64m( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincw.n64(i64 [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svqincw_n_u64(uint64_t op) { + // CHECK-LABEL: test_svqincw_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincw.n64(i64 %op, i32 31, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincw,_n_u64,,)(op, 1); } -// CHECK-LABEL: @test_svqincw_pat_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincw.n32(i32 [[OP:%.*]], i32 4, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincw_pat_n_s32i( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.sqincw.n32(i32 [[OP:%.*]], i32 4, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// int32_t test_svqincw_pat_n_s32(int32_t op) { + // CHECK-LABEL: test_svqincw_pat_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.sqincw.n32(i32 %op, i32 4, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincw_pat,_n_s32,,)(op, SV_VL4, 16); } -// CHECK-LABEL: @test_svqincw_pat_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincw.n64(i64 [[OP:%.*]], i32 5, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincw_pat_n_s64l( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.sqincw.n64(i64 [[OP:%.*]], i32 5, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// int64_t test_svqincw_pat_n_s64(int64_t op) { + // CHECK-LABEL: test_svqincw_pat_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.sqincw.n64(i64 %op, i32 5, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincw_pat,_n_s64,,)(op, SV_VL5, 1); } -// CHECK-LABEL: @test_svqincw_pat_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincw.n32(i32 [[OP:%.*]], i32 6, i32 16) -// CHECK-NEXT: ret i32 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincw_pat_n_u32j( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i32 @llvm.aarch64.sve.uqincw.n32(i32 [[OP:%.*]], i32 6, i32 16) -// CPP-CHECK-NEXT: ret i32 [[TMP0]] -// uint32_t test_svqincw_pat_n_u32(uint32_t op) { + // CHECK-LABEL: test_svqincw_pat_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call i32 @llvm.aarch64.sve.uqincw.n32(i32 %op, i32 6, i32 16) + // CHECK: ret i32 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincw_pat,_n_u32,,)(op, SV_VL6, 16); } -// CHECK-LABEL: @test_svqincw_pat_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincw.n64(i64 [[OP:%.*]], i32 7, i32 1) -// CHECK-NEXT: ret i64 [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqincw_pat_n_u64m( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.aarch64.sve.uqincw.n64(i64 [[OP:%.*]], i32 7, i32 1) -// CPP-CHECK-NEXT: ret i64 [[TMP0]] -// uint64_t test_svqincw_pat_n_u64(uint64_t op) { + // CHECK-LABEL: test_svqincw_pat_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call i64 @llvm.aarch64.sve.uqincw.n64(i64 %op, i32 7, i32 1) + // CHECK: ret i64 %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincw_pat,_n_u64,,)(op, SV_VL7, 1); } -// CHECK-LABEL: @test_svqincw_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqincw.nxv4i32( [[OP:%.*]], i32 31, i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqincw_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqincw.nxv4i32( [[OP:%.*]], i32 31, i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqincw_s32(svint32_t op) { + // CHECK-LABEL: test_svqincw_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqincw.nxv4i32( %op, i32 31, i32 16) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincw,_s32,,)(op, 16); } -// CHECK-LABEL: @test_svqincw_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqincw.nxv4i32( [[OP:%.*]], i32 31, i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqincw_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqincw.nxv4i32( [[OP:%.*]], i32 31, i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqincw_u32(svuint32_t op) { + // CHECK-LABEL: test_svqincw_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqincw.nxv4i32( %op, i32 31, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincw,_u32,,)(op, 1); } -// CHECK-LABEL: @test_svqincw_pat_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqincw.nxv4i32( [[OP:%.*]], i32 8, i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqincw_pat_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqincw.nxv4i32( [[OP:%.*]], i32 8, i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqincw_pat_s32(svint32_t op) { + // CHECK-LABEL: test_svqincw_pat_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqincw.nxv4i32( %op, i32 8, i32 16) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincw_pat,_s32,,)(op, SV_VL8, 16); } -// CHECK-LABEL: @test_svqincw_pat_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqincw.nxv4i32( [[OP:%.*]], i32 9, i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqincw_pat_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqincw.nxv4i32( [[OP:%.*]], i32 9, i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqincw_pat_u32(svuint32_t op) { + // CHECK-LABEL: test_svqincw_pat_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqincw.nxv4i32( %op, i32 9, i32 1) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqincw_pat,_u32,,)(op, SV_VL16, 1); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c index 8ec7f0f377dd..3a59667f3c2f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_qsub.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,258 +13,138 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqsub_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svqsub_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqsub_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqsub_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_s8,,)(op1, op2); } -// CHECK-LABEL: @test_svqsub_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svqsub_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqsub_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqsub_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svqsub_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svqsub_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqsub_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqsub_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svqsub_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svqsub_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqsub_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqsub_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svqsub_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svqsub_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqsub_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svqsub_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svqsub_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svqsub_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqsub_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svqsub_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svqsub_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svqsub_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqsub_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svqsub_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svqsub_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svqsub_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svqsub_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svqsub_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svqsub_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqsub_n_s8u10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqsub_n_s8(svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqsub_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv16i8( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_s8,,)(op1, op2); } -// CHECK-LABEL: @test_svqsub_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_n_s16u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqsub_n_s16(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqsub_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svqsub_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_n_s32u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqsub_n_s32(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqsub_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svqsub_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_n_s64u11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqsub_n_s64(svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqsub_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.x.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svqsub_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqsub_n_u8u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqsub_n_u8(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svqsub_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv16i8( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svqsub_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_n_u16u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svqsub_n_u16(svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svqsub_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svqsub_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_n_u32u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svqsub_n_u32(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svqsub_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svqsub_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_n_u64u12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svqsub_n_u64(svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svqsub_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.x.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svqsub,_n_u64,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rbit.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rbit.c index 46dfe8158b32..bbb6f9765be5 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rbit.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rbit.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,398 +13,212 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrbit_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svrbit_s8_zu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrbit_s8_z(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svrbit_s8_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( zeroinitializer, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_s8,_z,)(pg, op); } -// CHECK-LABEL: @test_svrbit_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrbit_s16_zu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svrbit_s16_z(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svrbit_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_s16,_z,)(pg, op); } -// CHECK-LABEL: @test_svrbit_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrbit_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrbit_s32_z(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svrbit_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_s32,_z,)(pg, op); } -// CHECK-LABEL: @test_svrbit_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrbit_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrbit_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svrbit_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svrbit_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svrbit_u8_zu10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrbit_u8_z(svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svrbit_u8_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( zeroinitializer, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_u8,_z,)(pg, op); } -// CHECK-LABEL: @test_svrbit_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrbit_u16_zu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svrbit_u16_z(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svrbit_u16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_u16,_z,)(pg, op); } -// CHECK-LABEL: @test_svrbit_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrbit_u32_zu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrbit_u32_z(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svrbit_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_u32,_z,)(pg, op); } -// CHECK-LABEL: @test_svrbit_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrbit_u64_zu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrbit_u64_z(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svrbit_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_u64,_z,)(pg, op); } -// CHECK-LABEL: @test_svrbit_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svrbit_s8_mu10__SVInt8_tu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrbit_s8_m(svint8_t inactive, svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svrbit_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( %inactive, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_s8,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrbit_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrbit_s16_mu11__SVInt16_tu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svrbit_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svrbit_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_s16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrbit_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrbit_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrbit_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svrbit_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_s32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrbit_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrbit_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrbit_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svrbit_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrbit_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svrbit_u8_mu11__SVUint8_tu10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrbit_u8_m(svuint8_t inactive, svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svrbit_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( %inactive, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_u8,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrbit_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrbit_u16_mu12__SVUint16_tu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svrbit_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svrbit_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_u16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrbit_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrbit_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrbit_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svrbit_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_u32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrbit_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrbit_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrbit_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svrbit_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_u64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrbit_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svrbit_s8_xu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrbit_s8_x(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svrbit_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( undef, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_s8,_x,)(pg, op); } -// CHECK-LABEL: @test_svrbit_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrbit_s16_xu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svrbit_s16_x(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svrbit_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_s16,_x,)(pg, op); } -// CHECK-LABEL: @test_svrbit_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrbit_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrbit_s32_x(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svrbit_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_s32,_x,)(pg, op); } -// CHECK-LABEL: @test_svrbit_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrbit_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrbit_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svrbit_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_s64,_x,)(pg, op); } -// CHECK-LABEL: @test_svrbit_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svrbit_u8_xu10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrbit_u8_x(svbool_t pg, svuint8_t op) { + // CHECK-LABEL: test_svrbit_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv16i8( undef, %pg, %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_u8,_x,)(pg, op); } -// CHECK-LABEL: @test_svrbit_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrbit_u16_xu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svrbit_u16_x(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svrbit_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_u16,_x,)(pg, op); } -// CHECK-LABEL: @test_svrbit_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrbit_u32_xu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrbit_u32_x(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svrbit_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_u32,_x,)(pg, op); } -// CHECK-LABEL: @test_svrbit_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrbit_u64_xu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrbit_u64_x(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svrbit_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rbit.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrbit,_u64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rdffr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rdffr.c index 00cbc1f221aa..a85ac7bb5cef 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rdffr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rdffr.c @@ -1,38 +1,22 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include -// CHECK-LABEL: @test_svrdffr( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rdffr.z( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z12test_svrdffrv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ptrue.nxv16i1(i32 31) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rdffr.z( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svrdffr() { + // CHECK-LABEL: test_svrdffr + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rdffr.z( + // CHECK-NOT: rdffr + // CHECK: ret %[[INTRINSIC]] return svrdffr(); } -// CHECK-LABEL: @test_svrdffr_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rdffr.z( [[PG:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svrdffr_zu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rdffr.z( [[PG:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svrdffr_z(svbool_t pg) { + // CHECK-LABEL: test_svrdffr_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rdffr.z( %pg) + // CHECK: ret %[[INTRINSIC]] return svrdffr_z(pg); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpe.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpe.c index d38879b1f194..202ae69ac3c6 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpe.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpe.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,47 +13,26 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrecpe_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecpe.x.nxv8f16( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svrecpe_f16u13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecpe.x.nxv8f16( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svrecpe_f16(svfloat16_t op) { + // CHECK-LABEL: test_svrecpe_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frecpe.x.nxv8f16( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrecpe,_f16,,)(op); } -// CHECK-LABEL: @test_svrecpe_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecpe.x.nxv4f32( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svrecpe_f32u13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecpe.x.nxv4f32( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svrecpe_f32(svfloat32_t op) { + // CHECK-LABEL: test_svrecpe_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frecpe.x.nxv4f32( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrecpe,_f32,,)(op); } -// CHECK-LABEL: @test_svrecpe_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecpe.x.nxv2f64( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svrecpe_f64u13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecpe.x.nxv2f64( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svrecpe_f64(svfloat64_t op) { + // CHECK-LABEL: test_svrecpe_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frecpe.x.nxv2f64( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrecpe,_f64,,)(op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c index 4e7effa982f6..93415ea0a039 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recps.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,47 +13,26 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrecps_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecps.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svrecps_f16u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecps.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svrecps_f16(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svrecps_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frecps.x.nxv8f16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrecps,_f16,,)(op1, op2); } -// CHECK-LABEL: @test_svrecps_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecps.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svrecps_f32u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecps.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svrecps_f32(svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svrecps_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frecps.x.nxv4f32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrecps,_f32,,)(op1, op2); } -// CHECK-LABEL: @test_svrecps_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecps.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svrecps_f64u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frecps.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svrecps_f64(svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svrecps_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frecps.x.nxv2f64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrecps,_f64,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c index 60ca8534a1d0..0a25ca42e212 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_recpx.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,155 +13,83 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrecpx_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrecpx_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrecpx_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrecpx_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frecpx.nxv8f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrecpx,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svrecpx_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrecpx_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrecpx_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrecpx_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frecpx.nxv4f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrecpx,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svrecpx_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrecpx_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrecpx_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrecpx_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frecpx.nxv2f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrecpx,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svrecpx_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrecpx_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrecpx_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrecpx_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frecpx.nxv8f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrecpx,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrecpx_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrecpx_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrecpx_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrecpx_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frecpx.nxv4f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrecpx,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrecpx_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrecpx_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrecpx_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrecpx_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frecpx.nxv2f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrecpx,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrecpx_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrecpx_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrecpx_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrecpx_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frecpx.nxv8f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrecpx,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svrecpx_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrecpx_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrecpx_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrecpx_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frecpx.nxv4f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrecpx,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svrecpx_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrecpx_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frecpx.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrecpx_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrecpx_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frecpx.nxv2f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrecpx,_f64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret-bfloat.c index 3d903febb47f..da1aa4b7b540 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret-bfloat.c @@ -1,11 +1,10 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include @@ -16,321 +15,161 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svreinterpret_s8_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s8_bf16u14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svreinterpret_s8_bf16(svbfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_s8_bf16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s8, _bf16, , )(op); } -// CHECK-LABEL: @test_svreinterpret_s16_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z27test_svreinterpret_s16_bf16u14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svreinterpret_s16_bf16(svbfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_s16_bf16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s16, _bf16, , )(op); } -// CHECK-LABEL: @test_svreinterpret_s32_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z27test_svreinterpret_s32_bf16u14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svreinterpret_s32_bf16(svbfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_s32_bf16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s32, _bf16, , )(op); } -// CHECK-LABEL: @test_svreinterpret_s64_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z27test_svreinterpret_s64_bf16u14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svreinterpret_s64_bf16(svbfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_s64_bf16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s64, _bf16, , )(op); } -// CHECK-LABEL: @test_svreinterpret_u8_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u8_bf16u14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svreinterpret_u8_bf16(svbfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_u8_bf16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u8, _bf16, , )(op); } -// CHECK-LABEL: @test_svreinterpret_u16_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z27test_svreinterpret_u16_bf16u14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svreinterpret_u16_bf16(svbfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_u16_bf16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u16, _bf16, , )(op); } -// CHECK-LABEL: @test_svreinterpret_u32_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z27test_svreinterpret_u32_bf16u14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svreinterpret_u32_bf16(svbfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_u32_bf16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u32, _bf16, , )(op); } -// CHECK-LABEL: @test_svreinterpret_u64_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z27test_svreinterpret_u64_bf16u14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svreinterpret_u64_bf16(svbfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_u64_bf16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u64, _bf16, , )(op); } -// CHECK-LABEL: @test_svreinterpret_bf16_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_bf16_s8u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svreinterpret_bf16_s8(svint8_t op) { + // CHECK-LABEL: test_svreinterpret_bf16_s8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_bf16, _s8, , )(op); } -// CHECK-LABEL: @test_svreinterpret_bf16_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z27test_svreinterpret_bf16_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svreinterpret_bf16_s16(svint16_t op) { + // CHECK-LABEL: test_svreinterpret_bf16_s16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_bf16, _s16, , )(op); } -// CHECK-LABEL: @test_svreinterpret_bf16_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z27test_svreinterpret_bf16_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svreinterpret_bf16_s32(svint32_t op) { + // CHECK-LABEL: test_svreinterpret_bf16_s32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_bf16, _s32, , )(op); } -// CHECK-LABEL: @test_svreinterpret_bf16_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z27test_svreinterpret_bf16_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svreinterpret_bf16_s64(svint64_t op) { + // CHECK-LABEL: test_svreinterpret_bf16_s64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_bf16, _s64, , )(op); } -// CHECK-LABEL: @test_svreinterpret_bf16_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_bf16_u8u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svreinterpret_bf16_u8(svuint8_t op) { + // CHECK-LABEL: test_svreinterpret_bf16_u8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_bf16, _u8, , )(op); } -// CHECK-LABEL: @test_svreinterpret_bf16_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z27test_svreinterpret_bf16_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svreinterpret_bf16_u16(svuint16_t op) { + // CHECK-LABEL: test_svreinterpret_bf16_u16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_bf16, _u16, , )(op); } -// CHECK-LABEL: @test_svreinterpret_bf16_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z27test_svreinterpret_bf16_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svreinterpret_bf16_u32(svuint32_t op) { + // CHECK-LABEL: test_svreinterpret_bf16_u32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_bf16, _u32, , )(op); } -// CHECK-LABEL: @test_svreinterpret_bf16_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z27test_svreinterpret_bf16_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svreinterpret_bf16_u64(svuint64_t op) { + // CHECK-LABEL: test_svreinterpret_bf16_u64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_bf16, _u64, , )(op); } -// CHECK-LABEL: @test_svreinterpret_bf16_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z28test_svreinterpret_bf16_bf16u14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svbfloat16_t test_svreinterpret_bf16_bf16(svbfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_bf16_bf16 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_bf16, _bf16, , )(op); } -// CHECK-LABEL: @test_svreinterpret_bf16_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z27test_svreinterpret_bf16_f16u13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svreinterpret_bf16_f16(svfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_bf16_f16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_bf16, _f16, , )(op); } -// CHECK-LABEL: @test_svreinterpret_bf16_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z27test_svreinterpret_bf16_f32u13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svreinterpret_bf16_f32(svfloat32_t op) { + // CHECK-LABEL: test_svreinterpret_bf16_f32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_bf16, _f32, , )(op); } -// CHECK-LABEL: @test_svreinterpret_bf16_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z27test_svreinterpret_bf16_f64u13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svreinterpret_bf16_f64(svfloat64_t op) { + // CHECK-LABEL: test_svreinterpret_bf16_f64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_bf16, _f64, , )(op); } -// CHECK-LABEL: @test_svreinterpret_f32_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z27test_svreinterpret_f32_bf16u14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svreinterpret_f32_bf16(svbfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_f32_bf16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f32, _bf16, , )(op); } -// CHECK-LABEL: @test_svreinterpret_f16_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z27test_svreinterpret_f16_bf16u14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svreinterpret_f16_bf16(svbfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_f16_bf16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f16, _bf16, , )(op); } -// CHECK-LABEL: @test_svreinterpret_f64_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z27test_svreinterpret_f64_bf16u14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svreinterpret_f64_bf16(svbfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_f64_bf16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f64, _bf16, , )(op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret.c index 0a6847943d26..11c376092a62 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_reinterpret.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include @@ -15,1786 +14,951 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svreinterpret_s8_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z24test_svreinterpret_s8_s8u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svint8_t test_svreinterpret_s8_s8(svint8_t op) { + // CHECK-LABEL: test_svreinterpret_s8_s8 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_s8,_s8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s8_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_s8_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svreinterpret_s8_s16(svint16_t op) { + // CHECK-LABEL: test_svreinterpret_s8_s16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s8,_s16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s8_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_s8_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svreinterpret_s8_s32(svint32_t op) { + // CHECK-LABEL: test_svreinterpret_s8_s32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s8,_s32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s8_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_s8_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svreinterpret_s8_s64(svint64_t op) { + // CHECK-LABEL: test_svreinterpret_s8_s64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s8,_s64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s8_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z24test_svreinterpret_s8_u8u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svint8_t test_svreinterpret_s8_u8(svuint8_t op) { + // CHECK-LABEL: test_svreinterpret_s8_u8 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_s8,_u8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s8_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_s8_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svreinterpret_s8_u16(svuint16_t op) { + // CHECK-LABEL: test_svreinterpret_s8_u16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s8,_u16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s8_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_s8_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svreinterpret_s8_u32(svuint32_t op) { + // CHECK-LABEL: test_svreinterpret_s8_u32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s8,_u32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s8_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_s8_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svreinterpret_s8_u64(svuint64_t op) { + // CHECK-LABEL: test_svreinterpret_s8_u64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s8,_u64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s8_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_s8_f16u13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svreinterpret_s8_f16(svfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_s8_f16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s8,_f16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s8_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_s8_f32u13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svreinterpret_s8_f32(svfloat32_t op) { + // CHECK-LABEL: test_svreinterpret_s8_f32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s8,_f32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s8_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_s8_f64u13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svreinterpret_s8_f64(svfloat64_t op) { + // CHECK-LABEL: test_svreinterpret_s8_f64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s8,_f64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s16_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_s16_s8u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svreinterpret_s16_s8(svint8_t op) { + // CHECK-LABEL: test_svreinterpret_s16_s8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s16,_s8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s16_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s16_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svint16_t test_svreinterpret_s16_s16(svint16_t op) { + // CHECK-LABEL: test_svreinterpret_s16_s16 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_s16,_s16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s16_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s16_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svreinterpret_s16_s32(svint32_t op) { + // CHECK-LABEL: test_svreinterpret_s16_s32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s16,_s32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s16_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s16_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svreinterpret_s16_s64(svint64_t op) { + // CHECK-LABEL: test_svreinterpret_s16_s64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s16,_s64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s16_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_s16_u8u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svreinterpret_s16_u8(svuint8_t op) { + // CHECK-LABEL: test_svreinterpret_s16_u8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s16,_u8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s16_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s16_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svint16_t test_svreinterpret_s16_u16(svuint16_t op) { + // CHECK-LABEL: test_svreinterpret_s16_u16 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_s16,_u16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s16_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s16_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svreinterpret_s16_u32(svuint32_t op) { + // CHECK-LABEL: test_svreinterpret_s16_u32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s16,_u32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s16_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s16_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svreinterpret_s16_u64(svuint64_t op) { + // CHECK-LABEL: test_svreinterpret_s16_u64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s16,_u64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s16_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s16_f16u13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svreinterpret_s16_f16(svfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_s16_f16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s16,_f16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s16_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s16_f32u13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svreinterpret_s16_f32(svfloat32_t op) { + // CHECK-LABEL: test_svreinterpret_s16_f32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s16,_f32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s16_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s16_f64u13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svreinterpret_s16_f64(svfloat64_t op) { + // CHECK-LABEL: test_svreinterpret_s16_f64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s16,_f64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s32_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_s32_s8u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svreinterpret_s32_s8(svint8_t op) { + // CHECK-LABEL: test_svreinterpret_s32_s8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s32,_s8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s32_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s32_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svreinterpret_s32_s16(svint16_t op) { + // CHECK-LABEL: test_svreinterpret_s32_s16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s32,_s16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s32_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s32_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svint32_t test_svreinterpret_s32_s32(svint32_t op) { + // CHECK-LABEL: test_svreinterpret_s32_s32 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_s32,_s32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s32_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s32_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svreinterpret_s32_s64(svint64_t op) { + // CHECK-LABEL: test_svreinterpret_s32_s64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s32,_s64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s32_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_s32_u8u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svreinterpret_s32_u8(svuint8_t op) { + // CHECK-LABEL: test_svreinterpret_s32_u8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s32,_u8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s32_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s32_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svreinterpret_s32_u16(svuint16_t op) { + // CHECK-LABEL: test_svreinterpret_s32_u16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s32,_u16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s32_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s32_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svint32_t test_svreinterpret_s32_u32(svuint32_t op) { + // CHECK-LABEL: test_svreinterpret_s32_u32 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_s32,_u32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s32_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s32_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svreinterpret_s32_u64(svuint64_t op) { + // CHECK-LABEL: test_svreinterpret_s32_u64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s32,_u64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s32_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s32_f16u13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svreinterpret_s32_f16(svfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_s32_f16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s32,_f16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s32_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s32_f32u13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svreinterpret_s32_f32(svfloat32_t op) { + // CHECK-LABEL: test_svreinterpret_s32_f32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s32,_f32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s32_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s32_f64u13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svreinterpret_s32_f64(svfloat64_t op) { + // CHECK-LABEL: test_svreinterpret_s32_f64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s32,_f64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s64_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_s64_s8u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svreinterpret_s64_s8(svint8_t op) { + // CHECK-LABEL: test_svreinterpret_s64_s8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s64,_s8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s64_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s64_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svreinterpret_s64_s16(svint16_t op) { + // CHECK-LABEL: test_svreinterpret_s64_s16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s64,_s16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s64_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s64_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svreinterpret_s64_s32(svint32_t op) { + // CHECK-LABEL: test_svreinterpret_s64_s32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s64,_s32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s64_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s64_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svint64_t test_svreinterpret_s64_s64(svint64_t op) { + // CHECK-LABEL: test_svreinterpret_s64_s64 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_s64,_s64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s64_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_s64_u8u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svreinterpret_s64_u8(svuint8_t op) { + // CHECK-LABEL: test_svreinterpret_s64_u8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s64,_u8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s64_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s64_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svreinterpret_s64_u16(svuint16_t op) { + // CHECK-LABEL: test_svreinterpret_s64_u16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s64,_u16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s64_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s64_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svreinterpret_s64_u32(svuint32_t op) { + // CHECK-LABEL: test_svreinterpret_s64_u32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s64,_u32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s64_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s64_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svint64_t test_svreinterpret_s64_u64(svuint64_t op) { + // CHECK-LABEL: test_svreinterpret_s64_u64 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_s64,_u64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s64_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s64_f16u13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svreinterpret_s64_f16(svfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_s64_f16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s64,_f16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s64_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s64_f32u13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svreinterpret_s64_f32(svfloat32_t op) { + // CHECK-LABEL: test_svreinterpret_s64_f32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s64,_f32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_s64_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_s64_f64u13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svreinterpret_s64_f64(svfloat64_t op) { + // CHECK-LABEL: test_svreinterpret_s64_f64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_s64,_f64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u8_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z24test_svreinterpret_u8_s8u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svuint8_t test_svreinterpret_u8_s8(svint8_t op) { + // CHECK-LABEL: test_svreinterpret_u8_s8 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_u8,_s8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u8_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_u8_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svreinterpret_u8_s16(svint16_t op) { + // CHECK-LABEL: test_svreinterpret_u8_s16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u8,_s16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u8_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_u8_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svreinterpret_u8_s32(svint32_t op) { + // CHECK-LABEL: test_svreinterpret_u8_s32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u8,_s32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u8_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_u8_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svreinterpret_u8_s64(svint64_t op) { + // CHECK-LABEL: test_svreinterpret_u8_s64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u8,_s64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u8_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z24test_svreinterpret_u8_u8u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svuint8_t test_svreinterpret_u8_u8(svuint8_t op) { + // CHECK-LABEL: test_svreinterpret_u8_u8 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_u8,_u8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u8_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_u8_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svreinterpret_u8_u16(svuint16_t op) { + // CHECK-LABEL: test_svreinterpret_u8_u16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u8,_u16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u8_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_u8_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svreinterpret_u8_u32(svuint32_t op) { + // CHECK-LABEL: test_svreinterpret_u8_u32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u8,_u32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u8_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_u8_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svreinterpret_u8_u64(svuint64_t op) { + // CHECK-LABEL: test_svreinterpret_u8_u64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u8,_u64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u8_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_u8_f16u13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svreinterpret_u8_f16(svfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_u8_f16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u8,_f16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u8_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_u8_f32u13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svreinterpret_u8_f32(svfloat32_t op) { + // CHECK-LABEL: test_svreinterpret_u8_f32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u8,_f32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u8_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_u8_f64u13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svreinterpret_u8_f64(svfloat64_t op) { + // CHECK-LABEL: test_svreinterpret_u8_f64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u8,_f64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u16_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_u16_s8u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svreinterpret_u16_s8(svint8_t op) { + // CHECK-LABEL: test_svreinterpret_u16_s8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u16,_s8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u16_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u16_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svuint16_t test_svreinterpret_u16_s16(svint16_t op) { + // CHECK-LABEL: test_svreinterpret_u16_s16 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_u16,_s16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u16_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u16_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svreinterpret_u16_s32(svint32_t op) { + // CHECK-LABEL: test_svreinterpret_u16_s32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u16,_s32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u16_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u16_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svreinterpret_u16_s64(svint64_t op) { + // CHECK-LABEL: test_svreinterpret_u16_s64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u16,_s64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u16_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_u16_u8u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svreinterpret_u16_u8(svuint8_t op) { + // CHECK-LABEL: test_svreinterpret_u16_u8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u16,_u8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u16_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u16_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svuint16_t test_svreinterpret_u16_u16(svuint16_t op) { + // CHECK-LABEL: test_svreinterpret_u16_u16 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_u16,_u16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u16_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u16_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svreinterpret_u16_u32(svuint32_t op) { + // CHECK-LABEL: test_svreinterpret_u16_u32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u16,_u32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u16_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u16_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svreinterpret_u16_u64(svuint64_t op) { + // CHECK-LABEL: test_svreinterpret_u16_u64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u16,_u64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u16_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u16_f16u13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svreinterpret_u16_f16(svfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_u16_f16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u16,_f16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u16_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u16_f32u13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svreinterpret_u16_f32(svfloat32_t op) { + // CHECK-LABEL: test_svreinterpret_u16_f32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u16,_f32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u16_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u16_f64u13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svreinterpret_u16_f64(svfloat64_t op) { + // CHECK-LABEL: test_svreinterpret_u16_f64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u16,_f64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u32_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_u32_s8u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svreinterpret_u32_s8(svint8_t op) { + // CHECK-LABEL: test_svreinterpret_u32_s8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u32,_s8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u32_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u32_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svreinterpret_u32_s16(svint16_t op) { + // CHECK-LABEL: test_svreinterpret_u32_s16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u32,_s16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u32_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u32_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svuint32_t test_svreinterpret_u32_s32(svint32_t op) { + // CHECK-LABEL: test_svreinterpret_u32_s32 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_u32,_s32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u32_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u32_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svreinterpret_u32_s64(svint64_t op) { + // CHECK-LABEL: test_svreinterpret_u32_s64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u32,_s64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u32_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_u32_u8u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svreinterpret_u32_u8(svuint8_t op) { + // CHECK-LABEL: test_svreinterpret_u32_u8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u32,_u8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u32_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u32_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svreinterpret_u32_u16(svuint16_t op) { + // CHECK-LABEL: test_svreinterpret_u32_u16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u32,_u16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u32_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u32_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svuint32_t test_svreinterpret_u32_u32(svuint32_t op) { + // CHECK-LABEL: test_svreinterpret_u32_u32 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_u32,_u32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u32_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u32_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svreinterpret_u32_u64(svuint64_t op) { + // CHECK-LABEL: test_svreinterpret_u32_u64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u32,_u64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u32_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u32_f16u13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svreinterpret_u32_f16(svfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_u32_f16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u32,_f16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u32_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u32_f32u13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svreinterpret_u32_f32(svfloat32_t op) { + // CHECK-LABEL: test_svreinterpret_u32_f32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u32,_f32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u32_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u32_f64u13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svreinterpret_u32_f64(svfloat64_t op) { + // CHECK-LABEL: test_svreinterpret_u32_f64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u32,_f64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u64_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_u64_s8u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svreinterpret_u64_s8(svint8_t op) { + // CHECK-LABEL: test_svreinterpret_u64_s8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u64,_s8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u64_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u64_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svreinterpret_u64_s16(svint16_t op) { + // CHECK-LABEL: test_svreinterpret_u64_s16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u64,_s16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u64_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u64_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svreinterpret_u64_s32(svint32_t op) { + // CHECK-LABEL: test_svreinterpret_u64_s32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u64,_s32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u64_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u64_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svuint64_t test_svreinterpret_u64_s64(svint64_t op) { + // CHECK-LABEL: test_svreinterpret_u64_s64 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_u64,_s64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u64_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_u64_u8u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svreinterpret_u64_u8(svuint8_t op) { + // CHECK-LABEL: test_svreinterpret_u64_u8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u64,_u8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u64_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u64_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svreinterpret_u64_u16(svuint16_t op) { + // CHECK-LABEL: test_svreinterpret_u64_u16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u64,_u16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u64_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u64_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svreinterpret_u64_u32(svuint32_t op) { + // CHECK-LABEL: test_svreinterpret_u64_u32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u64,_u32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u64_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u64_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svuint64_t test_svreinterpret_u64_u64(svuint64_t op) { + // CHECK-LABEL: test_svreinterpret_u64_u64 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_u64,_u64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u64_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u64_f16u13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svreinterpret_u64_f16(svfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_u64_f16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u64,_f16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u64_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u64_f32u13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svreinterpret_u64_f32(svfloat32_t op) { + // CHECK-LABEL: test_svreinterpret_u64_f32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u64,_f32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_u64_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_u64_f64u13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svreinterpret_u64_f64(svfloat64_t op) { + // CHECK-LABEL: test_svreinterpret_u64_f64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_u64,_f64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f16_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_f16_s8u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svreinterpret_f16_s8(svint8_t op) { + // CHECK-LABEL: test_svreinterpret_f16_s8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f16,_s8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f16_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f16_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svreinterpret_f16_s16(svint16_t op) { + // CHECK-LABEL: test_svreinterpret_f16_s16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f16,_s16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f16_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f16_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svreinterpret_f16_s32(svint32_t op) { + // CHECK-LABEL: test_svreinterpret_f16_s32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f16,_s32,,)(op); } -// -// CHECK-LABEL: @test_svreinterpret_f16_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f16_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svreinterpret_f16_s64(svint64_t op) { + // CHECK-LABEL: test_svreinterpret_f16_s64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f16,_s64,,)(op); } -// -// CHECK-LABEL: @test_svreinterpret_f16_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_f16_u8u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svreinterpret_f16_u8(svuint8_t op) { + // CHECK-LABEL: test_svreinterpret_f16_u8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f16,_u8,,)(op); } -// -// CHECK-LABEL: @test_svreinterpret_f16_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f16_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svreinterpret_f16_u16(svuint16_t op) { + // CHECK-LABEL: test_svreinterpret_f16_u16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f16,_u16,,)(op); } -// -// CHECK-LABEL: @test_svreinterpret_f16_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f16_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svreinterpret_f16_u32(svuint32_t op) { + // CHECK-LABEL: test_svreinterpret_f16_u32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f16,_u32,,)(op); } -// -// CHECK-LABEL: @test_svreinterpret_f16_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f16_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svreinterpret_f16_u64(svuint64_t op) { + // CHECK-LABEL: test_svreinterpret_f16_u64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f16,_u64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f16_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f16_f16u13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svfloat16_t test_svreinterpret_f16_f16(svfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_f16_f16 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_f16,_f16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f16_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f16_f32u13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svreinterpret_f16_f32(svfloat32_t op) { + // CHECK-LABEL: test_svreinterpret_f16_f32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f16,_f32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f16_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f16_f64u13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svreinterpret_f16_f64(svfloat64_t op) { + // CHECK-LABEL: test_svreinterpret_f16_f64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f16,_f64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f32_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_f32_s8u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svreinterpret_f32_s8(svint8_t op) { + // CHECK-LABEL: test_svreinterpret_f32_s8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f32,_s8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f32_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f32_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svreinterpret_f32_s16(svint16_t op) { + // CHECK-LABEL: test_svreinterpret_f32_s16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f32,_s16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f32_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f32_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svreinterpret_f32_s32(svint32_t op) { + // CHECK-LABEL: test_svreinterpret_f32_s32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f32,_s32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f32_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f32_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svreinterpret_f32_s64(svint64_t op) { + // CHECK-LABEL: test_svreinterpret_f32_s64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f32,_s64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f32_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_f32_u8u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svreinterpret_f32_u8(svuint8_t op) { + // CHECK-LABEL: test_svreinterpret_f32_u8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f32,_u8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f32_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f32_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svreinterpret_f32_u16(svuint16_t op) { + // CHECK-LABEL: test_svreinterpret_f32_u16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f32,_u16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f32_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f32_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svreinterpret_f32_u32(svuint32_t op) { + // CHECK-LABEL: test_svreinterpret_f32_u32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f32,_u32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f32_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f32_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svreinterpret_f32_u64(svuint64_t op) { + // CHECK-LABEL: test_svreinterpret_f32_u64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f32,_u64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f32_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f32_f16u13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svreinterpret_f32_f16(svfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_f32_f16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f32,_f16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f32_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f32_f32u13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svfloat32_t test_svreinterpret_f32_f32(svfloat32_t op) { + // CHECK-LABEL: test_svreinterpret_f32_f32 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_f32,_f32,,)(op); } -// -// CHECK-LABEL: @test_svreinterpret_f32_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f32_f64u13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svreinterpret_f32_f64(svfloat64_t op) { + // CHECK-LABEL: test_svreinterpret_f32_f64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f32,_f64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f64_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_f64_s8u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svreinterpret_f64_s8(svint8_t op) { + // CHECK-LABEL: test_svreinterpret_f64_s8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f64,_s8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f64_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f64_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svreinterpret_f64_s16(svint16_t op) { + // CHECK-LABEL: test_svreinterpret_f64_s16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f64,_s16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f64_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f64_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svreinterpret_f64_s32(svint32_t op) { + // CHECK-LABEL: test_svreinterpret_f64_s32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f64,_s32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f64_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f64_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svreinterpret_f64_s64(svint64_t op) { + // CHECK-LABEL: test_svreinterpret_f64_s64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f64,_s64,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f64_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svreinterpret_f64_u8u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svreinterpret_f64_u8(svuint8_t op) { + // CHECK-LABEL: test_svreinterpret_f64_u8 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f64,_u8,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f64_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f64_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svreinterpret_f64_u16(svuint16_t op) { + // CHECK-LABEL: test_svreinterpret_f64_u16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f64,_u16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f64_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f64_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svreinterpret_f64_u32(svuint32_t op) { + // CHECK-LABEL: test_svreinterpret_f64_u32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f64,_u32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f64_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f64_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svreinterpret_f64_u64(svuint64_t op) { + // CHECK-LABEL: test_svreinterpret_f64_u64 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f64,_u64,,)(op); } -// -// CHECK-LABEL: @test_svreinterpret_f64_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f64_f16u13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svreinterpret_f64_f16(svfloat16_t op) { + // CHECK-LABEL: test_svreinterpret_f64_f16 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f64,_f16,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f64_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f64_f32u13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast [[OP:%.*]] to -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svreinterpret_f64_f32(svfloat32_t op) { + // CHECK-LABEL: test_svreinterpret_f64_f32 + // CHECK: %[[CAST:.*]] = bitcast %op to + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svreinterpret_f64,_f32,,)(op); } -// CHECK-LABEL: @test_svreinterpret_f64_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret [[OP:%.*]] -// -// CPP-CHECK-LABEL: @_Z26test_svreinterpret_f64_f64u13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret [[OP:%.*]] -// svfloat64_t test_svreinterpret_f64_f64(svfloat64_t op) { + // CHECK-LABEL: test_svreinterpret_f64_f64 + // CHECK: ret %op return SVE_ACLE_FUNC(svreinterpret_f64,_f64,,)(op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c index d8543546decf..22b9dd7621e7 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,18 +13,11 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrev_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv8bf16( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svrev_bf16u14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv8bf16( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svrev_bf16(svbfloat16_t op) { + // CHECK-LABEL: test_svrev_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rev.nxv8bf16( %op) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svrev_bf16'}} return SVE_ACLE_FUNC(svrev,_bf16,,)(op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev.c index 04dd6da4332c..c532cd0a015d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rev.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,239 +13,128 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrev_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv16i8( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svrev_s8u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv16i8( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrev_s8(svint8_t op) { + // CHECK-LABEL: test_svrev_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rev.nxv16i8( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrev,_s8,,)(op); } -// CHECK-LABEL: @test_svrev_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv8i16( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svrev_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv8i16( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svrev_s16(svint16_t op) { + // CHECK-LABEL: test_svrev_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rev.nxv8i16( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrev,_s16,,)(op); } -// CHECK-LABEL: @test_svrev_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv4i32( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svrev_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv4i32( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svrev_s32(svint32_t op) { + // CHECK-LABEL: test_svrev_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rev.nxv4i32( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrev,_s32,,)(op); } -// CHECK-LABEL: @test_svrev_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv2i64( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svrev_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv2i64( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svrev_s64(svint64_t op) { + // CHECK-LABEL: test_svrev_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rev.nxv2i64( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrev,_s64,,)(op); } -// CHECK-LABEL: @test_svrev_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv16i8( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svrev_u8u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv16i8( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrev_u8(svuint8_t op) { + // CHECK-LABEL: test_svrev_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rev.nxv16i8( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrev,_u8,,)(op); } -// CHECK-LABEL: @test_svrev_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv8i16( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svrev_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv8i16( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svrev_u16(svuint16_t op) { + // CHECK-LABEL: test_svrev_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rev.nxv8i16( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrev,_u16,,)(op); } -// CHECK-LABEL: @test_svrev_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv4i32( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svrev_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv4i32( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svrev_u32(svuint32_t op) { + // CHECK-LABEL: test_svrev_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rev.nxv4i32( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrev,_u32,,)(op); } -// CHECK-LABEL: @test_svrev_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv2i64( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svrev_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv2i64( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svrev_u64(svuint64_t op) { + // CHECK-LABEL: test_svrev_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rev.nxv2i64( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrev,_u64,,)(op); } -// CHECK-LABEL: @test_svrev_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv8f16( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svrev_f16u13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv8f16( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svrev_f16(svfloat16_t op) { + // CHECK-LABEL: test_svrev_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rev.nxv8f16( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrev,_f16,,)(op); } -// CHECK-LABEL: @test_svrev_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv4f32( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svrev_f32u13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv4f32( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svrev_f32(svfloat32_t op) { + // CHECK-LABEL: test_svrev_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rev.nxv4f32( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrev,_f32,,)(op); } -// CHECK-LABEL: @test_svrev_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv2f64( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svrev_f64u13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv2f64( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svrev_f64(svfloat64_t op) { + // CHECK-LABEL: test_svrev_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rev.nxv2f64( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrev,_f64,,)(op); } -// CHECK-LABEL: @test_svrev_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv16i1( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svrev_b8u10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rev.nxv16i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svrev_b8(svbool_t op) { + // CHECK-LABEL: test_svrev_b8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rev.nxv16i1( %op) + // CHECK: ret %[[INTRINSIC]] return svrev_b8(op); } -// CHECK-LABEL: @test_svrev_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rev.nxv8i1( [[TMP0]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z14test_svrev_b16u10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rev.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svrev_b16(svbool_t op) { + // CHECK-LABEL: test_svrev_b16 + // CHECK: %[[OP:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %op) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rev.nxv8i1( %[[OP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svrev_b16(op); } -// CHECK-LABEL: @test_svrev_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rev.nxv4i1( [[TMP0]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z14test_svrev_b32u10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rev.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svrev_b32(svbool_t op) { + // CHECK-LABEL: test_svrev_b32 + // CHECK: %[[OP:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %op) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rev.nxv4i1( %[[OP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svrev_b32(op); } -// CHECK-LABEL: @test_svrev_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rev.nxv2i1( [[TMP0]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z14test_svrev_b64u10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rev.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svrev_b64(svbool_t op) { + // CHECK-LABEL: test_svrev_b64 + // CHECK: %[[OP:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %op) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rev.nxv2i1( %[[OP]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svrev_b64(op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revb.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revb.c index eef7681648ef..59b65015660b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revb.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revb.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,308 +13,164 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrevb_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevb_s16_zu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svrevb_s16_z(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svrevb_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revb.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevb,_s16,_z,)(pg, op); } -// CHECK-LABEL: @test_svrevb_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevb_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrevb_s32_z(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svrevb_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revb.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevb,_s32,_z,)(pg, op); } -// CHECK-LABEL: @test_svrevb_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevb_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrevb_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svrevb_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revb.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevb,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svrevb_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevb_u16_zu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svrevb_u16_z(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svrevb_u16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revb.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevb,_u16,_z,)(pg, op); } -// CHECK-LABEL: @test_svrevb_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevb_u32_zu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrevb_u32_z(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svrevb_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revb.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevb,_u32,_z,)(pg, op); } -// CHECK-LABEL: @test_svrevb_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevb_u64_zu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrevb_u64_z(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svrevb_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revb.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevb,_u64,_z,)(pg, op); } -// CHECK-LABEL: @test_svrevb_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevb_s16_mu11__SVInt16_tu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svrevb_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svrevb_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revb.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevb,_s16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrevb_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevb_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrevb_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svrevb_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revb.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevb,_s32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrevb_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevb_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrevb_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svrevb_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revb.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevb,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrevb_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevb_u16_mu12__SVUint16_tu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svrevb_u16_m(svuint16_t inactive, svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svrevb_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revb.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevb,_u16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrevb_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevb_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrevb_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svrevb_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revb.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevb,_u32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrevb_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevb_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrevb_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svrevb_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revb.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevb,_u64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrevb_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevb_s16_xu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svrevb_s16_x(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svrevb_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revb.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevb,_s16,_x,)(pg, op); } -// CHECK-LABEL: @test_svrevb_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevb_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrevb_s32_x(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svrevb_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revb.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevb,_s32,_x,)(pg, op); } -// CHECK-LABEL: @test_svrevb_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevb_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrevb_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svrevb_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revb.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevb,_s64,_x,)(pg, op); } -// CHECK-LABEL: @test_svrevb_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevb_u16_xu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svrevb_u16_x(svbool_t pg, svuint16_t op) { + // CHECK-LABEL: test_svrevb_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revb.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevb,_u16,_x,)(pg, op); } -// CHECK-LABEL: @test_svrevb_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevb_u32_xu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrevb_u32_x(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svrevb_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revb.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevb,_u32,_x,)(pg, op); } -// CHECK-LABEL: @test_svrevb_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevb_u64_xu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revb.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrevb_u64_x(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svrevb_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revb.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevb,_u64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revh.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revh.c index 5bb7a046d5d2..3cada1f08300 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revh.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revh.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,206 +13,110 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrevh_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevh_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrevh_s32_z(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svrevh_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revh.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevh,_s32,_z,)(pg, op); } -// CHECK-LABEL: @test_svrevh_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevh_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrevh_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svrevh_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revh.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevh,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svrevh_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevh_u32_zu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrevh_u32_z(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svrevh_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revh.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevh,_u32,_z,)(pg, op); } -// CHECK-LABEL: @test_svrevh_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevh_u64_zu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrevh_u64_z(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svrevh_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revh.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevh,_u64,_z,)(pg, op); } -// CHECK-LABEL: @test_svrevh_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevh_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrevh_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svrevh_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revh.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevh,_s32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrevh_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevh_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrevh_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svrevh_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revh.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevh,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrevh_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevh_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrevh_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svrevh_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revh.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevh,_u32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrevh_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevh_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrevh_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svrevh_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revh.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevh,_u64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrevh_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevh_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrevh_s32_x(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svrevh_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revh.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevh,_s32,_x,)(pg, op); } -// CHECK-LABEL: @test_svrevh_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevh_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrevh_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svrevh_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revh.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevh,_s64,_x,)(pg, op); } -// CHECK-LABEL: @test_svrevh_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevh_u32_xu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrevh_u32_x(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svrevh_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revh.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevh,_u32,_x,)(pg, op); } -// CHECK-LABEL: @test_svrevh_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevh_u64_xu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revh.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrevh_u64_x(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svrevh_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revh.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevh,_u64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revw.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revw.c index 852a0ea0a809..8a131a85657b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revw.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_revw.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,104 +13,56 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrevw_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevw_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrevw_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svrevw_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revw.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevw,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svrevw_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevw_u64_zu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrevw_u64_z(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svrevw_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revw.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevw,_u64,_z,)(pg, op); } -// CHECK-LABEL: @test_svrevw_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevw_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrevw_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svrevw_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revw.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevw,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrevw_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevw_u64_mu12__SVUint64_tu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrevw_u64_m(svuint64_t inactive, svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svrevw_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revw.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevw,_u64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrevw_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevw_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrevw_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svrevw_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revw.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevw,_s64,_x,)(pg, op); } -// CHECK-LABEL: @test_svrevw_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrevw_u64_xu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.revw.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrevw_u64_x(svbool_t pg, svuint64_t op) { + // CHECK-LABEL: test_svrevw_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.revw.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrevw,_u64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c index 6da6c2b4f15c..377b15f91f20 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinta.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,155 +13,83 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrinta_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrinta_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrinta_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrinta_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frinta.nxv8f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrinta,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svrinta_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrinta_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrinta_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrinta_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frinta.nxv4f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrinta,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svrinta_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrinta_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrinta_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrinta_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frinta.nxv2f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrinta,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svrinta_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrinta_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrinta_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrinta_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frinta.nxv8f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrinta,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrinta_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrinta_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrinta_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrinta_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frinta.nxv4f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrinta,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrinta_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrinta_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrinta_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrinta_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frinta.nxv2f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrinta,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrinta_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrinta_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrinta_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrinta_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frinta.nxv8f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrinta,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svrinta_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrinta_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrinta_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrinta_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frinta.nxv4f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrinta,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svrinta_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrinta_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinta.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrinta_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrinta_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frinta.nxv2f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrinta,_f64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c index 1a6bb1215804..5b587fa0526f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rinti.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,155 +13,83 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrinti_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrinti_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrinti_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrinti_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frinti.nxv8f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrinti,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svrinti_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrinti_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrinti_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrinti_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frinti.nxv4f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrinti,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svrinti_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrinti_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrinti_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrinti_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frinti.nxv2f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrinti,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svrinti_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrinti_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrinti_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrinti_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frinti.nxv8f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrinti,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrinti_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrinti_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrinti_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrinti_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frinti.nxv4f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrinti,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrinti_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrinti_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrinti_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrinti_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frinti.nxv2f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrinti,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrinti_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrinti_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrinti_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrinti_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frinti.nxv8f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrinti,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svrinti_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrinti_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrinti_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrinti_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frinti.nxv4f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrinti,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svrinti_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrinti_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frinti.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrinti_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrinti_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frinti.nxv2f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrinti,_f64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c index 27aac220cfa2..f1276ff4a0d8 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintm.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,155 +13,83 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrintm_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintm_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrintm_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrintm_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintm.nxv8f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintm,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svrintm_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintm_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrintm_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrintm_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintm.nxv4f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintm,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svrintm_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintm_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrintm_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrintm_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintm.nxv2f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintm,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svrintm_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintm_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrintm_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrintm_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintm.nxv8f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintm,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrintm_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintm_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrintm_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrintm_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintm.nxv4f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintm,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrintm_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintm_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrintm_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrintm_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintm.nxv2f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintm,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrintm_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintm_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrintm_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrintm_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintm.nxv8f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintm,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svrintm_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintm_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrintm_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrintm_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintm.nxv4f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintm,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svrintm_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintm_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintm.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrintm_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrintm_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintm.nxv2f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintm,_f64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c index 8caed46c5848..b519f8f7471c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintn.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,155 +13,83 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrintn_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintn_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrintn_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrintn_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintn.nxv8f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintn,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svrintn_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintn_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrintn_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrintn_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintn.nxv4f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintn,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svrintn_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintn_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrintn_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrintn_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintn.nxv2f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintn,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svrintn_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintn_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrintn_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrintn_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintn.nxv8f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintn,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrintn_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintn_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrintn_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrintn_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintn.nxv4f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintn,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrintn_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintn_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrintn_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrintn_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintn.nxv2f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintn,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrintn_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintn_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrintn_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrintn_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintn.nxv8f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintn,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svrintn_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintn_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrintn_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrintn_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintn.nxv4f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintn,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svrintn_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintn_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintn.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrintn_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrintn_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintn.nxv2f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintn,_f64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c index e7962934442a..bda2c151f904 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintp.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,155 +13,83 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrintp_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintp_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrintp_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrintp_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintp.nxv8f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintp,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svrintp_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintp_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrintp_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrintp_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintp.nxv4f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintp,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svrintp_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintp_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrintp_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrintp_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintp.nxv2f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintp,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svrintp_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintp_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrintp_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrintp_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintp.nxv8f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintp,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrintp_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintp_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrintp_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrintp_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintp.nxv4f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintp,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrintp_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintp_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrintp_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrintp_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintp.nxv2f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintp,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrintp_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintp_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrintp_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrintp_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintp.nxv8f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintp,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svrintp_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintp_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrintp_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrintp_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintp.nxv4f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintp,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svrintp_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintp_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintp.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrintp_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrintp_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintp.nxv2f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintp,_f64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c index b3e3e6e9cec0..3cfdd099596d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintx.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,155 +13,83 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrintx_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintx_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrintx_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrintx_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintx.nxv8f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintx,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svrintx_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintx_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrintx_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrintx_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintx.nxv4f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintx,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svrintx_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintx_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrintx_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrintx_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintx.nxv2f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintx,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svrintx_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintx_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrintx_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrintx_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintx.nxv8f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintx,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrintx_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintx_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrintx_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrintx_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintx.nxv4f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintx,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrintx_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintx_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrintx_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrintx_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintx.nxv2f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintx,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrintx_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintx_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrintx_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrintx_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintx.nxv8f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintx,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svrintx_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintx_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrintx_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrintx_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintx.nxv4f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintx,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svrintx_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintx_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintx.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrintx_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrintx_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintx.nxv2f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintx,_f64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c index 143719d2a2f2..bbf60c78ee8a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rintz.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,155 +13,83 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrintz_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintz_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrintz_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrintz_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintz.nxv8f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintz,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svrintz_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintz_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrintz_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrintz_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintz.nxv4f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintz,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svrintz_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintz_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrintz_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrintz_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintz.nxv2f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintz,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svrintz_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintz_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrintz_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrintz_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintz.nxv8f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintz,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrintz_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintz_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrintz_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrintz_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintz.nxv4f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintz,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrintz_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintz_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrintz_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrintz_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintz.nxv2f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintz,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrintz_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintz_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svrintz_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svrintz_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintz.nxv8f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintz,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svrintz_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintz_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svrintz_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svrintz_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintz.nxv4f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintz,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svrintz_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrintz_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.frintz.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svrintz_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svrintz_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frintz.nxv2f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrintz,_f64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrte.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrte.c index e8cbb85c337b..3f4d6cb6289d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrte.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrte.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,47 +13,26 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrsqrte_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrte.x.nxv8f16( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svrsqrte_f16u13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrte.x.nxv8f16( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svrsqrte_f16(svfloat16_t op) { + // CHECK-LABEL: test_svrsqrte_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frsqrte.x.nxv8f16( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrsqrte,_f16,,)(op); } -// CHECK-LABEL: @test_svrsqrte_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrte.x.nxv4f32( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svrsqrte_f32u13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrte.x.nxv4f32( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svrsqrte_f32(svfloat32_t op) { + // CHECK-LABEL: test_svrsqrte_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frsqrte.x.nxv4f32( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrsqrte,_f32,,)(op); } -// CHECK-LABEL: @test_svrsqrte_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrte.x.nxv2f64( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svrsqrte_f64u13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrte.x.nxv2f64( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svrsqrte_f64(svfloat64_t op) { + // CHECK-LABEL: test_svrsqrte_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frsqrte.x.nxv2f64( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrsqrte,_f64,,)(op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c index d378743d4aa4..481b13acf917 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_rsqrts.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,47 +13,26 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrsqrts_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrts.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svrsqrts_f16u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrts.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svrsqrts_f16(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svrsqrts_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frsqrts.x.nxv8f16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrsqrts,_f16,,)(op1, op2); } -// CHECK-LABEL: @test_svrsqrts_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrts.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svrsqrts_f32u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrts.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svrsqrts_f32(svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svrsqrts_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frsqrts.x.nxv4f32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrsqrts,_f32,,)(op1, op2); } -// CHECK-LABEL: @test_svrsqrts_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrts.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svrsqrts_f64u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.frsqrts.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svrsqrts_f64(svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svrsqrts_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.frsqrts.x.nxv2f64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svrsqrts,_f64,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c index 035adedd821e..ef53940b9fa0 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_scale.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,338 +13,179 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svscale_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svscale_f16_zu10__SVBool_tu13__SVFloat16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svscale_f16_z(svbool_t pg, svfloat16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svscale_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svscale_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svscale_f32_zu10__SVBool_tu13__SVFloat32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svscale_f32_z(svbool_t pg, svfloat32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svscale_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svscale_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svscale_f64_zu10__SVBool_tu13__SVFloat64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svscale_f64_z(svbool_t pg, svfloat64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svscale_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svscale_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svscale_f16_mu10__SVBool_tu13__SVFloat16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svscale_f16_m(svbool_t pg, svfloat16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svscale_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svscale_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svscale_f32_mu10__SVBool_tu13__SVFloat32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svscale_f32_m(svbool_t pg, svfloat32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svscale_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svscale_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svscale_f64_mu10__SVBool_tu13__SVFloat64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svscale_f64_m(svbool_t pg, svfloat64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svscale_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svscale_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svscale_f16_xu10__SVBool_tu13__SVFloat16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svscale_f16_x(svbool_t pg, svfloat16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svscale_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svscale_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svscale_f32_xu10__SVBool_tu13__SVFloat32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svscale_f32_x(svbool_t pg, svfloat32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svscale_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svscale_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svscale_f64_xu10__SVBool_tu13__SVFloat64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svscale_f64_x(svbool_t pg, svfloat64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svscale_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_f64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svscale_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svscale_n_f16_zu10__SVBool_tu13__SVFloat16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svscale_n_f16_z(svbool_t pg, svfloat16_t op1, int16_t op2) { + // CHECK-LABEL: test_svscale_n_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svscale_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svscale_n_f32_zu10__SVBool_tu13__SVFloat32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svscale_n_f32_z(svbool_t pg, svfloat32_t op1, int32_t op2) { + // CHECK-LABEL: test_svscale_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svscale_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svscale_n_f64_zu10__SVBool_tu13__SVFloat64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svscale_n_f64_z(svbool_t pg, svfloat64_t op1, int64_t op2) { + // CHECK-LABEL: test_svscale_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svscale_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svscale_n_f16_mu10__SVBool_tu13__SVFloat16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svscale_n_f16_m(svbool_t pg, svfloat16_t op1, int16_t op2) { + // CHECK-LABEL: test_svscale_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svscale_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svscale_n_f32_mu10__SVBool_tu13__SVFloat32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svscale_n_f32_m(svbool_t pg, svfloat32_t op1, int32_t op2) { + // CHECK-LABEL: test_svscale_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svscale_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svscale_n_f64_mu10__SVBool_tu13__SVFloat64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svscale_n_f64_m(svbool_t pg, svfloat64_t op1, int64_t op2) { + // CHECK-LABEL: test_svscale_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svscale_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svscale_n_f16_xu10__SVBool_tu13__SVFloat16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svscale_n_f16_x(svbool_t pg, svfloat16_t op1, int16_t op2) { + // CHECK-LABEL: test_svscale_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svscale_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svscale_n_f32_xu10__SVBool_tu13__SVFloat32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svscale_n_f32_x(svbool_t pg, svfloat32_t op1, int32_t op2) { + // CHECK-LABEL: test_svscale_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svscale_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svscale_n_f64_xu10__SVBool_tu13__SVFloat64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svscale_n_f64_x(svbool_t pg, svfloat64_t op1, int64_t op2) { + // CHECK-LABEL: test_svscale_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fscale.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svscale,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c index 4b4cf34dc4a2..d95ff53acf00 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel-bfloat.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,20 +13,12 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsel_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8bf16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svsel_bf16u10__SVBool_tu14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8bf16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svsel_bf16(svbool_t pg, svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svsel_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sel.nxv8bf16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svsel_bf16'}} return SVE_ACLE_FUNC(svsel,_bf16,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c index f252aaccf1bb..86a02d726588 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sel.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,200 +13,107 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsel_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svsel_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svsel_s8(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsel_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsel,_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsel_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svsel_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svsel_s16(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsel_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsel,_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsel_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svsel_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svsel_s32(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsel_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsel,_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsel_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svsel_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svsel_s64(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svsel_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsel,_s64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsel_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svsel_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svsel_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svsel_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsel,_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsel_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svsel_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svsel_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsel_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsel,_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsel_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svsel_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svsel_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsel_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsel,_u32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsel_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svsel_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svsel_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svsel_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsel,_u64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsel_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svsel_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svsel_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svsel_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsel,_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsel_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svsel_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svsel_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svsel_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsel,_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsel_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z14test_svsel_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svsel_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svsel_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsel,_f64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsel_b( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z12test_svsel_bu10__SVBool_tu10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i1( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svsel_b(svbool_t pg, svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svsel_b + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sel.nxv16i1( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsel,_b,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c index 676f2c26bef4..0cbd71ed0029 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,34 +13,20 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svset2_bf16_0( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16bf16.nxv8bf16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svset2_bf16_014svbfloat16x2_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16bf16.nxv8bf16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16x2_t test_svset2_bf16_0(svbfloat16x2_t tuple, svbfloat16_t x) { + // CHECK-LABEL: test_svset2_bf16_0 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv16bf16.nxv8bf16( %tuple, i32 0, %x) + // CHECK-NEXT: ret %[[INSERT]] // expected-warning@+1 {{implicit declaration of function 'svset2_bf16'}} return SVE_ACLE_FUNC(svset2,_bf16,,)(tuple, 0, x); } -// CHECK-LABEL: @test_svset2_bf16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16bf16.nxv8bf16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svset2_bf16_114svbfloat16x2_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16bf16.nxv8bf16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16x2_t test_svset2_bf16_1(svbfloat16x2_t tuple, svbfloat16_t x) { + // CHECK-LABEL: test_svset2_bf16_1 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv16bf16.nxv8bf16( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] // expected-warning@+1 {{implicit declaration of function 'svset2_bf16'}} return SVE_ACLE_FUNC(svset2,_bf16,,)(tuple, 1, x); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2.c index de81dedfba16..175341b108d3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set2.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,167 +12,90 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svset2_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svset2_s810svint8x2_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8x2_t test_svset2_s8(svint8x2_t tuple, svint8_t x) { + // CHECK-LABEL: test_svset2_s8 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i8.nxv16i8( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset2,_s8,,)(tuple, 1, x); } -// CHECK-LABEL: @test_svset2_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i16.nxv8i16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset2_s1611svint16x2_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i16.nxv8i16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16x2_t test_svset2_s16(svint16x2_t tuple, svint16_t x) { + // CHECK-LABEL: test_svset2_s16 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i16.nxv8i16( %tuple, i32 0, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset2,_s16,,)(tuple, 0, x); } -// CHECK-LABEL: @test_svset2_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset2_s3211svint32x2_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32x2_t test_svset2_s32(svint32x2_t tuple, svint32_t x) { + // CHECK-LABEL: test_svset2_s32 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i32.nxv4i32( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset2,_s32,,)(tuple, 1, x); } -// CHECK-LABEL: @test_svset2_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv4i64.nxv2i64( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset2_s6411svint64x2_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv4i64.nxv2i64( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64x2_t test_svset2_s64(svint64x2_t tuple, svint64_t x) { + // CHECK-LABEL: test_svset2_s64 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv4i64.nxv2i64( %tuple, i32 0, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset2,_s64,,)(tuple, 0, x); } -// CHECK-LABEL: @test_svset2_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svset2_u811svuint8x2_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8x2_t test_svset2_u8(svuint8x2_t tuple, svuint8_t x) { + // CHECK-LABEL: test_svset2_u8 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i8.nxv16i8( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset2,_u8,,)(tuple, 1, x); } -// CHECK-LABEL: @test_svset2_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i16.nxv8i16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset2_u1612svuint16x2_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i16.nxv8i16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16x2_t test_svset2_u16(svuint16x2_t tuple, svuint16_t x) { + // CHECK-LABEL: test_svset2_u16 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i16.nxv8i16( %tuple, i32 0, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset2,_u16,,)(tuple, 0, x); } -// CHECK-LABEL: @test_svset2_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset2_u3212svuint32x2_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32x2_t test_svset2_u32(svuint32x2_t tuple, svuint32_t x) { + // CHECK-LABEL: test_svset2_u32 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i32.nxv4i32( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset2,_u32,,)(tuple, 1, x); } -// CHECK-LABEL: @test_svset2_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv4i64.nxv2i64( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset2_u6412svuint64x2_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv4i64.nxv2i64( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64x2_t test_svset2_u64(svuint64x2_t tuple, svuint64_t x) { + // CHECK-LABEL: test_svset2_u64 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv4i64.nxv2i64( %tuple, i32 0, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset2,_u64,,)(tuple, 0, x); } -// CHECK-LABEL: @test_svset2_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16f16.nxv8f16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset2_f1613svfloat16x2_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16f16.nxv8f16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16x2_t test_svset2_f16(svfloat16x2_t tuple, svfloat16_t x) { + // CHECK-LABEL: test_svset2_f16 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv16f16.nxv8f16( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset2,_f16,,)(tuple, 1, x); } -// CHECK-LABEL: @test_svset2_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8f32.nxv4f32( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset2_f3213svfloat32x2_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8f32.nxv4f32( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32x2_t test_svset2_f32(svfloat32x2_t tuple, svfloat32_t x) { + // CHECK-LABEL: test_svset2_f32 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv8f32.nxv4f32( %tuple, i32 0, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset2,_f32,,)(tuple, 0, x); } -// CHECK-LABEL: @test_svset2_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv4f64.nxv2f64( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset2_f6413svfloat64x2_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv4f64.nxv2f64( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64x2_t test_svset2_f64(svfloat64x2_t tuple, svfloat64_t x) { + // CHECK-LABEL: test_svset2_f64 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv4f64.nxv2f64( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset2,_f64,,)(tuple, 1, x); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c index a2693c697951..da1f81a6600e 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -15,50 +14,29 @@ #endif -// CHECK-LABEL: @test_svset3_bf16_0( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svset3_bf16_014svbfloat16x3_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16x3_t test_svset3_bf16_0(svbfloat16x3_t tuple, svbfloat16_t x) { + // CHECK-LABEL: test_svset3_bf16_0 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( %tuple, i32 0, %x) + // CHECK-NEXT: ret %[[INSERT]] // expected-warning@+1 {{implicit declaration of function 'svset3_bf16'}} return SVE_ACLE_FUNC(svset3,_bf16,,)(tuple, 0, x); } -// CHECK-LABEL: @test_svset3_bf16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svset3_bf16_114svbfloat16x3_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16x3_t test_svset3_bf16_1(svbfloat16x3_t tuple, svbfloat16_t x) { + // CHECK-LABEL: test_svset3_bf16_1 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] // expected-warning@+1 {{implicit declaration of function 'svset3_bf16'}} return SVE_ACLE_FUNC(svset3,_bf16,,)(tuple, 1, x); } -// CHECK-LABEL: @test_svset3_bf16_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( [[TUPLE:%.*]], i32 2, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svset3_bf16_214svbfloat16x3_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( [[TUPLE:%.*]], i32 2, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16x3_t test_svset3_bf16_2(svbfloat16x3_t tuple, svbfloat16_t x) { + // CHECK-LABEL: test_svset3_bf16_2 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv24bf16.nxv8bf16( %tuple, i32 2, %x) + // CHECK-NEXT: ret %[[INSERT]] // expected-warning@+1 {{implicit declaration of function 'svset3_bf16'}} return SVE_ACLE_FUNC(svset3,_bf16,,)(tuple, 2, x); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3.c index d815a44fd4a6..df9e06a72ba4 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set3.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -16,167 +15,90 @@ // NOTE: For these tests clang converts the struct parameter into // several parameters, one for each member of the original struct. -// CHECK-LABEL: @test_svset3_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv48i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svset3_s810svint8x3_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv48i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8x3_t test_svset3_s8(svint8x3_t tuple, svint8_t x) { + // CHECK-LABEL: test_svset3_s8 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv48i8.nxv16i8( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset3,_s8,,)(tuple, 1, x); } -// CHECK-LABEL: @test_svset3_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24i16.nxv8i16( [[TUPLE:%.*]], i32 2, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset3_s1611svint16x3_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24i16.nxv8i16( [[TUPLE:%.*]], i32 2, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16x3_t test_svset3_s16(svint16x3_t tuple, svint16_t x) { + // CHECK-LABEL: test_svset3_s16 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv24i16.nxv8i16( %tuple, i32 2, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset3,_s16,,)(tuple, 2, x); } -// CHECK-LABEL: @test_svset3_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv12i32.nxv4i32( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset3_s3211svint32x3_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv12i32.nxv4i32( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32x3_t test_svset3_s32(svint32x3_t tuple, svint32_t x) { + // CHECK-LABEL: test_svset3_s32 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv12i32.nxv4i32( %tuple, i32 0, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset3,_s32,,)(tuple, 0, x); } -// CHECK-LABEL: @test_svset3_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv6i64.nxv2i64( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset3_s6411svint64x3_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv6i64.nxv2i64( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64x3_t test_svset3_s64(svint64x3_t tuple, svint64_t x) { + // CHECK-LABEL: test_svset3_s64 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv6i64.nxv2i64( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset3,_s64,,)(tuple, 1, x); } -// CHECK-LABEL: @test_svset3_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv48i8.nxv16i8( [[TUPLE:%.*]], i32 2, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svset3_u811svuint8x3_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv48i8.nxv16i8( [[TUPLE:%.*]], i32 2, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8x3_t test_svset3_u8(svuint8x3_t tuple, svuint8_t x) { + // CHECK-LABEL: test_svset3_u8 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv48i8.nxv16i8( %tuple, i32 2, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset3,_u8,,)(tuple, 2, x); } -// CHECK-LABEL: @test_svset3_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24i16.nxv8i16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset3_u1612svuint16x3_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24i16.nxv8i16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16x3_t test_svset3_u16(svuint16x3_t tuple, svuint16_t x) { + // CHECK-LABEL: test_svset3_u16 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv24i16.nxv8i16( %tuple, i32 0, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset3,_u16,,)(tuple, 0, x); } -// CHECK-LABEL: @test_svset3_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv12i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset3_u3212svuint32x3_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv12i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32x3_t test_svset3_u32(svuint32x3_t tuple, svuint32_t x) { + // CHECK-LABEL: test_svset3_u32 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv12i32.nxv4i32( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset3,_u32,,)(tuple, 1, x); } -// CHECK-LABEL: @test_svset3_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv6i64.nxv2i64( [[TUPLE:%.*]], i32 2, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset3_u6412svuint64x3_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv6i64.nxv2i64( [[TUPLE:%.*]], i32 2, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64x3_t test_svset3_u64(svuint64x3_t tuple, svuint64_t x) { + // CHECK-LABEL: test_svset3_u64 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv6i64.nxv2i64( %tuple, i32 2, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset3,_u64,,)(tuple, 2, x); } -// CHECK-LABEL: @test_svset3_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24f16.nxv8f16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset3_f1613svfloat16x3_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv24f16.nxv8f16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16x3_t test_svset3_f16(svfloat16x3_t tuple, svfloat16_t x) { + // CHECK-LABEL: test_svset3_f16 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv24f16.nxv8f16( %tuple, i32 0, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset3,_f16,,)(tuple, 0, x); } -// CHECK-LABEL: @test_svset3_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv12f32.nxv4f32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset3_f3213svfloat32x3_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv12f32.nxv4f32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32x3_t test_svset3_f32(svfloat32x3_t tuple, svfloat32_t x) { + // CHECK-LABEL: test_svset3_f32 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv12f32.nxv4f32( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset3,_f32,,)(tuple, 1, x); } -// CHECK-LABEL: @test_svset3_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv6f64.nxv2f64( [[TUPLE:%.*]], i32 2, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset3_f6413svfloat64x3_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv6f64.nxv2f64( [[TUPLE:%.*]], i32 2, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64x3_t test_svset3_f64(svfloat64x3_t tuple, svfloat64_t x) { + // CHECK-LABEL: test_svset3_f64 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv6f64.nxv2f64( %tuple, i32 2, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset3,_f64,,)(tuple, 2, x); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c index c7a758faa1d7..9f8466db1359 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -15,66 +14,38 @@ #endif -// CHECK-LABEL: @test_svset4_bf16_0( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svset4_bf16_014svbfloat16x4_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 0, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16x4_t test_svset4_bf16_0(svbfloat16x4_t tuple, svbfloat16_t x) { + // CHECK-LABEL: test_svset4_bf16_0 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( %tuple, i32 0, %x) + // CHECK-NEXT: ret %[[INSERT]] // expected-warning@+1 {{implicit declaration of function 'svset4_bf16'}} return SVE_ACLE_FUNC(svset4,_bf16,,)(tuple, 0, x); } -// CHECK-LABEL: @test_svset4_bf16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svset4_bf16_114svbfloat16x4_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16x4_t test_svset4_bf16_1(svbfloat16x4_t tuple, svbfloat16_t x) { + // CHECK-LABEL: test_svset4_bf16_1 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] // expected-warning@+1 {{implicit declaration of function 'svset4_bf16'}} return SVE_ACLE_FUNC(svset4,_bf16,,)(tuple, 1, x); } -// CHECK-LABEL: @test_svset4_bf16_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 2, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svset4_bf16_214svbfloat16x4_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 2, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16x4_t test_svset4_bf16_2(svbfloat16x4_t tuple, svbfloat16_t x) { + // CHECK-LABEL: test_svset4_bf16_2 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( %tuple, i32 2, %x) + // CHECK-NEXT: ret %[[INSERT]] // expected-warning@+1 {{implicit declaration of function 'svset4_bf16'}} return SVE_ACLE_FUNC(svset4,_bf16,,)(tuple, 2, x); } -// CHECK-LABEL: @test_svset4_bf16_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 3, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svset4_bf16_314svbfloat16x4_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( [[TUPLE:%.*]], i32 3, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16x4_t test_svset4_bf16_3(svbfloat16x4_t tuple, svbfloat16_t x) { + // CHECK-LABEL: test_svset4_bf16_3 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv32bf16.nxv8bf16( %tuple, i32 3, %x) + // CHECK-NEXT: ret %[[INSERT]] // expected-warning@+1 {{implicit declaration of function 'svset4_bf16'}} return SVE_ACLE_FUNC(svset4,_bf16,,)(tuple, 3, x); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4.c index 729284b0fc7c..7d5cc547991f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_set4.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -14,167 +13,90 @@ #endif -// CHECK-LABEL: @test_svset4_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svset4_s810svint8x4_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8x4_t test_svset4_s8(svint8x4_t tuple, svint8_t x) { + // CHECK-LABEL: test_svset4_s8 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset4,_s8,,)(tuple, 1, x); } -// CHECK-LABEL: @test_svset4_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i16.nxv8i16( [[TUPLE:%.*]], i32 3, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset4_s1611svint16x4_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i16.nxv8i16( [[TUPLE:%.*]], i32 3, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16x4_t test_svset4_s16(svint16x4_t tuple, svint16_t x) { + // CHECK-LABEL: test_svset4_s16 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i16.nxv8i16( %tuple, i32 3, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset4,_s16,,)(tuple, 3, x); } -// CHECK-LABEL: @test_svset4_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset4_s3211svint32x4_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32x4_t test_svset4_s32(svint32x4_t tuple, svint32_t x) { + // CHECK-LABEL: test_svset4_s32 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i32.nxv4i32( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset4,_s32,,)(tuple, 1, x); } -// CHECK-LABEL: @test_svset4_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i64.nxv2i64( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset4_s6411svint64x4_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i64.nxv2i64( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64x4_t test_svset4_s64(svint64x4_t tuple, svint64_t x) { + // CHECK-LABEL: test_svset4_s64 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i64.nxv2i64( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset4,_s64,,)(tuple, 1, x); } -// CHECK-LABEL: @test_svset4_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8( [[TUPLE:%.*]], i32 3, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svset4_u811svuint8x4_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8( [[TUPLE:%.*]], i32 3, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8x4_t test_svset4_u8(svuint8x4_t tuple, svuint8_t x) { + // CHECK-LABEL: test_svset4_u8 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8( %tuple, i32 3, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset4,_u8,,)(tuple, 3, x); } -// CHECK-LABEL: @test_svset4_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i16.nxv8i16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset4_u1612svuint16x4_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i16.nxv8i16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16x4_t test_svset4_u16(svuint16x4_t tuple, svuint16_t x) { + // CHECK-LABEL: test_svset4_u16 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv32i16.nxv8i16( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset4,_u16,,)(tuple, 1, x); } -// CHECK-LABEL: @test_svset4_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset4_u3212svuint32x4_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i32.nxv4i32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32x4_t test_svset4_u32(svuint32x4_t tuple, svuint32_t x) { + // CHECK-LABEL: test_svset4_u32 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv16i32.nxv4i32( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset4,_u32,,)(tuple, 1, x); } -// CHECK-LABEL: @test_svset4_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i64.nxv2i64( [[TUPLE:%.*]], i32 3, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset4_u6412svuint64x4_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i64.nxv2i64( [[TUPLE:%.*]], i32 3, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64x4_t test_svset4_u64(svuint64x4_t tuple, svuint64_t x) { + // CHECK-LABEL: test_svset4_u64 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv8i64.nxv2i64( %tuple, i32 3, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset4,_u64,,)(tuple, 3, x); } -// CHECK-LABEL: @test_svset4_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32f16.nxv8f16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset4_f1613svfloat16x4_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv32f16.nxv8f16( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16x4_t test_svset4_f16(svfloat16x4_t tuple, svfloat16_t x) { + // CHECK-LABEL: test_svset4_f16 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv32f16.nxv8f16( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset4,_f16,,)(tuple, 1, x); } -// CHECK-LABEL: @test_svset4_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16f32.nxv4f32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset4_f3213svfloat32x4_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv16f32.nxv4f32( [[TUPLE:%.*]], i32 1, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32x4_t test_svset4_f32(svfloat32x4_t tuple, svfloat32_t x) { + // CHECK-LABEL: test_svset4_f32 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv16f32.nxv4f32( %tuple, i32 1, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset4,_f32,,)(tuple, 1, x); } -// CHECK-LABEL: @test_svset4_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8f64.nxv2f64( [[TUPLE:%.*]], i32 3, [[X:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svset4_f6413svfloat64x4_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.set.nxv8f64.nxv2f64( [[TUPLE:%.*]], i32 3, [[X:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64x4_t test_svset4_f64(svfloat64x4_t tuple, svfloat64_t x) { + // CHECK-LABEL: test_svset4_f64 + // CHECK: %[[INSERT:.*]] = call @llvm.aarch64.sve.tuple.set.nxv8f64.nxv2f64( %tuple, i32 3, %x) + // CHECK-NEXT: ret %[[INSERT]] return SVE_ACLE_FUNC(svset4,_f64,,)(tuple, 3, x); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c index 9e561b4770d4..d97743195d0f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_setffr.c @@ -1,21 +1,13 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include -// CHECK-LABEL: @test_svsetffr( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.setffr() -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svsetffrv( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.setffr() -// CPP-CHECK-NEXT: ret void -// void test_svsetffr() { + // CHECK-LABEL: test_svsetffr + // CHECK: call void @llvm.aarch64.sve.setffr() + // CHECK: ret void svsetffr(); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice-bfloat.c index 99294b92ec2f..f58b90fd255b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice-bfloat.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,20 +13,12 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsplice_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv8bf16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsplice_bf16u10__SVBool_tu14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv8bf16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbfloat16_t test_svsplice_bf16(svbool_t pg, svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svsplice_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.splice.nxv8bf16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svsplice_bf16'}} return SVE_ACLE_FUNC(svsplice,_bf16,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice.c index 7086eddf56c9..3e0fb5c129e2 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_splice.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,185 +13,99 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsplice_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.splice.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsplice_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.splice.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svsplice_s8(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsplice_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.splice.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsplice,_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsplice_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsplice_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svsplice_s16(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsplice_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.splice.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsplice,_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsplice_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsplice_s32u10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svsplice_s32(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsplice_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.splice.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsplice,_s32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsplice_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsplice_s64u10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svsplice_s64(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svsplice_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.splice.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsplice,_s64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsplice_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.splice.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsplice_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.splice.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svsplice_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svsplice_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.splice.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsplice,_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsplice_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsplice_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svsplice_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsplice_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.splice.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsplice,_u16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsplice_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsplice_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svsplice_u32(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsplice_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.splice.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsplice,_u32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsplice_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsplice_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svsplice_u64(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svsplice_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.splice.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsplice,_u64,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsplice_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsplice_f16u10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svsplice_f16(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svsplice_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.splice.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsplice,_f16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsplice_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsplice_f32u10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svsplice_f32(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svsplice_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.splice.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsplice,_f32,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsplice_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsplice_f64u10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.splice.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svsplice_f64(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svsplice_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.splice.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsplice,_f64,,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sqrt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sqrt.c index c8d04b65d75f..a089b34e344a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sqrt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sqrt.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,155 +13,83 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsqrt_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsqrt_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svsqrt_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svsqrt_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsqrt.nxv8f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsqrt,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svsqrt_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsqrt_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svsqrt_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svsqrt_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsqrt.nxv4f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsqrt,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svsqrt_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsqrt_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svsqrt_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svsqrt_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsqrt.nxv2f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsqrt,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svsqrt_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsqrt_f16_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svsqrt_f16_m(svfloat16_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svsqrt_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsqrt.nxv8f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsqrt,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svsqrt_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsqrt_f32_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svsqrt_f32_m(svfloat32_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svsqrt_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsqrt.nxv4f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsqrt,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svsqrt_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsqrt_f64_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svsqrt_f64_m(svfloat64_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svsqrt_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsqrt.nxv2f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsqrt,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svsqrt_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsqrt_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svsqrt_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svsqrt_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsqrt.nxv8f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsqrt,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svsqrt_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsqrt_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svsqrt_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svsqrt_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsqrt.nxv4f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsqrt,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svsqrt_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsqrt_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsqrt.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svsqrt_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svsqrt_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsqrt.nxv2f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsqrt,_f64,_x,)(pg, op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c index f41816e2c3b0..f3a9381e556f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,42 +13,24 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svst1_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv8bf16( [[DATA:%.*]], [[TMP0]], bfloat* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z15test_svst1_bf16u10__SVBool_tPu6__bf16u14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv8bf16( [[DATA:%.*]], [[TMP0]], bfloat* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_bf16(svbool_t pg, bfloat16_t *base, svbfloat16_t data) { + // CHECK-LABEL: test_svst1_bf16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.nxv8bf16( %data, %[[PG]], bfloat* %base) + // CHECK: ret void // expected-warning@+1 {{implicit declaration of function 'svst1_bf16'}} return SVE_ACLE_FUNC(svst1,_bf16,,)(pg, base, data); } -// CHECK-LABEL: @test_svst1_vnum_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv8bf16( [[DATA:%.*]], [[TMP0]], bfloat* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z20test_svst1_vnum_bf16u10__SVBool_tPu6__bf16lu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv8bf16( [[DATA:%.*]], [[TMP0]], bfloat* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_vnum_bf16(svbool_t pg, bfloat16_t *base, int64_t vnum, svbfloat16_t data) { + // CHECK-LABEL: test_svst1_vnum_bf16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast bfloat* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: call void @llvm.aarch64.sve.st1.nxv8bf16( %data, %[[PG]], bfloat* %[[GEP]]) + // CHECK: ret void // expected-warning@+1 {{implicit declaration of function 'svst1_vnum_bf16'}} return SVE_ACLE_FUNC(svst1_vnum,_bf16,,)(pg, base, vnum, data); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c index af3a71193573..4929d9c97cfc 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,1138 +13,601 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svst1_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svst1_s8u10__SVBool_tPau10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_s8(svbool_t pg, int8_t *base, svint8_t data) { + // CHECK-LABEL: test_svst1_s8 + // CHECK: call void @llvm.aarch64.sve.st1.nxv16i8( %data, %pg, i8* %base) + // CHECK: ret void return SVE_ACLE_FUNC(svst1,_s8,,)(pg, base, data); } -// CHECK-LABEL: @test_svst1_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst1_s16u10__SVBool_tPsu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_s16(svbool_t pg, int16_t *base, svint16_t data) { + // CHECK-LABEL: test_svst1_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.nxv8i16( %data, %[[PG]], i16* %base) + // CHECK: ret void return SVE_ACLE_FUNC(svst1,_s16,,)(pg, base, data); } -// CHECK-LABEL: @test_svst1_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst1_s32u10__SVBool_tPiu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_s32(svbool_t pg, int32_t *base, svint32_t data) { + // CHECK-LABEL: test_svst1_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.nxv4i32( %data, %[[PG]], i32* %base) + // CHECK: ret void return SVE_ACLE_FUNC(svst1,_s32,,)(pg, base, data); } -// CHECK-LABEL: @test_svst1_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst1_s64u10__SVBool_tPlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_s64(svbool_t pg, int64_t *base, svint64_t data) { + // CHECK-LABEL: test_svst1_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.nxv2i64( %data, %[[PG]], i64* %base) + // CHECK: ret void return SVE_ACLE_FUNC(svst1,_s64,,)(pg, base, data); } -// CHECK-LABEL: @test_svst1_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svst1_u8u10__SVBool_tPhu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_u8(svbool_t pg, uint8_t *base, svuint8_t data) { + // CHECK-LABEL: test_svst1_u8 + // CHECK: call void @llvm.aarch64.sve.st1.nxv16i8( %data, %pg, i8* %base) + // CHECK: ret void return SVE_ACLE_FUNC(svst1,_u8,,)(pg, base, data); } -// CHECK-LABEL: @test_svst1_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst1_u16u10__SVBool_tPtu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_u16(svbool_t pg, uint16_t *base, svuint16_t data) { + // CHECK-LABEL: test_svst1_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.nxv8i16( %data, %[[PG]], i16* %base) + // CHECK: ret void return SVE_ACLE_FUNC(svst1,_u16,,)(pg, base, data); } -// CHECK-LABEL: @test_svst1_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst1_u32u10__SVBool_tPju12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_u32(svbool_t pg, uint32_t *base, svuint32_t data) { + // CHECK-LABEL: test_svst1_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.nxv4i32( %data, %[[PG]], i32* %base) + // CHECK: ret void return SVE_ACLE_FUNC(svst1,_u32,,)(pg, base, data); } -// CHECK-LABEL: @test_svst1_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst1_u64u10__SVBool_tPmu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_u64(svbool_t pg, uint64_t *base, svuint64_t data) { + // CHECK-LABEL: test_svst1_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.nxv2i64( %data, %[[PG]], i64* %base) + // CHECK: ret void return SVE_ACLE_FUNC(svst1,_u64,,)(pg, base, data); } -// CHECK-LABEL: @test_svst1_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv8f16( [[DATA:%.*]], [[TMP0]], half* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst1_f16u10__SVBool_tPDhu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv8f16( [[DATA:%.*]], [[TMP0]], half* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_f16(svbool_t pg, float16_t *base, svfloat16_t data) { + // CHECK-LABEL: test_svst1_f16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.nxv8f16( %data, %[[PG]], half* %base) + // CHECK: ret void return SVE_ACLE_FUNC(svst1,_f16,,)(pg, base, data); } -// CHECK-LABEL: @test_svst1_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst1_f32u10__SVBool_tPfu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_f32(svbool_t pg, float32_t *base, svfloat32_t data) { + // CHECK-LABEL: test_svst1_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.nxv4f32( %data, %[[PG]], float* %base) + // CHECK: ret void return SVE_ACLE_FUNC(svst1,_f32,,)(pg, base, data); } -// CHECK-LABEL: @test_svst1_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst1_f64u10__SVBool_tPdu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_f64(svbool_t pg, float64_t *base, svfloat64_t data) { + // CHECK-LABEL: test_svst1_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.nxv2f64( %data, %[[PG]], double* %base) + // CHECK: ret void return SVE_ACLE_FUNC(svst1,_f64,,)(pg, base, data); } -// CHECK-LABEL: @test_svst1_vnum_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z18test_svst1_vnum_s8u10__SVBool_tPalu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_vnum_s8(svbool_t pg, int8_t *base, int64_t vnum, svint8_t data) { + // CHECK-LABEL: test_svst1_vnum_s8 + // CHECK: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: call void @llvm.aarch64.sve.st1.nxv16i8( %data, %pg, i8* %[[GEP]]) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_vnum,_s8,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst1_vnum_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst1_vnum_s16u10__SVBool_tPslu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_vnum_s16(svbool_t pg, int16_t *base, int64_t vnum, svint16_t data) { + // CHECK-LABEL: test_svst1_vnum_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: call void @llvm.aarch64.sve.st1.nxv8i16( %data, %[[PG]], i16* %[[GEP]]) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_vnum,_s16,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst1_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst1_vnum_s32u10__SVBool_tPilu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_vnum_s32(svbool_t pg, int32_t *base, int64_t vnum, svint32_t data) { + // CHECK-LABEL: test_svst1_vnum_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: call void @llvm.aarch64.sve.st1.nxv4i32( %data, %[[PG]], i32* %[[GEP]]) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_vnum,_s32,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst1_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst1_vnum_s64u10__SVBool_tPllu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_vnum_s64(svbool_t pg, int64_t *base, int64_t vnum, svint64_t data) { + // CHECK-LABEL: test_svst1_vnum_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: call void @llvm.aarch64.sve.st1.nxv2i64( %data, %[[PG]], i64* %[[GEP]]) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_vnum,_s64,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst1_vnum_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z18test_svst1_vnum_u8u10__SVBool_tPhlu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_vnum_u8(svbool_t pg, uint8_t *base, int64_t vnum, svuint8_t data) { + // CHECK-LABEL: test_svst1_vnum_u8 + // CHECK: %[[BASE:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: call void @llvm.aarch64.sve.st1.nxv16i8( %data, %pg, i8* %[[GEP]]) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_vnum,_u8,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst1_vnum_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst1_vnum_u16u10__SVBool_tPtlu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_vnum_u16(svbool_t pg, uint16_t *base, int64_t vnum, svuint16_t data) { + // CHECK-LABEL: test_svst1_vnum_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: call void @llvm.aarch64.sve.st1.nxv8i16( %data, %[[PG]], i16* %[[GEP]]) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_vnum,_u16,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst1_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst1_vnum_u32u10__SVBool_tPjlu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_vnum_u32(svbool_t pg, uint32_t *base, int64_t vnum, svuint32_t data) { + // CHECK-LABEL: test_svst1_vnum_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: call void @llvm.aarch64.sve.st1.nxv4i32( %data, %[[PG]], i32* %[[GEP]]) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_vnum,_u32,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst1_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst1_vnum_u64u10__SVBool_tPmlu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_vnum_u64(svbool_t pg, uint64_t *base, int64_t vnum, svuint64_t data) { + // CHECK-LABEL: test_svst1_vnum_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: call void @llvm.aarch64.sve.st1.nxv2i64( %data, %[[PG]], i64* %[[GEP]]) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_vnum,_u64,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst1_vnum_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv8f16( [[DATA:%.*]], [[TMP0]], half* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst1_vnum_f16u10__SVBool_tPDhlu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv8f16( [[DATA:%.*]], [[TMP0]], half* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_vnum_f16(svbool_t pg, float16_t *base, int64_t vnum, svfloat16_t data) { + // CHECK-LABEL: test_svst1_vnum_f16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast half* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: call void @llvm.aarch64.sve.st1.nxv8f16( %data, %[[PG]], half* %[[GEP]]) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_vnum,_f16,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst1_vnum_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst1_vnum_f32u10__SVBool_tPflu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_vnum_f32(svbool_t pg, float32_t *base, int64_t vnum, svfloat32_t data) { + // CHECK-LABEL: test_svst1_vnum_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast float* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: call void @llvm.aarch64.sve.st1.nxv4f32( %data, %[[PG]], float* %[[GEP]]) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_vnum,_f32,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst1_vnum_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst1_vnum_f64u10__SVBool_tPdlu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_vnum_f64(svbool_t pg, float64_t *base, int64_t vnum, svfloat64_t data) { + // CHECK-LABEL: test_svst1_vnum_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[BASE:.*]] = bitcast double* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BASE]], i64 %vnum, i64 0 + // CHECK: call void @llvm.aarch64.sve.st1.nxv2f64( %data, %[[PG]], double* %[[GEP]]) return SVE_ACLE_FUNC(svst1_vnum,_f64,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst1_scatter_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z30test_svst1_scatter_u32base_s32u10__SVBool_tu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u32base_s32(svbool_t pg, svuint32_t bases, svint32_t data) { + // CHECK-LABEL: test_svst1_scatter_u32base_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( %data, %[[PG]], %bases, i64 0) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter,_u32base,,_s32)(pg, bases, data); } -// CHECK-LABEL: @test_svst1_scatter_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z30test_svst1_scatter_u64base_s64u10__SVBool_tu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t data) { + // CHECK-LABEL: test_svst1_scatter_u64base_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( %data, %[[PG]], %bases, i64 0) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter,_u64base,,_s64)(pg, bases, data); } -// CHECK-LABEL: @test_svst1_scatter_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z30test_svst1_scatter_u32base_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u32base_u32(svbool_t pg, svuint32_t bases, svuint32_t data) { + // CHECK-LABEL: test_svst1_scatter_u32base_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( %data, %[[PG]], %bases, i64 0) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter,_u32base,,_u32)(pg, bases, data); } -// CHECK-LABEL: @test_svst1_scatter_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z30test_svst1_scatter_u64base_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t data) { + // CHECK-LABEL: test_svst1_scatter_u64base_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( %data, %[[PG]], %bases, i64 0) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter,_u64base,,_u64)(pg, bases, data); } -// CHECK-LABEL: @test_svst1_scatter_u32base_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z30test_svst1_scatter_u32base_f32u10__SVBool_tu12__SVUint32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u32base_f32(svbool_t pg, svuint32_t bases, svfloat32_t data) { + // CHECK-LABEL: test_svst1_scatter_u32base_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( %data, %[[PG]], %bases, i64 0) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter,_u32base,,_f32)(pg, bases, data); } -// CHECK-LABEL: @test_svst1_scatter_u64base_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z30test_svst1_scatter_u64base_f64u10__SVBool_tu12__SVUint64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u64base_f64(svbool_t pg, svuint64_t bases, svfloat64_t data) { + // CHECK-LABEL: test_svst1_scatter_u64base_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( %data, %[[PG]], %bases, i64 0) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter,_u64base,,_f64)(pg, bases, data); } -// CHECK-LABEL: @test_svst1_scatter_s32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_s32offset_s32u10__SVBool_tPiu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_s32offset_s32(svbool_t pg, int32_t *base, svint32_t offsets, svint32_t data) { + // CHECK-LABEL: test_svst1_scatter_s32offset_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i32( %data, %[[PG]], i32* %base, %offsets) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,s32,offset,_s32)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svst1_scatter_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_s64offset_s64u10__SVBool_tPlu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_s64offset_s64(svbool_t pg, int64_t *base, svint64_t offsets, svint64_t data) { + // CHECK-LABEL: test_svst1_scatter_s64offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( %data, %[[PG]], i64* %base, %offsets) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,s64,offset,_s64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svst1_scatter_s32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_s32offset_u32u10__SVBool_tPju11__SVInt32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_s32offset_u32(svbool_t pg, uint32_t *base, svint32_t offsets, svuint32_t data) { + // CHECK-LABEL: test_svst1_scatter_s32offset_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4i32( %data, %[[PG]], i32* %base, %offsets) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,s32,offset,_u32)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svst1_scatter_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_s64offset_u64u10__SVBool_tPmu11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_s64offset_u64(svbool_t pg, uint64_t *base, svint64_t offsets, svuint64_t data) { + // CHECK-LABEL: test_svst1_scatter_s64offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( %data, %[[PG]], i64* %base, %offsets) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,s64,offset,_u64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svst1_scatter_s32offset_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_s32offset_f32u10__SVBool_tPfu11__SVInt32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_s32offset_f32(svbool_t pg, float32_t *base, svint32_t offsets, svfloat32_t data) { + // CHECK-LABEL: test_svst1_scatter_s32offset_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.sxtw.nxv4f32( %data, %[[PG]], float* %base, %offsets) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,s32,offset,_f32)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svst1_scatter_s64offset_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_s64offset_f64u10__SVBool_tPdu11__SVInt64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_s64offset_f64(svbool_t pg, float64_t *base, svint64_t offsets, svfloat64_t data) { + // CHECK-LABEL: test_svst1_scatter_s64offset_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.nxv2f64( %data, %[[PG]], double* %base, %offsets) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,s64,offset,_f64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svst1_scatter_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_u32offset_s32u10__SVBool_tPiu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u32offset_s32(svbool_t pg, int32_t *base, svuint32_t offsets, svint32_t data) { + // CHECK-LABEL: test_svst1_scatter_u32offset_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i32( %data, %[[PG]], i32* %base, %offsets) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,u32,offset,_s32)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svst1_scatter_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_u64offset_s64u10__SVBool_tPlu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u64offset_s64(svbool_t pg, int64_t *base, svuint64_t offsets, svint64_t data) { + // CHECK-LABEL: test_svst1_scatter_u64offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( %data, %[[PG]], i64* %base, %offsets) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,u64,offset,_s64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svst1_scatter_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_u32offset_u32u10__SVBool_tPju12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u32offset_u32(svbool_t pg, uint32_t *base, svuint32_t offsets, svuint32_t data) { + // CHECK-LABEL: test_svst1_scatter_u32offset_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4i32( %data, %[[PG]], i32* %base, %offsets) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,u32,offset,_u32)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svst1_scatter_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_u64offset_u64u10__SVBool_tPmu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u64offset_u64(svbool_t pg, uint64_t *base, svuint64_t offsets, svuint64_t data) { + // CHECK-LABEL: test_svst1_scatter_u64offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.nxv2i64( %data, %[[PG]], i64* %base, %offsets) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,u64,offset,_u64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svst1_scatter_u32offset_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_u32offset_f32u10__SVBool_tPfu12__SVUint32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u32offset_f32(svbool_t pg, float32_t *base, svuint32_t offsets, svfloat32_t data) { + // CHECK-LABEL: test_svst1_scatter_u32offset_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.uxtw.nxv4f32( %data, %[[PG]], float* %base, %offsets) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,u32,offset,_f32)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svst1_scatter_u64offset_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svst1_scatter_u64offset_f64u10__SVBool_tPdu12__SVUint64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u64offset_f64(svbool_t pg, float64_t *base, svuint64_t offsets, svfloat64_t data) { + // CHECK-LABEL: test_svst1_scatter_u64offset_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.nxv2f64( %data, %[[PG]], double* %base, %offsets) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,u64,offset,_f64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svst1_scatter_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z37test_svst1_scatter_u32base_offset_s32u10__SVBool_tu12__SVUint32_tlu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset, svint32_t data) { + // CHECK-LABEL: test_svst1_scatter_u32base_offset_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( %data, %[[PG]], %bases, i64 %offset) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter,_u32base,_offset,_s32)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svst1_scatter_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z37test_svst1_scatter_u64base_offset_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset, svint64_t data) { + // CHECK-LABEL: test_svst1_scatter_u64base_offset_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( %data, %[[PG]], %bases, i64 %offset) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter,_u64base,_offset,_s64)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svst1_scatter_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z37test_svst1_scatter_u32base_offset_u32u10__SVBool_tu12__SVUint32_tlu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset, svuint32_t data) { + // CHECK-LABEL: test_svst1_scatter_u32base_offset_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( %data, %[[PG]], %bases, i64 %offset) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter,_u32base,_offset,_u32)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svst1_scatter_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z37test_svst1_scatter_u64base_offset_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset, svuint64_t data) { + // CHECK-LABEL: test_svst1_scatter_u64base_offset_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( %data, %[[PG]], %bases, i64 %offset) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter,_u64base,_offset,_u64)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svst1_scatter_u32base_offset_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z37test_svst1_scatter_u32base_offset_f32u10__SVBool_tu12__SVUint32_tlu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u32base_offset_f32(svbool_t pg, svuint32_t bases, int64_t offset, svfloat32_t data) { + // CHECK-LABEL: test_svst1_scatter_u32base_offset_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( %data, %[[PG]], %bases, i64 %offset) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter,_u32base,_offset,_f32)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svst1_scatter_u64base_offset_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z37test_svst1_scatter_u64base_offset_f64u10__SVBool_tu12__SVUint64_tlu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u64base_offset_f64(svbool_t pg, svuint64_t bases, int64_t offset, svfloat64_t data) { + // CHECK-LABEL: test_svst1_scatter_u64base_offset_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( %data, %[[PG]], %bases, i64 %offset) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter,_u64base,_offset,_f64)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svst1_scatter_s32index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_s32index_s32u10__SVBool_tPiu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_s32index_s32(svbool_t pg, int32_t *base, svint32_t indices, svint32_t data) { + // CHECK-LABEL: test_svst1_scatter_s32index_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i32( %data, %[[PG]], i32* %base, %indices) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,s32,index,_s32)(pg, base, indices, data); } -// CHECK-LABEL: @test_svst1_scatter_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_s64index_s64u10__SVBool_tPlu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_s64index_s64(svbool_t pg, int64_t *base, svint64_t indices, svint64_t data) { + // CHECK-LABEL: test_svst1_scatter_s64index_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( %data, %[[PG]], i64* %base, %indices) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,s64,index,_s64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svst1_scatter_s32index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_s32index_u32u10__SVBool_tPju11__SVInt32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_s32index_u32(svbool_t pg, uint32_t *base, svint32_t indices, svuint32_t data) { + // CHECK-LABEL: test_svst1_scatter_s32index_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4i32( %data, %[[PG]], i32* %base, %indices) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,s32,index,_u32)(pg, base, indices, data); } -// CHECK-LABEL: @test_svst1_scatter_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_s64index_u64u10__SVBool_tPmu11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_s64index_u64(svbool_t pg, uint64_t *base, svint64_t indices, svuint64_t data) { + // CHECK-LABEL: test_svst1_scatter_s64index_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( %data, %[[PG]], i64* %base, %indices) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,s64,index,_u64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svst1_scatter_s32index_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_s32index_f32u10__SVBool_tPfu11__SVInt32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_s32index_f32(svbool_t pg, float32_t *base, svint32_t indices, svfloat32_t data) { + // CHECK-LABEL: test_svst1_scatter_s32index_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.sxtw.index.nxv4f32( %data, %[[PG]], float* %base, %indices) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,s32,index,_f32)(pg, base, indices, data); } -// CHECK-LABEL: @test_svst1_scatter_s64index_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_s64index_f64u10__SVBool_tPdu11__SVInt64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_s64index_f64(svbool_t pg, float64_t *base, svint64_t indices, svfloat64_t data) { + // CHECK-LABEL: test_svst1_scatter_s64index_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64( %data, %[[PG]], double* %base, %indices) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,s64,index,_f64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svst1_scatter_u32index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_u32index_s32u10__SVBool_tPiu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u32index_s32(svbool_t pg, int32_t *base, svuint32_t indices, svint32_t data) { + // CHECK-LABEL: test_svst1_scatter_u32index_s32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i32( %data, %[[PG]], i32* %base, %indices) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,u32,index,_s32)(pg, base, indices, data); } -// CHECK-LABEL: @test_svst1_scatter_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_u64index_s64u10__SVBool_tPlu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u64index_s64(svbool_t pg, int64_t *base, svuint64_t indices, svint64_t data) { + // CHECK-LABEL: test_svst1_scatter_u64index_s64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( %data, %0, i64* %base, %indices) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,u64,index,_s64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svst1_scatter_u32index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_u32index_u32u10__SVBool_tPju12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u32index_u32(svbool_t pg, uint32_t *base, svuint32_t indices, svuint32_t data) { + // CHECK-LABEL: test_svst1_scatter_u32index_u32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4i32( %data, %[[PG]], i32* %base, %indices) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,u32,index,_u32)(pg, base, indices, data); } -// CHECK-LABEL: @test_svst1_scatter_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_u64index_u64u10__SVBool_tPmu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u64index_u64(svbool_t pg, uint64_t *base, svuint64_t indices, svuint64_t data) { + // CHECK-LABEL: test_svst1_scatter_u64index_u64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.index.nxv2i64( %data, %[[PG]], i64* %base, %indices) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,u64,index,_u64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svst1_scatter_u32index_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_u32index_f32u10__SVBool_tPfu12__SVUint32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u32index_f32(svbool_t pg, float32_t *base, svuint32_t indices, svfloat32_t data) { + // CHECK-LABEL: test_svst1_scatter_u32index_f32 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.uxtw.index.nxv4f32( %data, %[[PG]], float* %base, %indices) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,u32,index,_f32)(pg, base, indices, data); } -// CHECK-LABEL: @test_svst1_scatter_u64index_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z31test_svst1_scatter_u64index_f64u10__SVBool_tPdu12__SVUint64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u64index_f64(svbool_t pg, float64_t *base, svuint64_t indices, svfloat64_t data) { + // CHECK-LABEL: test_svst1_scatter_u64index_f64 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st1.scatter.index.nxv2f64( %data, %[[PG]], double* %base, %indices) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter_,u64,index,_f64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svst1_scatter_u32base_index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z36test_svst1_scatter_u32base_index_s32u10__SVBool_tu12__SVUint32_tlu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index, svint32_t data) { + // CHECK-LABEL: test_svst1_scatter_u32base_index_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2 + // CHECK: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( %data, %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter,_u32base,_index,_s32)(pg, bases, index, data); } -// CHECK-LABEL: @test_svst1_scatter_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z36test_svst1_scatter_u64base_index_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index, svint64_t data) { + // CHECK-LABEL: test_svst1_scatter_u64base_index_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 3 + // CHECK: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( %data, %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter,_u64base,_index,_s64)(pg, bases, index, data); } -// CHECK-LABEL: @test_svst1_scatter_u32base_index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z36test_svst1_scatter_u32base_index_u32u10__SVBool_tu12__SVUint32_tlu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index, svuint32_t data) { + // CHECK-LABEL: test_svst1_scatter_u32base_index_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2 + // CHECK: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4i32.nxv4i32( %data, %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter,_u32base,_index,_u32)(pg, bases, index, data); } -// CHECK-LABEL: @test_svst1_scatter_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z36test_svst1_scatter_u64base_index_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index, svuint64_t data) { + // CHECK-LABEL: test_svst1_scatter_u64base_index_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 3 + // CHECK: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2i64.nxv2i64( %data, %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter,_u64base,_index,_u64)(pg, bases, index, data); } -// CHECK-LABEL: @test_svst1_scatter_u32base_index_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z36test_svst1_scatter_u32base_index_f32u10__SVBool_tu12__SVUint32_tlu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u32base_index_f32(svbool_t pg, svuint32_t bases, int64_t index, svfloat32_t data) { + // CHECK-LABEL: test_svst1_scatter_u32base_index_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 2 + // CHECK: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv4f32.nxv4i32( %data, %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter,_u32base,_index,_f32)(pg, bases, index, data); } -// CHECK-LABEL: @test_svst1_scatter_u64base_index_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z36test_svst1_scatter_u64base_index_f64u10__SVBool_tu12__SVUint64_tlu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svst1_scatter_u64base_index_f64(svbool_t pg, svuint64_t bases, int64_t index, svfloat64_t data) { + // CHECK-LABEL: test_svst1_scatter_u64base_index_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SHL:.*]] = shl i64 %index, 3 + // CHECK: call void @llvm.aarch64.sve.st1.scatter.scalar.offset.nxv2f64.nxv2i64( %data, %[[PG]], %bases, i64 %[[SHL]]) + // CHECK: ret void return SVE_ACLE_FUNC(svst1_scatter,_u64base,_index,_f64)(pg, bases, index, data); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c index c14f4eeeb58e..dc10c5fbf5a1 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1b.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - -emit-llvm %s |& FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - -emit-llvm %s |& FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - -emit-llvm %s 2>&1 | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - -emit-llvm %s 2>&1 | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c index 70094af2960d..edf36e373160 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1h.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - -emit-llvm %s |& FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - -emit-llvm %s |& FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - -emit-llvm %s 2>&1 | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - -emit-llvm %s 2>&1 | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c index f688303047f5..cce9b3577112 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st1w.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - -emit-llvm %s |& FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - -emit-llvm %s |& FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - -emit-llvm %s 2>&1 | FileCheck %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - -emit-llvm %s 2>&1 | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c index f9c334dfb273..a1480b4c7d0f 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -12,48 +11,26 @@ #else #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svst2_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP0]], bfloat* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z15test_svst2_bf16u10__SVBool_tPu6__bf1614svbfloat16x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP0]], bfloat* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_bf16(svbool_t pg, bfloat16_t *base, svbfloat16x2_t data) { + // CHECK-LABEL: test_svst2_bf16 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv8bf16( %[[V0]], %[[V1]], %[[PG]], bfloat* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2,_bf16,,)(pg, base, data); } -// CHECK-LABEL: @test_svst2_vnum_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8bf16( [[TMP3]], [[TMP4]], [[TMP0]], bfloat* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z20test_svst2_vnum_bf16u10__SVBool_tPu6__bf16l14svbfloat16x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8bf16( [[TMP3]], [[TMP4]], [[TMP0]], bfloat* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_vnum_bf16(svbool_t pg, bfloat16_t *base, int64_t vnum, svbfloat16x2_t data) { + // CHECK-LABEL: test_svst2_vnum_bf16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast bfloat* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv8bf16( %[[V0]], %[[V1]], %[[PG]], bfloat* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2_vnum,_bf16,,)(pg, base, vnum, data); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2.c index 58c8e6d189b3..30e882652f06 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st2.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,500 +13,262 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svst2_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP0]], [[TMP1]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svst2_s8u10__SVBool_tPa10svint8x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP0]], [[TMP1]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_s8(svbool_t pg, int8_t *base, svint8x2_t data) { + // CHECK-LABEL: test_svst2_s8 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( %data, i32 1) + // CHECK: call void @llvm.aarch64.sve.st2.nxv16i8( %[[V0]], %[[V1]], %pg, i8* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2,_s8,,)(pg, base, data); } -// CHECK-LABEL: @test_svst2_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP1]], [[TMP2]], [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst2_s16u10__SVBool_tPs11svint16x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP1]], [[TMP2]], [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_s16(svbool_t pg, int16_t *base, svint16x2_t data) { + // CHECK-LABEL: test_svst2_s16 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv8i16( %[[V0]], %[[V1]], %[[PG]], i16* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2,_s16,,)(pg, base, data); } -// CHECK-LABEL: @test_svst2_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP1]], [[TMP2]], [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst2_s32u10__SVBool_tPi11svint32x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP1]], [[TMP2]], [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_s32(svbool_t pg, int32_t *base, svint32x2_t data) { + // CHECK-LABEL: test_svst2_s32 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv4i32( %[[V0]], %[[V1]], %[[PG]], i32* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2,_s32,,)(pg, base, data); } -// CHECK-LABEL: @test_svst2_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP1]], [[TMP2]], [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst2_s64u10__SVBool_tPl11svint64x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP1]], [[TMP2]], [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_s64(svbool_t pg, int64_t *base, svint64x2_t data) { + // CHECK-LABEL: test_svst2_s64 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv2i64( %[[V0]], %[[V1]], %[[PG]], i64* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2,_s64,,)(pg, base, data); } -// CHECK-LABEL: @test_svst2_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP0]], [[TMP1]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svst2_u8u10__SVBool_tPh11svuint8x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP0]], [[TMP1]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_u8(svbool_t pg, uint8_t *base, svuint8x2_t data) { + // CHECK-LABEL: test_svst2_u8 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( %data, i32 1) + // CHECK: call void @llvm.aarch64.sve.st2.nxv16i8( %[[V0]], %[[V1]], %pg, i8* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2,_u8,,)(pg, base, data); } -// CHECK-LABEL: @test_svst2_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP1]], [[TMP2]], [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst2_u16u10__SVBool_tPt12svuint16x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP1]], [[TMP2]], [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_u16(svbool_t pg, uint16_t *base, svuint16x2_t data) { + // CHECK-LABEL: test_svst2_u16 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv8i16( %[[V0]], %[[V1]], %[[PG]], i16* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2,_u16,,)(pg, base, data); } -// CHECK-LABEL: @test_svst2_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP1]], [[TMP2]], [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst2_u32u10__SVBool_tPj12svuint32x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP1]], [[TMP2]], [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_u32(svbool_t pg, uint32_t *base, svuint32x2_t data) { + // CHECK-LABEL: test_svst2_u32 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv4i32( %[[V0]], %[[V1]], %[[PG]], i32* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2,_u32,,)(pg, base, data); } -// CHECK-LABEL: @test_svst2_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP1]], [[TMP2]], [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst2_u64u10__SVBool_tPm12svuint64x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP1]], [[TMP2]], [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_u64(svbool_t pg, uint64_t *base, svuint64x2_t data) { + // CHECK-LABEL: test_svst2_u64 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv2i64( %[[V0]], %[[V1]], %[[PG]], i64* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2,_u64,,)(pg, base, data); } -// CHECK-LABEL: @test_svst2_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8f16( [[TMP1]], [[TMP2]], [[TMP0]], half* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst2_f16u10__SVBool_tPDh13svfloat16x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8f16( [[TMP1]], [[TMP2]], [[TMP0]], half* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_f16(svbool_t pg, float16_t *base, svfloat16x2_t data) { + // CHECK-LABEL: test_svst2_f16 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv8f16( %[[V0]], %[[V1]], %[[PG]], half* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2,_f16,,)(pg, base, data); } -// CHECK-LABEL: @test_svst2_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4f32( [[TMP1]], [[TMP2]], [[TMP0]], float* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst2_f32u10__SVBool_tPf13svfloat32x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4f32( [[TMP1]], [[TMP2]], [[TMP0]], float* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_f32(svbool_t pg, float32_t *base, svfloat32x2_t data) { + // CHECK-LABEL: test_svst2_f32 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv4f32( %[[V0]], %[[V1]], %[[PG]], float* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2,_f32,,)(pg, base, data); } -// CHECK-LABEL: @test_svst2_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2f64( [[TMP1]], [[TMP2]], [[TMP0]], double* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst2_f64u10__SVBool_tPd13svfloat64x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2f64( [[TMP1]], [[TMP2]], [[TMP0]], double* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_f64(svbool_t pg, float64_t *base, svfloat64x2_t data) { + // CHECK-LABEL: test_svst2_f64 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv2f64( %[[V0]], %[[V1]], %[[PG]], double* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2,_f64,,)(pg, base, data); } -// CHECK-LABEL: @test_svst2_vnum_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z18test_svst2_vnum_s8u10__SVBool_tPal10svint8x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_vnum_s8(svbool_t pg, int8_t *base, int64_t vnum, svint8x2_t data) { + // CHECK-LABEL: test_svst2_vnum_s8 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( %data, i32 1) + // CHECK: call void @llvm.aarch64.sve.st2.nxv16i8( %[[V0]], %[[V1]], %pg, i8* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2_vnum,_s8,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst2_vnum_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP3]], [[TMP4]], [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst2_vnum_s16u10__SVBool_tPsl11svint16x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP3]], [[TMP4]], [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_vnum_s16(svbool_t pg, int16_t *base, int64_t vnum, svint16x2_t data) { + // CHECK-LABEL: test_svst2_vnum_s16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv8i16( %[[V0]], %[[V1]], %[[PG]], i16* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2_vnum,_s16,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst2_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP3]], [[TMP4]], [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst2_vnum_s32u10__SVBool_tPil11svint32x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP3]], [[TMP4]], [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_vnum_s32(svbool_t pg, int32_t *base, int64_t vnum, svint32x2_t data) { + // CHECK-LABEL: test_svst2_vnum_s32 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv4i32( %[[V0]], %[[V1]], %[[PG]], i32* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2_vnum,_s32,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst2_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP3]], [[TMP4]], [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst2_vnum_s64u10__SVBool_tPll11svint64x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP3]], [[TMP4]], [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_vnum_s64(svbool_t pg, int64_t *base, int64_t vnum, svint64x2_t data) { + // CHECK-LABEL: test_svst2_vnum_s64 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv2i64( %[[V0]], %[[V1]], %[[PG]], i64* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2_vnum,_s64,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst2_vnum_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z18test_svst2_vnum_u8u10__SVBool_tPhl11svuint8x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv16i8( [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_vnum_u8(svbool_t pg, uint8_t *base, int64_t vnum, svuint8x2_t data) { + // CHECK-LABEL: test_svst2_vnum_u8 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( %data, i32 1) + // CHECK: call void @llvm.aarch64.sve.st2.nxv16i8( %[[V0]], %[[V1]], %pg, i8* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2_vnum,_u8,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst2_vnum_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP3]], [[TMP4]], [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst2_vnum_u16u10__SVBool_tPtl12svuint16x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8i16( [[TMP3]], [[TMP4]], [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_vnum_u16(svbool_t pg, uint16_t *base, int64_t vnum, svuint16x2_t data) { + // CHECK-LABEL: test_svst2_vnum_u16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv8i16( %[[V0]], %[[V1]], %[[PG]], i16* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2_vnum,_u16,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst2_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP3]], [[TMP4]], [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst2_vnum_u32u10__SVBool_tPjl12svuint32x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4i32( [[TMP3]], [[TMP4]], [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_vnum_u32(svbool_t pg, uint32_t *base, int64_t vnum, svuint32x2_t data) { + // CHECK-LABEL: test_svst2_vnum_u32 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv4i32( %[[V0]], %[[V1]], %[[PG]], i32* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2_vnum,_u32,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst2_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP3]], [[TMP4]], [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst2_vnum_u64u10__SVBool_tPml12svuint64x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2i64( [[TMP3]], [[TMP4]], [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_vnum_u64(svbool_t pg, uint64_t *base, int64_t vnum, svuint64x2_t data) { + // CHECK-LABEL: test_svst2_vnum_u64 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv2i64( %[[V0]], %[[V1]], %[[PG]], i64* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2_vnum,_u64,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst2_vnum_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8f16( [[TMP3]], [[TMP4]], [[TMP0]], half* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst2_vnum_f16u10__SVBool_tPDhl13svfloat16x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv8f16( [[TMP3]], [[TMP4]], [[TMP0]], half* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_vnum_f16(svbool_t pg, float16_t *base, int64_t vnum, svfloat16x2_t data) { + // CHECK-LABEL: test_svst2_vnum_f16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast half* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv8f16( %[[V0]], %[[V1]], %[[PG]], half* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2_vnum,_f16,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst2_vnum_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4f32( [[TMP3]], [[TMP4]], [[TMP0]], float* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst2_vnum_f32u10__SVBool_tPfl13svfloat32x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv4f32( [[TMP3]], [[TMP4]], [[TMP0]], float* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_vnum_f32(svbool_t pg, float32_t *base, int64_t vnum, svfloat32x2_t data) { + // CHECK-LABEL: test_svst2_vnum_f32 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast float* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv4f32( %[[V0]], %[[V1]], %[[PG]], float* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2_vnum,_f32,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst2_vnum_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA]], i32 1) -// CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2f64( [[TMP3]], [[TMP4]], [[TMP0]], double* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst2_vnum_f64u10__SVBool_tPdl13svfloat64x2_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st2.nxv2f64( [[TMP3]], [[TMP4]], [[TMP0]], double* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst2_vnum_f64(svbool_t pg, float64_t *base, int64_t vnum, svfloat64x2_t data) { + // CHECK-LABEL: test_svst2_vnum_f64 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast double* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( %data, i32 1) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st2.nxv2f64( %[[V0]], %[[V1]], %[[PG]], double* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst2_vnum,_f64,,)(pg, base, vnum, data); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c index 3e6e96b70669..5a9e11a8dedf 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,52 +12,28 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svst3_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], bfloat* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z15test_svst3_bf16u10__SVBool_tPu6__bf1614svbfloat16x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], bfloat* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_bf16(svbool_t pg, bfloat16_t *base, svbfloat16x3_t data) { + // CHECK-LABEL: test_svst3_bf16 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv8bf16( %[[V0]], %[[V1]], %[[V2]], %[[PG]], bfloat* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3,_bf16,,)(pg, base, data); } -// CHECK-LABEL: @test_svst3_vnum_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8bf16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], bfloat* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z20test_svst3_vnum_bf16u10__SVBool_tPu6__bf16l14svbfloat16x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8bf16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], bfloat* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_vnum_bf16(svbool_t pg, bfloat16_t *base, int64_t vnum, svbfloat16x3_t data) { + // CHECK-LABEL: test_svst3_vnum_bf16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast bfloat* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv24bf16( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv8bf16( %[[V0]], %[[V1]], %[[V2]], %[[PG]], bfloat* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3_vnum,_bf16,,)(pg, base, vnum, data); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3.c index e55d9bc65392..b2ad6e23fef0 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st3.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,544 +13,284 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svst3_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svst3_s8u10__SVBool_tPa10svint8x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_s8(svbool_t pg, int8_t *base, svint8x3_t data) { + // CHECK-LABEL: test_svst3_s8 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( %data, i32 2) + // CHECK: call void @llvm.aarch64.sve.st3.nxv16i8( %[[V0]], %[[V1]], %[[V2]], %pg, i8* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3,_s8,,)(pg, base, data); } -// CHECK-LABEL: @test_svst3_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst3_s16u10__SVBool_tPs11svint16x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_s16(svbool_t pg, int16_t *base, svint16x3_t data) { + // CHECK-LABEL: test_svst3_s16 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv8i16( %[[V0]], %[[V1]], %[[V2]], %[[PG]], i16* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3,_s16,,)(pg, base, data); } -// CHECK-LABEL: @test_svst3_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst3_s32u10__SVBool_tPi11svint32x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_s32(svbool_t pg, int32_t *base, svint32x3_t data) { + // CHECK-LABEL: test_svst3_s32 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv4i32( %[[V0]], %[[V1]], %[[V2]], %[[PG]], i32* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3,_s32,,)(pg, base, data); } -// CHECK-LABEL: @test_svst3_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst3_s64u10__SVBool_tPl11svint64x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_s64(svbool_t pg, int64_t *base, svint64x3_t data) { + // CHECK-LABEL: test_svst3_s64 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv2i64( %[[V0]], %[[V1]], %[[V2]], %[[PG]], i64* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3,_s64,,)(pg, base, data); } -// CHECK-LABEL: @test_svst3_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svst3_u8u10__SVBool_tPh11svuint8x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_u8(svbool_t pg, uint8_t *base, svuint8x3_t data) { + // CHECK-LABEL: test_svst3_u8 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( %data, i32 2) + // CHECK: call void @llvm.aarch64.sve.st3.nxv16i8( %[[V0]], %[[V1]], %[[V2]], %pg, i8* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3,_u8,,)(pg, base, data); } -// CHECK-LABEL: @test_svst3_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst3_u16u10__SVBool_tPt12svuint16x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_u16(svbool_t pg, uint16_t *base, svuint16x3_t data) { + // CHECK-LABEL: test_svst3_u16 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv8i16( %[[V0]], %[[V1]], %[[V2]], %[[PG]], i16* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3,_u16,,)(pg, base, data); } -// CHECK-LABEL: @test_svst3_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst3_u32u10__SVBool_tPj12svuint32x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_u32(svbool_t pg, uint32_t *base, svuint32x3_t data) { + // CHECK-LABEL: test_svst3_u32 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv4i32( %[[V0]], %[[V1]], %[[V2]], %[[PG]], i32* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3,_u32,,)(pg, base, data); } -// CHECK-LABEL: @test_svst3_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst3_u64u10__SVBool_tPm12svuint64x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_u64(svbool_t pg, uint64_t *base, svuint64x3_t data) { + // CHECK-LABEL: test_svst3_u64 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv2i64( %[[V0]], %[[V1]], %[[V2]], %[[PG]], i64* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3,_u64,,)(pg, base, data); } -// CHECK-LABEL: @test_svst3_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8f16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], half* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst3_f16u10__SVBool_tPDh13svfloat16x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8f16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], half* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_f16(svbool_t pg, float16_t *base, svfloat16x3_t data) { + // CHECK-LABEL: test_svst3_f16 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv8f16( %[[V0]], %[[V1]], %[[V2]], %[[PG]], half* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3,_f16,,)(pg, base, data); } -// CHECK-LABEL: @test_svst3_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4f32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], float* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst3_f32u10__SVBool_tPf13svfloat32x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4f32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], float* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_f32(svbool_t pg, float32_t *base, svfloat32x3_t data) { + // CHECK-LABEL: test_svst3_f32 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv4f32( %[[V0]], %[[V1]], %[[V2]], %[[PG]], float* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3,_f32,,)(pg, base, data); } -// CHECK-LABEL: @test_svst3_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2f64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], double* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst3_f64u10__SVBool_tPd13svfloat64x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2f64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP0]], double* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_f64(svbool_t pg, float64_t *base, svfloat64x3_t data) { + // CHECK-LABEL: test_svst3_f64 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv2f64( %[[V0]], %[[V1]], %[[V2]], %[[PG]], double* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3,_f64,,)(pg, base, data); } -// CHECK-LABEL: @test_svst3_vnum_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z18test_svst3_vnum_s8u10__SVBool_tPal10svint8x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_vnum_s8(svbool_t pg, int8_t *base, int64_t vnum, svint8x3_t data) { + // CHECK-LABEL: test_svst3_vnum_s8 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( %data, i32 2) + // CHECK: call void @llvm.aarch64.sve.st3.nxv16i8( %[[V0]], %[[V1]], %[[V2]], %pg, i8* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3_vnum,_s8,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst3_vnum_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst3_vnum_s16u10__SVBool_tPsl11svint16x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_vnum_s16(svbool_t pg, int16_t *base, int64_t vnum, svint16x3_t data) { + // CHECK-LABEL: test_svst3_vnum_s16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv8i16( %[[V0]], %[[V1]], %[[V2]], %[[PG]], i16* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3_vnum,_s16,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst3_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst3_vnum_s32u10__SVBool_tPil11svint32x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_vnum_s32(svbool_t pg, int32_t *base, int64_t vnum, svint32x3_t data) { + // CHECK-LABEL: test_svst3_vnum_s32 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv4i32( %[[V0]], %[[V1]], %[[V2]], %[[PG]], i32* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3_vnum,_s32,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst3_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst3_vnum_s64u10__SVBool_tPll11svint64x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_vnum_s64(svbool_t pg, int64_t *base, int64_t vnum, svint64x3_t data) { + // CHECK-LABEL: test_svst3_vnum_s64 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv2i64( %[[V0]], %[[V1]], %[[V2]], %[[PG]], i64* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3_vnum,_s64,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst3_vnum_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z18test_svst3_vnum_u8u10__SVBool_tPhl11svuint8x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_vnum_u8(svbool_t pg, uint8_t *base, int64_t vnum, svuint8x3_t data) { + // CHECK-LABEL: test_svst3_vnum_u8 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv48i8( %data, i32 2) + // CHECK: call void @llvm.aarch64.sve.st3.nxv16i8( %[[V0]], %[[V1]], %[[V2]], %pg, i8* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3_vnum,_u8,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst3_vnum_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst3_vnum_u16u10__SVBool_tPtl12svuint16x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_vnum_u16(svbool_t pg, uint16_t *base, int64_t vnum, svuint16x3_t data) { + // CHECK-LABEL: test_svst3_vnum_u16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv24i16( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv8i16( %[[V0]], %[[V1]], %[[V2]], %[[PG]], i16* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3_vnum,_u16,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst3_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst3_vnum_u32u10__SVBool_tPjl12svuint32x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_vnum_u32(svbool_t pg, uint32_t *base, int64_t vnum, svuint32x3_t data) { + // CHECK-LABEL: test_svst3_vnum_u32 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv12i32( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv4i32( %[[V0]], %[[V1]], %[[V2]], %[[PG]], i32* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3_vnum,_u32,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst3_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst3_vnum_u64u10__SVBool_tPml12svuint64x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_vnum_u64(svbool_t pg, uint64_t *base, int64_t vnum, svuint64x3_t data) { + // CHECK-LABEL: test_svst3_vnum_u64 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv6i64( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv2i64( %[[V0]], %[[V1]], %[[V2]], %[[PG]], i64* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3_vnum,_u64,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst3_vnum_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8f16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], half* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst3_vnum_f16u10__SVBool_tPDhl13svfloat16x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv8f16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], half* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_vnum_f16(svbool_t pg, float16_t *base, int64_t vnum, svfloat16x3_t data) { + // CHECK-LABEL: test_svst3_vnum_f16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast half* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv24f16( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv8f16( %[[V0]], %[[V1]], %[[V2]], %[[PG]], half* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3_vnum,_f16,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst3_vnum_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4f32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], float* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst3_vnum_f32u10__SVBool_tPfl13svfloat32x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv4f32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], float* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_vnum_f32(svbool_t pg, float32_t *base, int64_t vnum, svfloat32x3_t data) { + // CHECK-LABEL: test_svst3_vnum_f32 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast float* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv12f32( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv4f32( %[[V0]], %[[V1]], %[[V2]], %[[PG]], float* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3_vnum,_f32,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst3_vnum_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 2) -// CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2f64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], double* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst3_vnum_f64u10__SVBool_tPdl13svfloat64x3_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st3.nxv2f64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP0]], double* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst3_vnum_f64(svbool_t pg, float64_t *base, int64_t vnum, svfloat64x3_t data) { + // CHECK-LABEL: test_svst3_vnum_f64 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast double* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv6f64( %data, i32 2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st3.nxv2f64( %[[V0]], %[[V1]], %[[V2]], %[[PG]], double* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst3_vnum,_f64,,)(pg, base, vnum, data); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c index 46b93b14564b..3c8bb7da4638 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,56 +12,30 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svst4_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], bfloat* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z15test_svst4_bf16u10__SVBool_tPu6__bf1614svbfloat16x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8bf16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], bfloat* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_bf16(svbool_t pg, bfloat16_t *base, svbfloat16x4_t data) { + // CHECK-LABEL: test_svst4_bf16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( %data, i32 3) + // CHECK: call void @llvm.aarch64.sve.st4.nxv8bf16( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], bfloat* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4,_bf16,,)(pg, base, data); } -// CHECK-LABEL: @test_svst4_vnum_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8bf16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], bfloat* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z20test_svst4_vnum_bf16u10__SVBool_tPu6__bf16l14svbfloat16x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8bf16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], bfloat* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_vnum_bf16(svbool_t pg, bfloat16_t *base, int64_t vnum, svbfloat16x4_t data) { + // CHECK-LABEL: test_svst4_vnum_bf16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast bfloat* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv32bf16( %data, i32 3) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st4.nxv8bf16( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], bfloat* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4_vnum,_bf16,,)(pg, base, vnum, data); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4.c index 1374c0952dab..69b12103ee15 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_st4.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,588 +13,306 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svst4_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svst4_s8u10__SVBool_tPa10svint8x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_s8(svbool_t pg, int8_t *base, svint8x4_t data) { + // CHECK-LABEL: test_svst4_s8 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( %data, i32 3) + // CHECK: call void @llvm.aarch64.sve.st4.nxv16i8( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %pg, i8* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4,_s8,,)(pg, base, data); } -// CHECK-LABEL: @test_svst4_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst4_s16u10__SVBool_tPs11svint16x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_s16(svbool_t pg, int16_t *base, svint16x4_t data) { + // CHECK-LABEL: test_svst4_s16 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( %data, i32 3) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st4.nxv8i16( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], i16* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4,_s16,,)(pg, base, data); } -// CHECK-LABEL: @test_svst4_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst4_s32u10__SVBool_tPi11svint32x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_s32(svbool_t pg, int32_t *base, svint32x4_t data) { + // CHECK-LABEL: test_svst4_s32 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( %data, i32 3) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st4.nxv4i32( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], i32* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4,_s32,,)(pg, base, data); } -// CHECK-LABEL: @test_svst4_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst4_s64u10__SVBool_tPl11svint64x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_s64(svbool_t pg, int64_t *base, svint64x4_t data) { + // CHECK-LABEL: test_svst4_s64 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( %data, i32 3) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st4.nxv2i64( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], i64* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4,_s64,,)(pg, base, data); } -// CHECK-LABEL: @test_svst4_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z13test_svst4_u8u10__SVBool_tPh11svuint8x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP0]], [[TMP1]], [[TMP2]], [[TMP3]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_u8(svbool_t pg, uint8_t *base, svuint8x4_t data) { + // CHECK-LABEL: test_svst4_u8 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( %data, i32 3) + // CHECK: call void @llvm.aarch64.sve.st4.nxv16i8( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %pg, i8* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4,_u8,,)(pg, base, data); } -// CHECK-LABEL: @test_svst4_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst4_u16u10__SVBool_tPt12svuint16x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_u16(svbool_t pg, uint16_t *base, svuint16x4_t data) { + // CHECK-LABEL: test_svst4_u16 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( %data, i32 3) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st4.nxv8i16( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], i16* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4,_u16,,)(pg, base, data); } -// CHECK-LABEL: @test_svst4_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst4_u32u10__SVBool_tPj12svuint32x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_u32(svbool_t pg, uint32_t *base, svuint32x4_t data) { + // CHECK-LABEL: test_svst4_u32 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( %data, i32 3) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st4.nxv4i32( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], i32* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4,_u32,,)(pg, base, data); } -// CHECK-LABEL: @test_svst4_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst4_u64u10__SVBool_tPm12svuint64x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_u64(svbool_t pg, uint64_t *base, svuint64x4_t data) { + // CHECK-LABEL: test_svst4_u64 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( %data, i32 3) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st4.nxv2i64( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], i64* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4,_u64,,)(pg, base, data); } -// CHECK-LABEL: @test_svst4_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8f16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], half* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst4_f16u10__SVBool_tPDh13svfloat16x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8f16( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], half* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_f16(svbool_t pg, float16_t *base, svfloat16x4_t data) { + // CHECK-LABEL: test_svst4_f16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( %data, i32 3) + // CHECK: call void @llvm.aarch64.sve.st4.nxv8f16( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], half* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4,_f16,,)(pg, base, data); } -// CHECK-LABEL: @test_svst4_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4f32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], float* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst4_f32u10__SVBool_tPf13svfloat32x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4f32( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], float* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_f32(svbool_t pg, float32_t *base, svfloat32x4_t data) { + // CHECK-LABEL: test_svst4_f32 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( %data, i32 3) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st4.nxv4f32( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], float* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4,_f32,,)(pg, base, data); } -// CHECK-LABEL: @test_svst4_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2f64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], double* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z14test_svst4_f64u10__SVBool_tPd13svfloat64x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2f64( [[TMP1]], [[TMP2]], [[TMP3]], [[TMP4]], [[TMP0]], double* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_f64(svbool_t pg, float64_t *base, svfloat64x4_t data) { + // CHECK-LABEL: test_svst4_f64 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( %data, i32 3) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st4.nxv2f64( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], double* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4,_f64,,)(pg, base, data); } -// CHECK-LABEL: @test_svst4_vnum_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z18test_svst4_vnum_s8u10__SVBool_tPal10svint8x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_vnum_s8(svbool_t pg, int8_t *base, int64_t vnum, svint8x4_t data) { + // CHECK-LABEL: test_svst4_vnum_s8 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( %data, i32 3) + // CHECK: call void @llvm.aarch64.sve.st4.nxv16i8( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %pg, i8* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4_vnum,_s8,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst4_vnum_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst4_vnum_s16u10__SVBool_tPsl11svint16x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_vnum_s16(svbool_t pg, int16_t *base, int64_t vnum, svint16x4_t data) { + // CHECK-LABEL: test_svst4_vnum_s16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( %data, i32 3) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st4.nxv8i16( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], i16* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4_vnum,_s16,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst4_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst4_vnum_s32u10__SVBool_tPil11svint32x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_vnum_s32(svbool_t pg, int32_t *base, int64_t vnum, svint32x4_t data) { + // CHECK-LABEL: test_svst4_vnum_s32 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( %data, i32 3) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st4.nxv4i32( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], i32* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4_vnum,_s32,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst4_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst4_vnum_s64u10__SVBool_tPll11svint64x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_vnum_s64(svbool_t pg, int64_t *base, int64_t vnum, svint64x4_t data) { + // CHECK-LABEL: test_svst4_vnum_s64 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( %data, i32 3) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st4.nxv2i64( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], i64* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4_vnum,_s64,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst4_vnum_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z18test_svst4_vnum_u8u10__SVBool_tPhl11svuint8x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv16i8( [[TMP2]], [[TMP3]], [[TMP4]], [[TMP5]], [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_vnum_u8(svbool_t pg, uint8_t *base, int64_t vnum, svuint8x4_t data) { + // CHECK-LABEL: test_svst4_vnum_u8 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8( %data, i32 3) + // CHECK: call void @llvm.aarch64.sve.st4.nxv16i8( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %pg, i8* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4_vnum,_u8,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst4_vnum_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst4_vnum_u16u10__SVBool_tPtl12svuint16x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8i16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_vnum_u16(svbool_t pg, uint16_t *base, int64_t vnum, svuint16x4_t data) { + // CHECK-LABEL: test_svst4_vnum_u16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv32i16( %data, i32 3) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st4.nxv8i16( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], i16* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4_vnum,_u16,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst4_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst4_vnum_u32u10__SVBool_tPjl12svuint32x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4i32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_vnum_u32(svbool_t pg, uint32_t *base, int64_t vnum, svuint32x4_t data) { + // CHECK-LABEL: test_svst4_vnum_u32 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv16i32( %data, i32 3) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st4.nxv4i32( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], i32* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4_vnum,_u32,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst4_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst4_vnum_u64u10__SVBool_tPml12svuint64x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2i64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_vnum_u64(svbool_t pg, uint64_t *base, int64_t vnum, svuint64x4_t data) { + // CHECK-LABEL: test_svst4_vnum_u64 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv8i64( %data, i32 3) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st4.nxv2i64( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], i64* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4_vnum,_u64,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst4_vnum_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8f16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], half* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst4_vnum_f16u10__SVBool_tPDhl13svfloat16x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv8f16( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], half* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_vnum_f16(svbool_t pg, float16_t *base, int64_t vnum, svfloat16x4_t data) { + // CHECK-LABEL: test_svst4_vnum_f16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast half* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv32f16( %data, i32 3) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st4.nxv8f16( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], half* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4_vnum,_f16,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst4_vnum_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4f32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], float* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst4_vnum_f32u10__SVBool_tPfl13svfloat32x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4f32( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], float* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_vnum_f32(svbool_t pg, float32_t *base, int64_t vnum, svfloat32x4_t data) { + // CHECK-LABEL: test_svst4_vnum_f32 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast float* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv16f32( %data, i32 3) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st4.nxv4f32( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], float* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4_vnum,_f32,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svst4_vnum_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 2) -// CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 3) -// CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2f64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], double* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z19test_svst4_vnum_f64u10__SVBool_tPdl13svfloat64x4_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP4:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP5:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 2) -// CPP-CHECK-NEXT: [[TMP6:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( [[DATA]], i32 3) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv2f64( [[TMP3]], [[TMP4]], [[TMP5]], [[TMP6]], [[TMP0]], double* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svst4_vnum_f64(svbool_t pg, float64_t *base, int64_t vnum, svfloat64x4_t data) { + // CHECK-LABEL: test_svst4_vnum_f64 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast double* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( %data, i32 1) + // CHECK-DAG: %[[V2:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( %data, i32 2) + // CHECK-DAG: %[[V3:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv8f64( %data, i32 3) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.st4.nxv2f64( %[[V0]], %[[V1]], %[[V2]], %[[V3]], %[[PG]], double* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svst4_vnum,_f64,,)(pg, base, vnum, data); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c index 7964219cce01..05fb09613489 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,42 +13,24 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svstnt1_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8bf16( [[DATA:%.*]], [[TMP0]], bfloat* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z17test_svstnt1_bf16u10__SVBool_tPu6__bf16u14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8bf16( [[DATA:%.*]], [[TMP0]], bfloat* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_bf16(svbool_t pg, bfloat16_t *base, svbfloat16_t data) { + // CHECK-LABEL: test_svstnt1_bf16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv8bf16( %data, %[[PG]], bfloat* %base) + // CHECK-NEXT: ret // expected-warning@+1 {{implicit declaration of function 'svstnt1_bf16'}} return SVE_ACLE_FUNC(svstnt1,_bf16,,)(pg, base, data); } -// CHECK-LABEL: @test_svstnt1_vnum_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8bf16( [[DATA:%.*]], [[TMP0]], bfloat* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z22test_svstnt1_vnum_bf16u10__SVBool_tPu6__bf16lu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast bfloat* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8bf16( [[DATA:%.*]], [[TMP0]], bfloat* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_vnum_bf16(svbool_t pg, bfloat16_t *base, int64_t vnum, svbfloat16_t data) { + // CHECK-LABEL: test_svstnt1_vnum_bf16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast bfloat* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv8bf16( %data, %[[PG]], bfloat* %[[GEP]]) + // CHECK-NEXT: ret // expected-warning@+1 {{implicit declaration of function 'svstnt1_vnum_bf16'}} return SVE_ACLE_FUNC(svstnt1_vnum,_bf16,,)(pg, base, vnum, data); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1.c index 6ccc7f9f696d..9dc6770fa7ac 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_stnt1.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include @@ -15,412 +14,218 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svstnt1_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z15test_svstnt1_s8u10__SVBool_tPau10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_s8(svbool_t pg, int8_t *base, svint8_t data) { + // CHECK-LABEL: test_svstnt1_s8 + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv16i8( %data, %pg, i8* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1,_s8,,)(pg, base, data); } -// CHECK-LABEL: @test_svstnt1_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z16test_svstnt1_s16u10__SVBool_tPsu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_s16(svbool_t pg, int16_t *base, svint16_t data) { + // CHECK-LABEL: test_svstnt1_s16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv8i16( %data, %[[PG]], i16* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1,_s16,,)(pg, base, data); } -// CHECK-LABEL: @test_svstnt1_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z16test_svstnt1_s32u10__SVBool_tPiu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_s32(svbool_t pg, int32_t *base, svint32_t data) { + // CHECK-LABEL: test_svstnt1_s32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv4i32( %data, %[[PG]], i32* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1,_s32,,)(pg, base, data); } -// CHECK-LABEL: @test_svstnt1_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z16test_svstnt1_s64u10__SVBool_tPlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_s64(svbool_t pg, int64_t *base, svint64_t data) { + // CHECK-LABEL: test_svstnt1_s64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv2i64( %data, %[[PG]], i64* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1,_s64,,)(pg, base, data); } -// CHECK-LABEL: @test_svstnt1_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z15test_svstnt1_u8u10__SVBool_tPhu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_u8(svbool_t pg, uint8_t *base, svuint8_t data) { + // CHECK-LABEL: test_svstnt1_u8 + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv16i8( %data, %pg, i8* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1,_u8,,)(pg, base, data); } -// CHECK-LABEL: @test_svstnt1_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z16test_svstnt1_u16u10__SVBool_tPtu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_u16(svbool_t pg, uint16_t *base, svuint16_t data) { + // CHECK-LABEL: test_svstnt1_u16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv8i16( %data, %[[PG]], i16* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1,_u16,,)(pg, base, data); } -// CHECK-LABEL: @test_svstnt1_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z16test_svstnt1_u32u10__SVBool_tPju12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_u32(svbool_t pg, uint32_t *base, svuint32_t data) { + // CHECK-LABEL: test_svstnt1_u32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv4i32( %data, %[[PG]], i32* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1,_u32,,)(pg, base, data); } -// CHECK-LABEL: @test_svstnt1_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z16test_svstnt1_u64u10__SVBool_tPmu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_u64(svbool_t pg, uint64_t *base, svuint64_t data) { + // CHECK-LABEL: test_svstnt1_u64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv2i64( %data, %[[PG]], i64* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1,_u64,,)(pg, base, data); } -// CHECK-LABEL: @test_svstnt1_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8f16( [[DATA:%.*]], [[TMP0]], half* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z16test_svstnt1_f16u10__SVBool_tPDhu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8f16( [[DATA:%.*]], [[TMP0]], half* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_f16(svbool_t pg, float16_t *base, svfloat16_t data) { + // CHECK-LABEL: test_svstnt1_f16 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv8f16( %data, %[[PG]], half* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1,_f16,,)(pg, base, data); } -// CHECK-LABEL: @test_svstnt1_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z16test_svstnt1_f32u10__SVBool_tPfu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_f32(svbool_t pg, float32_t *base, svfloat32_t data) { + // CHECK-LABEL: test_svstnt1_f32 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv4f32( %data, %[[PG]], float* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1,_f32,,)(pg, base, data); } -// CHECK-LABEL: @test_svstnt1_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z16test_svstnt1_f64u10__SVBool_tPdu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_f64(svbool_t pg, float64_t *base, svfloat64_t data) { + // CHECK-LABEL: test_svstnt1_f64 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv2f64( %data, %[[PG]], double* %base) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1,_f64,,)(pg, base, data); } -// CHECK-LABEL: @test_svstnt1_vnum_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z20test_svstnt1_vnum_s8u10__SVBool_tPalu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_vnum_s8(svbool_t pg, int8_t *base, int64_t vnum, svint8_t data) { + // CHECK-LABEL: test_svstnt1_vnum_s8 + // CHECK: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv16i8( %data, %pg, i8* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1_vnum,_s8,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svstnt1_vnum_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_s16u10__SVBool_tPslu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_vnum_s16(svbool_t pg, int16_t *base, int64_t vnum, svint16_t data) { + // CHECK-LABEL: test_svstnt1_vnum_s16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv8i16( %data, %[[PG]], i16* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1_vnum,_s16,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svstnt1_vnum_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_s32u10__SVBool_tPilu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_vnum_s32(svbool_t pg, int32_t *base, int64_t vnum, svint32_t data) { + // CHECK-LABEL: test_svstnt1_vnum_s32 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv4i32( %data, %[[PG]], i32* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1_vnum,_s32,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svstnt1_vnum_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_s64u10__SVBool_tPllu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_vnum_s64(svbool_t pg, int64_t *base, int64_t vnum, svint64_t data) { + // CHECK-LABEL: test_svstnt1_vnum_s64 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv2i64( %data, %[[PG]], i64* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1_vnum,_s64,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svstnt1_vnum_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z20test_svstnt1_vnum_u8u10__SVBool_tPhlu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP1:%.*]] = getelementptr , * [[TMP0]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv16i8( [[DATA:%.*]], [[PG:%.*]], i8* [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_vnum_u8(svbool_t pg, uint8_t *base, int64_t vnum, svuint8_t data) { + // CHECK-LABEL: test_svstnt1_vnum_u8 + // CHECK: %[[BITCAST:.*]] = bitcast i8* %base to * + // CHECK: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv16i8( %data, %pg, i8* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1_vnum,_u8,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svstnt1_vnum_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_u16u10__SVBool_tPtlu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i16* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8i16( [[DATA:%.*]], [[TMP0]], i16* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_vnum_u16(svbool_t pg, uint16_t *base, int64_t vnum, svuint16_t data) { + // CHECK-LABEL: test_svstnt1_vnum_u16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i16* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv8i16( %data, %[[PG]], i16* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1_vnum,_u16,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svstnt1_vnum_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_u32u10__SVBool_tPjlu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_vnum_u32(svbool_t pg, uint32_t *base, int64_t vnum, svuint32_t data) { + // CHECK-LABEL: test_svstnt1_vnum_u32 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i32* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv4i32( %data, %[[PG]], i32* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1_vnum,_u32,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svstnt1_vnum_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_u64u10__SVBool_tPmlu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast i64* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_vnum_u64(svbool_t pg, uint64_t *base, int64_t vnum, svuint64_t data) { + // CHECK-LABEL: test_svstnt1_vnum_u64 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast i64* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv2i64( %data, %[[PG]], i64* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1_vnum,_u64,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svstnt1_vnum_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8f16( [[DATA:%.*]], [[TMP0]], half* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_f16u10__SVBool_tPDhlu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast half* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv8f16( [[DATA:%.*]], [[TMP0]], half* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_vnum_f16(svbool_t pg, float16_t *base, int64_t vnum, svfloat16_t data) { + // CHECK-LABEL: test_svstnt1_vnum_f16 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast half* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv8f16( %data, %[[PG]], half* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1_vnum,_f16,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svstnt1_vnum_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_f32u10__SVBool_tPflu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_vnum_f32(svbool_t pg, float32_t *base, int64_t vnum, svfloat32_t data) { + // CHECK-LABEL: test_svstnt1_vnum_f32 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast float* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv4f32( %data, %[[PG]], float* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1_vnum,_f32,,)(pg, base, vnum, data); } -// CHECK-LABEL: @test_svstnt1_vnum_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z21test_svstnt1_vnum_f64u10__SVBool_tPdlu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast double* [[BASE:%.*]] to * -// CPP-CHECK-NEXT: [[TMP2:%.*]] = getelementptr , * [[TMP1]], i64 [[VNUM:%.*]], i64 0 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_vnum_f64(svbool_t pg, float64_t *base, int64_t vnum, svfloat64_t data) { + // CHECK-LABEL: test_svstnt1_vnum_f64 + // CHECK-DAG: %[[BITCAST:.*]] = bitcast double* %base to * + // CHECK-DAG: %[[GEP:.*]] = getelementptr , * %[[BITCAST]], i64 %vnum, i64 0 + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.nxv2f64( %data, %[[PG]], double* %[[GEP]]) + // CHECK-NEXT: ret return SVE_ACLE_FUNC(svstnt1_vnum,_f64,,)(pg, base, vnum, data); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c index a6e1c7016ac6..977c7937d0eb 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sub.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,1210 +13,639 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsub_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svsub_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svsub_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsub_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svsub_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsub_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svsub_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsub_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svsub_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svsub_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svsub_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svsub_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svsub_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svsub_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsub_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svsub_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsub_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svsub_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svsub_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svsub_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svsub_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsub_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svsub_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsub_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svsub_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsub_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svsub_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svsub_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svsub_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svsub_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svsub_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svsub_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsub_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svsub_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsub_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svsub_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svsub_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svsub_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svsub_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsub_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svsub_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsub_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svsub_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsub_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svsub_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svsub_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svsub_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svsub_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svsub_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svsub_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsub_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svsub_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsub_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svsub_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svsub_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svsub_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svsub_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svsub_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svsub_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svsub_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svsub_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svsub_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svsub_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svsub_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svsub_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svsub_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svsub_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svsub_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svsub_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svsub_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svsub_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svsub_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svsub_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsub_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svsub_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svsub_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svsub_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svsub_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svsub_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svsub_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svsub_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svsub_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsub_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svsub_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svsub_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svsub_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svsub_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svsub_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svsub_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svsub_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svsub_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsub_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svsub_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svsub_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svsub_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svsub_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svsub_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svsub_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svsub_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svsub_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsub_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svsub_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svsub_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svsub_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svsub_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svsub_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svsub_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svsub_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svsub_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sub.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svsub_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svsub_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svsub_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svsub_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svsub_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svsub_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svsub_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svsub_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svsub_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svsub_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svsub_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svsub_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svsub_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svsub_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svsub_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svsub_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsub_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svsub_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svsub_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_f64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svsub_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svsub_n_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_f32_zu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svsub_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svsub_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_f64_zu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svsub_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svsub_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svsub_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svsub_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_f32_mu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svsub_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svsub_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_f64_mu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svsub_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svsub_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svsub_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svsub_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_f32_xu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svsub_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svsub_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsub_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsub_n_f64_xu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svsub_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svsub_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsub.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsub,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c index 218d43dcedf3..95dadd7cae1b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_subr.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,1210 +13,639 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsubr_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsubr_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svsubr_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsubr_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svsubr_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsubr_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svsubr_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsubr_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svsubr_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svsubr_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svsubr_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svsubr_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svsubr_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svsubr_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsubr_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svsubr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsubr_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svsubr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svsubr_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsubr_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svsubr_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsubr_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svsubr_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsubr_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svsubr_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsubr_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svsubr_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svsubr_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsubr_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svsubr_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svsubr_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svsubr_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsubr_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svsubr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsubr_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svsubr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svsubr_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsubr_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svsubr_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsubr_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svsubr_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsubr_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svsubr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsubr_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svsubr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svsubr_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsubr_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svsubr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svsubr_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svsubr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsubr_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svsubr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsubr_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svsubr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svsubr_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsubr_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svsubr_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svsubr_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svsubr_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svsubr_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svsubr_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svsubr_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svsubr_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svsubr_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsubr_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svsubr_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svsubr_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svsubr_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svsubr_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svsubr_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svsubr_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svsubr_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svsubr_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsubr_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svsubr_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svsubr_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svsubr_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svsubr_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svsubr_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svsubr_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svsubr_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svsubr_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsubr_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svsubr_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svsubr_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svsubr_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svsubr_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svsubr_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svsubr_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svsubr_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svsubr_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsubr_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svsubr_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svsubr_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svsubr_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svsubr_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svsubr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svsubr_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svsubr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svsubr_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsubr_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svsubr_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svsubr_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svsubr_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svsubr_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svsubr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svsubr_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.subr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svsubr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svsubr_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_f16_zu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svsubr_f16_z(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svsubr_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_f32_zu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svsubr_f32_z(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svsubr_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_f64_zu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svsubr_f64_z(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svsubr_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svsubr_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svsubr_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svsubr_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svsubr_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svsubr_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svsubr_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svsubr_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svsubr_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svsubr_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svsubr_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubr_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svsubr_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svsubr_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_f64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f16_zu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8f16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat16_t test_svsubr_n_f16_z(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svsubr_n_f16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8f16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f32_zu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4f32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat32_t test_svsubr_n_f32_z(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svsubr_n_f32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4f32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f64_zu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2f64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svfloat64_t test_svsubr_n_f64_z(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svsubr_n_f64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2f64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f16_mu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svsubr_n_f16_m(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svsubr_n_f16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f32_mu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svsubr_n_f32_m(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svsubr_n_f32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f64_mu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svsubr_n_f64_m(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svsubr_n_f64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f16_xu10__SVBool_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svsubr_n_f16_x(svbool_t pg, svfloat16_t op1, float16_t op2) { + // CHECK-LABEL: test_svsubr_n_f16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv8f16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f32_xu10__SVBool_tu13__SVFloat32_tf( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svsubr_n_f32_x(svbool_t pg, svfloat32_t op1, float32_t op2) { + // CHECK-LABEL: test_svsubr_n_f32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4f32(float %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv4f32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsubr_n_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubr_n_f64_xu10__SVBool_tu13__SVFloat64_td( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svsubr_n_f64_x(svbool_t pg, svfloat64_t op1, float64_t op2) { + // CHECK-LABEL: test_svsubr_n_f64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2f64(double %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fsubr.nxv2f64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svsubr,_n_f64,_x,)(pg, op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c index e23bf6ce10d4..6f0e4daaa2d6 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_sudot.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,88 +12,45 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsudot_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Z:%.*]], [[Y:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsudot_s32u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Z:%.*]], [[Y:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsudot_s32(svint32_t x, svint8_t y, svuint8_t z) { + // CHECK-LABEL: test_svsudot_s32 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( %x, %z, %y) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svsudot, _s32, , )(x, y, z); } -// CHECK-LABEL: @test_svsudot_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[Z:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[TMP0]], [[Y:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsudot_n_s32u11__SVInt32_tu10__SVInt8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[Z:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[TMP0]], [[Y:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svsudot_n_s32(svint32_t x, svint8_t y, uint8_t z) { + // CHECK-LABEL: test_svsudot_n_s32 + // CHECK: %[[SPLAT:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %z) + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( %x, %[[SPLAT]], %y) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svsudot, _n_s32, , )(x, y, z); } -// CHECK-LABEL: @test_svsudot_lane_s32_0( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_0u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsudot_lane_s32_0(svint32_t x, svint8_t y, svuint8_t z) { + // CHECK-LABEL: test_svsudot_lane_s32_0 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( %x, %y, %z, i32 0) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 0); } -// CHECK-LABEL: @test_svsudot_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_1u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsudot_lane_s32_1(svint32_t x, svint8_t y, svuint8_t z) { + // CHECK-LABEL: test_svsudot_lane_s32_1 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( %x, %y, %z, i32 1) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 1); } -// CHECK-LABEL: @test_svsudot_lane_s32_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_2u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsudot_lane_s32_2(svint32_t x, svint8_t y, svuint8_t z) { + // CHECK-LABEL: test_svsudot_lane_s32_2 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( %x, %y, %z, i32 2) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 2); } -// CHECK-LABEL: @test_svsudot_lane_s32_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svsudot_lane_s32_3u11__SVInt32_tu10__SVInt8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsudot_lane_s32_3(svint32_t x, svint8_t y, svuint8_t z) { + // CHECK-LABEL: test_svsudot_lane_s32_3 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.sudot.lane.nxv4i32( %x, %y, %z, i32 3) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svsudot_lane, _s32, , )(x, y, z, 3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl-bfloat.c index 934749a651b3..a4a442492563 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl-bfloat.c @@ -1,11 +1,10 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -15,17 +14,10 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svtbl_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv8bf16( [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtbl_bf16u14__SVBFloat16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv8bf16( [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svtbl_bf16(svbfloat16_t data, svuint16_t indices) { + // CHECK-LABEL: test_svtbl_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv8bf16( %data, %indices) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svtbl_bf16'}} return SVE_ACLE_FUNC(svtbl, _bf16, , )(data, indices); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl.c index ac61b64117e8..66be572885fe 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tbl.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,167 +13,90 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svtbl_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svtbl_s8u10__SVInt8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svtbl_s8(svint8_t data, svuint8_t indices) { + // CHECK-LABEL: test_svtbl_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( %data, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtbl,_s8,,)(data, indices); } -// CHECK-LABEL: @test_svtbl_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbl_s16u11__SVInt16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svtbl_s16(svint16_t data, svuint16_t indices) { + // CHECK-LABEL: test_svtbl_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( %data, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtbl,_s16,,)(data, indices); } -// CHECK-LABEL: @test_svtbl_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbl_s32u11__SVInt32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svtbl_s32(svint32_t data, svuint32_t indices) { + // CHECK-LABEL: test_svtbl_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( %data, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtbl,_s32,,)(data, indices); } -// CHECK-LABEL: @test_svtbl_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbl_s64u11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svtbl_s64(svint64_t data, svuint64_t indices) { + // CHECK-LABEL: test_svtbl_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( %data, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtbl,_s64,,)(data, indices); } -// CHECK-LABEL: @test_svtbl_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svtbl_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svtbl_u8(svuint8_t data, svuint8_t indices) { + // CHECK-LABEL: test_svtbl_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv16i8( %data, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtbl,_u8,,)(data, indices); } -// CHECK-LABEL: @test_svtbl_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbl_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svtbl_u16(svuint16_t data, svuint16_t indices) { + // CHECK-LABEL: test_svtbl_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv8i16( %data, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtbl,_u16,,)(data, indices); } -// CHECK-LABEL: @test_svtbl_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbl_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svtbl_u32(svuint32_t data, svuint32_t indices) { + // CHECK-LABEL: test_svtbl_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv4i32( %data, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtbl,_u32,,)(data, indices); } -// CHECK-LABEL: @test_svtbl_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbl_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svtbl_u64(svuint64_t data, svuint64_t indices) { + // CHECK-LABEL: test_svtbl_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv2i64( %data, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtbl,_u64,,)(data, indices); } -// CHECK-LABEL: @test_svtbl_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv8f16( [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbl_f16u13__SVFloat16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv8f16( [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svtbl_f16(svfloat16_t data, svuint16_t indices) { + // CHECK-LABEL: test_svtbl_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv8f16( %data, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtbl,_f16,,)(data, indices); } -// CHECK-LABEL: @test_svtbl_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv4f32( [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbl_f32u13__SVFloat32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv4f32( [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svtbl_f32(svfloat32_t data, svuint32_t indices) { + // CHECK-LABEL: test_svtbl_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv4f32( %data, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtbl,_f32,,)(data, indices); } -// CHECK-LABEL: @test_svtbl_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv2f64( [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbl_f64u13__SVFloat64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbl.nxv2f64( [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svtbl_f64(svfloat64_t data, svuint64_t indices) { + // CHECK-LABEL: test_svtbl_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl.nxv2f64( %data, %indices) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtbl,_f64,,)(data, indices); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tmad.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tmad.c index 9e5d99a5ff54..f06deba60c7a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tmad.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tmad.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,62 +13,34 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svtmad_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftmad.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtmad_f16u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftmad.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svtmad_f16(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svtmad_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ftmad.x.nxv8f16( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtmad,_f16,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svtmad_f16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftmad.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svtmad_f16_1u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftmad.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svtmad_f16_1(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svtmad_f16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ftmad.x.nxv8f16( %op1, %op2, i32 7) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtmad,_f16,,)(op1, op2, 7); } -// CHECK-LABEL: @test_svtmad_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftmad.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtmad_f32u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftmad.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svtmad_f32(svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svtmad_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ftmad.x.nxv4f32( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtmad,_f32,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svtmad_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftmad.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtmad_f64u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftmad.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svtmad_f64(svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svtmad_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ftmad.x.nxv2f64( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtmad,_f64,,)(op1, op2, 0); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c index 4ac4d0ee8d4a..36862a268049 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,18 +13,11 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svtrn1_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svtrn1_bf16u14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svtrn1_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svtrn1_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svtrn1_bf16'}} return SVE_ACLE_FUNC(svtrn1,_bf16,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c index c2d77cf7ca13..3814ae867304 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,17 +13,10 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svtrn1_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svtrn1_bf16u14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svtrn1_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svtrn1_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1q.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svtrn1q_bf16'}} return SVE_ACLE_FUNC(svtrn1q, _bf16, , )(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c index 2ae77daac9e8..d4753ced350e 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1-fp64.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,156 +12,79 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svtrn1_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtrn1_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svtrn1_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svtrn1_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1q.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1q, _s8, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn1_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svtrn1_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svtrn1_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1q.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1q, _s16, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn1_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svtrn1_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svtrn1_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1q.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1q, _s32, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn1_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svtrn1_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svtrn1_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1q.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1q, _s64, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn1_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtrn1_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svtrn1_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svtrn1_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1q.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1q, _u8, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn1_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svtrn1_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svtrn1_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1q.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1q, _u16, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn1_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svtrn1_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svtrn1_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1q.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1q, _u32, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn1_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svtrn1_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svtrn1_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1q.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1q, _u64, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn1_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_f16u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svtrn1_f16(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svtrn1_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1q.nxv8f16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1q, _f16, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn1_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_f32u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svtrn1_f32(svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svtrn1_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1q.nxv4f32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1q, _f32, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn1_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_f64u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svtrn1_f64(svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svtrn1_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1q.nxv2f64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1q, _f64, , )(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1.c index e96ff2fd258e..f847984e3e15 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn1.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,245 +13,131 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svtrn1_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtrn1_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svtrn1_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svtrn1_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1,_s8,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn1_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svtrn1_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svtrn1_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn1_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svtrn1_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svtrn1_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn1_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svtrn1_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svtrn1_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn1_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtrn1_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svtrn1_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svtrn1_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1,_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn1_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svtrn1_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svtrn1_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn1_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svtrn1_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svtrn1_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn1_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svtrn1_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svtrn1_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn1_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_f16u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svtrn1_f16(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svtrn1_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1.nxv8f16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1,_f16,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn1_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_f32u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svtrn1_f32(svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svtrn1_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1.nxv4f32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1,_f32,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn1_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_f64u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svtrn1_f64(svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svtrn1_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1.nxv2f64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn1,_f64,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn1_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtrn1_b8u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn1.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svtrn1_b8(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svtrn1_b8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1.nxv16i1( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return svtrn1_b8(op1, op2); } -// CHECK-LABEL: @test_svtrn1_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn1.nxv8i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_b16u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn1.nxv8i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svtrn1_b16(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svtrn1_b16 + // CHECK-DAG: %[[OP1:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %op1) + // CHECK-DAG: %[[OP2:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1.nxv8i1( %[[OP1]], %[[OP2]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svtrn1_b16(op1, op2); } -// CHECK-LABEL: @test_svtrn1_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn1.nxv4i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_b32u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn1.nxv4i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svtrn1_b32(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svtrn1_b32 + // CHECK-DAG: %[[OP1:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %op1) + // CHECK-DAG: %[[OP2:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1.nxv4i1( %[[OP1]], %[[OP2]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svtrn1_b32(op1, op2); } -// CHECK-LABEL: @test_svtrn1_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn1.nxv2i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn1_b64u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn1.nxv2i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svtrn1_b64(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svtrn1_b64 + // CHECK-DAG: %[[OP1:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %op1) + // CHECK-DAG: %[[OP2:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn1.nxv2i1( %[[OP1]], %[[OP2]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svtrn1_b64(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c index ce77ba79fecb..a23b5af5f506 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,18 +13,11 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svtrn2_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svtrn2_bf16u14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svtrn2_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svtrn2_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svtrn2_bf16'}} return SVE_ACLE_FUNC(svtrn2,_bf16,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c index 3d12cb358607..0ce57ce58aaa 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,17 +13,10 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svtrn2_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svtrn2_bf16u14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svtrn2_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svtrn2_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2q.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svtrn2q_bf16'}} return SVE_ACLE_FUNC(svtrn2q, _bf16, , )(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c index c119178410f4..bdec8cbf0af0 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2-fp64.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,156 +12,79 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svtrn2_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtrn2_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svtrn2_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svtrn2_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2q.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2q, _s8, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn2_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svtrn2_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svtrn2_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2q.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2q, _s16, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn2_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svtrn2_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svtrn2_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2q.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2q, _s32, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn2_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svtrn2_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svtrn2_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2q.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2q, _s64, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn2_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtrn2_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svtrn2_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svtrn2_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2q.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2q, _u8, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn2_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svtrn2_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svtrn2_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2q.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2q, _u16, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn2_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svtrn2_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svtrn2_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2q.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2q, _u32, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn2_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svtrn2_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svtrn2_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2q.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2q, _u64, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn2_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_f16u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svtrn2_f16(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svtrn2_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2q.nxv8f16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2q, _f16, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn2_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_f32u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svtrn2_f32(svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svtrn2_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2q.nxv4f32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2q, _f32, , )(op1, op2); } -// CHECK-LABEL: @test_svtrn2_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_f64u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svtrn2_f64(svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svtrn2_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2q.nxv2f64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2q, _f64, , )(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2.c index c4b3dab2a129..f45e4f5daf89 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_trn2.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,245 +13,131 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svtrn2_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtrn2_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svtrn2_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svtrn2_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2,_s8,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn2_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svtrn2_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svtrn2_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn2_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svtrn2_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svtrn2_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn2_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svtrn2_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svtrn2_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn2_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtrn2_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svtrn2_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svtrn2_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2,_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn2_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svtrn2_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svtrn2_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn2_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svtrn2_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svtrn2_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn2_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svtrn2_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svtrn2_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn2_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_f16u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svtrn2_f16(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svtrn2_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2.nxv8f16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2,_f16,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn2_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_f32u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svtrn2_f32(svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svtrn2_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2.nxv4f32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2,_f32,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn2_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_f64u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svtrn2_f64(svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svtrn2_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2.nxv2f64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtrn2,_f64,,)(op1, op2); } -// CHECK-LABEL: @test_svtrn2_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtrn2_b8u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.trn2.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svtrn2_b8(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svtrn2_b8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2.nxv16i1( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return svtrn2_b8(op1, op2); } -// CHECK-LABEL: @test_svtrn2_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn2.nxv8i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_b16u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn2.nxv8i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svtrn2_b16(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svtrn2_b16 + // CHECK-DAG: %[[OP1:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %op1) + // CHECK-DAG: %[[OP2:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2.nxv8i1( %[[OP1]], %[[OP2]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svtrn2_b16(op1, op2); } -// CHECK-LABEL: @test_svtrn2_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn2.nxv4i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_b32u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn2.nxv4i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svtrn2_b32(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svtrn2_b32 + // CHECK-DAG: %[[OP1:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %op1) + // CHECK-DAG: %[[OP2:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2.nxv4i1( %[[OP1]], %[[OP2]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svtrn2_b32(op1, op2); } -// CHECK-LABEL: @test_svtrn2_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn2.nxv2i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z15test_svtrn2_b64u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.trn2.nxv2i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svtrn2_b64(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svtrn2_b64 + // CHECK-DAG: %[[OP1:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %op1) + // CHECK-DAG: %[[OP2:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.trn2.nxv2i1( %[[OP1]], %[[OP2]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svtrn2_b64(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tsmul.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tsmul.c index 3971b9043b7d..80b59b8d1e42 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tsmul.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tsmul.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,47 +13,26 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svtsmul_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftsmul.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svtsmul_f16u13__SVFloat16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftsmul.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svtsmul_f16(svfloat16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svtsmul_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ftsmul.x.nxv8f16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtsmul,_f16,,)(op1, op2); } -// CHECK-LABEL: @test_svtsmul_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftsmul.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svtsmul_f32u13__SVFloat32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftsmul.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svtsmul_f32(svfloat32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svtsmul_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ftsmul.x.nxv4f32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtsmul,_f32,,)(op1, op2); } -// CHECK-LABEL: @test_svtsmul_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftsmul.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svtsmul_f64u13__SVFloat64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftsmul.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svtsmul_f64(svfloat64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svtsmul_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ftsmul.x.nxv2f64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtsmul,_f64,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tssel.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tssel.c index 07fce87d646f..33a789f41bb8 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tssel.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_tssel.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,47 +13,26 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svtssel_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftssel.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svtssel_f16u13__SVFloat16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftssel.x.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svtssel_f16(svfloat16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svtssel_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ftssel.x.nxv8f16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtssel,_f16,,)(op1, op2); } -// CHECK-LABEL: @test_svtssel_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftssel.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svtssel_f32u13__SVFloat32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftssel.x.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svtssel_f32(svfloat32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svtssel_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ftssel.x.nxv4f32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtssel,_f32,,)(op1, op2); } -// CHECK-LABEL: @test_svtssel_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftssel.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svtssel_f64u13__SVFloat64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ftssel.x.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svtssel_f64(svfloat64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svtssel_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ftssel.x.nxv2f64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svtssel,_f64,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef-bfloat.c index 6bacab64b374..47c7fb7bbcf2 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef-bfloat.c @@ -1,20 +1,13 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include -// CHECK-LABEL: @test_svundef_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef_bf16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svbfloat16_t test_svundef_bf16() { + // CHECK-LABEL: test_svundef_bf16 + // CHECK: ret undef // expected-warning@+1 {{implicit declaration of function 'svundef_bf16'}} return svundef_bf16(); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef.c index 70804395e3bb..5095c47557cb 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef.c @@ -1,149 +1,82 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include -// CHECK-LABEL: @test_svundef_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z15test_svundef_s8v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svint8_t test_svundef_s8() { + // CHECK-LABEL: test_svundef_s8 + // CHECK: ret undef return svundef_s8(); } -// CHECK-LABEL: @test_svundef_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z16test_svundef_s16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svint16_t test_svundef_s16() { + // CHECK-LABEL: test_svundef_s16 + // CHECK: ret undef return svundef_s16(); } -// CHECK-LABEL: @test_svundef_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z16test_svundef_s32v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svint32_t test_svundef_s32() { + // CHECK-LABEL: test_svundef_s32 + // CHECK: ret undef return svundef_s32(); } -// CHECK-LABEL: @test_svundef_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z16test_svundef_s64v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svint64_t test_svundef_s64() { + // CHECK-LABEL: test_svundef_s64 + // CHECK: ret undef return svundef_s64(); } -// CHECK-LABEL: @test_svundef_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z15test_svundef_u8v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svuint8_t test_svundef_u8() { + // CHECK-LABEL: test_svundef_u8 + // CHECK: ret undef return svundef_u8(); } -// CHECK-LABEL: @test_svundef_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z16test_svundef_u16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svuint16_t test_svundef_u16() { + // CHECK-LABEL: test_svundef_u16 + // CHECK: ret undef return svundef_u16(); } -// CHECK-LABEL: @test_svundef_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z16test_svundef_u32v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svuint32_t test_svundef_u32() { + // CHECK-LABEL: test_svundef_u32 + // CHECK: ret undef return svundef_u32(); } -// CHECK-LABEL: @test_svundef_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z16test_svundef_u64v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svuint64_t test_svundef_u64() { + // CHECK-LABEL: test_svundef_u64 + // CHECK: ret undef return svundef_u64(); } -// CHECK-LABEL: @test_svundef_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z16test_svundef_f16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svfloat16_t test_svundef_f16() { + // CHECK-LABEL: test_svundef_f16 + // CHECK: ret undef return svundef_f16(); } -// CHECK-LABEL: @test_svundef_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z16test_svundef_f32v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svfloat32_t test_svundef_f32() { + // CHECK-LABEL: test_svundef_f32 + // CHECK: ret undef return svundef_f32(); } -// CHECK-LABEL: @test_svundef_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z16test_svundef_f64v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svfloat64_t test_svundef_f64() { + // CHECK-LABEL: test_svundef_f64 + // CHECK: ret undef return svundef_f64(); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2-bfloat.c index 923c24cb08ce..62fb4f8f75aa 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2-bfloat.c @@ -1,20 +1,13 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include -// CHECK-LABEL: @test_svundef2_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z18test_svundef2_bf16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svbfloat16x2_t test_svundef2_bf16() { + // CHECK-LABEL: test_svundef2_bf16 + // CHECK: ret undef // expected-warning@+1 {{implicit declaration of function 'svundef2_bf16'}} return svundef2_bf16(); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2.c index 652295cba15b..e928b3c218f9 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef2.c @@ -1,148 +1,81 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O2 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O2 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include -// CHECK-LABEL: @test_svundef2_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z16test_svundef2_s8v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svint8x2_t test_svundef2_s8() { + // CHECK-LABEL: test_svundef2_s8 + // CHECK: ret undef return svundef2_s8(); } -// CHECK-LABEL: @test_svundef2_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef2_s16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svint16x2_t test_svundef2_s16() { + // CHECK-LABEL: test_svundef2_s16 + // CHECK: ret undef return svundef2_s16(); } -// CHECK-LABEL: @test_svundef2_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef2_s32v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svint32x2_t test_svundef2_s32() { + // CHECK-LABEL: test_svundef2_s32 + // CHECK: ret undef return svundef2_s32(); } -// CHECK-LABEL: @test_svundef2_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef2_s64v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svint64x2_t test_svundef2_s64() { + // CHECK-LABEL: test_svundef2_s64 + // CHECK: ret undef return svundef2_s64(); } -// CHECK-LABEL: @test_svundef2_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z16test_svundef2_u8v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svuint8x2_t test_svundef2_u8() { + // CHECK-LABEL: test_svundef2_u8 + // CHECK: ret undef return svundef2_u8(); } -// CHECK-LABEL: @test_svundef2_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef2_u16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svuint16x2_t test_svundef2_u16() { + // CHECK-LABEL: test_svundef2_u16 + // CHECK: ret undef return svundef2_u16(); } -// CHECK-LABEL: @test_svundef2_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef2_u32v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svuint32x2_t test_svundef2_u32() { + // CHECK-LABEL: test_svundef2_u32 + // CHECK: ret undef return svundef2_u32(); } -// CHECK-LABEL: @test_svundef2_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef2_u64v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svuint64x2_t test_svundef2_u64() { + // CHECK-LABEL: test_svundef2_u64 + // CHECK: ret undef return svundef2_u64(); } -// CHECK-LABEL: @test_svundef2_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef2_f16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svfloat16x2_t test_svundef2_f16() { + // CHECK-LABEL: test_svundef2_f16 + // CHECK: ret undef return svundef2_f16(); } -// CHECK-LABEL: @test_svundef2_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef2_f32v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svfloat32x2_t test_svundef2_f32() { + // CHECK-LABEL: test_svundef2_f32 + // CHECK: ret undef return svundef2_f32(); } -// CHECK-LABEL: @test_svundef2_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef2_f64v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svfloat64x2_t test_svundef2_f64() { + // CHECK-LABEL: test_svundef2_f64 + // CHECK: ret undef return svundef2_f64(); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3-bfloat.c index f5124fdea258..434c180b5909 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3-bfloat.c @@ -1,20 +1,13 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include -// CHECK-LABEL: @test_svundef3_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z18test_svundef3_bf16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svbfloat16x3_t test_svundef3_bf16() { + // CHECK-LABEL: test_svundef3_bf16 + // CHECK: ret undef // expected-warning@+1 {{implicit declaration of function 'svundef3_bf16'}} return svundef3_bf16(); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3.c index d9c3126be1ce..00165062585d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef3.c @@ -1,148 +1,81 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O2 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O2 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include -// CHECK-LABEL: @test_svundef3_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z16test_svundef3_s8v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svint8x3_t test_svundef3_s8() { + // CHECK-LABEL: test_svundef3_s8 + // CHECK: ret undef return svundef3_s8(); } -// CHECK-LABEL: @test_svundef3_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef3_s16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svint16x3_t test_svundef3_s16() { + // CHECK-LABEL: test_svundef3_s16 + // CHECK: ret undef return svundef3_s16(); } -// CHECK-LABEL: @test_svundef3_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef3_s32v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svint32x3_t test_svundef3_s32() { + // CHECK-LABEL: test_svundef3_s32 + // CHECK: ret undef return svundef3_s32(); } -// CHECK-LABEL: @test_svundef3_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef3_s64v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svint64x3_t test_svundef3_s64() { + // CHECK-LABEL: test_svundef3_s64 + // CHECK: ret undef return svundef3_s64(); } -// CHECK-LABEL: @test_svundef3_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z16test_svundef3_u8v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svuint8x3_t test_svundef3_u8() { + // CHECK-LABEL: test_svundef3_u8 + // CHECK: ret undef return svundef3_u8(); } -// CHECK-LABEL: @test_svundef3_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef3_u16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svuint16x3_t test_svundef3_u16() { + // CHECK-LABEL: test_svundef3_u16 + // CHECK: ret undef return svundef3_u16(); } -// CHECK-LABEL: @test_svundef3_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef3_u32v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svuint32x3_t test_svundef3_u32() { + // CHECK-LABEL: test_svundef3_u32 + // CHECK: ret undef return svundef3_u32(); } -// CHECK-LABEL: @test_svundef3_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef3_u64v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svuint64x3_t test_svundef3_u64() { + // CHECK-LABEL: test_svundef3_u64 + // CHECK: ret undef return svundef3_u64(); } -// CHECK-LABEL: @test_svundef3_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef3_f16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svfloat16x3_t test_svundef3_f16() { + // CHECK-LABEL: test_svundef3_f16 + // CHECK: ret undef return svundef3_f16(); } -// CHECK-LABEL: @test_svundef3_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef3_f32v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svfloat32x3_t test_svundef3_f32() { + // CHECK-LABEL: test_svundef3_f32 + // CHECK: ret undef return svundef3_f32(); } -// CHECK-LABEL: @test_svundef3_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef3_f64v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svfloat64x3_t test_svundef3_f64() { + // CHECK-LABEL: test_svundef3_f64 + // CHECK: ret undef return svundef3_f64(); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4-bfloat.c index 91f0264b1d82..07ec64a99d58 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4-bfloat.c @@ -1,20 +1,13 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include -// CHECK-LABEL: @test_svundef4_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z18test_svundef4_bf16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svbfloat16x4_t test_svundef4_bf16() { + // CHECK-LABEL: test_svundef4_bf16 + // CHECK: ret undef // expected-warning@+1 {{implicit declaration of function 'svundef4_bf16'}} return svundef4_bf16(); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4.c index 5e9db3999517..98dea16c8a7d 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_undef4.c @@ -1,148 +1,81 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O2 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O2 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O2 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include -// CHECK-LABEL: @test_svundef4_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z16test_svundef4_s8v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svint8x4_t test_svundef4_s8() { + // CHECK-LABEL: test_svundef4_s8 + // CHECK: ret undef return svundef4_s8(); } -// CHECK-LABEL: @test_svundef4_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef4_s16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svint16x4_t test_svundef4_s16() { + // CHECK-LABEL: test_svundef4_s16 + // CHECK: ret undef return svundef4_s16(); } -// CHECK-LABEL: @test_svundef4_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef4_s32v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svint32x4_t test_svundef4_s32() { + // CHECK-LABEL: test_svundef4_s32 + // CHECK: ret undef return svundef4_s32(); } -// CHECK-LABEL: @test_svundef4_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef4_s64v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svint64x4_t test_svundef4_s64() { + // CHECK-LABEL: test_svundef4_s64 + // CHECK: ret undef return svundef4_s64(); } -// CHECK-LABEL: @test_svundef4_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z16test_svundef4_u8v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svuint8x4_t test_svundef4_u8() { + // CHECK-LABEL: test_svundef4_u8 + // CHECK: ret undef return svundef4_u8(); } -// CHECK-LABEL: @test_svundef4_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef4_u16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svuint16x4_t test_svundef4_u16() { + // CHECK-LABEL: test_svundef4_u16 + // CHECK: ret undef return svundef4_u16(); } -// CHECK-LABEL: @test_svundef4_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef4_u32v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svuint32x4_t test_svundef4_u32() { + // CHECK-LABEL: test_svundef4_u32 + // CHECK: ret undef return svundef4_u32(); } -// CHECK-LABEL: @test_svundef4_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef4_u64v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svuint64x4_t test_svundef4_u64() { + // CHECK-LABEL: test_svundef4_u64 + // CHECK: ret undef return svundef4_u64(); } -// CHECK-LABEL: @test_svundef4_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef4_f16v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svfloat16x4_t test_svundef4_f16() { + // CHECK-LABEL: test_svundef4_f16 + // CHECK: ret undef return svundef4_f16(); } -// CHECK-LABEL: @test_svundef4_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef4_f32v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svfloat32x4_t test_svundef4_f32() { + // CHECK-LABEL: test_svundef4_f32 + // CHECK: ret undef return svundef4_f32(); } -// CHECK-LABEL: @test_svundef4_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: ret undef -// -// CPP-CHECK-LABEL: @_Z17test_svundef4_f64v( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: ret undef -// svfloat64x4_t test_svundef4_f64() { + // CHECK-LABEL: test_svundef4_f64 + // CHECK: ret undef return svundef4_f64(); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpkhi.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpkhi.c index 39768c06b301..c27f26a9ecdb 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpkhi.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpkhi.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,109 +13,59 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svunpkhi_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpkhi.nxv8i16( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svunpkhi_s16u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpkhi.nxv8i16( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svunpkhi_s16(svint8_t op) { + // CHECK-LABEL: test_svunpkhi_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sunpkhi.nxv8i16( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svunpkhi,_s16,,)(op); } -// CHECK-LABEL: @test_svunpkhi_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpkhi.nxv4i32( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svunpkhi_s32u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpkhi.nxv4i32( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svunpkhi_s32(svint16_t op) { + // CHECK-LABEL: test_svunpkhi_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sunpkhi.nxv4i32( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svunpkhi,_s32,,)(op); } -// CHECK-LABEL: @test_svunpkhi_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpkhi.nxv2i64( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svunpkhi_s64u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpkhi.nxv2i64( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svunpkhi_s64(svint32_t op) { + // CHECK-LABEL: test_svunpkhi_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sunpkhi.nxv2i64( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svunpkhi,_s64,,)(op); } -// CHECK-LABEL: @test_svunpkhi_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpkhi.nxv8i16( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svunpkhi_u16u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpkhi.nxv8i16( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svunpkhi_u16(svuint8_t op) { + // CHECK-LABEL: test_svunpkhi_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uunpkhi.nxv8i16( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svunpkhi,_u16,,)(op); } -// CHECK-LABEL: @test_svunpkhi_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpkhi.nxv4i32( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svunpkhi_u32u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpkhi.nxv4i32( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svunpkhi_u32(svuint16_t op) { + // CHECK-LABEL: test_svunpkhi_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uunpkhi.nxv4i32( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svunpkhi,_u32,,)(op); } -// CHECK-LABEL: @test_svunpkhi_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpkhi.nxv2i64( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svunpkhi_u64u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpkhi.nxv2i64( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svunpkhi_u64(svuint32_t op) { + // CHECK-LABEL: test_svunpkhi_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uunpkhi.nxv2i64( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svunpkhi,_u64,,)(op); } -// CHECK-LABEL: @test_svunpkhi_b( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.punpkhi.nxv16i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svunpkhi_bu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.punpkhi.nxv16i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svunpkhi_b(svbool_t op) { + // CHECK-LABEL: test_svunpkhi_b + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.punpkhi.nxv16i1( %op) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svunpkhi,_b,,)(op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpklo.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpklo.c index 23dba2eee4b5..adac7d9b3818 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpklo.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_unpklo.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,109 +13,59 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svunpklo_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpklo.nxv8i16( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svunpklo_s16u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpklo.nxv8i16( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svunpklo_s16(svint8_t op) { + // CHECK-LABEL: test_svunpklo_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sunpklo.nxv8i16( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svunpklo,_s16,,)(op); } -// CHECK-LABEL: @test_svunpklo_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpklo.nxv4i32( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svunpklo_s32u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpklo.nxv4i32( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svunpklo_s32(svint16_t op) { + // CHECK-LABEL: test_svunpklo_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sunpklo.nxv4i32( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svunpklo,_s32,,)(op); } -// CHECK-LABEL: @test_svunpklo_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpklo.nxv2i64( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svunpklo_s64u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sunpklo.nxv2i64( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svunpklo_s64(svint32_t op) { + // CHECK-LABEL: test_svunpklo_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sunpklo.nxv2i64( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svunpklo,_s64,,)(op); } -// CHECK-LABEL: @test_svunpklo_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpklo.nxv8i16( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svunpklo_u16u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpklo.nxv8i16( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svunpklo_u16(svuint8_t op) { + // CHECK-LABEL: test_svunpklo_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uunpklo.nxv8i16( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svunpklo,_u16,,)(op); } -// CHECK-LABEL: @test_svunpklo_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpklo.nxv4i32( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svunpklo_u32u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpklo.nxv4i32( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svunpklo_u32(svuint16_t op) { + // CHECK-LABEL: test_svunpklo_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uunpklo.nxv4i32( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svunpklo,_u32,,)(op); } -// CHECK-LABEL: @test_svunpklo_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpklo.nxv2i64( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svunpklo_u64u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uunpklo.nxv2i64( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svunpklo_u64(svuint32_t op) { + // CHECK-LABEL: test_svunpklo_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uunpklo.nxv2i64( %op) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svunpklo,_u64,,)(op); } -// CHECK-LABEL: @test_svunpklo_b( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.punpklo.nxv16i1( [[OP:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svunpklo_bu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.punpklo.nxv16i1( [[OP:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svunpklo_b(svbool_t op) { + // CHECK-LABEL: test_svunpklo_b + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.punpklo.nxv16i1( %op) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svunpklo,_b,,)(op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c index 0eefd34b490b..e77f509b22c3 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_usdot.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +i8mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +i8mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,88 +12,45 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svusdot_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svusdot_s32u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svusdot_s32(svint32_t x, svuint8_t y, svint8_t z) { + // CHECK-LABEL: test_svusdot_s32 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( %x, %y, %z) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusdot, _s32, , )(x, y, z); } -// CHECK-LABEL: @test_svusdot_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[Z:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svusdot_n_s32u11__SVInt32_tu11__SVUint8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[Z:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( [[X:%.*]], [[Y:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svusdot_n_s32(svint32_t x, svuint8_t y, int8_t z) { + // CHECK-LABEL: test_svusdot_n_s32 + // CHECK: %[[SPLAT:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %z) + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.nxv4i32( %x, %y, %[[SPLAT]]) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusdot, _n_s32, , )(x, y, z); } -// CHECK-LABEL: @test_svusdot_lane_s32_0( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svusdot_lane_s32_0u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svusdot_lane_s32_0(svint32_t x, svuint8_t y, svint8_t z) { + // CHECK-LABEL: test_svusdot_lane_s32_0 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( %x, %y, %z, i32 0) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusdot_lane, _s32, , )(x, y, z, 0); } -// CHECK-LABEL: @test_svusdot_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svusdot_lane_s32_1u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svusdot_lane_s32_1(svint32_t x, svuint8_t y, svint8_t z) { + // CHECK-LABEL: test_svusdot_lane_s32_1 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( %x, %y, %z, i32 1) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusdot_lane, _s32, , )(x, y, z, 1); } -// CHECK-LABEL: @test_svusdot_lane_s32_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svusdot_lane_s32_2u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 2) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svusdot_lane_s32_2(svint32_t x, svuint8_t y, svint8_t z) { + // CHECK-LABEL: test_svusdot_lane_s32_2 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( %x, %y, %z, i32 2) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusdot_lane, _s32, , )(x, y, z, 2); } -// CHECK-LABEL: @test_svusdot_lane_s32_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svusdot_lane_s32_3u11__SVInt32_tu11__SVUint8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( [[X:%.*]], [[Y:%.*]], [[Z:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svusdot_lane_s32_3(svint32_t x, svuint8_t y, svint8_t z) { + // CHECK-LABEL: test_svusdot_lane_s32_3 + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.usdot.lane.nxv4i32( %x, %y, %z, i32 3) + // CHECK: ret %[[RET]] return SVE_ACLE_FUNC(svusdot_lane, _s32, , )(x, y, z, 3); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c index 87942966b099..509f8b7efa61 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,18 +13,11 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svuzp1_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svuzp1_bf16u14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svuzp1_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svuzp1_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svuzp1_bf16'}} return SVE_ACLE_FUNC(svuzp1,_bf16,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c index ed78a746216c..838edb1cb0e2 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,17 +13,10 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svuzp1_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svuzp1_bf16u14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svuzp1_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svuzp1_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1q.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svuzp1q_bf16'}} return SVE_ACLE_FUNC(svuzp1q, _bf16, , )(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c index ef3a0de8759b..b4f1289441f4 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1-fp64.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,156 +12,79 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svuzp1_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svuzp1_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svuzp1_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svuzp1_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1q.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1q, _s8, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp1_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svuzp1_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svuzp1_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1q.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1q, _s16, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp1_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svuzp1_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svuzp1_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1q.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1q, _s32, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp1_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svuzp1_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svuzp1_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1q.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1q, _s64, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp1_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svuzp1_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svuzp1_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svuzp1_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1q.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1q, _u8, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp1_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svuzp1_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svuzp1_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1q.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1q, _u16, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp1_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svuzp1_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svuzp1_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1q.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1q, _u32, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp1_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svuzp1_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svuzp1_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1q.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1q, _u64, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp1_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_f16u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svuzp1_f16(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svuzp1_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1q.nxv8f16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1q, _f16, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp1_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_f32u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svuzp1_f32(svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svuzp1_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1q.nxv4f32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1q, _f32, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp1_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_f64u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svuzp1_f64(svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svuzp1_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1q.nxv2f64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1q, _f64, , )(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1.c index bf3f9a55cad6..53a2f3f8567c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp1.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,245 +13,131 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svuzp1_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svuzp1_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svuzp1_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svuzp1_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1,_s8,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp1_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svuzp1_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svuzp1_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp1_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svuzp1_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svuzp1_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp1_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svuzp1_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svuzp1_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp1_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svuzp1_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svuzp1_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svuzp1_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1,_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp1_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svuzp1_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svuzp1_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp1_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svuzp1_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svuzp1_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp1_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svuzp1_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svuzp1_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp1_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_f16u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svuzp1_f16(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svuzp1_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1.nxv8f16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1,_f16,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp1_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_f32u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svuzp1_f32(svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svuzp1_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1.nxv4f32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1,_f32,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp1_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_f64u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svuzp1_f64(svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svuzp1_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1.nxv2f64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp1,_f64,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp1_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svuzp1_b8u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp1.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svuzp1_b8(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svuzp1_b8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1.nxv16i1( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return svuzp1_b8(op1, op2); } -// CHECK-LABEL: @test_svuzp1_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_b16u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp1.nxv8i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svuzp1_b16(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svuzp1_b16 + // CHECK-DAG: %[[OP1:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %op1) + // CHECK-DAG: %[[OP2:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1.nxv8i1( %[[OP1]], %[[OP2]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svuzp1_b16(op1, op2); } -// CHECK-LABEL: @test_svuzp1_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp1.nxv4i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_b32u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp1.nxv4i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svuzp1_b32(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svuzp1_b32 + // CHECK-DAG: %[[OP1:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %op1) + // CHECK-DAG: %[[OP2:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1.nxv4i1( %[[OP1]], %[[OP2]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svuzp1_b32(op1, op2); } -// CHECK-LABEL: @test_svuzp1_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp1.nxv2i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp1_b64u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp1.nxv2i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svuzp1_b64(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svuzp1_b64 + // CHECK-DAG: %[[OP1:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %op1) + // CHECK-DAG: %[[OP2:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp1.nxv2i1( %[[OP1]], %[[OP2]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svuzp1_b64(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c index 9e324b20beba..6adb017443c0 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,18 +13,11 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svuzp2_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svuzp2_bf16u14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svuzp2_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svuzp2_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svuzp2_bf16'}} return SVE_ACLE_FUNC(svuzp2,_bf16,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c index b32409b58a92..372bc8882319 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,17 +13,10 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svuzp2_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svuzp2_bf16u14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svuzp2_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svuzp2_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2q.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svuzp2q_bf16'}} return SVE_ACLE_FUNC(svuzp2q, _bf16, , )(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c index 9b6fc7619e3c..fc53015551d1 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2-fp64.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,156 +12,79 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svuzp2_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svuzp2_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svuzp2_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svuzp2_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2q.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2q, _s8, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp2_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svuzp2_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svuzp2_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2q.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2q, _s16, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp2_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svuzp2_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svuzp2_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2q.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2q, _s32, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp2_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svuzp2_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svuzp2_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2q.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2q, _s64, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp2_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svuzp2_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svuzp2_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svuzp2_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2q.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2q, _u8, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp2_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svuzp2_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svuzp2_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2q.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2q, _u16, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp2_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svuzp2_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svuzp2_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2q.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2q, _u32, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp2_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svuzp2_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svuzp2_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2q.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2q, _u64, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp2_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_f16u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svuzp2_f16(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svuzp2_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2q.nxv8f16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2q, _f16, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp2_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_f32u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svuzp2_f32(svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svuzp2_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2q.nxv4f32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2q, _f32, , )(op1, op2); } -// CHECK-LABEL: @test_svuzp2_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_f64u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svuzp2_f64(svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svuzp2_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2q.nxv2f64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2q, _f64, , )(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2.c index e56eedf11dcd..d0a56563fc42 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_uzp2.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,245 +13,131 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svuzp2_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svuzp2_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svuzp2_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svuzp2_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2,_s8,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp2_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svuzp2_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svuzp2_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp2_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svuzp2_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svuzp2_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp2_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svuzp2_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svuzp2_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp2_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svuzp2_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svuzp2_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svuzp2_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2,_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp2_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svuzp2_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svuzp2_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp2_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svuzp2_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svuzp2_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp2_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svuzp2_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svuzp2_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp2_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_f16u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svuzp2_f16(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svuzp2_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2.nxv8f16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2,_f16,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp2_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_f32u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svuzp2_f32(svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svuzp2_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2.nxv4f32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2,_f32,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp2_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_f64u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svuzp2_f64(svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svuzp2_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2.nxv2f64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svuzp2,_f64,,)(op1, op2); } -// CHECK-LABEL: @test_svuzp2_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svuzp2_b8u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uzp2.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svuzp2_b8(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svuzp2_b8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2.nxv16i1( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return svuzp2_b8(op1, op2); } -// CHECK-LABEL: @test_svuzp2_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_b16u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp2.nxv8i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svuzp2_b16(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svuzp2_b16 + // CHECK-DAG: %[[OP1:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %op1) + // CHECK-DAG: %[[OP2:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2.nxv8i1( %[[OP1]], %[[OP2]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svuzp2_b16(op1, op2); } -// CHECK-LABEL: @test_svuzp2_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp2.nxv4i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_b32u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp2.nxv4i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svuzp2_b32(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svuzp2_b32 + // CHECK-DAG: %[[OP1:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %op1) + // CHECK-DAG: %[[OP2:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2.nxv4i1( %[[OP1]], %[[OP2]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svuzp2_b32(op1, op2); } -// CHECK-LABEL: @test_svuzp2_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp2.nxv2i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z15test_svuzp2_b64u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uzp2.nxv2i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svuzp2_b64(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svuzp2_b64 + // CHECK-DAG: %[[OP1:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %op1) + // CHECK-DAG: %[[OP2:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uzp2.nxv2i1( %[[OP1]], %[[OP2]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svuzp2_b64(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilele.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilele.c index da4781a5532d..55c4e526dd05 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilele.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilele.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,266 +13,142 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svwhilele_b8_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svwhilele_b8_s32ii( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilele_b8_s32(int32_t op1, int32_t op2) { + // CHECK-LABEL: test_svwhilele_b8_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilele.nxv16i1.i32(i32 %op1, i32 %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svwhilele_b8,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilele_b16_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilele_b16_s32ii( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilele_b16_s32(int32_t op1, int32_t op2) { + // CHECK-LABEL: test_svwhilele_b16_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilele.nxv8i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilele_b16,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilele_b32_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilele_b32_s32ii( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilele_b32_s32(int32_t op1, int32_t op2) { + // CHECK-LABEL: test_svwhilele_b32_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilele.nxv4i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilele_b32,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilele_b64_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilele_b64_s32ii( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilele_b64_s32(int32_t op1, int32_t op2) { + // CHECK-LABEL: test_svwhilele_b64_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilele.nxv2i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilele_b64,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilele_b8_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svwhilele_b8_u32jj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilele_b8_u32(uint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svwhilele_b8_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilels.nxv16i1.i32(i32 %op1, i32 %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svwhilele_b8,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilele_b16_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilele_b16_u32jj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilele_b16_u32(uint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svwhilele_b16_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilels.nxv8i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilele_b16,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilele_b32_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilele_b32_u32jj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilele_b32_u32(uint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svwhilele_b32_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilels.nxv4i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilele_b32,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilele_b64_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilele_b64_u32jj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilele_b64_u32(uint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svwhilele_b64_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilels.nxv2i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilele_b64,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilele_b8_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svwhilele_b8_s64ll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilele_b8_s64(int64_t op1, int64_t op2) { + // CHECK-LABEL: test_svwhilele_b8_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilele.nxv16i1.i64(i64 %op1, i64 %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svwhilele_b8,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilele_b16_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilele_b16_s64ll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilele_b16_s64(int64_t op1, int64_t op2) { + // CHECK-LABEL: test_svwhilele_b16_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilele.nxv8i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilele_b16,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilele_b32_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilele_b32_s64ll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilele_b32_s64(int64_t op1, int64_t op2) { + // CHECK-LABEL: test_svwhilele_b32_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilele.nxv4i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilele_b32,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilele_b64_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilele_b64_s64ll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilele.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilele_b64_s64(int64_t op1, int64_t op2) { + // CHECK-LABEL: test_svwhilele_b64_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilele.nxv2i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilele_b64,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilele_b8_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svwhilele_b8_u64mm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilele_b8_u64(uint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svwhilele_b8_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilels.nxv16i1.i64(i64 %op1, i64 %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svwhilele_b8,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilele_b16_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilele_b16_u64mm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilele_b16_u64(uint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svwhilele_b16_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilels.nxv8i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilele_b16,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilele_b32_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilele_b32_u64mm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilele_b32_u64(uint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svwhilele_b32_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilels.nxv4i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilele_b32,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilele_b64_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilele_b64_u64mm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilels.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilele_b64_u64(uint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svwhilele_b64_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilels.nxv2i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilele_b64,_u64,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilelt.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilelt.c index f0adc0c9a1fb..a8275ad7fdae 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilelt.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_whilelt.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,266 +13,142 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svwhilelt_b8_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svwhilelt_b8_s32ii( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilelt_b8_s32(int32_t op1, int32_t op2) { + // CHECK-LABEL: test_svwhilelt_b8_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilelt.nxv16i1.i32(i32 %op1, i32 %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svwhilelt_b8,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilelt_b16_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilelt_b16_s32ii( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilelt_b16_s32(int32_t op1, int32_t op2) { + // CHECK-LABEL: test_svwhilelt_b16_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilelt.nxv8i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilelt_b16,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilelt_b32_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilelt_b32_s32ii( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilelt_b32_s32(int32_t op1, int32_t op2) { + // CHECK-LABEL: test_svwhilelt_b32_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilelt.nxv4i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilelt_b32,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilelt_b64_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilelt_b64_s32ii( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilelt_b64_s32(int32_t op1, int32_t op2) { + // CHECK-LABEL: test_svwhilelt_b64_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilelt.nxv2i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilelt_b64,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilelt_b8_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svwhilelt_b8_u32jj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilelt_b8_u32(uint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svwhilelt_b8_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilelo.nxv16i1.i32(i32 %op1, i32 %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svwhilelt_b8,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilelt_b16_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilelt_b16_u32jj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilelt_b16_u32(uint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svwhilelt_b16_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilelo.nxv8i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilelt_b16,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilelt_b32_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilelt_b32_u32jj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilelt_b32_u32(uint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svwhilelt_b32_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilelo.nxv4i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilelt_b32,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilelt_b64_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilelt_b64_u32jj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilelt_b64_u32(uint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svwhilelt_b64_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilelo.nxv2i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilelt_b64,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilelt_b8_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svwhilelt_b8_s64ll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilelt_b8_s64(int64_t op1, int64_t op2) { + // CHECK-LABEL: test_svwhilelt_b8_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilelt.nxv16i1.i64(i64 %op1, i64 %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svwhilelt_b8,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilelt_b16_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilelt_b16_s64ll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilelt_b16_s64(int64_t op1, int64_t op2) { + // CHECK-LABEL: test_svwhilelt_b16_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilelt.nxv8i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilelt_b16,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilelt_b32_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilelt_b32_s64ll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilelt_b32_s64(int64_t op1, int64_t op2) { + // CHECK-LABEL: test_svwhilelt_b32_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilelt.nxv4i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilelt_b32,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilelt_b64_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilelt_b64_s64ll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelt.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilelt_b64_s64(int64_t op1, int64_t op2) { + // CHECK-LABEL: test_svwhilelt_b64_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilelt.nxv2i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilelt_b64,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilelt_b8_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svwhilelt_b8_u64mm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilelt_b8_u64(uint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svwhilelt_b8_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilelo.nxv16i1.i64(i64 %op1, i64 %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svwhilelt_b8,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilelt_b16_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilelt_b16_u64mm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilelt_b16_u64(uint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svwhilelt_b16_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilelo.nxv8i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilelt_b16,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilelt_b32_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilelt_b32_u64mm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilelt_b32_u64(uint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svwhilelt_b32_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilelo.nxv4i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilelt_b32,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilelt_b64_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilelt_b64_u64mm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilelo.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilelt_b64_u64(uint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svwhilelt_b64_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilelo.nxv2i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return SVE_ACLE_FUNC(svwhilelt_b64,_u64,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c index a1e3ae0f0d9c..ea9ae5ddb1dc 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_wrffr.c @@ -1,21 +1,13 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o /dev/null %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -o - %s >/dev/null #include -// CHECK-LABEL: @test_svwrffr( -// CHECK-NEXT: entry: -// CHECK-NEXT: call void @llvm.aarch64.sve.wrffr( [[OP:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z12test_svwrffru10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.wrffr( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svwrffr(svbool_t op) { + // CHECK-LABEL: test_svwrffr + // CHECK: call void @llvm.aarch64.sve.wrffr( %op) + // CHECK: ret void svwrffr(op); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c index cec3a2af1708..7bcf840e542c 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,18 +13,11 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svzip1_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svzip1_bf16u14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svzip1_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svzip1_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svzip1_bf16'}} return SVE_ACLE_FUNC(svzip1,_bf16,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c index 17a9407ed09e..218e8413454a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,17 +13,10 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svzip1_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svzip1_bf16u14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svzip1_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svzip1_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1q.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svzip1q_bf16'}} return SVE_ACLE_FUNC(svzip1q, _bf16, , )(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c index 49da35c0cedd..88ec67c309e1 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1-fp64.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,156 +12,79 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svzip1_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svzip1_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svzip1_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svzip1_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1q.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1q, _s8, , )(op1, op2); } -// CHECK-LABEL: @test_svzip1_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svzip1_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svzip1_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1q.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1q, _s16, , )(op1, op2); } -// CHECK-LABEL: @test_svzip1_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svzip1_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svzip1_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1q.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1q, _s32, , )(op1, op2); } -// CHECK-LABEL: @test_svzip1_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svzip1_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svzip1_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1q.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1q, _s64, , )(op1, op2); } -// CHECK-LABEL: @test_svzip1_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svzip1_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svzip1_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svzip1_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1q.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1q, _u8, , )(op1, op2); } -// CHECK-LABEL: @test_svzip1_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svzip1_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svzip1_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1q.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1q, _u16, , )(op1, op2); } -// CHECK-LABEL: @test_svzip1_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svzip1_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svzip1_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1q.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1q, _u32, , )(op1, op2); } -// CHECK-LABEL: @test_svzip1_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svzip1_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svzip1_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1q.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1q, _u64, , )(op1, op2); } -// CHECK-LABEL: @test_svzip1_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_f16u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svzip1_f16(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svzip1_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1q.nxv8f16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1q, _f16, , )(op1, op2); } -// CHECK-LABEL: @test_svzip1_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_f32u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svzip1_f32(svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svzip1_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1q.nxv4f32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1q, _f32, , )(op1, op2); } -// CHECK-LABEL: @test_svzip1_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_f64u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svzip1_f64(svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svzip1_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1q.nxv2f64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1q, _f64, , )(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1.c index ca98f6fdce1e..dbd648994535 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip1.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,245 +13,131 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svzip1_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svzip1_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svzip1_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svzip1_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1,_s8,,)(op1, op2); } -// CHECK-LABEL: @test_svzip1_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svzip1_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svzip1_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svzip1_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svzip1_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svzip1_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svzip1_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svzip1_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svzip1_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svzip1_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svzip1_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svzip1_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svzip1_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1,_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svzip1_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svzip1_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svzip1_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svzip1_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svzip1_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svzip1_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svzip1_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svzip1_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svzip1_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svzip1_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_f16u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svzip1_f16(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svzip1_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1.nxv8f16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1,_f16,,)(op1, op2); } -// CHECK-LABEL: @test_svzip1_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_f32u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svzip1_f32(svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svzip1_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1.nxv4f32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1,_f32,,)(op1, op2); } -// CHECK-LABEL: @test_svzip1_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_f64u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svzip1_f64(svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svzip1_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1.nxv2f64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip1,_f64,,)(op1, op2); } -// CHECK-LABEL: @test_svzip1_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svzip1_b8u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip1.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svzip1_b8(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svzip1_b8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1.nxv16i1( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return svzip1_b8(op1, op2); } -// CHECK-LABEL: @test_svzip1_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip1.nxv8i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_b16u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip1.nxv8i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svzip1_b16(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svzip1_b16 + // CHECK-DAG: %[[OP1:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %op1) + // CHECK-DAG: %[[OP2:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1.nxv8i1( %[[OP1]], %[[OP2]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svzip1_b16(op1, op2); } -// CHECK-LABEL: @test_svzip1_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip1.nxv4i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_b32u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip1.nxv4i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svzip1_b32(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svzip1_b32 + // CHECK-DAG: %[[OP1:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %op1) + // CHECK-DAG: %[[OP2:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1.nxv4i1( %[[OP1]], %[[OP2]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svzip1_b32(op1, op2); } -// CHECK-LABEL: @test_svzip1_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip1.nxv2i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip1_b64u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip1.nxv2i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svzip1_b64(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svzip1_b64 + // CHECK-DAG: %[[OP1:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %op1) + // CHECK-DAG: %[[OP2:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip1.nxv2i1( %[[OP1]], %[[OP2]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svzip1_b64(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c index 4f72d855f52a..c86a0e518c5b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,18 +13,11 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svzip2_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svzip2_bf16u14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svzip2_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svzip2_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svzip2_bf16'}} return SVE_ACLE_FUNC(svzip2,_bf16,,)(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c index 531e2728bb3b..626324f0e32a 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,17 +13,10 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svzip2_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svzip2_bf16u14__SVBFloat16_tu14__SVBFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv8bf16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svzip2_bf16(svbfloat16_t op1, svbfloat16_t op2) { + // CHECK-LABEL: test_svzip2_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2q.nxv8bf16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svzip2q_bf16'}} return SVE_ACLE_FUNC(svzip2q, _bf16, , )(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c index c10c375c31ef..f4ff36c2ee6b 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2-fp64.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -target-feature +f64mm -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s #include @@ -13,156 +12,79 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svzip2_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svzip2_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svzip2_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svzip2_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2q.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2q, _s8, , )(op1, op2); } -// CHECK-LABEL: @test_svzip2_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svzip2_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svzip2_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2q.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2q, _s16, , )(op1, op2); } -// CHECK-LABEL: @test_svzip2_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svzip2_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svzip2_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2q.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2q, _s32, , )(op1, op2); } -// CHECK-LABEL: @test_svzip2_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svzip2_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svzip2_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2q.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2q, _s64, , )(op1, op2); } -// CHECK-LABEL: @test_svzip2_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svzip2_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svzip2_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svzip2_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2q.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2q, _u8, , )(op1, op2); } -// CHECK-LABEL: @test_svzip2_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svzip2_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svzip2_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2q.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2q, _u16, , )(op1, op2); } -// CHECK-LABEL: @test_svzip2_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svzip2_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svzip2_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2q.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2q, _u32, , )(op1, op2); } -// CHECK-LABEL: @test_svzip2_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svzip2_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svzip2_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2q.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2q, _u64, , )(op1, op2); } -// CHECK-LABEL: @test_svzip2_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_f16u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svzip2_f16(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svzip2_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2q.nxv8f16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2q, _f16, , )(op1, op2); } -// CHECK-LABEL: @test_svzip2_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_f32u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svzip2_f32(svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svzip2_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2q.nxv4f32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2q, _f32, , )(op1, op2); } -// CHECK-LABEL: @test_svzip2_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_f64u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2q.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svzip2_f64(svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svzip2_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2q.nxv2f64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2q, _f64, , )(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2.c b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2.c index 25676f9f10a9..839429246d65 100644 --- a/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2.c +++ b/clang/test/CodeGen/aarch64-sve-intrinsics/acle_sve_zip2.c @@ -1,10 +1,9 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o /dev/null %s +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -S -O1 -Werror -o - %s >/dev/null #include #ifdef SVE_OVERLOADED_FORMS @@ -14,245 +13,131 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svzip2_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svzip2_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svzip2_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svzip2_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2,_s8,,)(op1, op2); } -// CHECK-LABEL: @test_svzip2_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svzip2_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svzip2_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svzip2_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svzip2_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svzip2_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svzip2_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svzip2_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svzip2_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svzip2_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svzip2_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svzip2_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svzip2_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2,_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svzip2_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svzip2_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svzip2_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svzip2_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svzip2_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svzip2_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svzip2_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svzip2_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svzip2_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svzip2_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_f16u13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv8f16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svzip2_f16(svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svzip2_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2.nxv8f16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2,_f16,,)(op1, op2); } -// CHECK-LABEL: @test_svzip2_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_f32u13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv4f32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svzip2_f32(svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svzip2_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2.nxv4f32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2,_f32,,)(op1, op2); } -// CHECK-LABEL: @test_svzip2_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_f64u13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv2f64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svzip2_f64(svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svzip2_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2.nxv2f64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return SVE_ACLE_FUNC(svzip2,_f64,,)(op1, op2); } -// CHECK-LABEL: @test_svzip2_b8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svzip2_b8u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.zip2.nxv16i1( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svzip2_b8(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svzip2_b8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2.nxv16i1( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] return svzip2_b8(op1, op2); } -// CHECK-LABEL: @test_svzip2_b16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip2.nxv8i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_b16u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip2.nxv8i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svzip2_b16(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svzip2_b16 + // CHECK-DAG: %[[OP1:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %op1) + // CHECK-DAG: %[[OP2:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2.nxv8i1( %[[OP1]], %[[OP2]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svzip2_b16(op1, op2); } -// CHECK-LABEL: @test_svzip2_b32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip2.nxv4i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_b32u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip2.nxv4i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svzip2_b32(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svzip2_b32 + // CHECK-DAG: %[[OP1:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %op1) + // CHECK-DAG: %[[OP2:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2.nxv4i1( %[[OP1]], %[[OP2]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svzip2_b32(op1, op2); } -// CHECK-LABEL: @test_svzip2_b64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip2.nxv2i1( [[TMP0]], [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z15test_svzip2_b64u10__SVBool_tu10__SVBool_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP1:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.zip2.nxv2i1( [[TMP0]], [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP2]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svbool_t test_svzip2_b64(svbool_t op1, svbool_t op2) { + // CHECK-LABEL: test_svzip2_b64 + // CHECK-DAG: %[[OP1:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %op1) + // CHECK-DAG: %[[OP2:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.zip2.nxv2i1( %[[OP1]], %[[OP2]]) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] return svzip2_b64(op1, op2); } diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c index 64b2a1434652..57ef110e0920 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aba.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,289 +14,169 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svaba_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svaba_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svaba_s8(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svaba_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saba.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaba'}} // expected-warning@+1 {{implicit declaration of function 'svaba_s8'}} return SVE_ACLE_FUNC(svaba,_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaba_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svaba_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svaba_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svaba_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saba.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaba'}} // expected-warning@+1 {{implicit declaration of function 'svaba_s16'}} return SVE_ACLE_FUNC(svaba,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaba_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svaba_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svaba_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svaba_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saba.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaba'}} // expected-warning@+1 {{implicit declaration of function 'svaba_s32'}} return SVE_ACLE_FUNC(svaba,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaba_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svaba_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svaba_s64(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svaba_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saba.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaba'}} // expected-warning@+1 {{implicit declaration of function 'svaba_s64'}} return SVE_ACLE_FUNC(svaba,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaba_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svaba_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svaba_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svaba_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaba.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaba'}} // expected-warning@+1 {{implicit declaration of function 'svaba_u8'}} return SVE_ACLE_FUNC(svaba,_u8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaba_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svaba_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svaba_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svaba_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaba.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaba'}} // expected-warning@+1 {{implicit declaration of function 'svaba_u16'}} return SVE_ACLE_FUNC(svaba,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaba_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svaba_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svaba_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svaba_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaba.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaba'}} // expected-warning@+1 {{implicit declaration of function 'svaba_u32'}} return SVE_ACLE_FUNC(svaba,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaba_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svaba_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svaba_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svaba_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaba.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaba'}} // expected-warning@+1 {{implicit declaration of function 'svaba_u64'}} return SVE_ACLE_FUNC(svaba,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaba_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svaba_n_s8u10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svaba_n_s8(svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svaba_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saba.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaba'}} // expected-warning@+1 {{implicit declaration of function 'svaba_n_s8'}} return SVE_ACLE_FUNC(svaba,_n_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaba_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svaba_n_s16u11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svaba_n_s16(svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svaba_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saba.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaba'}} // expected-warning@+1 {{implicit declaration of function 'svaba_n_s16'}} return SVE_ACLE_FUNC(svaba,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaba_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svaba_n_s32u11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svaba_n_s32(svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svaba_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saba.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaba'}} // expected-warning@+1 {{implicit declaration of function 'svaba_n_s32'}} return SVE_ACLE_FUNC(svaba,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaba_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svaba_n_s64u11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svaba_n_s64(svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svaba_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saba.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaba'}} // expected-warning@+1 {{implicit declaration of function 'svaba_n_s64'}} return SVE_ACLE_FUNC(svaba,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaba_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svaba_n_u8u11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svaba_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svaba_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaba.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaba'}} // expected-warning@+1 {{implicit declaration of function 'svaba_n_u8'}} return SVE_ACLE_FUNC(svaba,_n_u8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaba_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svaba_n_u16u12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svaba_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svaba_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaba.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaba'}} // expected-warning@+1 {{implicit declaration of function 'svaba_n_u16'}} return SVE_ACLE_FUNC(svaba,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaba_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svaba_n_u32u12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svaba_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svaba_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaba.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaba'}} // expected-warning@+1 {{implicit declaration of function 'svaba_n_u32'}} return SVE_ACLE_FUNC(svaba,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaba_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svaba_n_u64u12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaba.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svaba_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svaba_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaba.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaba'}} // expected-warning@+1 {{implicit declaration of function 'svaba_n_u64'}} return SVE_ACLE_FUNC(svaba,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c index fcb0eedd6be4..28f4d38f81f1 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svabalb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabalb_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svabalb_s16(svint16_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svabalb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabalb.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalb'}} // expected-warning@+1 {{implicit declaration of function 'svabalb_s16'}} return SVE_ACLE_FUNC(svabalb,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabalb_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svabalb_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svabalb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabalb.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalb'}} // expected-warning@+1 {{implicit declaration of function 'svabalb_s32'}} return SVE_ACLE_FUNC(svabalb,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabalb_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svabalb_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svabalb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabalb.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalb'}} // expected-warning@+1 {{implicit declaration of function 'svabalb_s64'}} return SVE_ACLE_FUNC(svabalb,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabalb_u16u12__SVUint16_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svabalb_u16(svuint16_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svabalb_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabalb.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalb'}} // expected-warning@+1 {{implicit declaration of function 'svabalb_u16'}} return SVE_ACLE_FUNC(svabalb,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabalb_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svabalb_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svabalb_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabalb.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalb'}} // expected-warning@+1 {{implicit declaration of function 'svabalb_u32'}} return SVE_ACLE_FUNC(svabalb,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabalb_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svabalb_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svabalb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabalb.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalb'}} // expected-warning@+1 {{implicit declaration of function 'svabalb_u64'}} return SVE_ACLE_FUNC(svabalb,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabalb_n_s16u11__SVInt16_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svabalb_n_s16(svint16_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svabalb_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabalb.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalb'}} // expected-warning@+1 {{implicit declaration of function 'svabalb_n_s16'}} return SVE_ACLE_FUNC(svabalb,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabalb_n_s32u11__SVInt32_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svabalb_n_s32(svint32_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svabalb_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabalb.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalb'}} // expected-warning@+1 {{implicit declaration of function 'svabalb_n_s32'}} return SVE_ACLE_FUNC(svabalb,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabalb_n_s64u11__SVInt64_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svabalb_n_s64(svint64_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svabalb_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabalb.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalb'}} // expected-warning@+1 {{implicit declaration of function 'svabalb_n_s64'}} return SVE_ACLE_FUNC(svabalb,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabalb_n_u16u12__SVUint16_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svabalb_n_u16(svuint16_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svabalb_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabalb.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalb'}} // expected-warning@+1 {{implicit declaration of function 'svabalb_n_u16'}} return SVE_ACLE_FUNC(svabalb,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabalb_n_u32u12__SVUint32_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svabalb_n_u32(svuint32_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svabalb_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabalb.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalb'}} // expected-warning@+1 {{implicit declaration of function 'svabalb_n_u32'}} return SVE_ACLE_FUNC(svabalb,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabalb_n_u64u12__SVUint64_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svabalb_n_u64(svuint64_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svabalb_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabalb.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalb'}} // expected-warning@+1 {{implicit declaration of function 'svabalb_n_u64'}} return SVE_ACLE_FUNC(svabalb,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c index 246f84b2273b..fb281da93b0d 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abalt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svabalt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabalt_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svabalt_s16(svint16_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svabalt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabalt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalt'}} // expected-warning@+1 {{implicit declaration of function 'svabalt_s16'}} return SVE_ACLE_FUNC(svabalt,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabalt_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svabalt_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svabalt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabalt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalt'}} // expected-warning@+1 {{implicit declaration of function 'svabalt_s32'}} return SVE_ACLE_FUNC(svabalt,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabalt_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svabalt_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svabalt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabalt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalt'}} // expected-warning@+1 {{implicit declaration of function 'svabalt_s64'}} return SVE_ACLE_FUNC(svabalt,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabalt_u16u12__SVUint16_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svabalt_u16(svuint16_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svabalt_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabalt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalt'}} // expected-warning@+1 {{implicit declaration of function 'svabalt_u16'}} return SVE_ACLE_FUNC(svabalt,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabalt_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svabalt_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svabalt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabalt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalt'}} // expected-warning@+1 {{implicit declaration of function 'svabalt_u32'}} return SVE_ACLE_FUNC(svabalt,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabalt_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svabalt_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svabalt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabalt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalt'}} // expected-warning@+1 {{implicit declaration of function 'svabalt_u64'}} return SVE_ACLE_FUNC(svabalt,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabalt_n_s16u11__SVInt16_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svabalt_n_s16(svint16_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svabalt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabalt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalt'}} // expected-warning@+1 {{implicit declaration of function 'svabalt_n_s16'}} return SVE_ACLE_FUNC(svabalt,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabalt_n_s32u11__SVInt32_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svabalt_n_s32(svint32_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svabalt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabalt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalt'}} // expected-warning@+1 {{implicit declaration of function 'svabalt_n_s32'}} return SVE_ACLE_FUNC(svabalt,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabalt_n_s64u11__SVInt64_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svabalt_n_s64(svint64_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svabalt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabalt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalt'}} // expected-warning@+1 {{implicit declaration of function 'svabalt_n_s64'}} return SVE_ACLE_FUNC(svabalt,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabalt_n_u16u12__SVUint16_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svabalt_n_u16(svuint16_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svabalt_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabalt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalt'}} // expected-warning@+1 {{implicit declaration of function 'svabalt_n_u16'}} return SVE_ACLE_FUNC(svabalt,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabalt_n_u32u12__SVUint32_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svabalt_n_u32(svuint32_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svabalt_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabalt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalt'}} // expected-warning@+1 {{implicit declaration of function 'svabalt_n_u32'}} return SVE_ACLE_FUNC(svabalt,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svabalt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabalt_n_u64u12__SVUint64_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svabalt_n_u64(svuint64_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svabalt_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabalt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabalt'}} // expected-warning@+1 {{implicit declaration of function 'svabalt_n_u64'}} return SVE_ACLE_FUNC(svabalt,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c index d91398c81dec..1c59ec6110a5 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svabdlb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabdlb_s16u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svabdlb_s16(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svabdlb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabdlb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlb'}} // expected-warning@+1 {{implicit declaration of function 'svabdlb_s16'}} return SVE_ACLE_FUNC(svabdlb,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabdlb_s32u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svabdlb_s32(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svabdlb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabdlb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlb'}} // expected-warning@+1 {{implicit declaration of function 'svabdlb_s32'}} return SVE_ACLE_FUNC(svabdlb,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabdlb_s64u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svabdlb_s64(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svabdlb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabdlb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlb'}} // expected-warning@+1 {{implicit declaration of function 'svabdlb_s64'}} return SVE_ACLE_FUNC(svabdlb,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabdlb_u16u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svabdlb_u16(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svabdlb_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabdlb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlb'}} // expected-warning@+1 {{implicit declaration of function 'svabdlb_u16'}} return SVE_ACLE_FUNC(svabdlb,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabdlb_u32u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svabdlb_u32(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svabdlb_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabdlb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlb'}} // expected-warning@+1 {{implicit declaration of function 'svabdlb_u32'}} return SVE_ACLE_FUNC(svabdlb,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabdlb_u64u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svabdlb_u64(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svabdlb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabdlb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlb'}} // expected-warning@+1 {{implicit declaration of function 'svabdlb_u64'}} return SVE_ACLE_FUNC(svabdlb,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabdlb_n_s16u10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svabdlb_n_s16(svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svabdlb_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabdlb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlb'}} // expected-warning@+1 {{implicit declaration of function 'svabdlb_n_s16'}} return SVE_ACLE_FUNC(svabdlb,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabdlb_n_s32u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svabdlb_n_s32(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svabdlb_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabdlb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlb'}} // expected-warning@+1 {{implicit declaration of function 'svabdlb_n_s32'}} return SVE_ACLE_FUNC(svabdlb,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabdlb_n_s64u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svabdlb_n_s64(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svabdlb_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabdlb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlb'}} // expected-warning@+1 {{implicit declaration of function 'svabdlb_n_s64'}} return SVE_ACLE_FUNC(svabdlb,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabdlb_n_u16u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svabdlb_n_u16(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svabdlb_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabdlb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlb'}} // expected-warning@+1 {{implicit declaration of function 'svabdlb_n_u16'}} return SVE_ACLE_FUNC(svabdlb,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabdlb_n_u32u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svabdlb_n_u32(svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svabdlb_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabdlb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlb'}} // expected-warning@+1 {{implicit declaration of function 'svabdlb_n_u32'}} return SVE_ACLE_FUNC(svabdlb,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabdlb_n_u64u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svabdlb_n_u64(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svabdlb_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabdlb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlb'}} // expected-warning@+1 {{implicit declaration of function 'svabdlb_n_u64'}} return SVE_ACLE_FUNC(svabdlb,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c index 491ac415dde2..ed5a692d94a2 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_abdlt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svabdlt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabdlt_s16u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svabdlt_s16(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svabdlt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabdlt.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlt'}} // expected-warning@+1 {{implicit declaration of function 'svabdlt_s16'}} return SVE_ACLE_FUNC(svabdlt,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabdlt_s32u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svabdlt_s32(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svabdlt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabdlt.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlt'}} // expected-warning@+1 {{implicit declaration of function 'svabdlt_s32'}} return SVE_ACLE_FUNC(svabdlt,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabdlt_s64u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svabdlt_s64(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svabdlt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabdlt.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlt'}} // expected-warning@+1 {{implicit declaration of function 'svabdlt_s64'}} return SVE_ACLE_FUNC(svabdlt,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabdlt_u16u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svabdlt_u16(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svabdlt_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabdlt.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlt'}} // expected-warning@+1 {{implicit declaration of function 'svabdlt_u16'}} return SVE_ACLE_FUNC(svabdlt,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabdlt_u32u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svabdlt_u32(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svabdlt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabdlt.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlt'}} // expected-warning@+1 {{implicit declaration of function 'svabdlt_u32'}} return SVE_ACLE_FUNC(svabdlt,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svabdlt_u64u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svabdlt_u64(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svabdlt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabdlt.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlt'}} // expected-warning@+1 {{implicit declaration of function 'svabdlt_u64'}} return SVE_ACLE_FUNC(svabdlt,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabdlt_n_s16u10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svabdlt_n_s16(svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svabdlt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabdlt.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlt'}} // expected-warning@+1 {{implicit declaration of function 'svabdlt_n_s16'}} return SVE_ACLE_FUNC(svabdlt,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabdlt_n_s32u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svabdlt_n_s32(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svabdlt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabdlt.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlt'}} // expected-warning@+1 {{implicit declaration of function 'svabdlt_n_s32'}} return SVE_ACLE_FUNC(svabdlt,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabdlt_n_s64u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sabdlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svabdlt_n_s64(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svabdlt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sabdlt.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlt'}} // expected-warning@+1 {{implicit declaration of function 'svabdlt_n_s64'}} return SVE_ACLE_FUNC(svabdlt,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabdlt_n_u16u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svabdlt_n_u16(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svabdlt_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabdlt.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlt'}} // expected-warning@+1 {{implicit declaration of function 'svabdlt_n_u16'}} return SVE_ACLE_FUNC(svabdlt,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabdlt_n_u32u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svabdlt_n_u32(svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svabdlt_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabdlt.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlt'}} // expected-warning@+1 {{implicit declaration of function 'svabdlt_n_u32'}} return SVE_ACLE_FUNC(svabdlt,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svabdlt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svabdlt_n_u64u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uabdlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svabdlt_n_u64(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svabdlt_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uabdlt.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svabdlt'}} // expected-warning@+1 {{implicit declaration of function 'svabdlt_n_u64'}} return SVE_ACLE_FUNC(svabdlt,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adalp.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adalp.c index 123880b71591..31f4d4a74347 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adalp.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adalp.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,355 +14,205 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svadalp_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sadalp.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadalp_s16_zu10__SVBool_tu11__SVInt16_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sadalp.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svadalp_s16_z(svbool_t pg, svint16_t op1, svint8_t op2) { + // CHECK-LABEL: test_svadalp_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sadalp.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadalp_z'}} // expected-warning@+1 {{implicit declaration of function 'svadalp_s16_z'}} return SVE_ACLE_FUNC(svadalp,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadalp_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sadalp.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadalp_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sadalp.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svadalp_s32_z(svbool_t pg, svint32_t op1, svint16_t op2) { + // CHECK-LABEL: test_svadalp_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sadalp.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadalp_z'}} // expected-warning@+1 {{implicit declaration of function 'svadalp_s32_z'}} return SVE_ACLE_FUNC(svadalp,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadalp_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sadalp.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadalp_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sadalp.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svadalp_s64_z(svbool_t pg, svint64_t op1, svint32_t op2) { + // CHECK-LABEL: test_svadalp_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sadalp.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadalp_z'}} // expected-warning@+1 {{implicit declaration of function 'svadalp_s64_z'}} return SVE_ACLE_FUNC(svadalp,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadalp_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uadalp.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadalp_u16_zu10__SVBool_tu12__SVUint16_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uadalp.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svadalp_u16_z(svbool_t pg, svuint16_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svadalp_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uadalp.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadalp_z'}} // expected-warning@+1 {{implicit declaration of function 'svadalp_u16_z'}} return SVE_ACLE_FUNC(svadalp,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadalp_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uadalp.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadalp_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uadalp.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svadalp_u32_z(svbool_t pg, svuint32_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svadalp_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uadalp.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadalp_z'}} // expected-warning@+1 {{implicit declaration of function 'svadalp_u32_z'}} return SVE_ACLE_FUNC(svadalp,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadalp_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uadalp.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svadalp_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uadalp.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svadalp_u64_z(svbool_t pg, svuint64_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svadalp_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uadalp.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadalp_z'}} // expected-warning@+1 {{implicit declaration of function 'svadalp_u64_z'}} return SVE_ACLE_FUNC(svadalp,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadalp_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svadalp_s16_mu10__SVBool_tu11__SVInt16_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svadalp_s16_m(svbool_t pg, svint16_t op1, svint8_t op2) { + // CHECK-LABEL: test_svadalp_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sadalp.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadalp_m'}} // expected-warning@+1 {{implicit declaration of function 'svadalp_s16_m'}} return SVE_ACLE_FUNC(svadalp,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadalp_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svadalp_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svadalp_s32_m(svbool_t pg, svint32_t op1, svint16_t op2) { + // CHECK-LABEL: test_svadalp_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sadalp.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadalp_m'}} // expected-warning@+1 {{implicit declaration of function 'svadalp_s32_m'}} return SVE_ACLE_FUNC(svadalp,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadalp_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svadalp_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svadalp_s64_m(svbool_t pg, svint64_t op1, svint32_t op2) { + // CHECK-LABEL: test_svadalp_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sadalp.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadalp_m'}} // expected-warning@+1 {{implicit declaration of function 'svadalp_s64_m'}} return SVE_ACLE_FUNC(svadalp,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadalp_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svadalp_u16_mu10__SVBool_tu12__SVUint16_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svadalp_u16_m(svbool_t pg, svuint16_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svadalp_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uadalp.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadalp_m'}} // expected-warning@+1 {{implicit declaration of function 'svadalp_u16_m'}} return SVE_ACLE_FUNC(svadalp,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadalp_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svadalp_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svadalp_u32_m(svbool_t pg, svuint32_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svadalp_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uadalp.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadalp_m'}} // expected-warning@+1 {{implicit declaration of function 'svadalp_u32_m'}} return SVE_ACLE_FUNC(svadalp,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadalp_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svadalp_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svadalp_u64_m(svbool_t pg, svuint64_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svadalp_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uadalp.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadalp_m'}} // expected-warning@+1 {{implicit declaration of function 'svadalp_u64_m'}} return SVE_ACLE_FUNC(svadalp,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadalp_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svadalp_s16_xu10__SVBool_tu11__SVInt16_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svadalp_s16_x(svbool_t pg, svint16_t op1, svint8_t op2) { + // CHECK-LABEL: test_svadalp_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sadalp.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadalp_x'}} // expected-warning@+1 {{implicit declaration of function 'svadalp_s16_x'}} return SVE_ACLE_FUNC(svadalp,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadalp_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svadalp_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svadalp_s32_x(svbool_t pg, svint32_t op1, svint16_t op2) { + // CHECK-LABEL: test_svadalp_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sadalp.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadalp_x'}} // expected-warning@+1 {{implicit declaration of function 'svadalp_s32_x'}} return SVE_ACLE_FUNC(svadalp,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadalp_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svadalp_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svadalp_s64_x(svbool_t pg, svint64_t op1, svint32_t op2) { + // CHECK-LABEL: test_svadalp_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sadalp.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadalp_x'}} // expected-warning@+1 {{implicit declaration of function 'svadalp_s64_x'}} return SVE_ACLE_FUNC(svadalp,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadalp_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svadalp_u16_xu10__SVBool_tu12__SVUint16_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svadalp_u16_x(svbool_t pg, svuint16_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svadalp_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uadalp.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadalp_x'}} // expected-warning@+1 {{implicit declaration of function 'svadalp_u16_x'}} return SVE_ACLE_FUNC(svadalp,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadalp_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svadalp_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svadalp_u32_x(svbool_t pg, svuint32_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svadalp_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uadalp.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadalp_x'}} // expected-warning@+1 {{implicit declaration of function 'svadalp_u32_x'}} return SVE_ACLE_FUNC(svadalp,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svadalp_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svadalp_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uadalp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svadalp_u64_x(svbool_t pg, svuint64_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svadalp_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uadalp.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadalp_x'}} // expected-warning@+1 {{implicit declaration of function 'svadalp_u64_x'}} return SVE_ACLE_FUNC(svadalp,_u64,_x,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c index dc9bfbc58e50..55c0f3c70577 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,73 +14,43 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svadclb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svadclb_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svadclb_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svadclb_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adclb.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadclb'}} // expected-warning@+1 {{implicit declaration of function 'svadclb_u32'}} return SVE_ACLE_FUNC(svadclb,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svadclb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svadclb_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svadclb_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svadclb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adclb.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadclb'}} // expected-warning@+1 {{implicit declaration of function 'svadclb_u64'}} return SVE_ACLE_FUNC(svadclb,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svadclb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svadclb_n_u32u12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svadclb_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svadclb_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adclb.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadclb'}} // expected-warning@+1 {{implicit declaration of function 'svadclb_n_u32'}} return SVE_ACLE_FUNC(svadclb,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svadclb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svadclb_n_u64u12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svadclb_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svadclb_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adclb.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadclb'}} // expected-warning@+1 {{implicit declaration of function 'svadclb_n_u64'}} return SVE_ACLE_FUNC(svadclb,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c index a42ac072e13e..4f11e63fd41e 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_adclt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,73 +14,43 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svadclt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svadclt_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svadclt_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svadclt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adclt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadclt'}} // expected-warning@+1 {{implicit declaration of function 'svadclt_u32'}} return SVE_ACLE_FUNC(svadclt,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svadclt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svadclt_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.adclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svadclt_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svadclt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adclt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadclt'}} // expected-warning@+1 {{implicit declaration of function 'svadclt_u64'}} return SVE_ACLE_FUNC(svadclt,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svadclt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svadclt_n_u32u12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svadclt_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svadclt_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adclt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadclt'}} // expected-warning@+1 {{implicit declaration of function 'svadclt_n_u32'}} return SVE_ACLE_FUNC(svadclt,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svadclt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svadclt_n_u64u12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.adclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svadclt_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svadclt_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.adclt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svadclt'}} // expected-warning@+1 {{implicit declaration of function 'svadclt_n_u64'}} return SVE_ACLE_FUNC(svadclt,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c index 070fc493b9ee..e325d0098caa 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svaddhnb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddhnb_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svaddhnb_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svaddhnb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnb_s16'}} return SVE_ACLE_FUNC(svaddhnb,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddhnb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddhnb_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svaddhnb_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svaddhnb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnb_s32'}} return SVE_ACLE_FUNC(svaddhnb,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddhnb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddhnb_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svaddhnb_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svaddhnb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnb_s64'}} return SVE_ACLE_FUNC(svaddhnb,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svaddhnb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddhnb_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svaddhnb_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svaddhnb_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnb_u16'}} return SVE_ACLE_FUNC(svaddhnb,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddhnb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddhnb_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svaddhnb_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svaddhnb_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnb_u32'}} return SVE_ACLE_FUNC(svaddhnb,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddhnb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddhnb_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svaddhnb_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svaddhnb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnb_u64'}} return SVE_ACLE_FUNC(svaddhnb,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svaddhnb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svaddhnb_n_s16u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svaddhnb_n_s16(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svaddhnb_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnb_n_s16'}} return SVE_ACLE_FUNC(svaddhnb,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddhnb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svaddhnb_n_s32u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svaddhnb_n_s32(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svaddhnb_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnb_n_s32'}} return SVE_ACLE_FUNC(svaddhnb,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddhnb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svaddhnb_n_s64u11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svaddhnb_n_s64(svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svaddhnb_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnb_n_s64'}} return SVE_ACLE_FUNC(svaddhnb,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svaddhnb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svaddhnb_n_u16u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svaddhnb_n_u16(svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svaddhnb_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnb_n_u16'}} return SVE_ACLE_FUNC(svaddhnb,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddhnb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svaddhnb_n_u32u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svaddhnb_n_u32(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svaddhnb_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnb_n_u32'}} return SVE_ACLE_FUNC(svaddhnb,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddhnb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svaddhnb_n_u64u12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svaddhnb_n_u64(svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svaddhnb_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnb_n_u64'}} return SVE_ACLE_FUNC(svaddhnb,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c index 8bc757ec9356..bcb68970513b 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addhnt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svaddhnt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddhnt_s16u10__SVInt8_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svaddhnt_s16(svint8_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svaddhnt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnt_s16'}} return SVE_ACLE_FUNC(svaddhnt,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaddhnt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddhnt_s32u11__SVInt16_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svaddhnt_s32(svint16_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svaddhnt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnt_s32'}} return SVE_ACLE_FUNC(svaddhnt,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaddhnt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddhnt_s64u11__SVInt32_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svaddhnt_s64(svint32_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svaddhnt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnt_s64'}} return SVE_ACLE_FUNC(svaddhnt,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaddhnt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddhnt_u16u11__SVUint8_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svaddhnt_u16(svuint8_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svaddhnt_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnt_u16'}} return SVE_ACLE_FUNC(svaddhnt,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaddhnt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddhnt_u32u12__SVUint16_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svaddhnt_u32(svuint16_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svaddhnt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnt_u32'}} return SVE_ACLE_FUNC(svaddhnt,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaddhnt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddhnt_u64u12__SVUint32_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svaddhnt_u64(svuint32_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svaddhnt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnt_u64'}} return SVE_ACLE_FUNC(svaddhnt,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaddhnt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svaddhnt_n_s16u10__SVInt8_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svaddhnt_n_s16(svint8_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svaddhnt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnt_n_s16'}} return SVE_ACLE_FUNC(svaddhnt,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaddhnt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svaddhnt_n_s32u11__SVInt16_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svaddhnt_n_s32(svint16_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svaddhnt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnt_n_s32'}} return SVE_ACLE_FUNC(svaddhnt,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaddhnt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svaddhnt_n_s64u11__SVInt32_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svaddhnt_n_s64(svint32_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svaddhnt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnt_n_s64'}} return SVE_ACLE_FUNC(svaddhnt,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaddhnt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svaddhnt_n_u16u11__SVUint8_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svaddhnt_n_u16(svuint8_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svaddhnt_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnt_n_u16'}} return SVE_ACLE_FUNC(svaddhnt,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaddhnt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svaddhnt_n_u32u12__SVUint16_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svaddhnt_n_u32(svuint16_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svaddhnt_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnt_n_u32'}} return SVE_ACLE_FUNC(svaddhnt,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svaddhnt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svaddhnt_n_u64u12__SVUint32_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svaddhnt_n_u64(svuint32_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svaddhnt_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addhnt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svaddhnt_n_u64'}} return SVE_ACLE_FUNC(svaddhnt,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c index 8eed03d66bee..affe1c78393e 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svaddlb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddlb_s16u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svaddlb_s16(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svaddlb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddlb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlb'}} // expected-warning@+1 {{implicit declaration of function 'svaddlb_s16'}} return SVE_ACLE_FUNC(svaddlb,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddlb_s32u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svaddlb_s32(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svaddlb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddlb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlb'}} // expected-warning@+1 {{implicit declaration of function 'svaddlb_s32'}} return SVE_ACLE_FUNC(svaddlb,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddlb_s64u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svaddlb_s64(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svaddlb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddlb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlb'}} // expected-warning@+1 {{implicit declaration of function 'svaddlb_s64'}} return SVE_ACLE_FUNC(svaddlb,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddlb_u16u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svaddlb_u16(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svaddlb_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddlb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlb'}} // expected-warning@+1 {{implicit declaration of function 'svaddlb_u16'}} return SVE_ACLE_FUNC(svaddlb,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddlb_u32u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svaddlb_u32(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svaddlb_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddlb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlb'}} // expected-warning@+1 {{implicit declaration of function 'svaddlb_u32'}} return SVE_ACLE_FUNC(svaddlb,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddlb_u64u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svaddlb_u64(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svaddlb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddlb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlb'}} // expected-warning@+1 {{implicit declaration of function 'svaddlb_u64'}} return SVE_ACLE_FUNC(svaddlb,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddlb_n_s16u10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svaddlb_n_s16(svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svaddlb_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddlb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlb'}} // expected-warning@+1 {{implicit declaration of function 'svaddlb_n_s16'}} return SVE_ACLE_FUNC(svaddlb,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddlb_n_s32u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svaddlb_n_s32(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svaddlb_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddlb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlb'}} // expected-warning@+1 {{implicit declaration of function 'svaddlb_n_s32'}} return SVE_ACLE_FUNC(svaddlb,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddlb_n_s64u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svaddlb_n_s64(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svaddlb_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddlb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlb'}} // expected-warning@+1 {{implicit declaration of function 'svaddlb_n_s64'}} return SVE_ACLE_FUNC(svaddlb,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddlb_n_u16u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svaddlb_n_u16(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svaddlb_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddlb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlb'}} // expected-warning@+1 {{implicit declaration of function 'svaddlb_n_u16'}} return SVE_ACLE_FUNC(svaddlb,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddlb_n_u32u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svaddlb_n_u32(svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svaddlb_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddlb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlb'}} // expected-warning@+1 {{implicit declaration of function 'svaddlb_n_u32'}} return SVE_ACLE_FUNC(svaddlb,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddlb_n_u64u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svaddlb_n_u64(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svaddlb_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddlb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlb'}} // expected-warning@+1 {{implicit declaration of function 'svaddlb_n_u64'}} return SVE_ACLE_FUNC(svaddlb,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c index adbc91e18669..c729ea91675f 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlbt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,109 +14,64 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svaddlbt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddlbt_s16u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svaddlbt_s16(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svaddlbt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddlbt.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlbt'}} // expected-warning@+1 {{implicit declaration of function 'svaddlbt_s16'}} return SVE_ACLE_FUNC(svaddlbt,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlbt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddlbt_s32u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svaddlbt_s32(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svaddlbt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddlbt.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlbt'}} // expected-warning@+1 {{implicit declaration of function 'svaddlbt_s32'}} return SVE_ACLE_FUNC(svaddlbt,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlbt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddlbt_s64u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svaddlbt_s64(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svaddlbt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddlbt.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlbt'}} // expected-warning@+1 {{implicit declaration of function 'svaddlbt_s64'}} return SVE_ACLE_FUNC(svaddlbt,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlbt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svaddlbt_n_s16u10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svaddlbt_n_s16(svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svaddlbt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddlbt.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlbt'}} // expected-warning@+1 {{implicit declaration of function 'svaddlbt_n_s16'}} return SVE_ACLE_FUNC(svaddlbt,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlbt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svaddlbt_n_s32u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svaddlbt_n_s32(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svaddlbt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddlbt.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlbt'}} // expected-warning@+1 {{implicit declaration of function 'svaddlbt_n_s32'}} return SVE_ACLE_FUNC(svaddlbt,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlbt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svaddlbt_n_s64u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlbt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svaddlbt_n_s64(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svaddlbt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddlbt.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlbt'}} // expected-warning@+1 {{implicit declaration of function 'svaddlbt_n_s64'}} return SVE_ACLE_FUNC(svaddlbt,_n_s64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c index 80bbcec99e8c..88a0966e897e 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addlt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svaddlt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddlt_s16u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svaddlt_s16(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svaddlt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddlt.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlt'}} // expected-warning@+1 {{implicit declaration of function 'svaddlt_s16'}} return SVE_ACLE_FUNC(svaddlt,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddlt_s32u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svaddlt_s32(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svaddlt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddlt.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlt'}} // expected-warning@+1 {{implicit declaration of function 'svaddlt_s32'}} return SVE_ACLE_FUNC(svaddlt,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddlt_s64u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svaddlt_s64(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svaddlt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddlt.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlt'}} // expected-warning@+1 {{implicit declaration of function 'svaddlt_s64'}} return SVE_ACLE_FUNC(svaddlt,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddlt_u16u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svaddlt_u16(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svaddlt_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddlt.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlt'}} // expected-warning@+1 {{implicit declaration of function 'svaddlt_u16'}} return SVE_ACLE_FUNC(svaddlt,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddlt_u32u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svaddlt_u32(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svaddlt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddlt.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlt'}} // expected-warning@+1 {{implicit declaration of function 'svaddlt_u32'}} return SVE_ACLE_FUNC(svaddlt,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddlt_u64u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svaddlt_u64(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svaddlt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddlt.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlt'}} // expected-warning@+1 {{implicit declaration of function 'svaddlt_u64'}} return SVE_ACLE_FUNC(svaddlt,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddlt_n_s16u10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svaddlt_n_s16(svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svaddlt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddlt.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlt'}} // expected-warning@+1 {{implicit declaration of function 'svaddlt_n_s16'}} return SVE_ACLE_FUNC(svaddlt,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddlt_n_s32u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svaddlt_n_s32(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svaddlt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddlt.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlt'}} // expected-warning@+1 {{implicit declaration of function 'svaddlt_n_s32'}} return SVE_ACLE_FUNC(svaddlt,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddlt_n_s64u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svaddlt_n_s64(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svaddlt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddlt.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlt'}} // expected-warning@+1 {{implicit declaration of function 'svaddlt_n_s64'}} return SVE_ACLE_FUNC(svaddlt,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddlt_n_u16u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svaddlt_n_u16(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svaddlt_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddlt.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlt'}} // expected-warning@+1 {{implicit declaration of function 'svaddlt_n_u16'}} return SVE_ACLE_FUNC(svaddlt,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddlt_n_u32u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svaddlt_n_u32(svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svaddlt_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddlt.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlt'}} // expected-warning@+1 {{implicit declaration of function 'svaddlt_n_u32'}} return SVE_ACLE_FUNC(svaddlt,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddlt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddlt_n_u64u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddlt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svaddlt_n_u64(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svaddlt_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddlt.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddlt'}} // expected-warning@+1 {{implicit declaration of function 'svaddlt_n_u64'}} return SVE_ACLE_FUNC(svaddlt,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addp.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addp.c index 781d929b11f9..0cf04ccf681e 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addp.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addp.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,411 +14,239 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svaddp_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddp_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svaddp_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svaddp_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addp.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_m'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_s8_m'}} return SVE_ACLE_FUNC(svaddp,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddp_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svaddp_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svaddp_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addp.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_m'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_s16_m'}} return SVE_ACLE_FUNC(svaddp,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddp_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svaddp_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svaddp_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addp.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_m'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_s32_m'}} return SVE_ACLE_FUNC(svaddp,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddp_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svaddp_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svaddp_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addp.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_m'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_s64_m'}} return SVE_ACLE_FUNC(svaddp,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddp_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svaddp_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svaddp_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addp.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_m'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_u8_m'}} return SVE_ACLE_FUNC(svaddp,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddp_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svaddp_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svaddp_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addp.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_m'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_u16_m'}} return SVE_ACLE_FUNC(svaddp,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddp_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svaddp_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svaddp_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addp.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_m'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_u32_m'}} return SVE_ACLE_FUNC(svaddp,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddp_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svaddp_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svaddp_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addp.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_m'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_u64_m'}} return SVE_ACLE_FUNC(svaddp,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddp_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svaddp_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svaddp_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addp.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_x'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_s8_x'}} return SVE_ACLE_FUNC(svaddp,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddp_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svaddp_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svaddp_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addp.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_x'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_s16_x'}} return SVE_ACLE_FUNC(svaddp,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddp_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svaddp_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svaddp_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addp.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_x'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_s32_x'}} return SVE_ACLE_FUNC(svaddp,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddp_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svaddp_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svaddp_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addp.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_x'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_s64_x'}} return SVE_ACLE_FUNC(svaddp,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddp_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.addp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svaddp_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svaddp_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addp.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_x'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_u8_x'}} return SVE_ACLE_FUNC(svaddp,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddp_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svaddp_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svaddp_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addp.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_x'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_u16_x'}} return SVE_ACLE_FUNC(svaddp,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddp_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svaddp_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svaddp_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addp.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_x'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_u32_x'}} return SVE_ACLE_FUNC(svaddp,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddp_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.addp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svaddp_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svaddp_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.addp.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_x'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_u64_x'}} return SVE_ACLE_FUNC(svaddp,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddp_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svaddp_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svaddp_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.faddp.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_m'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_f16_m'}} return SVE_ACLE_FUNC(svaddp,_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddp_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svaddp_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svaddp_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.faddp.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_m'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_f32_m'}} return SVE_ACLE_FUNC(svaddp,_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddp_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svaddp_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svaddp_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.faddp.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_m'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_f64_m'}} return SVE_ACLE_FUNC(svaddp,_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddp_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svaddp_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svaddp_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.faddp.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_x'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_f16_x'}} return SVE_ACLE_FUNC(svaddp,_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddp_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svaddp_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svaddp_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.faddp.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_x'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_f32_x'}} return SVE_ACLE_FUNC(svaddp,_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svaddp_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svaddp_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.faddp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svaddp_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svaddp_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.faddp.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddp_x'}} // expected-warning@+1 {{implicit declaration of function 'svaddp_f64_x'}} return SVE_ACLE_FUNC(svaddp,_f64,_x,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c index dd0fecaf0fcd..cd3519c3217f 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svaddwb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddwb_s16u11__SVInt16_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svaddwb_s16(svint16_t op1, svint8_t op2) { + // CHECK-LABEL: test_svaddwb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddwb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwb'}} // expected-warning@+1 {{implicit declaration of function 'svaddwb_s16'}} return SVE_ACLE_FUNC(svaddwb,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddwb_s32u11__SVInt32_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svaddwb_s32(svint32_t op1, svint16_t op2) { + // CHECK-LABEL: test_svaddwb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddwb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwb'}} // expected-warning@+1 {{implicit declaration of function 'svaddwb_s32'}} return SVE_ACLE_FUNC(svaddwb,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddwb_s64u11__SVInt64_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svaddwb_s64(svint64_t op1, svint32_t op2) { + // CHECK-LABEL: test_svaddwb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddwb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwb'}} // expected-warning@+1 {{implicit declaration of function 'svaddwb_s64'}} return SVE_ACLE_FUNC(svaddwb,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddwb_u16u12__SVUint16_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svaddwb_u16(svuint16_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svaddwb_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddwb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwb'}} // expected-warning@+1 {{implicit declaration of function 'svaddwb_u16'}} return SVE_ACLE_FUNC(svaddwb,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddwb_u32u12__SVUint32_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svaddwb_u32(svuint32_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svaddwb_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddwb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwb'}} // expected-warning@+1 {{implicit declaration of function 'svaddwb_u32'}} return SVE_ACLE_FUNC(svaddwb,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddwb_u64u12__SVUint64_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svaddwb_u64(svuint64_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svaddwb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddwb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwb'}} // expected-warning@+1 {{implicit declaration of function 'svaddwb_u64'}} return SVE_ACLE_FUNC(svaddwb,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddwb_n_s16u11__SVInt16_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svaddwb_n_s16(svint16_t op1, int8_t op2) { + // CHECK-LABEL: test_svaddwb_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddwb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwb'}} // expected-warning@+1 {{implicit declaration of function 'svaddwb_n_s16'}} return SVE_ACLE_FUNC(svaddwb,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddwb_n_s32u11__SVInt32_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svaddwb_n_s32(svint32_t op1, int16_t op2) { + // CHECK-LABEL: test_svaddwb_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddwb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwb'}} // expected-warning@+1 {{implicit declaration of function 'svaddwb_n_s32'}} return SVE_ACLE_FUNC(svaddwb,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddwb_n_s64u11__SVInt64_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svaddwb_n_s64(svint64_t op1, int32_t op2) { + // CHECK-LABEL: test_svaddwb_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddwb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwb'}} // expected-warning@+1 {{implicit declaration of function 'svaddwb_n_s64'}} return SVE_ACLE_FUNC(svaddwb,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddwb_n_u16u12__SVUint16_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svaddwb_n_u16(svuint16_t op1, uint8_t op2) { + // CHECK-LABEL: test_svaddwb_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddwb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwb'}} // expected-warning@+1 {{implicit declaration of function 'svaddwb_n_u16'}} return SVE_ACLE_FUNC(svaddwb,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddwb_n_u32u12__SVUint32_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svaddwb_n_u32(svuint32_t op1, uint16_t op2) { + // CHECK-LABEL: test_svaddwb_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddwb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwb'}} // expected-warning@+1 {{implicit declaration of function 'svaddwb_n_u32'}} return SVE_ACLE_FUNC(svaddwb,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddwb_n_u64u12__SVUint64_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svaddwb_n_u64(svuint64_t op1, uint32_t op2) { + // CHECK-LABEL: test_svaddwb_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddwb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwb'}} // expected-warning@+1 {{implicit declaration of function 'svaddwb_n_u64'}} return SVE_ACLE_FUNC(svaddwb,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c index b059f5c698ab..d038c42d9d0a 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_addwt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svaddwt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddwt_s16u11__SVInt16_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svaddwt_s16(svint16_t op1, svint8_t op2) { + // CHECK-LABEL: test_svaddwt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddwt.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwt'}} // expected-warning@+1 {{implicit declaration of function 'svaddwt_s16'}} return SVE_ACLE_FUNC(svaddwt,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddwt_s32u11__SVInt32_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svaddwt_s32(svint32_t op1, svint16_t op2) { + // CHECK-LABEL: test_svaddwt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddwt.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwt'}} // expected-warning@+1 {{implicit declaration of function 'svaddwt_s32'}} return SVE_ACLE_FUNC(svaddwt,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddwt_s64u11__SVInt64_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.saddwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svaddwt_s64(svint64_t op1, svint32_t op2) { + // CHECK-LABEL: test_svaddwt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddwt.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwt'}} // expected-warning@+1 {{implicit declaration of function 'svaddwt_s64'}} return SVE_ACLE_FUNC(svaddwt,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddwt_u16u12__SVUint16_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svaddwt_u16(svuint16_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svaddwt_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddwt.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwt'}} // expected-warning@+1 {{implicit declaration of function 'svaddwt_u16'}} return SVE_ACLE_FUNC(svaddwt,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddwt_u32u12__SVUint32_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svaddwt_u32(svuint32_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svaddwt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddwt.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwt'}} // expected-warning@+1 {{implicit declaration of function 'svaddwt_u32'}} return SVE_ACLE_FUNC(svaddwt,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaddwt_u64u12__SVUint64_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svaddwt_u64(svuint64_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svaddwt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddwt.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwt'}} // expected-warning@+1 {{implicit declaration of function 'svaddwt_u64'}} return SVE_ACLE_FUNC(svaddwt,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddwt_n_s16u11__SVInt16_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svaddwt_n_s16(svint16_t op1, int8_t op2) { + // CHECK-LABEL: test_svaddwt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddwt.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwt'}} // expected-warning@+1 {{implicit declaration of function 'svaddwt_n_s16'}} return SVE_ACLE_FUNC(svaddwt,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddwt_n_s32u11__SVInt32_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svaddwt_n_s32(svint32_t op1, int16_t op2) { + // CHECK-LABEL: test_svaddwt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddwt.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwt'}} // expected-warning@+1 {{implicit declaration of function 'svaddwt_n_s32'}} return SVE_ACLE_FUNC(svaddwt,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddwt_n_s64u11__SVInt64_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.saddwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svaddwt_n_s64(svint64_t op1, int32_t op2) { + // CHECK-LABEL: test_svaddwt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.saddwt.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwt'}} // expected-warning@+1 {{implicit declaration of function 'svaddwt_n_s64'}} return SVE_ACLE_FUNC(svaddwt,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddwt_n_u16u12__SVUint16_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svaddwt_n_u16(svuint16_t op1, uint8_t op2) { + // CHECK-LABEL: test_svaddwt_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddwt.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwt'}} // expected-warning@+1 {{implicit declaration of function 'svaddwt_n_u16'}} return SVE_ACLE_FUNC(svaddwt,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddwt_n_u32u12__SVUint32_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svaddwt_n_u32(svuint32_t op1, uint16_t op2) { + // CHECK-LABEL: test_svaddwt_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddwt.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwt'}} // expected-warning@+1 {{implicit declaration of function 'svaddwt_n_u32'}} return SVE_ACLE_FUNC(svaddwt,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svaddwt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svaddwt_n_u64u12__SVUint64_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uaddwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svaddwt_n_u64(svuint64_t op1, uint32_t op2) { + // CHECK-LABEL: test_svaddwt_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uaddwt.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaddwt'}} // expected-warning@+1 {{implicit declaration of function 'svaddwt_n_u64'}} return SVE_ACLE_FUNC(svaddwt,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c index 3f8cd967eb51..e9290948268f 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesd.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,18 +14,11 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svaesd_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.aesd( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svaesd_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.aesd( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svaesd_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svaesd_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.aesd( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaesd'}} // expected-warning@+1 {{implicit declaration of function 'svaesd_u8'}} return SVE_ACLE_FUNC(svaesd,_u8,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c index 9256ab70cab9..c10060a8aef5 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aese.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,18 +14,11 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svaese_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.aese( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svaese_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.aese( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svaese_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svaese_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.aese( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaese'}} // expected-warning@+1 {{implicit declaration of function 'svaese_u8'}} return SVE_ACLE_FUNC(svaese,_u8,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c index 627d22f45b68..d4ed607012c0 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesimc.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,18 +14,11 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svaesimc_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.aesimc( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svaesimc_u8u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.aesimc( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svaesimc_u8(svuint8_t op) { + // CHECK-LABEL: test_svaesimc_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.aesimc( %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaesimc'}} // expected-warning@+1 {{implicit declaration of function 'svaesimc_u8'}} return SVE_ACLE_FUNC(svaesimc,_u8,,)(op); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c index 1b96d9aafa04..25bd65d38a4f 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_aesmc.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,18 +14,11 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svaesmc_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.aesmc( [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svaesmc_u8u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.aesmc( [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svaesmc_u8(svuint8_t op) { + // CHECK-LABEL: test_svaesmc_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.aesmc( %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svaesmc'}} // expected-warning@+1 {{implicit declaration of function 'svaesmc_u8'}} return SVE_ACLE_FUNC(svaesmc,_u8,,)(op); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c index 7d68aef34a44..874f111bf09f 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bcax.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,289 +14,169 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svbcax_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svbcax_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svbcax_s8(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svbcax_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbcax'}} // expected-warning@+1 {{implicit declaration of function 'svbcax_s8'}} return SVE_ACLE_FUNC(svbcax,_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbcax_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbcax_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svbcax_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svbcax_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbcax'}} // expected-warning@+1 {{implicit declaration of function 'svbcax_s16'}} return SVE_ACLE_FUNC(svbcax,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbcax_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbcax_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svbcax_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svbcax_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbcax'}} // expected-warning@+1 {{implicit declaration of function 'svbcax_s32'}} return SVE_ACLE_FUNC(svbcax,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbcax_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbcax_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svbcax_s64(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svbcax_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbcax'}} // expected-warning@+1 {{implicit declaration of function 'svbcax_s64'}} return SVE_ACLE_FUNC(svbcax,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbcax_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svbcax_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svbcax_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svbcax_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbcax'}} // expected-warning@+1 {{implicit declaration of function 'svbcax_u8'}} return SVE_ACLE_FUNC(svbcax,_u8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbcax_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbcax_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svbcax_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svbcax_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbcax'}} // expected-warning@+1 {{implicit declaration of function 'svbcax_u16'}} return SVE_ACLE_FUNC(svbcax,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbcax_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbcax_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svbcax_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svbcax_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbcax'}} // expected-warning@+1 {{implicit declaration of function 'svbcax_u32'}} return SVE_ACLE_FUNC(svbcax,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbcax_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbcax_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svbcax_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svbcax_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbcax'}} // expected-warning@+1 {{implicit declaration of function 'svbcax_u64'}} return SVE_ACLE_FUNC(svbcax,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbcax_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbcax_n_s8u10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svbcax_n_s8(svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svbcax_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbcax'}} // expected-warning@+1 {{implicit declaration of function 'svbcax_n_s8'}} return SVE_ACLE_FUNC(svbcax,_n_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbcax_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbcax_n_s16u11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svbcax_n_s16(svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svbcax_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbcax'}} // expected-warning@+1 {{implicit declaration of function 'svbcax_n_s16'}} return SVE_ACLE_FUNC(svbcax,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbcax_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbcax_n_s32u11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svbcax_n_s32(svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svbcax_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbcax'}} // expected-warning@+1 {{implicit declaration of function 'svbcax_n_s32'}} return SVE_ACLE_FUNC(svbcax,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbcax_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbcax_n_s64u11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svbcax_n_s64(svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svbcax_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbcax'}} // expected-warning@+1 {{implicit declaration of function 'svbcax_n_s64'}} return SVE_ACLE_FUNC(svbcax,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbcax_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbcax_n_u8u11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svbcax_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svbcax_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bcax.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbcax'}} // expected-warning@+1 {{implicit declaration of function 'svbcax_n_u8'}} return SVE_ACLE_FUNC(svbcax,_n_u8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbcax_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbcax_n_u16u12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svbcax_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svbcax_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bcax.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbcax'}} // expected-warning@+1 {{implicit declaration of function 'svbcax_n_u16'}} return SVE_ACLE_FUNC(svbcax,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbcax_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbcax_n_u32u12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svbcax_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svbcax_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bcax.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbcax'}} // expected-warning@+1 {{implicit declaration of function 'svbcax_n_u32'}} return SVE_ACLE_FUNC(svbcax,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbcax_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbcax_n_u64u12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svbcax_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svbcax_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bcax.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbcax'}} // expected-warning@+1 {{implicit declaration of function 'svbcax_n_u64'}} return SVE_ACLE_FUNC(svbcax,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c index feb02c035e30..f30c16dd2a74 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bdep.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-bitperm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-bitperm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-bitperm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-bitperm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-bitperm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-bitperm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,145 +14,85 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svbdep_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svbdep_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svbdep_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svbdep_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bdep.x.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbdep'}} // expected-warning@+1 {{implicit declaration of function 'svbdep_u8'}} return SVE_ACLE_FUNC(svbdep,_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svbdep_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbdep_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svbdep_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svbdep_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bdep.x.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbdep'}} // expected-warning@+1 {{implicit declaration of function 'svbdep_u16'}} return SVE_ACLE_FUNC(svbdep,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svbdep_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbdep_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svbdep_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svbdep_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bdep.x.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbdep'}} // expected-warning@+1 {{implicit declaration of function 'svbdep_u32'}} return SVE_ACLE_FUNC(svbdep,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svbdep_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbdep_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svbdep_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svbdep_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bdep.x.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbdep'}} // expected-warning@+1 {{implicit declaration of function 'svbdep_u64'}} return SVE_ACLE_FUNC(svbdep,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svbdep_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbdep_n_u8u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svbdep_n_u8(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svbdep_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bdep.x.nxv16i8( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbdep'}} // expected-warning@+1 {{implicit declaration of function 'svbdep_n_u8'}} return SVE_ACLE_FUNC(svbdep,_n_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svbdep_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbdep_n_u16u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svbdep_n_u16(svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svbdep_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bdep.x.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbdep'}} // expected-warning@+1 {{implicit declaration of function 'svbdep_n_u16'}} return SVE_ACLE_FUNC(svbdep,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svbdep_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbdep_n_u32u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svbdep_n_u32(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svbdep_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bdep.x.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbdep'}} // expected-warning@+1 {{implicit declaration of function 'svbdep_n_u32'}} return SVE_ACLE_FUNC(svbdep,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svbdep_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbdep_n_u64u12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bdep.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svbdep_n_u64(svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svbdep_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bdep.x.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbdep'}} // expected-warning@+1 {{implicit declaration of function 'svbdep_n_u64'}} return SVE_ACLE_FUNC(svbdep,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c index 2e351c65b83a..462c87044bc2 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bext.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-bitperm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-bitperm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-bitperm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-bitperm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-bitperm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-bitperm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,145 +14,85 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svbext_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bext.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svbext_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bext.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svbext_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svbext_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bext.x.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbext'}} // expected-warning@+1 {{implicit declaration of function 'svbext_u8'}} return SVE_ACLE_FUNC(svbext,_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svbext_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bext.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbext_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bext.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svbext_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svbext_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bext.x.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbext'}} // expected-warning@+1 {{implicit declaration of function 'svbext_u16'}} return SVE_ACLE_FUNC(svbext,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svbext_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bext.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbext_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bext.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svbext_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svbext_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bext.x.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbext'}} // expected-warning@+1 {{implicit declaration of function 'svbext_u32'}} return SVE_ACLE_FUNC(svbext,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svbext_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bext.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbext_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bext.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svbext_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svbext_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bext.x.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbext'}} // expected-warning@+1 {{implicit declaration of function 'svbext_u64'}} return SVE_ACLE_FUNC(svbext,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svbext_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbext_n_u8u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svbext_n_u8(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svbext_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bext.x.nxv16i8( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbext'}} // expected-warning@+1 {{implicit declaration of function 'svbext_n_u8'}} return SVE_ACLE_FUNC(svbext,_n_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svbext_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbext_n_u16u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svbext_n_u16(svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svbext_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bext.x.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbext'}} // expected-warning@+1 {{implicit declaration of function 'svbext_n_u16'}} return SVE_ACLE_FUNC(svbext,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svbext_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbext_n_u32u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svbext_n_u32(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svbext_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bext.x.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbext'}} // expected-warning@+1 {{implicit declaration of function 'svbext_n_u32'}} return SVE_ACLE_FUNC(svbext,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svbext_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbext_n_u64u12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bext.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svbext_n_u64(svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svbext_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bext.x.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbext'}} // expected-warning@+1 {{implicit declaration of function 'svbext_n_u64'}} return SVE_ACLE_FUNC(svbext,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c index 88d2abb04808..b8b178dbde8a 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bgrp.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-bitperm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-bitperm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-bitperm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-bitperm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-bitperm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-bitperm -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,145 +14,85 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svbgrp_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svbgrp_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svbgrp_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svbgrp_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bgrp.x.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbgrp'}} // expected-warning@+1 {{implicit declaration of function 'svbgrp_u8'}} return SVE_ACLE_FUNC(svbgrp,_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svbgrp_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbgrp_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svbgrp_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svbgrp_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bgrp.x.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbgrp'}} // expected-warning@+1 {{implicit declaration of function 'svbgrp_u16'}} return SVE_ACLE_FUNC(svbgrp,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svbgrp_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbgrp_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svbgrp_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svbgrp_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bgrp.x.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbgrp'}} // expected-warning@+1 {{implicit declaration of function 'svbgrp_u32'}} return SVE_ACLE_FUNC(svbgrp,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svbgrp_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbgrp_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svbgrp_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svbgrp_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bgrp.x.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbgrp'}} // expected-warning@+1 {{implicit declaration of function 'svbgrp_u64'}} return SVE_ACLE_FUNC(svbgrp,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svbgrp_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbgrp_n_u8u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svbgrp_n_u8(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svbgrp_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bgrp.x.nxv16i8( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbgrp'}} // expected-warning@+1 {{implicit declaration of function 'svbgrp_n_u8'}} return SVE_ACLE_FUNC(svbgrp,_n_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svbgrp_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbgrp_n_u16u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svbgrp_n_u16(svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svbgrp_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bgrp.x.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbgrp'}} // expected-warning@+1 {{implicit declaration of function 'svbgrp_n_u16'}} return SVE_ACLE_FUNC(svbgrp,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svbgrp_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbgrp_n_u32u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svbgrp_n_u32(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svbgrp_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bgrp.x.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbgrp'}} // expected-warning@+1 {{implicit declaration of function 'svbgrp_n_u32'}} return SVE_ACLE_FUNC(svbgrp,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svbgrp_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbgrp_n_u64u12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bgrp.x.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svbgrp_n_u64(svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svbgrp_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bgrp.x.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbgrp'}} // expected-warning@+1 {{implicit declaration of function 'svbgrp_n_u64'}} return SVE_ACLE_FUNC(svbgrp,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c index dc75f24ecc99..dc5fdd75f3bd 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,289 +14,169 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svbsl_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svbsl_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svbsl_s8(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svbsl_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl'}} // expected-warning@+1 {{implicit declaration of function 'svbsl_s8'}} return SVE_ACLE_FUNC(svbsl,_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svbsl_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svbsl_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svbsl_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl'}} // expected-warning@+1 {{implicit declaration of function 'svbsl_s16'}} return SVE_ACLE_FUNC(svbsl,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svbsl_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svbsl_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svbsl_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl'}} // expected-warning@+1 {{implicit declaration of function 'svbsl_s32'}} return SVE_ACLE_FUNC(svbsl,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svbsl_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svbsl_s64(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svbsl_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl'}} // expected-warning@+1 {{implicit declaration of function 'svbsl_s64'}} return SVE_ACLE_FUNC(svbsl,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svbsl_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svbsl_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svbsl_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl'}} // expected-warning@+1 {{implicit declaration of function 'svbsl_u8'}} return SVE_ACLE_FUNC(svbsl,_u8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svbsl_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svbsl_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svbsl_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl'}} // expected-warning@+1 {{implicit declaration of function 'svbsl_u16'}} return SVE_ACLE_FUNC(svbsl,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svbsl_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svbsl_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svbsl_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl'}} // expected-warning@+1 {{implicit declaration of function 'svbsl_u32'}} return SVE_ACLE_FUNC(svbsl,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svbsl_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svbsl_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svbsl_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl'}} // expected-warning@+1 {{implicit declaration of function 'svbsl_u64'}} return SVE_ACLE_FUNC(svbsl,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svbsl_n_s8u10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svbsl_n_s8(svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svbsl_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl'}} // expected-warning@+1 {{implicit declaration of function 'svbsl_n_s8'}} return SVE_ACLE_FUNC(svbsl,_n_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbsl_n_s16u11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svbsl_n_s16(svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svbsl_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl'}} // expected-warning@+1 {{implicit declaration of function 'svbsl_n_s16'}} return SVE_ACLE_FUNC(svbsl,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbsl_n_s32u11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svbsl_n_s32(svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svbsl_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl'}} // expected-warning@+1 {{implicit declaration of function 'svbsl_n_s32'}} return SVE_ACLE_FUNC(svbsl,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbsl_n_s64u11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svbsl_n_s64(svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svbsl_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl'}} // expected-warning@+1 {{implicit declaration of function 'svbsl_n_s64'}} return SVE_ACLE_FUNC(svbsl,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z15test_svbsl_n_u8u11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svbsl_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svbsl_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl'}} // expected-warning@+1 {{implicit declaration of function 'svbsl_n_u8'}} return SVE_ACLE_FUNC(svbsl,_n_u8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbsl_n_u16u12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svbsl_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svbsl_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl'}} // expected-warning@+1 {{implicit declaration of function 'svbsl_n_u16'}} return SVE_ACLE_FUNC(svbsl,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbsl_n_u32u12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svbsl_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svbsl_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl'}} // expected-warning@+1 {{implicit declaration of function 'svbsl_n_u32'}} return SVE_ACLE_FUNC(svbsl,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svbsl_n_u64u12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svbsl_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svbsl_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl'}} // expected-warning@+1 {{implicit declaration of function 'svbsl_n_u64'}} return SVE_ACLE_FUNC(svbsl,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c index b3661c2c0690..15907841949b 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl1n.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,289 +14,169 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svbsl1n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbsl1n_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svbsl1n_s8(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svbsl1n_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl1n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl1n_s8'}} return SVE_ACLE_FUNC(svbsl1n,_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl1n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svbsl1n_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svbsl1n_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svbsl1n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl1n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl1n_s16'}} return SVE_ACLE_FUNC(svbsl1n,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl1n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svbsl1n_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svbsl1n_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svbsl1n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl1n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl1n_s32'}} return SVE_ACLE_FUNC(svbsl1n,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl1n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svbsl1n_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svbsl1n_s64(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svbsl1n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl1n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl1n_s64'}} return SVE_ACLE_FUNC(svbsl1n,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl1n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbsl1n_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svbsl1n_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svbsl1n_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl1n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl1n_u8'}} return SVE_ACLE_FUNC(svbsl1n,_u8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl1n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svbsl1n_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svbsl1n_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svbsl1n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl1n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl1n_u16'}} return SVE_ACLE_FUNC(svbsl1n,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl1n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svbsl1n_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svbsl1n_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svbsl1n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl1n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl1n_u32'}} return SVE_ACLE_FUNC(svbsl1n,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl1n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svbsl1n_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svbsl1n_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svbsl1n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl1n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl1n_u64'}} return SVE_ACLE_FUNC(svbsl1n,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl1n_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbsl1n_n_s8u10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svbsl1n_n_s8(svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svbsl1n_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl1n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl1n_n_s8'}} return SVE_ACLE_FUNC(svbsl1n,_n_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl1n_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_s16u11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svbsl1n_n_s16(svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svbsl1n_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl1n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl1n_n_s16'}} return SVE_ACLE_FUNC(svbsl1n,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl1n_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_s32u11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svbsl1n_n_s32(svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svbsl1n_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl1n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl1n_n_s32'}} return SVE_ACLE_FUNC(svbsl1n,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl1n_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_s64u11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svbsl1n_n_s64(svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svbsl1n_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl1n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl1n_n_s64'}} return SVE_ACLE_FUNC(svbsl1n,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl1n_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbsl1n_n_u8u11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svbsl1n_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svbsl1n_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl1n.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl1n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl1n_n_u8'}} return SVE_ACLE_FUNC(svbsl1n,_n_u8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl1n_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_u16u12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svbsl1n_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svbsl1n_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl1n.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl1n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl1n_n_u16'}} return SVE_ACLE_FUNC(svbsl1n,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl1n_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_u32u12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svbsl1n_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svbsl1n_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl1n.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl1n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl1n_n_u32'}} return SVE_ACLE_FUNC(svbsl1n,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl1n_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svbsl1n_n_u64u12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svbsl1n_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svbsl1n_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl1n.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl1n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl1n_n_u64'}} return SVE_ACLE_FUNC(svbsl1n,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c index 1fc3dce061c7..67fb0d5381b5 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_bsl2n.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,289 +14,169 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svbsl2n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbsl2n_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svbsl2n_s8(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svbsl2n_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl2n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl2n_s8'}} return SVE_ACLE_FUNC(svbsl2n,_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl2n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svbsl2n_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svbsl2n_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svbsl2n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl2n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl2n_s16'}} return SVE_ACLE_FUNC(svbsl2n,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl2n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svbsl2n_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svbsl2n_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svbsl2n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl2n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl2n_s32'}} return SVE_ACLE_FUNC(svbsl2n,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl2n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svbsl2n_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svbsl2n_s64(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svbsl2n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl2n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl2n_s64'}} return SVE_ACLE_FUNC(svbsl2n,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl2n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svbsl2n_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svbsl2n_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svbsl2n_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl2n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl2n_u8'}} return SVE_ACLE_FUNC(svbsl2n,_u8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl2n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svbsl2n_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svbsl2n_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svbsl2n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl2n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl2n_u16'}} return SVE_ACLE_FUNC(svbsl2n,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl2n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svbsl2n_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svbsl2n_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svbsl2n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl2n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl2n_u32'}} return SVE_ACLE_FUNC(svbsl2n,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl2n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svbsl2n_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svbsl2n_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svbsl2n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl2n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl2n_u64'}} return SVE_ACLE_FUNC(svbsl2n,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl2n_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbsl2n_n_s8u10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svbsl2n_n_s8(svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svbsl2n_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl2n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl2n_n_s8'}} return SVE_ACLE_FUNC(svbsl2n,_n_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl2n_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svbsl2n_n_s16u11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svbsl2n_n_s16(svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svbsl2n_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl2n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl2n_n_s16'}} return SVE_ACLE_FUNC(svbsl2n,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl2n_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svbsl2n_n_s32u11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svbsl2n_n_s32(svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svbsl2n_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl2n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl2n_n_s32'}} return SVE_ACLE_FUNC(svbsl2n,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl2n_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svbsl2n_n_s64u11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svbsl2n_n_s64(svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svbsl2n_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl2n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl2n_n_s64'}} return SVE_ACLE_FUNC(svbsl2n,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl2n_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svbsl2n_n_u8u11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svbsl2n_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svbsl2n_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl2n.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl2n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl2n_n_u8'}} return SVE_ACLE_FUNC(svbsl2n,_n_u8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl2n_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svbsl2n_n_u16u12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svbsl2n_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svbsl2n_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl2n.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl2n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl2n_n_u16'}} return SVE_ACLE_FUNC(svbsl2n,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl2n_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svbsl2n_n_u32u12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svbsl2n_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svbsl2n_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl2n.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl2n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl2n_n_u32'}} return SVE_ACLE_FUNC(svbsl2n,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svbsl2n_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svbsl2n_n_u64u12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svbsl2n_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svbsl2n_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.bsl2n.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svbsl2n'}} // expected-warning@+1 {{implicit declaration of function 'svbsl2n_n_u64'}} return SVE_ACLE_FUNC(svbsl2n,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c index d506bb6946c2..98a8b351ae21 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cadd.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,273 +14,161 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcadd_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svcadd_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svcadd_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svcadd_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( %op1, %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcadd'}} // expected-warning@+1 {{implicit declaration of function 'svcadd_s8'}} return SVE_ACLE_FUNC(svcadd,_s8,,)(op1, op2, 90); } -// CHECK-LABEL: @test_svcadd_s8_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svcadd_s8_1u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svcadd_s8_1(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svcadd_s8_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( %op1, %op2, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcadd'}} // expected-warning@+1 {{implicit declaration of function 'svcadd_s8'}} return SVE_ACLE_FUNC(svcadd,_s8,,)(op1, op2, 270); } -// CHECK-LABEL: @test_svcadd_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcadd_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svcadd_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svcadd_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( %op1, %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcadd'}} // expected-warning@+1 {{implicit declaration of function 'svcadd_s16'}} return SVE_ACLE_FUNC(svcadd,_s16,,)(op1, op2, 90); } -// CHECK-LABEL: @test_svcadd_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcadd_s16_1u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svcadd_s16_1(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svcadd_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( %op1, %op2, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcadd'}} // expected-warning@+1 {{implicit declaration of function 'svcadd_s16'}} return SVE_ACLE_FUNC(svcadd,_s16,,)(op1, op2, 270); } -// CHECK-LABEL: @test_svcadd_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcadd_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svcadd_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svcadd_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( %op1, %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcadd'}} // expected-warning@+1 {{implicit declaration of function 'svcadd_s32'}} return SVE_ACLE_FUNC(svcadd,_s32,,)(op1, op2, 90); } -// CHECK-LABEL: @test_svcadd_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcadd_s32_1u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svcadd_s32_1(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svcadd_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( %op1, %op2, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcadd'}} // expected-warning@+1 {{implicit declaration of function 'svcadd_s32'}} return SVE_ACLE_FUNC(svcadd,_s32,,)(op1, op2, 270); } -// CHECK-LABEL: @test_svcadd_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcadd_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svcadd_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcadd_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( %op1, %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcadd'}} // expected-warning@+1 {{implicit declaration of function 'svcadd_s64'}} return SVE_ACLE_FUNC(svcadd,_s64,,)(op1, op2, 90); } -// CHECK-LABEL: @test_svcadd_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcadd_s64_1u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svcadd_s64_1(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svcadd_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( %op1, %op2, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcadd'}} // expected-warning@+1 {{implicit declaration of function 'svcadd_s64'}} return SVE_ACLE_FUNC(svcadd,_s64,,)(op1, op2, 270); } -// CHECK-LABEL: @test_svcadd_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svcadd_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svcadd_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svcadd_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( %op1, %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcadd'}} // expected-warning@+1 {{implicit declaration of function 'svcadd_u8'}} return SVE_ACLE_FUNC(svcadd,_u8,,)(op1, op2, 90); } -// CHECK-LABEL: @test_svcadd_u8_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svcadd_u8_1u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svcadd_u8_1(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svcadd_u8_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cadd.x.nxv16i8( %op1, %op2, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcadd'}} // expected-warning@+1 {{implicit declaration of function 'svcadd_u8'}} return SVE_ACLE_FUNC(svcadd,_u8,,)(op1, op2, 270); } -// CHECK-LABEL: @test_svcadd_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcadd_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svcadd_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svcadd_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( %op1, %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcadd'}} // expected-warning@+1 {{implicit declaration of function 'svcadd_u16'}} return SVE_ACLE_FUNC(svcadd,_u16,,)(op1, op2, 90); } -// CHECK-LABEL: @test_svcadd_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcadd_u16_1u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svcadd_u16_1(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svcadd_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cadd.x.nxv8i16( %op1, %op2, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcadd'}} // expected-warning@+1 {{implicit declaration of function 'svcadd_u16'}} return SVE_ACLE_FUNC(svcadd,_u16,,)(op1, op2, 270); } -// CHECK-LABEL: @test_svcadd_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcadd_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svcadd_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svcadd_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( %op1, %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcadd'}} // expected-warning@+1 {{implicit declaration of function 'svcadd_u32'}} return SVE_ACLE_FUNC(svcadd,_u32,,)(op1, op2, 90); } -// CHECK-LABEL: @test_svcadd_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcadd_u32_1u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svcadd_u32_1(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svcadd_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cadd.x.nxv4i32( %op1, %op2, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcadd'}} // expected-warning@+1 {{implicit declaration of function 'svcadd_u32'}} return SVE_ACLE_FUNC(svcadd,_u32,,)(op1, op2, 270); } -// CHECK-LABEL: @test_svcadd_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcadd_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svcadd_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcadd_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( %op1, %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcadd'}} // expected-warning@+1 {{implicit declaration of function 'svcadd_u64'}} return SVE_ACLE_FUNC(svcadd,_u64,,)(op1, op2, 90); } -// CHECK-LABEL: @test_svcadd_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcadd_u64_1u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svcadd_u64_1(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svcadd_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cadd.x.nxv2i64( %op1, %op2, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcadd'}} // expected-warning@+1 {{implicit declaration of function 'svcadd_u64'}} return SVE_ACLE_FUNC(svcadd,_u64,,)(op1, op2, 270); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cdot.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cdot.c index fa23454b3299..ffc9f3be8d70 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cdot.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cdot.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,188 +14,111 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcdot_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcdot_s32u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svcdot_s32(svint32_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svcdot_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcdot'}} // expected-warning@+1 {{implicit declaration of function 'svcdot_s32'}} return SVE_ACLE_FUNC(svcdot,_s32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svcdot_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcdot_s32_1u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svcdot_s32_1(svint32_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svcdot_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( %op1, %op2, %op3, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcdot'}} // expected-warning@+1 {{implicit declaration of function 'svcdot_s32'}} return SVE_ACLE_FUNC(svcdot,_s32,,)(op1, op2, op3, 90); } -// CHECK-LABEL: @test_svcdot_s32_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcdot_s32_2u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svcdot_s32_2(svint32_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svcdot_s32_2 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( %op1, %op2, %op3, i32 180) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcdot'}} // expected-warning@+1 {{implicit declaration of function 'svcdot_s32'}} return SVE_ACLE_FUNC(svcdot,_s32,,)(op1, op2, op3, 180); } -// CHECK-LABEL: @test_svcdot_s32_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcdot_s32_3u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svcdot_s32_3(svint32_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svcdot_s32_3 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cdot.nxv4i32( %op1, %op2, %op3, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcdot'}} // expected-warning@+1 {{implicit declaration of function 'svcdot_s32'}} return SVE_ACLE_FUNC(svcdot,_s32,,)(op1, op2, op3, 270); } -// CHECK-LABEL: @test_svcdot_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcdot_s64u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svcdot_s64(svint64_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svcdot_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcdot'}} // expected-warning@+1 {{implicit declaration of function 'svcdot_s64'}} return SVE_ACLE_FUNC(svcdot,_s64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svcdot_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcdot_s64_1u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svcdot_s64_1(svint64_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svcdot_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( %op1, %op2, %op3, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcdot'}} // expected-warning@+1 {{implicit declaration of function 'svcdot_s64'}} return SVE_ACLE_FUNC(svcdot,_s64,,)(op1, op2, op3, 90); } -// CHECK-LABEL: @test_svcdot_s64_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcdot_s64_2u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svcdot_s64_2(svint64_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svcdot_s64_2 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( %op1, %op2, %op3, i32 180) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcdot'}} // expected-warning@+1 {{implicit declaration of function 'svcdot_s64'}} return SVE_ACLE_FUNC(svcdot,_s64,,)(op1, op2, op3, 180); } -// CHECK-LABEL: @test_svcdot_s64_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcdot_s64_3u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svcdot_s64_3(svint64_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svcdot_s64_3 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cdot.nxv2i64( %op1, %op2, %op3, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcdot'}} // expected-warning@+1 {{implicit declaration of function 'svcdot_s64'}} return SVE_ACLE_FUNC(svcdot,_s64,,)(op1, op2, op3, 270); } -// CHECK-LABEL: @test_svcdot_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svcdot_lane_s32u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svcdot_lane_s32(svint32_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svcdot_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cdot.lane.nxv4i32( %op1, %op2, %op3, i32 0, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcdot_lane'}} // expected-warning@+1 {{implicit declaration of function 'svcdot_lane_s32'}} return SVE_ACLE_FUNC(svcdot_lane,_s32,,)(op1, op2, op3, 0, 0); } -// CHECK-LABEL: @test_svcdot_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 2, i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svcdot_lane_s32_1u11__SVInt32_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 2, i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svcdot_lane_s32_1(svint32_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svcdot_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cdot.lane.nxv4i32( %op1, %op2, %op3, i32 2, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcdot_lane'}} // expected-warning@+1 {{implicit declaration of function 'svcdot_lane_s32'}} return SVE_ACLE_FUNC(svcdot_lane,_s32,,)(op1, op2, op3, 2, 90); } -// CHECK-LABEL: @test_svcdot_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svcdot_lane_s64u11__SVInt64_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cdot.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svcdot_lane_s64(svint64_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svcdot_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cdot.lane.nxv2i64( %op1, %op2, %op3, i32 0, i32 180) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcdot_lane'}} // expected-warning@+1 {{implicit declaration of function 'svcdot_lane_s64'}} return SVE_ACLE_FUNC(svcdot_lane,_s64,,)(op1, op2, op3, 0, 180); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c index 3dc907a46d65..bf196a0b2dd6 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cmla.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,642 +13,362 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcmla_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svcmla_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svcmla_s8(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svcmla_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_s8'}} return SVE_ACLE_FUNC(svcmla,_s8,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svcmla_s8_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmla_s8_1u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svcmla_s8_1(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svcmla_s8_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( %op1, %op2, %op3, i32 90) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_s8'}} return SVE_ACLE_FUNC(svcmla,_s8,,)(op1, op2, op3, 90); } -// CHECK-LABEL: @test_svcmla_s8_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmla_s8_2u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svcmla_s8_2(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svcmla_s8_2 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( %op1, %op2, %op3, i32 180) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_s8'}} return SVE_ACLE_FUNC(svcmla,_s8,,)(op1, op2, op3, 180); } -// CHECK-LABEL: @test_svcmla_s8_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmla_s8_3u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svcmla_s8_3(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svcmla_s8_3 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( %op1, %op2, %op3, i32 270) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_s8'}} return SVE_ACLE_FUNC(svcmla,_s8,,)(op1, op2, op3, 270); } -// CHECK-LABEL: @test_svcmla_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcmla_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svcmla_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svcmla_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_s16'}} return SVE_ACLE_FUNC(svcmla,_s16,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svcmla_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_s16_1u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svcmla_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svcmla_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( %op1, %op2, %op3, i32 90) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_s16'}} return SVE_ACLE_FUNC(svcmla,_s16,,)(op1, op2, op3, 90); } -// CHECK-LABEL: @test_svcmla_s16_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_s16_2u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svcmla_s16_2(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svcmla_s16_2 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( %op1, %op2, %op3, i32 180) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_s16'}} return SVE_ACLE_FUNC(svcmla,_s16,,)(op1, op2, op3, 180); } -// CHECK-LABEL: @test_svcmla_s16_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_s16_3u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svcmla_s16_3(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svcmla_s16_3 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( %op1, %op2, %op3, i32 270) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_s16'}} return SVE_ACLE_FUNC(svcmla,_s16,,)(op1, op2, op3, 270); } -// CHECK-LABEL: @test_svcmla_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcmla_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svcmla_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svcmla_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_s32'}} return SVE_ACLE_FUNC(svcmla,_s32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svcmla_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_s32_1u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svcmla_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svcmla_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( %op1, %op2, %op3, i32 90) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_s32'}} return SVE_ACLE_FUNC(svcmla,_s32,,)(op1, op2, op3, 90); } -// CHECK-LABEL: @test_svcmla_s32_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_s32_2u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svcmla_s32_2(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svcmla_s32_2 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( %op1, %op2, %op3, i32 180) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_s32'}} return SVE_ACLE_FUNC(svcmla,_s32,,)(op1, op2, op3, 180); } -// CHECK-LABEL: @test_svcmla_s32_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_s32_3u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svcmla_s32_3(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svcmla_s32_3 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( %op1, %op2, %op3, i32 270) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_s32'}} return SVE_ACLE_FUNC(svcmla,_s32,,)(op1, op2, op3, 270); } -// CHECK-LABEL: @test_svcmla_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcmla_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svcmla_s64(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svcmla_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_s64'}} return SVE_ACLE_FUNC(svcmla,_s64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svcmla_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_s64_1u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svcmla_s64_1(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svcmla_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( %op1, %op2, %op3, i32 90) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_s64'}} return SVE_ACLE_FUNC(svcmla,_s64,,)(op1, op2, op3, 90); } -// CHECK-LABEL: @test_svcmla_s64_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_s64_2u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svcmla_s64_2(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svcmla_s64_2 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( %op1, %op2, %op3, i32 180) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_s64'}} return SVE_ACLE_FUNC(svcmla,_s64,,)(op1, op2, op3, 180); } -// CHECK-LABEL: @test_svcmla_s64_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_s64_3u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svcmla_s64_3(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svcmla_s64_3 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( %op1, %op2, %op3, i32 270) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_s64'}} return SVE_ACLE_FUNC(svcmla,_s64,,)(op1, op2, op3, 270); } -// CHECK-LABEL: @test_svcmla_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svcmla_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svcmla_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svcmla_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_u8'}} return SVE_ACLE_FUNC(svcmla,_u8,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svcmla_u8_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmla_u8_1u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svcmla_u8_1(svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svcmla_u8_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( %op1, %op2, %op3, i32 90) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_u8'}} return SVE_ACLE_FUNC(svcmla,_u8,,)(op1, op2, op3, 90); } -// CHECK-LABEL: @test_svcmla_u8_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmla_u8_2u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svcmla_u8_2(svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svcmla_u8_2 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( %op1, %op2, %op3, i32 180) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_u8'}} return SVE_ACLE_FUNC(svcmla,_u8,,)(op1, op2, op3, 180); } -// CHECK-LABEL: @test_svcmla_u8_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svcmla_u8_3u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svcmla_u8_3(svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svcmla_u8_3 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv16i8( %op1, %op2, %op3, i32 270) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_u8'}} return SVE_ACLE_FUNC(svcmla,_u8,,)(op1, op2, op3, 270); } -// CHECK-LABEL: @test_svcmla_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcmla_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svcmla_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svcmla_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_u16'}} return SVE_ACLE_FUNC(svcmla,_u16,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svcmla_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_u16_1u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svcmla_u16_1(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svcmla_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( %op1, %op2, %op3, i32 90) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_u16'}} return SVE_ACLE_FUNC(svcmla,_u16,,)(op1, op2, op3, 90); } -// CHECK-LABEL: @test_svcmla_u16_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_u16_2u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svcmla_u16_2(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svcmla_u16_2 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( %op1, %op2, %op3, i32 180) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_u16'}} return SVE_ACLE_FUNC(svcmla,_u16,,)(op1, op2, op3, 180); } -// CHECK-LABEL: @test_svcmla_u16_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_u16_3u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svcmla_u16_3(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svcmla_u16_3 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv8i16( %op1, %op2, %op3, i32 270) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_u16'}} return SVE_ACLE_FUNC(svcmla,_u16,,)(op1, op2, op3, 270); } -// CHECK-LABEL: @test_svcmla_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcmla_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svcmla_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svcmla_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_u32'}} return SVE_ACLE_FUNC(svcmla,_u32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svcmla_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_u32_1u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svcmla_u32_1(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svcmla_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( %op1, %op2, %op3, i32 90) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_u32'}} return SVE_ACLE_FUNC(svcmla,_u32,,)(op1, op2, op3, 90); } -// CHECK-LABEL: @test_svcmla_u32_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_u32_2u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svcmla_u32_2(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svcmla_u32_2 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( %op1, %op2, %op3, i32 180) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_u32'}} return SVE_ACLE_FUNC(svcmla,_u32,,)(op1, op2, op3, 180); } -// CHECK-LABEL: @test_svcmla_u32_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_u32_3u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svcmla_u32_3(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svcmla_u32_3 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv4i32( %op1, %op2, %op3, i32 270) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_u32'}} return SVE_ACLE_FUNC(svcmla,_u32,,)(op1, op2, op3, 270); } -// CHECK-LABEL: @test_svcmla_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svcmla_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svcmla_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svcmla_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_u64'}} return SVE_ACLE_FUNC(svcmla,_u64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svcmla_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_u64_1u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svcmla_u64_1(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svcmla_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( %op1, %op2, %op3, i32 90) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_u64'}} return SVE_ACLE_FUNC(svcmla,_u64,,)(op1, op2, op3, 90); } -// CHECK-LABEL: @test_svcmla_u64_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_u64_2u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svcmla_u64_2(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svcmla_u64_2 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( %op1, %op2, %op3, i32 180) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_u64'}} return SVE_ACLE_FUNC(svcmla,_u64,,)(op1, op2, op3, 180); } -// CHECK-LABEL: @test_svcmla_u64_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svcmla_u64_3u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svcmla_u64_3(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svcmla_u64_3 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.x.nxv2i64( %op1, %op2, %op3, i32 270) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_u64'}} return SVE_ACLE_FUNC(svcmla,_u64,,)(op1, op2, op3, 270); } -// CHECK-LABEL: @test_svcmla_lane_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svcmla_lane_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svcmla_lane_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svcmla_lane_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( %op1, %op2, %op3, i32 0, i32 90) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_lane_s16'}} return SVE_ACLE_FUNC(svcmla_lane,_s16,,)(op1, op2, op3, 0, 90); } -// CHECK-LABEL: @test_svcmla_lane_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svcmla_lane_s16_1u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svcmla_lane_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svcmla_lane_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( %op1, %op2, %op3, i32 3, i32 180) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_lane_s16'}} return SVE_ACLE_FUNC(svcmla_lane,_s16,,)(op1, op2, op3, 3, 180); } -// CHECK-LABEL: @test_svcmla_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svcmla_lane_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svcmla_lane_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svcmla_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( %op1, %op2, %op3, i32 0, i32 270) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_lane_s32'}} return SVE_ACLE_FUNC(svcmla_lane,_s32,,)(op1, op2, op3, 0, 270); } -// CHECK-LABEL: @test_svcmla_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svcmla_lane_s32_1u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svcmla_lane_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svcmla_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( %op1, %op2, %op3, i32 1, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_lane_s32'}} return SVE_ACLE_FUNC(svcmla_lane,_s32,,)(op1, op2, op3, 1, 0); } -// CHECK-LABEL: @test_svcmla_lane_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svcmla_lane_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svcmla_lane_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svcmla_lane_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( %op1, %op2, %op3, i32 0, i32 90) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_lane_u16'}} return SVE_ACLE_FUNC(svcmla_lane,_u16,,)(op1, op2, op3, 0, 90); } -// CHECK-LABEL: @test_svcmla_lane_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svcmla_lane_u16_1u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svcmla_lane_u16_1(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svcmla_lane_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv8i16( %op1, %op2, %op3, i32 3, i32 180) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_lane_u16'}} return SVE_ACLE_FUNC(svcmla_lane,_u16,,)(op1, op2, op3, 3, 180); } -// CHECK-LABEL: @test_svcmla_lane_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svcmla_lane_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svcmla_lane_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svcmla_lane_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( %op1, %op2, %op3, i32 0, i32 270) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_lane_u32'}} return SVE_ACLE_FUNC(svcmla_lane,_u32,,)(op1, op2, op3, 0, 270); } -// CHECK-LABEL: @test_svcmla_lane_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svcmla_lane_u32_1u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svcmla_lane_u32_1(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svcmla_lane_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.cmla.lane.x.nxv4i32( %op1, %op2, %op3, i32 1, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svcmla_lane_u32'}} return SVE_ACLE_FUNC(svcmla_lane,_u32,,)(op1, op2, op3, 1, 0); } diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtlt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtlt.c index 0a5c0ffb64ee..e36fb406842a 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtlt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtlt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,77 +14,45 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcvtlt_f32_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtlt.f32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svcvtlt_f32_f16_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtlt.f32f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvtlt_f32_f16_m(svfloat32_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvtlt_f32_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtlt.f32f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcvtlt_f32_m'}} // expected-warning@+1 {{implicit declaration of function 'svcvtlt_f32_f16_m'}} return SVE_ACLE_FUNC(svcvtlt_f32,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvtlt_f64_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtlt.f64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svcvtlt_f64_f32_mu13__SVFloat64_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtlt.f64f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvtlt_f64_f32_m(svfloat64_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvtlt_f64_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtlt.f64f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcvtlt_f64_m'}} // expected-warning@+1 {{implicit declaration of function 'svcvtlt_f64_f32_m'}} return SVE_ACLE_FUNC(svcvtlt_f64,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvtlt_f32_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtlt.f32f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svcvtlt_f32_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtlt.f32f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvtlt_f32_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svcvtlt_f32_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtlt.f32f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcvtlt_f32_x'}} // expected-warning@+1 {{implicit declaration of function 'svcvtlt_f32_f16_x'}} return SVE_ACLE_FUNC(svcvtlt_f32,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svcvtlt_f64_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtlt.f64f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svcvtlt_f64_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtlt.f64f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svcvtlt_f64_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvtlt_f64_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtlt.f64f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcvtlt_f64_x'}} // expected-warning@+1 {{implicit declaration of function 'svcvtlt_f64_f32_x'}} return SVE_ACLE_FUNC(svcvtlt_f64,_f32,_x,)(pg, op); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtnt.c index d2080c6062c9..2d45ad177a07 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtnt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,77 +14,45 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcvtnt_f16_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.f16f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svcvtnt_f16_f32_mu13__SVFloat16_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.f16f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvtnt_f16_f32_m(svfloat16_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvtnt_f16_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtnt.f16f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcvtnt_f16_m'}} // expected-warning@+1 {{implicit declaration of function 'svcvtnt_f16_f32_m'}} return SVE_ACLE_FUNC(svcvtnt_f16,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvtnt_f32_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svcvtnt_f32_f64_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvtnt_f32_f64_m(svfloat32_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvtnt_f32_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtnt.f32f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcvtnt_f32_m'}} // expected-warning@+1 {{implicit declaration of function 'svcvtnt_f32_f64_m'}} return SVE_ACLE_FUNC(svcvtnt_f32,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvtnt_f16_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.f16f32( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svcvtnt_f16_f32_xu13__SVFloat16_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.f16f32( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svcvtnt_f16_f32_x(svfloat16_t even, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svcvtnt_f16_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtnt.f16f32( %even, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcvtnt_f16_x'}} // expected-warning@+1 {{implicit declaration of function 'svcvtnt_f16_f32_x'}} return SVE_ACLE_FUNC(svcvtnt_f16,_f32,_x,)(even, pg, op); } -// CHECK-LABEL: @test_svcvtnt_f32_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.f32f64( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svcvtnt_f32_f64_xu13__SVFloat32_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtnt.f32f64( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvtnt_f32_f64_x(svfloat32_t even, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvtnt_f32_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtnt.f32f64( %even, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcvtnt_f32_x'}} // expected-warning@+1 {{implicit declaration of function 'svcvtnt_f32_f64_x'}} return SVE_ACLE_FUNC(svcvtnt_f32,_f64,_x,)(even, pg, op); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtx.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtx.c index 65ed353f4225..a482db147c23 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtx.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtx.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,58 +14,34 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcvtx_f32_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtx.f32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svcvtx_f32_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtx.f32f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvtx_f32_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvtx_f32_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtx.f32f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcvtx_f32_z'}} // expected-warning@+1 {{implicit declaration of function 'svcvtx_f32_f64_z'}} return SVE_ACLE_FUNC(svcvtx_f32,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svcvtx_f32_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtx.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svcvtx_f32_f64_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtx.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvtx_f32_f64_m(svfloat32_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvtx_f32_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtx.f32f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcvtx_f32_m'}} // expected-warning@+1 {{implicit declaration of function 'svcvtx_f32_f64_m'}} return SVE_ACLE_FUNC(svcvtx_f32,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvtx_f32_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtx.f32f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svcvtx_f32_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtx.f32f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvtx_f32_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvtx_f32_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtx.f32f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcvtx_f32_x'}} // expected-warning@+1 {{implicit declaration of function 'svcvtx_f32_f64_x'}} return SVE_ACLE_FUNC(svcvtx_f32,_f64,_x,)(pg, op); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtxnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtxnt.c index acac4ab43681..aeb2a7b75883 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtxnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_cvtxnt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,39 +14,23 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svcvtxnt_f32_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtxnt.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z23test_svcvtxnt_f32_f64_mu13__SVFloat32_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtxnt.f32f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvtxnt_f32_f64_m(svfloat32_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvtxnt_f32_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtxnt.f32f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcvtxnt_f32_m'}} // expected-warning@+1 {{implicit declaration of function 'svcvtxnt_f32_f64_m'}} return SVE_ACLE_FUNC(svcvtxnt_f32,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svcvtxnt_f32_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtxnt.f32f64( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z23test_svcvtxnt_f32_f64_xu13__SVFloat32_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fcvtxnt.f32f64( [[EVEN:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svcvtxnt_f32_f64_x(svfloat32_t even, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svcvtxnt_f32_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fcvtxnt.f32f64( %even, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svcvtxnt_f32_x'}} // expected-warning@+1 {{implicit declaration of function 'svcvtxnt_f32_f64_x'}} return SVE_ACLE_FUNC(svcvtxnt_f32,_f64,_x,)(even, pg, op); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c index bcb020225ad2..5efa4fd86662 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eor3.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,289 +14,169 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_sveor3_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_sveor3_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_sveor3_s8(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_sveor3_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveor3'}} // expected-warning@+1 {{implicit declaration of function 'sveor3_s8'}} return SVE_ACLE_FUNC(sveor3,_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveor3_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_sveor3_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_sveor3_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_sveor3_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveor3'}} // expected-warning@+1 {{implicit declaration of function 'sveor3_s16'}} return SVE_ACLE_FUNC(sveor3,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveor3_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_sveor3_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_sveor3_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_sveor3_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveor3'}} // expected-warning@+1 {{implicit declaration of function 'sveor3_s32'}} return SVE_ACLE_FUNC(sveor3,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveor3_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_sveor3_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_sveor3_s64(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_sveor3_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveor3'}} // expected-warning@+1 {{implicit declaration of function 'sveor3_s64'}} return SVE_ACLE_FUNC(sveor3,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveor3_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_sveor3_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_sveor3_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_sveor3_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveor3'}} // expected-warning@+1 {{implicit declaration of function 'sveor3_u8'}} return SVE_ACLE_FUNC(sveor3,_u8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveor3_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_sveor3_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_sveor3_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_sveor3_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveor3'}} // expected-warning@+1 {{implicit declaration of function 'sveor3_u16'}} return SVE_ACLE_FUNC(sveor3,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveor3_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_sveor3_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_sveor3_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_sveor3_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveor3'}} // expected-warning@+1 {{implicit declaration of function 'sveor3_u32'}} return SVE_ACLE_FUNC(sveor3,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveor3_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_sveor3_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_sveor3_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_sveor3_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveor3'}} // expected-warning@+1 {{implicit declaration of function 'sveor3_u64'}} return SVE_ACLE_FUNC(sveor3,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveor3_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor3_n_s8u10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_sveor3_n_s8(svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_sveor3_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveor3'}} // expected-warning@+1 {{implicit declaration of function 'sveor3_n_s8'}} return SVE_ACLE_FUNC(sveor3,_n_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveor3_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_sveor3_n_s16u11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_sveor3_n_s16(svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_sveor3_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveor3'}} // expected-warning@+1 {{implicit declaration of function 'sveor3_n_s16'}} return SVE_ACLE_FUNC(sveor3,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveor3_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_sveor3_n_s32u11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_sveor3_n_s32(svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_sveor3_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveor3'}} // expected-warning@+1 {{implicit declaration of function 'sveor3_n_s32'}} return SVE_ACLE_FUNC(sveor3,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveor3_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_sveor3_n_s64u11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_sveor3_n_s64(svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_sveor3_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveor3'}} // expected-warning@+1 {{implicit declaration of function 'sveor3_n_s64'}} return SVE_ACLE_FUNC(sveor3,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveor3_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_sveor3_n_u8u11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_sveor3_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_sveor3_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor3.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveor3'}} // expected-warning@+1 {{implicit declaration of function 'sveor3_n_u8'}} return SVE_ACLE_FUNC(sveor3,_n_u8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveor3_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_sveor3_n_u16u12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_sveor3_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_sveor3_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor3.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveor3'}} // expected-warning@+1 {{implicit declaration of function 'sveor3_n_u16'}} return SVE_ACLE_FUNC(sveor3,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveor3_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_sveor3_n_u32u12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_sveor3_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_sveor3_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor3.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveor3'}} // expected-warning@+1 {{implicit declaration of function 'sveor3_n_u32'}} return SVE_ACLE_FUNC(sveor3,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveor3_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_sveor3_n_u64u12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_sveor3_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_sveor3_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eor3.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveor3'}} // expected-warning@+1 {{implicit declaration of function 'sveor3_n_u64'}} return SVE_ACLE_FUNC(sveor3,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c index c813ebc049ea..262d41fbd355 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eorbt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,289 +14,169 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_sveorbt_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_sveorbt_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_sveorbt_s8(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_sveorbt_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveorbt'}} // expected-warning@+1 {{implicit declaration of function 'sveorbt_s8'}} return SVE_ACLE_FUNC(sveorbt,_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveorbt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_sveorbt_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_sveorbt_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_sveorbt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveorbt'}} // expected-warning@+1 {{implicit declaration of function 'sveorbt_s16'}} return SVE_ACLE_FUNC(sveorbt,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveorbt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_sveorbt_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_sveorbt_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_sveorbt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveorbt'}} // expected-warning@+1 {{implicit declaration of function 'sveorbt_s32'}} return SVE_ACLE_FUNC(sveorbt,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveorbt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_sveorbt_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_sveorbt_s64(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_sveorbt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveorbt'}} // expected-warning@+1 {{implicit declaration of function 'sveorbt_s64'}} return SVE_ACLE_FUNC(sveorbt,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveorbt_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_sveorbt_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_sveorbt_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_sveorbt_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveorbt'}} // expected-warning@+1 {{implicit declaration of function 'sveorbt_u8'}} return SVE_ACLE_FUNC(sveorbt,_u8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveorbt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_sveorbt_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_sveorbt_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_sveorbt_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveorbt'}} // expected-warning@+1 {{implicit declaration of function 'sveorbt_u16'}} return SVE_ACLE_FUNC(sveorbt,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveorbt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_sveorbt_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_sveorbt_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_sveorbt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveorbt'}} // expected-warning@+1 {{implicit declaration of function 'sveorbt_u32'}} return SVE_ACLE_FUNC(sveorbt,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveorbt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_sveorbt_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_sveorbt_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_sveorbt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveorbt'}} // expected-warning@+1 {{implicit declaration of function 'sveorbt_u64'}} return SVE_ACLE_FUNC(sveorbt,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveorbt_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_sveorbt_n_s8u10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_sveorbt_n_s8(svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_sveorbt_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveorbt'}} // expected-warning@+1 {{implicit declaration of function 'sveorbt_n_s8'}} return SVE_ACLE_FUNC(sveorbt,_n_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveorbt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_sveorbt_n_s16u11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_sveorbt_n_s16(svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_sveorbt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveorbt'}} // expected-warning@+1 {{implicit declaration of function 'sveorbt_n_s16'}} return SVE_ACLE_FUNC(sveorbt,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveorbt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_sveorbt_n_s32u11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_sveorbt_n_s32(svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_sveorbt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveorbt'}} // expected-warning@+1 {{implicit declaration of function 'sveorbt_n_s32'}} return SVE_ACLE_FUNC(sveorbt,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveorbt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_sveorbt_n_s64u11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_sveorbt_n_s64(svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_sveorbt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveorbt'}} // expected-warning@+1 {{implicit declaration of function 'sveorbt_n_s64'}} return SVE_ACLE_FUNC(sveorbt,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveorbt_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_sveorbt_n_u8u11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_sveorbt_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_sveorbt_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eorbt.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveorbt'}} // expected-warning@+1 {{implicit declaration of function 'sveorbt_n_u8'}} return SVE_ACLE_FUNC(sveorbt,_n_u8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveorbt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_sveorbt_n_u16u12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_sveorbt_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_sveorbt_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eorbt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveorbt'}} // expected-warning@+1 {{implicit declaration of function 'sveorbt_n_u16'}} return SVE_ACLE_FUNC(sveorbt,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveorbt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_sveorbt_n_u32u12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_sveorbt_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_sveorbt_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eorbt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveorbt'}} // expected-warning@+1 {{implicit declaration of function 'sveorbt_n_u32'}} return SVE_ACLE_FUNC(sveorbt,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveorbt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_sveorbt_n_u64u12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_sveorbt_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_sveorbt_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eorbt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveorbt'}} // expected-warning@+1 {{implicit declaration of function 'sveorbt_n_u64'}} return SVE_ACLE_FUNC(sveorbt,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c index fdcac8f2edd2..0b305f15ce76 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_eortb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,289 +14,169 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_sveortb_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_sveortb_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_sveortb_s8(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_sveortb_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveortb'}} // expected-warning@+1 {{implicit declaration of function 'sveortb_s8'}} return SVE_ACLE_FUNC(sveortb,_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveortb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_sveortb_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_sveortb_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_sveortb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveortb'}} // expected-warning@+1 {{implicit declaration of function 'sveortb_s16'}} return SVE_ACLE_FUNC(sveortb,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveortb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_sveortb_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_sveortb_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_sveortb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveortb'}} // expected-warning@+1 {{implicit declaration of function 'sveortb_s32'}} return SVE_ACLE_FUNC(sveortb,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveortb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_sveortb_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_sveortb_s64(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_sveortb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveortb'}} // expected-warning@+1 {{implicit declaration of function 'sveortb_s64'}} return SVE_ACLE_FUNC(sveortb,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveortb_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_sveortb_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_sveortb_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_sveortb_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveortb'}} // expected-warning@+1 {{implicit declaration of function 'sveortb_u8'}} return SVE_ACLE_FUNC(sveortb,_u8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveortb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_sveortb_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_sveortb_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_sveortb_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveortb'}} // expected-warning@+1 {{implicit declaration of function 'sveortb_u16'}} return SVE_ACLE_FUNC(sveortb,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveortb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_sveortb_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_sveortb_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_sveortb_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveortb'}} // expected-warning@+1 {{implicit declaration of function 'sveortb_u32'}} return SVE_ACLE_FUNC(sveortb,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveortb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_sveortb_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_sveortb_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_sveortb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveortb'}} // expected-warning@+1 {{implicit declaration of function 'sveortb_u64'}} return SVE_ACLE_FUNC(sveortb,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveortb_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_sveortb_n_s8u10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_sveortb_n_s8(svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_sveortb_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveortb'}} // expected-warning@+1 {{implicit declaration of function 'sveortb_n_s8'}} return SVE_ACLE_FUNC(sveortb,_n_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveortb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_sveortb_n_s16u11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_sveortb_n_s16(svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_sveortb_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveortb'}} // expected-warning@+1 {{implicit declaration of function 'sveortb_n_s16'}} return SVE_ACLE_FUNC(sveortb,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveortb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_sveortb_n_s32u11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_sveortb_n_s32(svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_sveortb_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveortb'}} // expected-warning@+1 {{implicit declaration of function 'sveortb_n_s32'}} return SVE_ACLE_FUNC(sveortb,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveortb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_sveortb_n_s64u11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_sveortb_n_s64(svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_sveortb_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveortb'}} // expected-warning@+1 {{implicit declaration of function 'sveortb_n_s64'}} return SVE_ACLE_FUNC(sveortb,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveortb_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_sveortb_n_u8u11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_sveortb_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_sveortb_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eortb.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveortb'}} // expected-warning@+1 {{implicit declaration of function 'sveortb_n_u8'}} return SVE_ACLE_FUNC(sveortb,_n_u8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveortb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_sveortb_n_u16u12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_sveortb_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_sveortb_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eortb.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveortb'}} // expected-warning@+1 {{implicit declaration of function 'sveortb_n_u16'}} return SVE_ACLE_FUNC(sveortb,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveortb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_sveortb_n_u32u12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_sveortb_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_sveortb_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eortb.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveortb'}} // expected-warning@+1 {{implicit declaration of function 'sveortb_n_u32'}} return SVE_ACLE_FUNC(sveortb,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_sveortb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_sveortb_n_u64u12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_sveortb_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_sveortb_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.eortb.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'sveortb'}} // expected-warning@+1 {{implicit declaration of function 'sveortb_n_u64'}} return SVE_ACLE_FUNC(sveortb,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c index bdcc297bbe84..9f70269dfea3 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hadd.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,972 +14,557 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svhadd_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svhadd_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svhadd_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svhadd_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_s8_m'}} return SVE_ACLE_FUNC(svhadd,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhadd_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svhadd_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svhadd_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_s16_m'}} return SVE_ACLE_FUNC(svhadd,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhadd_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svhadd_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svhadd_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_s32_m'}} return SVE_ACLE_FUNC(svhadd,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhadd_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svhadd_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svhadd_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_s64_m'}} return SVE_ACLE_FUNC(svhadd,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svhadd_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svhadd_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svhadd_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_u8_m'}} return SVE_ACLE_FUNC(svhadd,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhadd_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svhadd_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svhadd_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_u16_m'}} return SVE_ACLE_FUNC(svhadd,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhadd_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svhadd_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { // CHECKA-LABEL: test_svhadd_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_u32_m'}} return SVE_ACLE_FUNC(svhadd,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhadd_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svhadd_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svhadd_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_u64_m'}} return SVE_ACLE_FUNC(svhadd,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhadd_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svhadd_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svhadd_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s8_m'}} return SVE_ACLE_FUNC(svhadd,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhadd_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svhadd_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svhadd_n_s16_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s16_m'}} return SVE_ACLE_FUNC(svhadd,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhadd_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svhadd_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svhadd_n_s32_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s32_m'}} return SVE_ACLE_FUNC(svhadd,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhadd_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svhadd_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svhadd_n_s64_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s64_m'}} return SVE_ACLE_FUNC(svhadd,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhadd_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svhadd_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svhadd_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u8_m'}} return SVE_ACLE_FUNC(svhadd,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhadd_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svhadd_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svhadd_n_u16_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u16_m'}} return SVE_ACLE_FUNC(svhadd,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhadd_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svhadd_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svhadd_n_u32_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u32_m'}} return SVE_ACLE_FUNC(svhadd,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhadd_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svhadd_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svhadd_n_u64_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u64_m'}} return SVE_ACLE_FUNC(svhadd,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svhadd_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svhadd_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svhadd_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_s8_z'}} return SVE_ACLE_FUNC(svhadd,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svhadd_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svhadd_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svhadd_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_s16_z'}} return SVE_ACLE_FUNC(svhadd,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svhadd_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svhadd_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svhadd_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_s32_z'}} return SVE_ACLE_FUNC(svhadd,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svhadd_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svhadd_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svhadd_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_s64_z'}} return SVE_ACLE_FUNC(svhadd,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svhadd_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svhadd_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svhadd_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_u8_z'}} return SVE_ACLE_FUNC(svhadd,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svhadd_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svhadd_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svhadd_u16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_u16_z'}} return SVE_ACLE_FUNC(svhadd,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svhadd_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svhadd_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { // CHECKA-LABEL: test_svhadd_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_u32_z'}} return SVE_ACLE_FUNC(svhadd,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svhadd_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svhadd_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svhadd_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_u64_z'}} return SVE_ACLE_FUNC(svhadd,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svhadd_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svhadd_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svhadd_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s8_z'}} return SVE_ACLE_FUNC(svhadd,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svhadd_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svhadd_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svhadd_n_s16_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s16_z'}} return SVE_ACLE_FUNC(svhadd,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svhadd_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svhadd_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svhadd_n_s32_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s32_z'}} return SVE_ACLE_FUNC(svhadd,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svhadd_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svhadd_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svhadd_n_s64_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s64_z'}} return SVE_ACLE_FUNC(svhadd,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svhadd_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svhadd_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svhadd_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u8_z'}} return SVE_ACLE_FUNC(svhadd,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svhadd_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svhadd_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svhadd_n_u16_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u16_z'}} return SVE_ACLE_FUNC(svhadd,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svhadd_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svhadd_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svhadd_n_u32_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u32_z'}} return SVE_ACLE_FUNC(svhadd,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svhadd_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svhadd_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svhadd_n_u64_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u64_z'}} return SVE_ACLE_FUNC(svhadd,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svhadd_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svhadd_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svhadd_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_s8_x'}} return SVE_ACLE_FUNC(svhadd,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhadd_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svhadd_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svhadd_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_s16_x'}} return SVE_ACLE_FUNC(svhadd,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhadd_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svhadd_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svhadd_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_s32_x'}} return SVE_ACLE_FUNC(svhadd,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhadd_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svhadd_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svhadd_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_s64_x'}} return SVE_ACLE_FUNC(svhadd,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svhadd_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svhadd_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svhadd_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_u8_x'}} return SVE_ACLE_FUNC(svhadd,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhadd_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svhadd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svhadd_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_u16_x'}} return SVE_ACLE_FUNC(svhadd,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhadd_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svhadd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { // CHECKA-LABEL: test_svhadd_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_u32_x'}} return SVE_ACLE_FUNC(svhadd,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhadd_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svhadd_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svhadd_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_u64_x'}} return SVE_ACLE_FUNC(svhadd,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhadd_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svhadd_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svhadd_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s8_x'}} return SVE_ACLE_FUNC(svhadd,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhadd_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svhadd_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svhadd_n_s16_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s16_x'}} return SVE_ACLE_FUNC(svhadd,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhadd_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svhadd_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svhadd_n_s32_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s32_x'}} return SVE_ACLE_FUNC(svhadd,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhadd_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svhadd_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svhadd_n_s64_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shadd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_s64_x'}} return SVE_ACLE_FUNC(svhadd,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhadd_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svhadd_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svhadd_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u8_x'}} return SVE_ACLE_FUNC(svhadd,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhadd_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svhadd_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svhadd_n_u16_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u16_x'}} return SVE_ACLE_FUNC(svhadd,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhadd_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svhadd_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svhadd_n_u32_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u32_x'}} return SVE_ACLE_FUNC(svhadd,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhadd_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhadd_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svhadd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svhadd_n_u64_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhadd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svhadd_n_u64_x'}} return SVE_ACLE_FUNC(svhadd,_n_u64,_x,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histcnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histcnt.c index 9e8a98f3fd14..1161b6a91836 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histcnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histcnt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,77 +14,45 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svhistcnt_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.histcnt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svhistcnt_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.histcnt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svhistcnt_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svhistcnt_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.histcnt.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhistcnt_z'}} // expected-warning@+1 {{implicit declaration of function 'svhistcnt_s32_z'}} return SVE_ACLE_FUNC(svhistcnt,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhistcnt_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.histcnt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svhistcnt_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.histcnt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svhistcnt_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svhistcnt_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.histcnt.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhistcnt_z'}} // expected-warning@+1 {{implicit declaration of function 'svhistcnt_s64_z'}} return SVE_ACLE_FUNC(svhistcnt,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhistcnt_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.histcnt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svhistcnt_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.histcnt.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svhistcnt_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svhistcnt_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.histcnt.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhistcnt_z'}} // expected-warning@+1 {{implicit declaration of function 'svhistcnt_u32_z'}} return SVE_ACLE_FUNC(svhistcnt,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhistcnt_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.histcnt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svhistcnt_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.histcnt.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svhistcnt_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svhistcnt_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.histcnt.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhistcnt_z'}} // expected-warning@+1 {{implicit declaration of function 'svhistcnt_u64_z'}} return SVE_ACLE_FUNC(svhistcnt,_u64,_z,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histseg.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histseg.c index acb672eb773f..e49a3993197d 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histseg.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_histseg.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,35 +14,21 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svhistseg_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.histseg.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svhistseg_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.histseg.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svhistseg_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svhistseg_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.histseg.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhistseg'}} // expected-warning@+1 {{implicit declaration of function 'svhistseg_s8'}} return SVE_ACLE_FUNC(svhistseg,_s8,,)(op1, op2); } -// CHECK-LABEL: @test_svhistseg_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.histseg.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svhistseg_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.histseg.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svhistseg_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svhistseg_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.histseg.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhistseg'}} // expected-warning@+1 {{implicit declaration of function 'svhistseg_u8'}} return SVE_ACLE_FUNC(svhistseg,_u8,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c index 47bdeea57837..efce49325e2b 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsub.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,969 +14,557 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svhsub_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svhsub_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svhsub_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svhsub_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_s8_z'}} return SVE_ACLE_FUNC(svhsub,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsub_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svhsub_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svhsub_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_s16_z'}} return SVE_ACLE_FUNC(svhsub,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsub_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svhsub_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svhsub_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_s32_z'}} return SVE_ACLE_FUNC(svhsub,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsub_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svhsub_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svhsub_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_s64_z'}} return SVE_ACLE_FUNC(svhsub,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svhsub_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svhsub_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svhsub_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_u8_z'}} return SVE_ACLE_FUNC(svhsub,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsub_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svhsub_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svhsub_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_u16_z'}} return SVE_ACLE_FUNC(svhsub,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsub_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svhsub_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svhsub_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_u32_z'}} return SVE_ACLE_FUNC(svhsub,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsub_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svhsub_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svhsub_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_u64_z'}} return SVE_ACLE_FUNC(svhsub,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svhsub_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svhsub_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svhsub_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_s8_m'}} return SVE_ACLE_FUNC(svhsub,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsub_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svhsub_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svhsub_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_s16_m'}} return SVE_ACLE_FUNC(svhsub,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsub_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svhsub_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svhsub_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_s32_m'}} return SVE_ACLE_FUNC(svhsub,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsub_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svhsub_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svhsub_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_s64_m'}} return SVE_ACLE_FUNC(svhsub,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svhsub_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svhsub_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svhsub_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_u8_m'}} return SVE_ACLE_FUNC(svhsub,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsub_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svhsub_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svhsub_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_u16_m'}} return SVE_ACLE_FUNC(svhsub,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsub_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svhsub_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svhsub_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_u32_m'}} return SVE_ACLE_FUNC(svhsub,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsub_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svhsub_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svhsub_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_u64_m'}} return SVE_ACLE_FUNC(svhsub,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svhsub_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svhsub_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svhsub_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_s8_x'}} return SVE_ACLE_FUNC(svhsub,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsub_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svhsub_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svhsub_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_s16_x'}} return SVE_ACLE_FUNC(svhsub,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsub_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svhsub_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svhsub_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_s32_x'}} return SVE_ACLE_FUNC(svhsub,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsub_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svhsub_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svhsub_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_s64_x'}} return SVE_ACLE_FUNC(svhsub,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svhsub_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svhsub_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svhsub_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_u8_x'}} return SVE_ACLE_FUNC(svhsub,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsub_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svhsub_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svhsub_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_u16_x'}} return SVE_ACLE_FUNC(svhsub,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsub_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svhsub_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svhsub_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_u32_x'}} return SVE_ACLE_FUNC(svhsub,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsub_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svhsub_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svhsub_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_u64_x'}} return SVE_ACLE_FUNC(svhsub,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsub_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svhsub_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svhsub_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_s8_z'}} return SVE_ACLE_FUNC(svhsub,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsub_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svhsub_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svhsub_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_s16_z'}} return SVE_ACLE_FUNC(svhsub,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsub_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svhsub_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svhsub_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_s32_z'}} return SVE_ACLE_FUNC(svhsub,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsub_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svhsub_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svhsub_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_s64_z'}} return SVE_ACLE_FUNC(svhsub,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsub_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svhsub_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svhsub_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_u8_z'}} return SVE_ACLE_FUNC(svhsub,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsub_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svhsub_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svhsub_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_u16_z'}} return SVE_ACLE_FUNC(svhsub,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsub_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svhsub_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svhsub_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_u32_z'}} return SVE_ACLE_FUNC(svhsub,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsub_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svhsub_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svhsub_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_u64_z'}} return SVE_ACLE_FUNC(svhsub,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsub_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svhsub_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svhsub_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_s8_m'}} return SVE_ACLE_FUNC(svhsub,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsub_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svhsub_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svhsub_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_s16_m'}} return SVE_ACLE_FUNC(svhsub,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsub_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svhsub_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svhsub_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_s32_m'}} return SVE_ACLE_FUNC(svhsub,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsub_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svhsub_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svhsub_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_s64_m'}} return SVE_ACLE_FUNC(svhsub,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsub_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svhsub_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svhsub_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_u8_m'}} return SVE_ACLE_FUNC(svhsub,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsub_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svhsub_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svhsub_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_u16_m'}} return SVE_ACLE_FUNC(svhsub,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsub_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svhsub_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svhsub_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_u32_m'}} return SVE_ACLE_FUNC(svhsub,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsub_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svhsub_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svhsub_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_u64_m'}} return SVE_ACLE_FUNC(svhsub,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsub_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svhsub_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svhsub_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_s8_x'}} return SVE_ACLE_FUNC(svhsub,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsub_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svhsub_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svhsub_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_s16_x'}} return SVE_ACLE_FUNC(svhsub,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsub_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svhsub_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svhsub_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_s32_x'}} return SVE_ACLE_FUNC(svhsub,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsub_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svhsub_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svhsub_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsub.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_s64_x'}} return SVE_ACLE_FUNC(svhsub,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsub_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svhsub_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svhsub_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_u8_x'}} return SVE_ACLE_FUNC(svhsub,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsub_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svhsub_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svhsub_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_u16_x'}} return SVE_ACLE_FUNC(svhsub,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsub_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svhsub_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svhsub_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_u32_x'}} return SVE_ACLE_FUNC(svhsub,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsub_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsub_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svhsub_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svhsub_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsub.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsub_n_u64_x'}} return SVE_ACLE_FUNC(svhsub,_n_u64,_x,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c index 823cfd868175..381b760db854 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_hsubr.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,969 +14,556 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svhsubr_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsubr_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svhsubr_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svhsubr_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_s8_z'}} return SVE_ACLE_FUNC(svhsubr,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsubr_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svhsubr_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svhsubr_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_s16_z'}} return SVE_ACLE_FUNC(svhsubr,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsubr_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svhsubr_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svhsubr_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_s32_z'}} return SVE_ACLE_FUNC(svhsubr,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsubr_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svhsubr_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svhsubr_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_s64_z'}} return SVE_ACLE_FUNC(svhsubr,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsubr_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svhsubr_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svhsubr_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_u8_z'}} return SVE_ACLE_FUNC(svhsubr,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsubr_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svhsubr_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svhsubr_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_u16_z'}} return SVE_ACLE_FUNC(svhsubr,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsubr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svhsubr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svhsubr_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_u32_z'}} return SVE_ACLE_FUNC(svhsubr,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsubr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svhsubr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svhsubr_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_u64_z'}} return SVE_ACLE_FUNC(svhsubr,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsubr_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svhsubr_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svhsubr_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_s8_m'}} return SVE_ACLE_FUNC(svhsubr,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsubr_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svhsubr_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svhsubr_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_s16_m'}} return SVE_ACLE_FUNC(svhsubr,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsubr_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svhsubr_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svhsubr_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_s32_m'}} return SVE_ACLE_FUNC(svhsubr,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsubr_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svhsubr_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svhsubr_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_s64_m'}} return SVE_ACLE_FUNC(svhsubr,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsubr_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svhsubr_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svhsubr_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_u8_m'}} return SVE_ACLE_FUNC(svhsubr,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsubr_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svhsubr_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svhsubr_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_u16_m'}} return SVE_ACLE_FUNC(svhsubr,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsubr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svhsubr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svhsubr_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_u32_m'}} return SVE_ACLE_FUNC(svhsubr,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsubr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svhsubr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svhsubr_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_u64_m'}} return SVE_ACLE_FUNC(svhsubr,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsubr_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svhsubr_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svhsubr_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_s8_x'}} return SVE_ACLE_FUNC(svhsubr,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsubr_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svhsubr_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svhsubr_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_s16_x'}} return SVE_ACLE_FUNC(svhsubr,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsubr_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svhsubr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svhsubr_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_s32_x'}} return SVE_ACLE_FUNC(svhsubr,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsubr_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svhsubr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svhsubr_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_s64_x'}} return SVE_ACLE_FUNC(svhsubr,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svhsubr_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svhsubr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svhsubr_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_u8_x'}} return SVE_ACLE_FUNC(svhsubr,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsubr_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svhsubr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svhsubr_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_u16_x'}} return SVE_ACLE_FUNC(svhsubr,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsubr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svhsubr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svhsubr_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_u32_x'}} return SVE_ACLE_FUNC(svhsubr,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svhsubr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svhsubr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svhsubr_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_u64_x'}} return SVE_ACLE_FUNC(svhsubr,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsubr_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svhsubr_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svhsubr_n_s8_z + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_s8_z'}} return SVE_ACLE_FUNC(svhsubr,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svhsubr_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svhsubr_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_s16_z'}} return SVE_ACLE_FUNC(svhsubr,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svhsubr_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svhsubr_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_s32_z'}} return SVE_ACLE_FUNC(svhsubr,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svhsubr_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svhsubr_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_s64_z'}} return SVE_ACLE_FUNC(svhsubr,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsubr_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svhsubr_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svhsubr_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_u8_z'}} return SVE_ACLE_FUNC(svhsubr,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svhsubr_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svhsubr_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_u16_z'}} return SVE_ACLE_FUNC(svhsubr,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svhsubr_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svhsubr_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_u32_z'}} return SVE_ACLE_FUNC(svhsubr,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svhsubr_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svhsubr_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_u64_z'}} return SVE_ACLE_FUNC(svhsubr,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsubr_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svhsubr_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svhsubr_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_s8_m'}} return SVE_ACLE_FUNC(svhsubr,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svhsubr_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svhsubr_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_s16_m'}} return SVE_ACLE_FUNC(svhsubr,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svhsubr_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svhsubr_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_s32_m'}} return SVE_ACLE_FUNC(svhsubr,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svhsubr_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svhsubr_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_s64_m'}} return SVE_ACLE_FUNC(svhsubr,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsubr_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svhsubr_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svhsubr_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_u8_m'}} return SVE_ACLE_FUNC(svhsubr,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svhsubr_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svhsubr_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_u16_m'}} return SVE_ACLE_FUNC(svhsubr,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svhsubr_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svhsubr_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_u32_m'}} return SVE_ACLE_FUNC(svhsubr,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svhsubr_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svhsubr_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_u64_m'}} return SVE_ACLE_FUNC(svhsubr,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsubr_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svhsubr_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svhsubr_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_s8_x'}} return SVE_ACLE_FUNC(svhsubr,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svhsubr_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svhsubr_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_s16_x'}} return SVE_ACLE_FUNC(svhsubr,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svhsubr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svhsubr_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_s32_x'}} return SVE_ACLE_FUNC(svhsubr,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svhsubr_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svhsubr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svhsubr_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shsubr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_s64_x'}} return SVE_ACLE_FUNC(svhsubr,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svhsubr_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svhsubr_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svhsubr_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_u8_x'}} return SVE_ACLE_FUNC(svhsubr,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svhsubr_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svhsubr_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_u16_x'}} return SVE_ACLE_FUNC(svhsubr,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svhsubr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svhsubr_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_u32_x'}} return SVE_ACLE_FUNC(svhsubr,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svhsubr_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svhsubr_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svhsubr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svhsubr_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uhsubr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svhsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svhsubr_n_u64_x'}} return SVE_ACLE_FUNC(svhsubr,_n_u64,_x,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1.c index 5c9b61009a49..47febd9823a4 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,607 +14,337 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldnt1_gather_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svldnt1_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svldnt1_gather_u32base_s32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldnt1_gather_u32base_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_s32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32base_s32'}} return SVE_ACLE_FUNC(svldnt1_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svldnt1_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svldnt1_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldnt1_gather_u64base_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64base_s64'}} return SVE_ACLE_FUNC(svldnt1_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1_gather_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svldnt1_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svldnt1_gather_u32base_u32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldnt1_gather_u32base_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_u32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32base_u32'}} return SVE_ACLE_FUNC(svldnt1_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svldnt1_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svldnt1_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldnt1_gather_u64base_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64base_u64'}} return SVE_ACLE_FUNC(svldnt1_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1_gather_u32base_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svldnt1_gather_u32base_f32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svldnt1_gather_u32base_f32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldnt1_gather_u32base_f32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_f32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32base_f32'}} return SVE_ACLE_FUNC(svldnt1_gather, _u32base, _f32, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1_gather_u64base_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z31test_svldnt1_gather_u64base_f64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svldnt1_gather_u64base_f64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldnt1_gather_u64base_f64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_f64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64base_f64'}} return SVE_ACLE_FUNC(svldnt1_gather, _u64base, _f64, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1_gather_s64offset_s64u10__SVBool_tPKlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svldnt1_gather_s64offset_s64(svbool_t pg, const int64_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldnt1_gather_s64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[PG]], i64* %base, %offsets) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_s64offset_s64'}} return SVE_ACLE_FUNC(svldnt1_gather_, s64, offset, _s64)(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1_gather_s64offset_u64u10__SVBool_tPKmu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svldnt1_gather_s64offset_u64(svbool_t pg, const uint64_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldnt1_gather_s64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[PG]], i64* %base, %offsets) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_s64offset_u64'}} return SVE_ACLE_FUNC(svldnt1_gather_, s64, offset, _u64)(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1_gather_s64offset_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1_gather_s64offset_f64u10__SVBool_tPKdu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svldnt1_gather_s64offset_f64(svbool_t pg, const float64_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldnt1_gather_s64offset_f64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2f64( [[PG]], double* %base, %offsets) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_s64offset_f64'}} return SVE_ACLE_FUNC(svldnt1_gather_, s64, offset, _f64)(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1_gather_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1_gather_u32offset_s32u10__SVBool_tPKiu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svldnt1_gather_u32offset_s32(svbool_t pg, const int32_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldnt1_gather_u32offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i32( [[PG]], i32* %base, %offsets) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32offset_s32'}} return SVE_ACLE_FUNC(svldnt1_gather_, u32, offset, _s32)(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1_gather_u64offset_s64u10__SVBool_tPKlu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svldnt1_gather_u64offset_s64(svbool_t pg, const int64_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldnt1_gather_u64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[PG]], i64* %base, %offsets) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64offset_s64'}} return SVE_ACLE_FUNC(svldnt1_gather_, u64, offset, _s64)(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1_gather_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1_gather_u32offset_u32u10__SVBool_tPKju12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svldnt1_gather_u32offset_u32(svbool_t pg, const uint32_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldnt1_gather_u32offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i32( [[PG]], i32* %base, %offsets) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32offset_u32'}} return SVE_ACLE_FUNC(svldnt1_gather_, u32, offset, _u32)(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1_gather_u64offset_u64u10__SVBool_tPKmu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svldnt1_gather_u64offset_u64(svbool_t pg, const uint64_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldnt1_gather_u64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i64( [[PG]], i64* %base, %offsets) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64offset_u64'}} return SVE_ACLE_FUNC(svldnt1_gather_, u64, offset, _u64)(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1_gather_u32offset_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1_gather_u32offset_f32u10__SVBool_tPKfu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4f32( [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svldnt1_gather_u32offset_f32(svbool_t pg, const float32_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldnt1_gather_u32offset_f32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4f32( [[PG]], float* %base, %offsets) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32offset_f32'}} return SVE_ACLE_FUNC(svldnt1_gather_, u32, offset, _f32)(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1_gather_u64offset_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1_gather_u64offset_f64u10__SVBool_tPKdu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svldnt1_gather_u64offset_f64(svbool_t pg, const float64_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldnt1_gather_u64offset_f64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2f64( [[PG]], double* %base, %offsets) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64offset_f64'}} return SVE_ACLE_FUNC(svldnt1_gather_, u64, offset, _f64)(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1_gather_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z38test_svldnt1_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svldnt1_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1_gather_u32base_offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset_s32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32base_offset_s32'}} return SVE_ACLE_FUNC(svldnt1_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z38test_svldnt1_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svldnt1_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1_gather_u64base_offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64base_offset_s64'}} return SVE_ACLE_FUNC(svldnt1_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1_gather_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z38test_svldnt1_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svldnt1_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1_gather_u32base_offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset_u32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32base_offset_u32'}} return SVE_ACLE_FUNC(svldnt1_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z38test_svldnt1_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svldnt1_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1_gather_u64base_offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64base_offset_u64'}} return SVE_ACLE_FUNC(svldnt1_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1_gather_u32base_offset_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z38test_svldnt1_gather_u32base_offset_f32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svldnt1_gather_u32base_offset_f32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1_gather_u32base_offset_f32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset_f32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32base_offset_f32'}} return SVE_ACLE_FUNC(svldnt1_gather, _u32base, _offset_f32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1_gather_u64base_offset_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z38test_svldnt1_gather_u64base_offset_f64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svldnt1_gather_u64base_offset_f64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1_gather_u64base_offset_f64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_offset_f64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64base_offset_f64'}} return SVE_ACLE_FUNC(svldnt1_gather, _u64base, _offset_f64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1_gather_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z32test_svldnt1_gather_s64index_s64u10__SVBool_tPKlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svldnt1_gather_s64index_s64(svbool_t pg, const int64_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldnt1_gather_s64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[PG]], i64* %base, %indices) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_s64index_s64'}} return SVE_ACLE_FUNC(svldnt1_gather_, s64, index, _s64)(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1_gather_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z32test_svldnt1_gather_s64index_u64u10__SVBool_tPKmu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svldnt1_gather_s64index_u64(svbool_t pg, const uint64_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldnt1_gather_s64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[PG]], i64* %base, %indices) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_s64index_u64'}} return SVE_ACLE_FUNC(svldnt1_gather_, s64, index, _u64)(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1_gather_s64index_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z32test_svldnt1_gather_s64index_f64u10__SVBool_tPKdu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svldnt1_gather_s64index_f64(svbool_t pg, const float64_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldnt1_gather_s64index_f64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2f64( [[PG]], double* %base, %indices) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_s64index_f64'}} return SVE_ACLE_FUNC(svldnt1_gather_, s64, index, _f64)(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1_gather_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z32test_svldnt1_gather_u64index_s64u10__SVBool_tPKlu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svldnt1_gather_u64index_s64(svbool_t pg, const int64_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldnt1_gather_u64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[PG]], i64* %base, %indices) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64index_s64'}} return SVE_ACLE_FUNC(svldnt1_gather_, u64, index, _s64)(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1_gather_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z32test_svldnt1_gather_u64index_u64u10__SVBool_tPKmu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svldnt1_gather_u64index_u64(svbool_t pg, const uint64_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldnt1_gather_u64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i64( [[PG]], i64* %base, %indices) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64index_u64'}} return SVE_ACLE_FUNC(svldnt1_gather_, u64, index, _u64)(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1_gather_u64index_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z32test_svldnt1_gather_u64index_f64u10__SVBool_tPKdu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2f64( [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svldnt1_gather_u64index_f64(svbool_t pg, const float64_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldnt1_gather_u64index_f64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2f64( [[PG]], double* %base, %indices) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64index_f64'}} return SVE_ACLE_FUNC(svldnt1_gather_, u64, index, _f64)(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1_gather_u32base_index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z37test_svldnt1_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldnt1_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svldnt1_gather_u32base_index_s32 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index_s32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32base_index_s32'}} return SVE_ACLE_FUNC(svldnt1_gather, _u32base, _index_s32, )(pg, bases, index); } -// CHECK-LABEL: @test_svldnt1_gather_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z37test_svldnt1_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldnt1_gather_u64base_index_s64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 3 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64base_index_s64'}} return SVE_ACLE_FUNC(svldnt1_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: @test_svldnt1_gather_u32base_index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z37test_svldnt1_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldnt1_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svldnt1_gather_u32base_index_u32 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i32.nxv4i32( [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index_u32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32base_index_u32'}} return SVE_ACLE_FUNC(svldnt1_gather, _u32base, _index_u32, )(pg, bases, index); } -// CHECK-LABEL: @test_svldnt1_gather_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z37test_svldnt1_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldnt1_gather_u64base_index_u64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 3 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i64.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64base_index_u64'}} return SVE_ACLE_FUNC(svldnt1_gather, _u64base, _index_u64, )(pg, bases, index); } -// CHECK-LABEL: @test_svldnt1_gather_u32base_index_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z37test_svldnt1_gather_u32base_index_f32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svldnt1_gather_u32base_index_f32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svldnt1_gather_u32base_index_f32 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4f32.nxv4i32( [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index_f32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u32base_index_f32'}} return SVE_ACLE_FUNC(svldnt1_gather, _u32base, _index_f32, )(pg, bases, index); } -// CHECK-LABEL: @test_svldnt1_gather_u64base_index_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z37test_svldnt1_gather_u64base_index_f64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svldnt1_gather_u64base_index_f64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldnt1_gather_u64base_index_f64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 3 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2f64.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret [[LOAD]] // overload-warning@+2 {{implicit declaration of function 'svldnt1_gather_index_f64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1_gather_u64base_index_f64'}} return SVE_ACLE_FUNC(svldnt1_gather, _u64base, _index_f64, )(pg, bases, index); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sb.c index a031b754fe7e..44164b1b21a7 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,281 +14,155 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldnt1sb_gather_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1sb_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldnt1sb_gather_u32base_s32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldnt1sb_gather_u32base_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_s32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u32base_s32'}} return SVE_ACLE_FUNC(svldnt1sb_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1sb_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1sb_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1sb_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldnt1sb_gather_u64base_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u64base_s64'}} return SVE_ACLE_FUNC(svldnt1sb_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1sb_gather_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1sb_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldnt1sb_gather_u32base_u32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldnt1sb_gather_u32base_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_u32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u32base_u32'}} return SVE_ACLE_FUNC(svldnt1sb_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1sb_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1sb_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1sb_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldnt1sb_gather_u64base_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u64base_u64'}} return SVE_ACLE_FUNC(svldnt1sb_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1sb_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1sb_gather_s64offset_s64u10__SVBool_tPKau11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1sb_gather_s64offset_s64(svbool_t pg, const int8_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldnt1sb_gather_s64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[PG]], i8* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_s64offset_s64'}} return SVE_ACLE_FUNC(svldnt1sb_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1sb_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1sb_gather_s64offset_u64u10__SVBool_tPKau11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1sb_gather_s64offset_u64(svbool_t pg, const int8_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldnt1sb_gather_s64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[PG]], i8* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_s64offset_u64'}} return SVE_ACLE_FUNC(svldnt1sb_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1sb_gather_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1sb_gather_u32offset_s32u10__SVBool_tPKau12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldnt1sb_gather_u32offset_s32(svbool_t pg, const int8_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldnt1sb_gather_u32offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[PG]], i8* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_s32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u32offset_s32'}} return SVE_ACLE_FUNC(svldnt1sb_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1sb_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1sb_gather_u64offset_s64u10__SVBool_tPKau12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1sb_gather_u64offset_s64(svbool_t pg, const int8_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldnt1sb_gather_u64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[PG]], i8* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u64offset_s64'}} return SVE_ACLE_FUNC(svldnt1sb_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1sb_gather_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1sb_gather_u32offset_u32u10__SVBool_tPKau12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldnt1sb_gather_u32offset_u32(svbool_t pg, const int8_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldnt1sb_gather_u32offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[PG]], i8* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_u32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u32offset_u32'}} return SVE_ACLE_FUNC(svldnt1sb_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1sb_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1sb_gather_u64offset_u64u10__SVBool_tPKau12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1sb_gather_u64offset_u64(svbool_t pg, const int8_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldnt1sb_gather_u64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[PG]], i8* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u64offset_u64'}} return SVE_ACLE_FUNC(svldnt1sb_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1sb_gather_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1sb_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldnt1sb_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1sb_gather_u32base_offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_s32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u32base_offset_s32'}} return SVE_ACLE_FUNC(svldnt1sb_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1sb_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1sb_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1sb_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1sb_gather_u64base_offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u64base_offset_s64'}} return SVE_ACLE_FUNC(svldnt1sb_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1sb_gather_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1sb_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldnt1sb_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1sb_gather_u32base_offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_u32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u32base_offset_u32'}} return SVE_ACLE_FUNC(svldnt1sb_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1sb_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1sb_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1sb_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1sb_gather_u64base_offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sb_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sb_gather_u64base_offset_u64'}} return SVE_ACLE_FUNC(svldnt1sb_gather, _u64base, _offset_u64, )(pg, bases, offset); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sh.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sh.c index 09a700210e2c..ad439a224fce 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sh.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sh.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,449 +14,247 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldnt1sh_gather_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1sh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldnt1sh_gather_u32base_s32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldnt1sh_gather_u32base_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_s32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u32base_s32'}} return SVE_ACLE_FUNC(svldnt1sh_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1sh_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1sh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1sh_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldnt1sh_gather_u64base_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64base_s64'}} return SVE_ACLE_FUNC(svldnt1sh_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1sh_gather_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1sh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldnt1sh_gather_u32base_u32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldnt1sh_gather_u32base_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_u32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u32base_u32'}} return SVE_ACLE_FUNC(svldnt1sh_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1sh_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1sh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1sh_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldnt1sh_gather_u64base_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64base_u64'}} return SVE_ACLE_FUNC(svldnt1sh_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1sh_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1sh_gather_s64offset_s64u10__SVBool_tPKsu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1sh_gather_s64offset_s64(svbool_t pg, const int16_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldnt1sh_gather_s64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[PG]], i16* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_s64offset_s64'}} return SVE_ACLE_FUNC(svldnt1sh_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1sh_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1sh_gather_s64offset_u64u10__SVBool_tPKsu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1sh_gather_s64offset_u64(svbool_t pg, const int16_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldnt1sh_gather_s64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[PG]], i16* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_s64offset_u64'}} return SVE_ACLE_FUNC(svldnt1sh_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1sh_gather_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1sh_gather_u32offset_s32u10__SVBool_tPKsu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldnt1sh_gather_u32offset_s32(svbool_t pg, const int16_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldnt1sh_gather_u32offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[PG]], i16* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_s32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u32offset_s32'}} return SVE_ACLE_FUNC(svldnt1sh_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1sh_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1sh_gather_u64offset_s64u10__SVBool_tPKsu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1sh_gather_u64offset_s64(svbool_t pg, const int16_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldnt1sh_gather_u64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[PG]], i16* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64offset_s64'}} return SVE_ACLE_FUNC(svldnt1sh_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1sh_gather_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1sh_gather_u32offset_u32u10__SVBool_tPKsu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldnt1sh_gather_u32offset_u32(svbool_t pg, const int16_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldnt1sh_gather_u32offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[PG]], i16* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_u32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u32offset_u32'}} return SVE_ACLE_FUNC(svldnt1sh_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1sh_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1sh_gather_u64offset_u64u10__SVBool_tPKsu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1sh_gather_u64offset_u64(svbool_t pg, const int16_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldnt1sh_gather_u64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[PG]], i16* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64offset_u64'}} return SVE_ACLE_FUNC(svldnt1sh_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1sh_gather_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1sh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldnt1sh_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1sh_gather_u32base_offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_s32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u32base_offset_s32'}} return SVE_ACLE_FUNC(svldnt1sh_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1sh_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1sh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1sh_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1sh_gather_u64base_offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64base_offset_s64'}} return SVE_ACLE_FUNC(svldnt1sh_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1sh_gather_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1sh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldnt1sh_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1sh_gather_u32base_offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_u32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u32base_offset_u32'}} return SVE_ACLE_FUNC(svldnt1sh_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1sh_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1sh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1sh_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1sh_gather_u64base_offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64base_offset_u64'}} return SVE_ACLE_FUNC(svldnt1sh_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1sh_gather_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldnt1sh_gather_s64index_s64u10__SVBool_tPKsu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1sh_gather_s64index_s64(svbool_t pg, const int16_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldnt1sh_gather_s64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[PG]], i16* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_index_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_s64index_s64'}} return SVE_ACLE_FUNC(svldnt1sh_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1sh_gather_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldnt1sh_gather_s64index_u64u10__SVBool_tPKsu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1sh_gather_s64index_u64(svbool_t pg, const int16_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldnt1sh_gather_s64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[PG]], i16* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_index_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_s64index_u64'}} return SVE_ACLE_FUNC(svldnt1sh_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1sh_gather_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldnt1sh_gather_u64index_s64u10__SVBool_tPKsu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1sh_gather_u64index_s64(svbool_t pg, const int16_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldnt1sh_gather_u64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[PG]], i16* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_index_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64index_s64'}} return SVE_ACLE_FUNC(svldnt1sh_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1sh_gather_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldnt1sh_gather_u64index_u64u10__SVBool_tPKsu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1sh_gather_u64index_u64(svbool_t pg, const int16_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldnt1sh_gather_u64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[PG]], i16* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_index_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64index_u64'}} return SVE_ACLE_FUNC(svldnt1sh_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1sh_gather_u32base_index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldnt1sh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svldnt1sh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svldnt1sh_gather_u32base_index_s32 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_index_s32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u32base_index_s32'}} return SVE_ACLE_FUNC(svldnt1sh_gather, _u32base, _index_s32, )(pg, bases, index); } -// CHECK-LABEL: @test_svldnt1sh_gather_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldnt1sh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svldnt1sh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldnt1sh_gather_u64base_index_s64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_index_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64base_index_s64'}} return SVE_ACLE_FUNC(svldnt1sh_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: @test_svldnt1sh_gather_u32base_index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldnt1sh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svldnt1sh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svldnt1sh_gather_u32base_index_u32 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_index_u32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u32base_index_u32'}} return SVE_ACLE_FUNC(svldnt1sh_gather, _u32base, _index_u32, )(pg, bases, index); } -// CHECK-LABEL: @test_svldnt1sh_gather_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldnt1sh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svldnt1sh_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldnt1sh_gather_u64base_index_u64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sh_gather_index_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sh_gather_u64base_index_u64'}} return SVE_ACLE_FUNC(svldnt1sh_gather, _u64base, _index_u64, )(pg, bases, index); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sw.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sw.c index ec5ca9de59cf..96dcbd2d9420 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sw.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1sw.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,285 +14,157 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldnt1sw_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1sw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1sw_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldnt1sw_gather_u64base_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64base_s64'}} return SVE_ACLE_FUNC(svldnt1sw_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1sw_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1sw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1sw_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldnt1sw_gather_u64base_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64base_u64'}} return SVE_ACLE_FUNC(svldnt1sw_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1sw_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1sw_gather_s64offset_s64u10__SVBool_tPKiu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1sw_gather_s64offset_s64(svbool_t pg, const int32_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldnt1sw_gather_s64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[PG]], i32* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_s64offset_s64'}} return SVE_ACLE_FUNC(svldnt1sw_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1sw_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1sw_gather_s64offset_u64u10__SVBool_tPKiu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1sw_gather_s64offset_u64(svbool_t pg, const int32_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldnt1sw_gather_s64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[PG]], i32* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_s64offset_u64'}} return SVE_ACLE_FUNC(svldnt1sw_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1sw_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1sw_gather_u64offset_s64u10__SVBool_tPKiu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1sw_gather_u64offset_s64(svbool_t pg, const int32_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldnt1sw_gather_u64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[PG]], i32* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64offset_s64'}} return SVE_ACLE_FUNC(svldnt1sw_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1sw_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1sw_gather_u64offset_u64u10__SVBool_tPKiu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1sw_gather_u64offset_u64(svbool_t pg, const int32_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldnt1sw_gather_u64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[PG]], i32* %base, %offsets) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64offset_u64'}} return SVE_ACLE_FUNC(svldnt1sw_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1sw_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1sw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1sw_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1sw_gather_u64base_offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64base_offset_s64'}} return SVE_ACLE_FUNC(svldnt1sw_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1sw_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1sw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1sw_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1sw_gather_u64base_offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64base_offset_u64'}} return SVE_ACLE_FUNC(svldnt1sw_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1sw_gather_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldnt1sw_gather_s64index_s64u10__SVBool_tPKiu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1sw_gather_s64index_s64(svbool_t pg, const int32_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldnt1sw_gather_s64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[PG]], i32* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_index_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_s64index_s64'}} return SVE_ACLE_FUNC(svldnt1sw_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1sw_gather_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldnt1sw_gather_s64index_u64u10__SVBool_tPKiu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1sw_gather_s64index_u64(svbool_t pg, const int32_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldnt1sw_gather_s64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[PG]], i32* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_index_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_s64index_u64'}} return SVE_ACLE_FUNC(svldnt1sw_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1sw_gather_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldnt1sw_gather_u64index_s64u10__SVBool_tPKiu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1sw_gather_u64index_s64(svbool_t pg, const int32_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldnt1sw_gather_u64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[PG]], i32* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_index_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64index_s64'}} return SVE_ACLE_FUNC(svldnt1sw_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1sw_gather_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldnt1sw_gather_u64index_u64u10__SVBool_tPKiu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = sext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1sw_gather_u64index_u64(svbool_t pg, const int32_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldnt1sw_gather_u64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[PG]], i32* %base, %indices) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_index_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64index_u64'}} return SVE_ACLE_FUNC(svldnt1sw_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1sw_gather_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldnt1sw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svldnt1sw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldnt1sw_gather_u64base_index_s64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_index_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64base_index_s64'}} return SVE_ACLE_FUNC(svldnt1sw_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: @test_svldnt1sw_gather_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldnt1sw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = sext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svldnt1sw_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldnt1sw_gather_u64base_index_u64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[SEXT:%.*]] = sext [[LOAD]] to + // CHECK: ret [[SEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1sw_gather_index_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1sw_gather_u64base_index_u64'}} return SVE_ACLE_FUNC(svldnt1sw_gather, _u64base, _index_u64, )(pg, bases, index); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1ub.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1ub.c index e7e2fd8a63f8..29454ffb7ecc 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1ub.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1ub.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,281 +14,155 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldnt1ub_gather_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1ub_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldnt1ub_gather_u32base_s32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldnt1ub_gather_u32base_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_s32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u32base_s32'}} return SVE_ACLE_FUNC(svldnt1ub_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1ub_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1ub_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1ub_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldnt1ub_gather_u64base_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u64base_s64'}} return SVE_ACLE_FUNC(svldnt1ub_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1ub_gather_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1ub_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldnt1ub_gather_u32base_u32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldnt1ub_gather_u32base_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_u32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u32base_u32'}} return SVE_ACLE_FUNC(svldnt1ub_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1ub_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1ub_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1ub_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldnt1ub_gather_u64base_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u64base_u64'}} return SVE_ACLE_FUNC(svldnt1ub_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1ub_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1ub_gather_s64offset_s64u10__SVBool_tPKhu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1ub_gather_s64offset_s64(svbool_t pg, const uint8_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldnt1ub_gather_s64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[PG]], i8* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_s64offset_s64'}} return SVE_ACLE_FUNC(svldnt1ub_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1ub_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1ub_gather_s64offset_u64u10__SVBool_tPKhu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1ub_gather_s64offset_u64(svbool_t pg, const uint8_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldnt1ub_gather_s64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[PG]], i8* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_s64offset_u64'}} return SVE_ACLE_FUNC(svldnt1ub_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1ub_gather_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1ub_gather_u32offset_s32u10__SVBool_tPKhu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldnt1ub_gather_u32offset_s32(svbool_t pg, const uint8_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldnt1ub_gather_u32offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[PG]], i8* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_s32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u32offset_s32'}} return SVE_ACLE_FUNC(svldnt1ub_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1ub_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1ub_gather_u64offset_s64u10__SVBool_tPKhu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1ub_gather_u64offset_s64(svbool_t pg, const uint8_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldnt1ub_gather_u64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[PG]], i8* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u64offset_s64'}} return SVE_ACLE_FUNC(svldnt1ub_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1ub_gather_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1ub_gather_u32offset_u32u10__SVBool_tPKhu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldnt1ub_gather_u32offset_u32(svbool_t pg, const uint8_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldnt1ub_gather_u32offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i8( [[PG]], i8* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_u32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u32offset_u32'}} return SVE_ACLE_FUNC(svldnt1ub_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1ub_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1ub_gather_u64offset_u64u10__SVBool_tPKhu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[TMP0]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1ub_gather_u64offset_u64(svbool_t pg, const uint8_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldnt1ub_gather_u64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i8( [[PG]], i8* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u64offset_u64'}} return SVE_ACLE_FUNC(svldnt1ub_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1ub_gather_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1ub_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldnt1ub_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1ub_gather_u32base_offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_s32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u32base_offset_s32'}} return SVE_ACLE_FUNC(svldnt1ub_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1ub_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1ub_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1ub_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1ub_gather_u64base_offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u64base_offset_s64'}} return SVE_ACLE_FUNC(svldnt1ub_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1ub_gather_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1ub_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldnt1ub_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1ub_gather_u32base_offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i8.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_u32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u32base_offset_u32'}} return SVE_ACLE_FUNC(svldnt1ub_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1ub_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1ub_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1ub_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1ub_gather_u64base_offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i8.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1ub_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1ub_gather_u64base_offset_u64'}} return SVE_ACLE_FUNC(svldnt1ub_gather, _u64base, _offset_u64, )(pg, bases, offset); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uh.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uh.c index 5080daa286dd..f9b9161df295 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uh.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uh.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,449 +14,247 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldnt1uh_gather_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1uh_gather_u32base_s32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldnt1uh_gather_u32base_s32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldnt1uh_gather_u32base_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_s32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u32base_s32'}} return SVE_ACLE_FUNC(svldnt1uh_gather, _u32base, _s32, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1uh_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1uh_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1uh_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldnt1uh_gather_u64base_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64base_s64'}} return SVE_ACLE_FUNC(svldnt1uh_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1uh_gather_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1uh_gather_u32base_u32u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldnt1uh_gather_u32base_u32(svbool_t pg, svuint32_t bases) { + // CHECK-LABEL: test_svldnt1uh_gather_u32base_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_u32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u32base_u32'}} return SVE_ACLE_FUNC(svldnt1uh_gather, _u32base, _u32, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1uh_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1uh_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1uh_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldnt1uh_gather_u64base_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64base_u64'}} return SVE_ACLE_FUNC(svldnt1uh_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1uh_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1uh_gather_s64offset_s64u10__SVBool_tPKtu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1uh_gather_s64offset_s64(svbool_t pg, const uint16_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldnt1uh_gather_s64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[PG]], i16* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_s64offset_s64'}} return SVE_ACLE_FUNC(svldnt1uh_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1uh_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1uh_gather_s64offset_u64u10__SVBool_tPKtu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1uh_gather_s64offset_u64(svbool_t pg, const uint16_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldnt1uh_gather_s64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[PG]], i16* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_s64offset_u64'}} return SVE_ACLE_FUNC(svldnt1uh_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1uh_gather_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1uh_gather_u32offset_s32u10__SVBool_tPKtu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldnt1uh_gather_u32offset_s32(svbool_t pg, const uint16_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldnt1uh_gather_u32offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[PG]], i16* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_s32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u32offset_s32'}} return SVE_ACLE_FUNC(svldnt1uh_gather_, u32, offset_s32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1uh_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1uh_gather_u64offset_s64u10__SVBool_tPKtu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1uh_gather_u64offset_s64(svbool_t pg, const uint16_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldnt1uh_gather_u64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[PG]], i16* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64offset_s64'}} return SVE_ACLE_FUNC(svldnt1uh_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1uh_gather_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1uh_gather_u32offset_u32u10__SVBool_tPKtu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldnt1uh_gather_u32offset_u32(svbool_t pg, const uint16_t *base, svuint32_t offsets) { + // CHECK-LABEL: test_svldnt1uh_gather_u32offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.uxtw.nxv4i16( [[PG]], i16* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_u32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u32offset_u32'}} return SVE_ACLE_FUNC(svldnt1uh_gather_, u32, offset_u32, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1uh_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1uh_gather_u64offset_u64u10__SVBool_tPKtu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1uh_gather_u64offset_u64(svbool_t pg, const uint16_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldnt1uh_gather_u64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i16( [[PG]], i16* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64offset_u64'}} return SVE_ACLE_FUNC(svldnt1uh_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1uh_gather_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1uh_gather_u32base_offset_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svldnt1uh_gather_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1uh_gather_u32base_offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_s32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u32base_offset_s32'}} return SVE_ACLE_FUNC(svldnt1uh_gather, _u32base, _offset_s32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1uh_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1uh_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1uh_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1uh_gather_u64base_offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64base_offset_s64'}} return SVE_ACLE_FUNC(svldnt1uh_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1uh_gather_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1uh_gather_u32base_offset_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svldnt1uh_gather_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1uh_gather_u32base_offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_u32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u32base_offset_u32'}} return SVE_ACLE_FUNC(svldnt1uh_gather, _u32base, _offset_u32, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1uh_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1uh_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1uh_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1uh_gather_u64base_offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64base_offset_u64'}} return SVE_ACLE_FUNC(svldnt1uh_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1uh_gather_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldnt1uh_gather_s64index_s64u10__SVBool_tPKtu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1uh_gather_s64index_s64(svbool_t pg, const uint16_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldnt1uh_gather_s64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[PG]], i16* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_index_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_s64index_s64'}} return SVE_ACLE_FUNC(svldnt1uh_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1uh_gather_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldnt1uh_gather_s64index_u64u10__SVBool_tPKtu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1uh_gather_s64index_u64(svbool_t pg, const uint16_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldnt1uh_gather_s64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[PG]], i16* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_index_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_s64index_u64'}} return SVE_ACLE_FUNC(svldnt1uh_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1uh_gather_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldnt1uh_gather_u64index_s64u10__SVBool_tPKtu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1uh_gather_u64index_s64(svbool_t pg, const uint16_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldnt1uh_gather_u64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[PG]], i16* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_index_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64index_s64'}} return SVE_ACLE_FUNC(svldnt1uh_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1uh_gather_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldnt1uh_gather_u64index_u64u10__SVBool_tPKtu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[TMP0]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1uh_gather_u64index_u64(svbool_t pg, const uint16_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldnt1uh_gather_u64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i16( [[PG]], i16* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_index_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64index_u64'}} return SVE_ACLE_FUNC(svldnt1uh_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1uh_gather_u32base_index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldnt1uh_gather_u32base_index_s32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svldnt1uh_gather_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svldnt1uh_gather_u32base_index_s32 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_index_s32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u32base_index_s32'}} return SVE_ACLE_FUNC(svldnt1uh_gather, _u32base, _index_s32, )(pg, bases, index); } -// CHECK-LABEL: @test_svldnt1uh_gather_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldnt1uh_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svldnt1uh_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldnt1uh_gather_u64base_index_s64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_index_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64base_index_s64'}} return SVE_ACLE_FUNC(svldnt1uh_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: @test_svldnt1uh_gather_u32base_index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldnt1uh_gather_u32base_index_u32u10__SVBool_tu12__SVUint32_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svldnt1uh_gather_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index) { + // CHECK-LABEL: test_svldnt1uh_gather_u32base_index_u32 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv4i16.nxv4i32( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_index_u32'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u32base_index_u32'}} return SVE_ACLE_FUNC(svldnt1uh_gather, _u32base, _index_u32, )(pg, bases, index); } -// CHECK-LABEL: @test_svldnt1uh_gather_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldnt1uh_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svldnt1uh_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldnt1uh_gather_u64base_index_u64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i16.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uh_gather_index_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uh_gather_u64base_index_u64'}} return SVE_ACLE_FUNC(svldnt1uh_gather, _u64base, _index_u64, )(pg, bases, index); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uw.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uw.c index 2480c09e770b..cf95768e0a71 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uw.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_ldnt1uw.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,285 +14,157 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svldnt1uw_gather_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1uw_gather_u64base_s64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1uw_gather_u64base_s64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldnt1uw_gather_u64base_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64base_s64'}} return SVE_ACLE_FUNC(svldnt1uw_gather, _u64base, _s64, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1uw_gather_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z33test_svldnt1uw_gather_u64base_u64u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1uw_gather_u64base_u64(svbool_t pg, svuint64_t bases) { + // CHECK-LABEL: test_svldnt1uw_gather_u64base_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 0) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64base_u64'}} return SVE_ACLE_FUNC(svldnt1uw_gather, _u64base, _u64, )(pg, bases); } -// CHECK-LABEL: @test_svldnt1uw_gather_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1uw_gather_s64offset_s64u10__SVBool_tPKju11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1uw_gather_s64offset_s64(svbool_t pg, const uint32_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldnt1uw_gather_s64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[PG]], i32* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_s64offset_s64'}} return SVE_ACLE_FUNC(svldnt1uw_gather_, s64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1uw_gather_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1uw_gather_s64offset_u64u10__SVBool_tPKju11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1uw_gather_s64offset_u64(svbool_t pg, const uint32_t *base, svint64_t offsets) { + // CHECK-LABEL: test_svldnt1uw_gather_s64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[PG]], i32* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_s64offset_u64'}} return SVE_ACLE_FUNC(svldnt1uw_gather_, s64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1uw_gather_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1uw_gather_u64offset_s64u10__SVBool_tPKju12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1uw_gather_u64offset_s64(svbool_t pg, const uint32_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldnt1uw_gather_u64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[PG]], i32* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64offset_s64'}} return SVE_ACLE_FUNC(svldnt1uw_gather_, u64, offset_s64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1uw_gather_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z35test_svldnt1uw_gather_u64offset_u64u10__SVBool_tPKju12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1uw_gather_u64offset_u64(svbool_t pg, const uint32_t *base, svuint64_t offsets) { + // CHECK-LABEL: test_svldnt1uw_gather_u64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.nxv2i32( [[PG]], i32* %base, %offsets) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64offset_u64'}} return SVE_ACLE_FUNC(svldnt1uw_gather_, u64, offset_u64, )(pg, base, offsets); } -// CHECK-LABEL: @test_svldnt1uw_gather_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1uw_gather_u64base_offset_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1uw_gather_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1uw_gather_u64base_offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_offset_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64base_offset_s64'}} return SVE_ACLE_FUNC(svldnt1uw_gather, _u64base, _offset_s64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1uw_gather_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z40test_svldnt1uw_gather_u64base_offset_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1uw_gather_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset) { + // CHECK-LABEL: test_svldnt1uw_gather_u64base_offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 %offset) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_offset_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64base_offset_u64'}} return SVE_ACLE_FUNC(svldnt1uw_gather, _u64base, _offset_u64, )(pg, bases, offset); } -// CHECK-LABEL: @test_svldnt1uw_gather_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldnt1uw_gather_s64index_s64u10__SVBool_tPKju11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1uw_gather_s64index_s64(svbool_t pg, const uint32_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldnt1uw_gather_s64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[PG]], i32* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_index_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_s64index_s64'}} return SVE_ACLE_FUNC(svldnt1uw_gather_, s64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1uw_gather_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldnt1uw_gather_s64index_u64u10__SVBool_tPKju11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1uw_gather_s64index_u64(svbool_t pg, const uint32_t *base, svint64_t indices) { + // CHECK-LABEL: test_svldnt1uw_gather_s64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[PG]], i32* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_index_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_s64index_u64'}} return SVE_ACLE_FUNC(svldnt1uw_gather_, s64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1uw_gather_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldnt1uw_gather_u64index_s64u10__SVBool_tPKju12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svldnt1uw_gather_u64index_s64(svbool_t pg, const uint32_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldnt1uw_gather_u64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[PG]], i32* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_index_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64index_s64'}} return SVE_ACLE_FUNC(svldnt1uw_gather_, u64, index_s64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1uw_gather_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z34test_svldnt1uw_gather_u64index_u64u10__SVBool_tPKju12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[TMP0]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = zext [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svldnt1uw_gather_u64index_u64(svbool_t pg, const uint32_t *base, svuint64_t indices) { + // CHECK-LABEL: test_svldnt1uw_gather_u64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.index.nxv2i32( [[PG]], i32* %base, %indices) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_index_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64index_u64'}} return SVE_ACLE_FUNC(svldnt1uw_gather_, u64, index_u64, )(pg, base, indices); } -// CHECK-LABEL: @test_svldnt1uw_gather_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldnt1uw_gather_u64base_index_s64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svldnt1uw_gather_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldnt1uw_gather_u64base_index_s64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_index_s64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64base_index_s64'}} return SVE_ACLE_FUNC(svldnt1uw_gather, _u64base, _index_s64, )(pg, bases, index); } -// CHECK-LABEL: @test_svldnt1uw_gather_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z39test_svldnt1uw_gather_u64base_index_u64u10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = zext [[TMP2]] to -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svldnt1uw_gather_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index) { + // CHECK-LABEL: test_svldnt1uw_gather_u64base_index_u64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: [[LOAD:%.*]] = call @llvm.aarch64.sve.ldnt1.gather.scalar.offset.nxv2i32.nxv2i64( [[PG]], %bases, i64 [[SHL]]) + // CHECK: [[ZEXT:%.*]] = zext [[LOAD]] to + // CHECK: ret [[ZEXT]] // overload-warning@+2 {{implicit declaration of function 'svldnt1uw_gather_index_u64'}} // expected-warning@+1 {{implicit declaration of function 'svldnt1uw_gather_u64base_index_u64'}} return SVE_ACLE_FUNC(svldnt1uw_gather, _u64base, _index_u64, )(pg, bases, index); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_logb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_logb.c index 35e7707a64cb..bcb227120ed4 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_logb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_logb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,172 +14,100 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svlogb_f16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svlogb_f16_zu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv8f16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svlogb_f16_z(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svlogb_f16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.flogb.nxv8f16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svlogb_z'}} // expected-warning@+1 {{implicit declaration of function 'svlogb_f16_z'}} return SVE_ACLE_FUNC(svlogb,_f16,_z,)(pg, op); } -// CHECK-LABEL: @test_svlogb_f32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svlogb_f32_zu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv4f32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svlogb_f32_z(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svlogb_f32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.flogb.nxv4f32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svlogb_z'}} // expected-warning@+1 {{implicit declaration of function 'svlogb_f32_z'}} return SVE_ACLE_FUNC(svlogb,_f32,_z,)(pg, op); } -// CHECK-LABEL: @test_svlogb_f64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svlogb_f64_zu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv2f64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svlogb_f64_z(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svlogb_f64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.flogb.nxv2f64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svlogb_z'}} // expected-warning@+1 {{implicit declaration of function 'svlogb_f64_z'}} return SVE_ACLE_FUNC(svlogb,_f64,_z,)(pg, op); } -// CHECK-LABEL: @test_svlogb_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svlogb_f16_mu11__SVInt16_tu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv8f16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svlogb_f16_m(svint16_t inactive, svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svlogb_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.flogb.nxv8f16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svlogb_m'}} // expected-warning@+1 {{implicit declaration of function 'svlogb_f16_m'}} return SVE_ACLE_FUNC(svlogb,_f16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svlogb_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svlogb_f32_mu11__SVInt32_tu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv4f32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svlogb_f32_m(svint32_t inactive, svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svlogb_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.flogb.nxv4f32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svlogb_m'}} // expected-warning@+1 {{implicit declaration of function 'svlogb_f32_m'}} return SVE_ACLE_FUNC(svlogb,_f32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svlogb_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svlogb_f64_mu11__SVInt64_tu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv2f64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svlogb_f64_m(svint64_t inactive, svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svlogb_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.flogb.nxv2f64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svlogb_m'}} // expected-warning@+1 {{implicit declaration of function 'svlogb_f64_m'}} return SVE_ACLE_FUNC(svlogb,_f64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svlogb_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svlogb_f16_xu10__SVBool_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv8f16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svlogb_f16_x(svbool_t pg, svfloat16_t op) { + // CHECK-LABEL: test_svlogb_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.flogb.nxv8f16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svlogb_x'}} // expected-warning@+1 {{implicit declaration of function 'svlogb_f16_x'}} return SVE_ACLE_FUNC(svlogb,_f16,_x,)(pg, op); } -// CHECK-LABEL: @test_svlogb_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svlogb_f32_xu10__SVBool_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv4f32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svlogb_f32_x(svbool_t pg, svfloat32_t op) { + // CHECK-LABEL: test_svlogb_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.flogb.nxv4f32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svlogb_x'}} // expected-warning@+1 {{implicit declaration of function 'svlogb_f32_x'}} return SVE_ACLE_FUNC(svlogb,_f32,_x,)(pg, op); } -// CHECK-LABEL: @test_svlogb_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svlogb_f64_xu10__SVBool_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.flogb.nxv2f64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svlogb_f64_x(svbool_t pg, svfloat64_t op) { + // CHECK-LABEL: test_svlogb_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.flogb.nxv2f64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svlogb_x'}} // expected-warning@+1 {{implicit declaration of function 'svlogb_f64_x'}} return SVE_ACLE_FUNC(svlogb,_f64,_x,)(pg, op); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_match.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_match.c index 2346b9dfcf9c..d98bd678a902 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_match.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_match.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,77 +14,45 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmatch_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.match.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmatch_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.match.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svmatch_s8(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svmatch_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.match.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmatch'}} // expected-warning@+1 {{implicit declaration of function 'svmatch_s8'}} return SVE_ACLE_FUNC(svmatch,_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmatch_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.match.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmatch_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.match.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svmatch_s16(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmatch_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.match.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[RET]] // overload-warning@+2 {{implicit declaration of function 'svmatch'}} // expected-warning@+1 {{implicit declaration of function 'svmatch_s16'}} return SVE_ACLE_FUNC(svmatch,_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmatch_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.match.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svmatch_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.match.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svmatch_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svmatch_u8 + // CHECK: %[[intrinsic:.*]] = call @llvm.aarch64.sve.match.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[intrinsic]] // overload-warning@+2 {{implicit declaration of function 'svmatch'}} // expected-warning@+1 {{implicit declaration of function 'svmatch_u8'}} return SVE_ACLE_FUNC(svmatch,_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmatch_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.match.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svmatch_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.match.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svmatch_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmatch_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.match.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[RET]] // overload-warning@+2 {{implicit declaration of function 'svmatch'}} // expected-warning@+1 {{implicit declaration of function 'svmatch_u16'}} return SVE_ACLE_FUNC(svmatch,_u16,,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxnmp.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxnmp.c index c32a22afbf3d..01e43f95fdd5 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxnmp.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxnmp.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,115 +14,67 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmaxnmp_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svmaxnmp_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmaxnmp_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmaxnmp_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxnmp_m'}} // expected-warning@+1 {{implicit declaration of function 'svmaxnmp_f16_m'}} return SVE_ACLE_FUNC(svmaxnmp,_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnmp_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svmaxnmp_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmaxnmp_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmaxnmp_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxnmp_m'}} // expected-warning@+1 {{implicit declaration of function 'svmaxnmp_f32_m'}} return SVE_ACLE_FUNC(svmaxnmp,_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnmp_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svmaxnmp_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmaxnmp_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmaxnmp_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxnmp_m'}} // expected-warning@+1 {{implicit declaration of function 'svmaxnmp_f64_m'}} return SVE_ACLE_FUNC(svmaxnmp,_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnmp_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svmaxnmp_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmaxnmp_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmaxnmp_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxnmp_x'}} // expected-warning@+1 {{implicit declaration of function 'svmaxnmp_f16_x'}} return SVE_ACLE_FUNC(svmaxnmp,_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnmp_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svmaxnmp_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmaxnmp_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmaxnmp_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxnmp_x'}} // expected-warning@+1 {{implicit declaration of function 'svmaxnmp_f32_x'}} return SVE_ACLE_FUNC(svmaxnmp,_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxnmp_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svmaxnmp_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmaxnmp_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmaxnmp_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxnmp.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxnmp_x'}} // expected-warning@+1 {{implicit declaration of function 'svmaxnmp_f64_x'}} return SVE_ACLE_FUNC(svmaxnmp,_f64,_x,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxp.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxp.c index 833957928909..fcf84455cb39 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxp.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_maxp.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,411 +14,239 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmaxp_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmaxp_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svmaxp_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svmaxp_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smaxp.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_m'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_s8_m'}} return SVE_ACLE_FUNC(svmaxp,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxp_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmaxp_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmaxp_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smaxp.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_m'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_s16_m'}} return SVE_ACLE_FUNC(svmaxp,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxp_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmaxp_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmaxp_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smaxp.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_m'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_s32_m'}} return SVE_ACLE_FUNC(svmaxp,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxp_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmaxp_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svmaxp_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smaxp.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_m'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_s64_m'}} return SVE_ACLE_FUNC(svmaxp,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmaxp_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svmaxp_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svmaxp_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umaxp.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_m'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_u8_m'}} return SVE_ACLE_FUNC(svmaxp,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxp_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmaxp_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmaxp_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umaxp.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_m'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_u16_m'}} return SVE_ACLE_FUNC(svmaxp,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxp_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmaxp_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmaxp_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umaxp.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_m'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_u32_m'}} return SVE_ACLE_FUNC(svmaxp,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxp_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmaxp_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svmaxp_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umaxp.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_m'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_u64_m'}} return SVE_ACLE_FUNC(svmaxp,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmaxp_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svmaxp_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svmaxp_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smaxp.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_x'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_s8_x'}} return SVE_ACLE_FUNC(svmaxp,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxp_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmaxp_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmaxp_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smaxp.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_x'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_s16_x'}} return SVE_ACLE_FUNC(svmaxp,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxp_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmaxp_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmaxp_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smaxp.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_x'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_s32_x'}} return SVE_ACLE_FUNC(svmaxp,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxp_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmaxp_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svmaxp_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smaxp.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_x'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_s64_x'}} return SVE_ACLE_FUNC(svmaxp,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmaxp_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umaxp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svmaxp_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svmaxp_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umaxp.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_x'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_u8_x'}} return SVE_ACLE_FUNC(svmaxp,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxp_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmaxp_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmaxp_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umaxp.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_x'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_u16_x'}} return SVE_ACLE_FUNC(svmaxp,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxp_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmaxp_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmaxp_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umaxp.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_x'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_u32_x'}} return SVE_ACLE_FUNC(svmaxp,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxp_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umaxp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmaxp_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svmaxp_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umaxp.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_x'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_u64_x'}} return SVE_ACLE_FUNC(svmaxp,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxp_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmaxp_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmaxp_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxp.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_m'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_f16_m'}} return SVE_ACLE_FUNC(svmaxp,_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxp_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmaxp_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmaxp_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxp.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_m'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_f32_m'}} return SVE_ACLE_FUNC(svmaxp,_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxp_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmaxp_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmaxp_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxp.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_m'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_f64_m'}} return SVE_ACLE_FUNC(svmaxp,_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxp_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svmaxp_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svmaxp_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxp.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_x'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_f16_x'}} return SVE_ACLE_FUNC(svmaxp,_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxp_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmaxp_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svmaxp_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxp.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_x'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_f32_x'}} return SVE_ACLE_FUNC(svmaxp,_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svmaxp_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svmaxp_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmaxp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svmaxp_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svmaxp_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmaxp.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmaxp_x'}} // expected-warning@+1 {{implicit declaration of function 'svmaxp_f64_x'}} return SVE_ACLE_FUNC(svmaxp,_f64,_x,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minnmp.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minnmp.c index cef87cdf8846..4072511e3d52 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minnmp.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minnmp.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,115 +14,67 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svminnmp_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svminnmp_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svminnmp_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svminnmp_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnmp.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminnmp_m'}} // expected-warning@+1 {{implicit declaration of function 'svminnmp_f16_m'}} return SVE_ACLE_FUNC(svminnmp,_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnmp_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svminnmp_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svminnmp_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svminnmp_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnmp.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminnmp_m'}} // expected-warning@+1 {{implicit declaration of function 'svminnmp_f32_m'}} return SVE_ACLE_FUNC(svminnmp,_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnmp_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svminnmp_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svminnmp_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svminnmp_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnmp.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminnmp_m'}} // expected-warning@+1 {{implicit declaration of function 'svminnmp_f64_m'}} return SVE_ACLE_FUNC(svminnmp,_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnmp_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svminnmp_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svminnmp_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svminnmp_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnmp.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminnmp_x'}} // expected-warning@+1 {{implicit declaration of function 'svminnmp_f16_x'}} return SVE_ACLE_FUNC(svminnmp,_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnmp_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svminnmp_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svminnmp_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svminnmp_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnmp.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminnmp_x'}} // expected-warning@+1 {{implicit declaration of function 'svminnmp_f32_x'}} return SVE_ACLE_FUNC(svminnmp,_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminnmp_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svminnmp_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminnmp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svminnmp_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svminnmp_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminnmp.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminnmp_x'}} // expected-warning@+1 {{implicit declaration of function 'svminnmp_f64_x'}} return SVE_ACLE_FUNC(svminnmp,_f64,_x,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minp.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minp.c index ac0c62f94cf6..9885b2b936f6 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minp.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_minp.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,411 +14,239 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svminp_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svminp_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svminp_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svminp_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sminp.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_m'}} // expected-warning@+1 {{implicit declaration of function 'svminp_s8_m'}} return SVE_ACLE_FUNC(svminp,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminp_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svminp_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svminp_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sminp.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_m'}} // expected-warning@+1 {{implicit declaration of function 'svminp_s16_m'}} return SVE_ACLE_FUNC(svminp,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminp_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svminp_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svminp_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sminp.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_m'}} // expected-warning@+1 {{implicit declaration of function 'svminp_s32_m'}} return SVE_ACLE_FUNC(svminp,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminp_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svminp_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svminp_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sminp.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_m'}} // expected-warning@+1 {{implicit declaration of function 'svminp_s64_m'}} return SVE_ACLE_FUNC(svminp,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svminp_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svminp_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svminp_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uminp.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_m'}} // expected-warning@+1 {{implicit declaration of function 'svminp_u8_m'}} return SVE_ACLE_FUNC(svminp,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminp_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svminp_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svminp_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uminp.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_m'}} // expected-warning@+1 {{implicit declaration of function 'svminp_u16_m'}} return SVE_ACLE_FUNC(svminp,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminp_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svminp_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svminp_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uminp.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_m'}} // expected-warning@+1 {{implicit declaration of function 'svminp_u32_m'}} return SVE_ACLE_FUNC(svminp,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminp_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svminp_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svminp_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uminp.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_m'}} // expected-warning@+1 {{implicit declaration of function 'svminp_u64_m'}} return SVE_ACLE_FUNC(svminp,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svminp_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svminp_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svminp_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sminp.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_x'}} // expected-warning@+1 {{implicit declaration of function 'svminp_s8_x'}} return SVE_ACLE_FUNC(svminp,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminp_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svminp_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svminp_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sminp.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_x'}} // expected-warning@+1 {{implicit declaration of function 'svminp_s16_x'}} return SVE_ACLE_FUNC(svminp,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminp_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svminp_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svminp_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sminp.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_x'}} // expected-warning@+1 {{implicit declaration of function 'svminp_s32_x'}} return SVE_ACLE_FUNC(svminp,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminp_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svminp_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svminp_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sminp.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_x'}} // expected-warning@+1 {{implicit declaration of function 'svminp_s64_x'}} return SVE_ACLE_FUNC(svminp,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svminp_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uminp.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svminp_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svminp_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uminp.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_x'}} // expected-warning@+1 {{implicit declaration of function 'svminp_u8_x'}} return SVE_ACLE_FUNC(svminp,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminp_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svminp_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svminp_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uminp.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_x'}} // expected-warning@+1 {{implicit declaration of function 'svminp_u16_x'}} return SVE_ACLE_FUNC(svminp,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminp_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svminp_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svminp_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uminp.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_x'}} // expected-warning@+1 {{implicit declaration of function 'svminp_u32_x'}} return SVE_ACLE_FUNC(svminp,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminp_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uminp.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svminp_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svminp_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uminp.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_x'}} // expected-warning@+1 {{implicit declaration of function 'svminp_u64_x'}} return SVE_ACLE_FUNC(svminp,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_f16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminp_f16_mu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svminp_f16_m(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svminp_f16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminp.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_m'}} // expected-warning@+1 {{implicit declaration of function 'svminp_f16_m'}} return SVE_ACLE_FUNC(svminp,_f16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_f32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminp_f32_mu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svminp_f32_m(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svminp_f32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminp.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_m'}} // expected-warning@+1 {{implicit declaration of function 'svminp_f32_m'}} return SVE_ACLE_FUNC(svminp,_f32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_f64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminp_f64_mu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svminp_f64_m(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svminp_f64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminp.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_m'}} // expected-warning@+1 {{implicit declaration of function 'svminp_f64_m'}} return SVE_ACLE_FUNC(svminp,_f64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_f16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminp_f16_xu10__SVBool_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv8f16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat16_t test_svminp_f16_x(svbool_t pg, svfloat16_t op1, svfloat16_t op2) { + // CHECK-LABEL: test_svminp_f16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminp.nxv8f16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_x'}} // expected-warning@+1 {{implicit declaration of function 'svminp_f16_x'}} return SVE_ACLE_FUNC(svminp,_f16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_f32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminp_f32_xu10__SVBool_tu13__SVFloat32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv4f32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svminp_f32_x(svbool_t pg, svfloat32_t op1, svfloat32_t op2) { + // CHECK-LABEL: test_svminp_f32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminp.nxv4f32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_x'}} // expected-warning@+1 {{implicit declaration of function 'svminp_f32_x'}} return SVE_ACLE_FUNC(svminp,_f32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svminp_f64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svminp_f64_xu10__SVBool_tu13__SVFloat64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fminp.nxv2f64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat64_t test_svminp_f64_x(svbool_t pg, svfloat64_t op1, svfloat64_t op2) { + // CHECK-LABEL: test_svminp_f64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fminp.nxv2f64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svminp_x'}} // expected-warning@+1 {{implicit declaration of function 'svminp_f64_x'}} return SVE_ACLE_FUNC(svminp,_f64,_x,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mla.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mla.c index 1b6cb83fa3d7..c6e866ab9e14 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mla.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mla.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,178 +13,101 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmla_lane_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmla_lane_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svmla_lane_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmla_lane_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmla_lane_s16'}} return SVE_ACLE_FUNC(svmla_lane,_s16,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmla_lane_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmla_lane_s16_1u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svmla_lane_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmla_lane_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmla_lane_s16'}} return SVE_ACLE_FUNC(svmla_lane,_s16,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svmla_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmla_lane_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmla_lane_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmla_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.lane.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmla_lane_s32'}} return SVE_ACLE_FUNC(svmla_lane,_s32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmla_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmla_lane_s32_1u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmla_lane_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmla_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.lane.nxv4i32( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmla_lane_s32'}} return SVE_ACLE_FUNC(svmla_lane,_s32,,)(op1, op2, op3, 3); } -// CHECK-LABEL: @test_svmla_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmla_lane_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmla_lane_s64(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svmla_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmla_lane_s64'}} return SVE_ACLE_FUNC(svmla_lane,_s64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmla_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmla_lane_s64_1u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmla_lane_s64_1(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svmla_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( %op1, %op2, %op3, i32 1) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmla_lane_s64'}} return SVE_ACLE_FUNC(svmla_lane,_s64,,)(op1, op2, op3, 1); } -// CHECK-LABEL: @test_svmla_lane_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmla_lane_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svmla_lane_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmla_lane_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmla_lane_u16'}} return SVE_ACLE_FUNC(svmla_lane,_u16,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmla_lane_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmla_lane_u16_1u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svmla_lane_u16_1(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmla_lane_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.lane.nxv8i16( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmla_lane_u16'}} return SVE_ACLE_FUNC(svmla_lane,_u16,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svmla_lane_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmla_lane_u32_1u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmla_lane_u32_1(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmla_lane_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.lane.nxv4i32( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmla_lane_u32'}} return SVE_ACLE_FUNC(svmla_lane,_u32,,)(op1, op2, op3, 3); } -// CHECK-LABEL: @test_svmla_lane_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmla_lane_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmla_lane_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svmla_lane_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmla_lane_u64'}} return SVE_ACLE_FUNC(svmla_lane,_u64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmla_lane_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmla_lane_u64_1u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmla_lane_u64_1(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svmla_lane_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mla.lane.nxv2i64( %op1, %op2, %op3, i32 1) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmla_lane_u64'}} return SVE_ACLE_FUNC(svmla_lane,_u64,,)(op1, op2, op3, 1); } diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c index f3385a540816..9efa5f168f55 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,423 +14,248 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmlalb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlalb_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svmlalb_s16(svint16_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svmlalb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalb.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_s16'}} return SVE_ACLE_FUNC(svmlalb,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlalb_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmlalb_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmlalb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalb.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_s32'}} return SVE_ACLE_FUNC(svmlalb,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlalb_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmlalb_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmlalb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalb.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_s64'}} return SVE_ACLE_FUNC(svmlalb,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlalb_u16u12__SVUint16_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svmlalb_u16(svuint16_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svmlalb_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalb.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_u16'}} return SVE_ACLE_FUNC(svmlalb,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlalb_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmlalb_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmlalb_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalb.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_u32'}} return SVE_ACLE_FUNC(svmlalb,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlalb_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmlalb_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmlalb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalb.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_u64'}} return SVE_ACLE_FUNC(svmlalb,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlalb_n_s16u11__SVInt16_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmlalb_n_s16(svint16_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svmlalb_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalb.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_n_s16'}} return SVE_ACLE_FUNC(svmlalb,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlalb_n_s32u11__SVInt32_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmlalb_n_s32(svint32_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svmlalb_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalb.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_n_s32'}} return SVE_ACLE_FUNC(svmlalb,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlalb_n_s64u11__SVInt64_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmlalb_n_s64(svint64_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svmlalb_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalb.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_n_s64'}} return SVE_ACLE_FUNC(svmlalb,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlalb_n_u16u12__SVUint16_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmlalb_n_u16(svuint16_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svmlalb_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalb.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_n_u16'}} return SVE_ACLE_FUNC(svmlalb,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlalb_n_u32u12__SVUint32_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmlalb_n_u32(svuint32_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svmlalb_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalb.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_n_u32'}} return SVE_ACLE_FUNC(svmlalb,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlalb_n_u64u12__SVUint64_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmlalb_n_u64(svuint64_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svmlalb_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalb.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_n_u64'}} return SVE_ACLE_FUNC(svmlalb,_n_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalb_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlalb_lane_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmlalb_lane_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmlalb_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_lane_s32'}} return SVE_ACLE_FUNC(svmlalb_lane,_s32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlalb_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlalb_lane_s32_1u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmlalb_lane_s32_1(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmlalb_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv4i32( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_lane_s32'}} return SVE_ACLE_FUNC(svmlalb_lane,_s32,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svmlalb_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlalb_lane_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmlalb_lane_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmlalb_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_lane_s64'}} return SVE_ACLE_FUNC(svmlalb_lane,_s64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlalb_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlalb_lane_s64_1u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmlalb_lane_s64_1(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmlalb_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalb.lane.nxv2i64( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_lane_s64'}} return SVE_ACLE_FUNC(svmlalb_lane,_s64,,)(op1, op2, op3, 3); } -// CHECK-LABEL: @test_svmlalb_lane_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlalb_lane_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmlalb_lane_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmlalb_lane_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_lane_u32'}} return SVE_ACLE_FUNC(svmlalb_lane,_u32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlalb_lane_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlalb_lane_u32_1u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmlalb_lane_u32_1(svuint32_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmlalb_lane_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv4i32( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_lane_u32'}} return SVE_ACLE_FUNC(svmlalb_lane,_u32,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svmlalb_lane_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlalb_lane_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmlalb_lane_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmlalb_lane_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_lane_u64'}} return SVE_ACLE_FUNC(svmlalb_lane,_u64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlalb_lane_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlalb_lane_u64_1u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmlalb_lane_u64_1(svuint64_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmlalb_lane_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalb.lane.nxv2i64( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_lane_u64'}} return SVE_ACLE_FUNC(svmlalb_lane,_u64,,)(op1, op2, op3, 3); } -// CHECK-LABEL: @test_svmlalb_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlalb_f32u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmlalb_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmlalb_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmlalb.nxv4f32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_f32'}} return SVE_ACLE_FUNC(svmlalb,_f32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalb_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlalb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlalb_n_f32u13__SVFloat32_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlalb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmlalb_n_f32(svfloat32_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svmlalb_n_f32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmlalb.nxv4f32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_n_f32'}} return SVE_ACLE_FUNC(svmlalb,_n_f32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalb_lane_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlalb_lane_f32u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmlalb_lane_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmlalb_lane_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmlalb.lane.nxv4f32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_lane_f32'}} return SVE_ACLE_FUNC(svmlalb_lane,_f32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlalb_lane_f32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlalb_lane_f32_1u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmlalb_lane_f32_1(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmlalb_lane_f32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmlalb.lane.nxv4f32( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalb_lane_f32'}} return SVE_ACLE_FUNC(svmlalb_lane,_f32,,)(op1, op2, op3, 7); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c index a5c75f811a7d..95d3eac914c8 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlalt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,423 +14,248 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmlalt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlalt_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svmlalt_s16(svint16_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svmlalt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_s16'}} return SVE_ACLE_FUNC(svmlalt,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlalt_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmlalt_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmlalt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_s32'}} return SVE_ACLE_FUNC(svmlalt,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlalt_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmlalt_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmlalt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_s64'}} return SVE_ACLE_FUNC(svmlalt,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlalt_u16u12__SVUint16_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svmlalt_u16(svuint16_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svmlalt_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_u16'}} return SVE_ACLE_FUNC(svmlalt,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlalt_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmlalt_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmlalt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_u32'}} return SVE_ACLE_FUNC(svmlalt,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlalt_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmlalt_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmlalt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_u64'}} return SVE_ACLE_FUNC(svmlalt,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlalt_n_s16u11__SVInt16_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmlalt_n_s16(svint16_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svmlalt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_n_s16'}} return SVE_ACLE_FUNC(svmlalt,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlalt_n_s32u11__SVInt32_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmlalt_n_s32(svint32_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svmlalt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_n_s32'}} return SVE_ACLE_FUNC(svmlalt,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlalt_n_s64u11__SVInt64_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmlalt_n_s64(svint64_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svmlalt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_n_s64'}} return SVE_ACLE_FUNC(svmlalt,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlalt_n_u16u12__SVUint16_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmlalt_n_u16(svuint16_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svmlalt_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_n_u16'}} return SVE_ACLE_FUNC(svmlalt,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlalt_n_u32u12__SVUint32_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmlalt_n_u32(svuint32_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svmlalt_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_n_u32'}} return SVE_ACLE_FUNC(svmlalt,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlalt_n_u64u12__SVUint64_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmlalt_n_u64(svuint64_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svmlalt_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_n_u64'}} return SVE_ACLE_FUNC(svmlalt,_n_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalt_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlalt_lane_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmlalt_lane_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmlalt_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_lane_s32'}} return SVE_ACLE_FUNC(svmlalt_lane,_s32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlalt_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlalt_lane_s32_1u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmlalt_lane_s32_1(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmlalt_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv4i32( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_lane_s32'}} return SVE_ACLE_FUNC(svmlalt_lane,_s32,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svmlalt_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlalt_lane_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmlalt_lane_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmlalt_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_lane_s64'}} return SVE_ACLE_FUNC(svmlalt_lane,_s64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlalt_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlalt_lane_s64_1u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmlalt_lane_s64_1(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmlalt_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlalt.lane.nxv2i64( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_lane_s64'}} return SVE_ACLE_FUNC(svmlalt_lane,_s64,,)(op1, op2, op3, 3); } -// CHECK-LABEL: @test_svmlalt_lane_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlalt_lane_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmlalt_lane_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmlalt_lane_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_lane_u32'}} return SVE_ACLE_FUNC(svmlalt_lane,_u32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlalt_lane_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlalt_lane_u32_1u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmlalt_lane_u32_1(svuint32_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmlalt_lane_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv4i32( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_lane_u32'}} return SVE_ACLE_FUNC(svmlalt_lane,_u32,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svmlalt_lane_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlalt_lane_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmlalt_lane_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmlalt_lane_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_lane_u64'}} return SVE_ACLE_FUNC(svmlalt_lane,_u64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlalt_lane_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlalt_lane_u64_1u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmlalt_lane_u64_1(svuint64_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmlalt_lane_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlalt.lane.nxv2i64( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_lane_u64'}} return SVE_ACLE_FUNC(svmlalt_lane,_u64,,)(op1, op2, op3, 3); } -// CHECK-LABEL: @test_svmlalt_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlalt_f32u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmlalt_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmlalt_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmlalt.nxv4f32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_f32'}} return SVE_ACLE_FUNC(svmlalt,_f32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalt_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlalt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlalt_n_f32u13__SVFloat32_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlalt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmlalt_n_f32(svfloat32_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svmlalt_n_f32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmlalt.nxv4f32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_n_f32'}} return SVE_ACLE_FUNC(svmlalt,_n_f32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlalt_lane_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlalt_lane_f32u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmlalt_lane_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmlalt_lane_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmlalt.lane.nxv4f32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_lane_f32'}} return SVE_ACLE_FUNC(svmlalt_lane,_f32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlalt_lane_f32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlalt_lane_f32_1u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlalt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmlalt_lane_f32_1(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmlalt_lane_f32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmlalt.lane.nxv4f32( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlalt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlalt_lane_f32'}} return SVE_ACLE_FUNC(svmlalt_lane,_f32,,)(op1, op2, op3, 7); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mls.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mls.c index 60fec481b5aa..c9370f158001 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mls.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mls.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,194 +13,110 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmls_lane_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmls_lane_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svmls_lane_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmls_lane_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmls_lane_s16'}} return SVE_ACLE_FUNC(svmls_lane,_s16,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmls_lane_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmls_lane_s16_1u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svmls_lane_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmls_lane_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmls_lane_s16'}} return SVE_ACLE_FUNC(svmls_lane,_s16,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svmls_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmls_lane_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmls_lane_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmls_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmls_lane_s32'}} return SVE_ACLE_FUNC(svmls_lane,_s32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmls_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmls_lane_s32_1u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmls_lane_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmls_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmls_lane_s32'}} return SVE_ACLE_FUNC(svmls_lane,_s32,,)(op1, op2, op3, 3); } -// CHECK-LABEL: @test_svmls_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmls_lane_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmls_lane_s64(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svmls_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmls_lane_s64'}} return SVE_ACLE_FUNC(svmls_lane,_s64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmls_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmls_lane_s64_1u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmls_lane_s64_1(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svmls_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( %op1, %op2, %op3, i32 1) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmls_lane_s64'}} return SVE_ACLE_FUNC(svmls_lane,_s64,,)(op1, op2, op3, 1); } -// CHECK-LABEL: @test_svmls_lane_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmls_lane_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svmls_lane_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmls_lane_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmls_lane_u16'}} return SVE_ACLE_FUNC(svmls_lane,_u16,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmls_lane_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmls_lane_u16_1u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svmls_lane_u16_1(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmls_lane_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.lane.nxv8i16( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmls_lane_u16'}} return SVE_ACLE_FUNC(svmls_lane,_u16,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svmls_lane_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmls_lane_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmls_lane_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmls_lane_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmls_lane_u32'}} return SVE_ACLE_FUNC(svmls_lane,_u32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmls_lane_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmls_lane_u32_1u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmls_lane_u32_1(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmls_lane_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.lane.nxv4i32( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmls_lane_u32'}} return SVE_ACLE_FUNC(svmls_lane,_u32,,)(op1, op2, op3, 3); } -// CHECK-LABEL: @test_svmls_lane_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmls_lane_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmls_lane_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svmls_lane_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmls_lane_u64'}} return SVE_ACLE_FUNC(svmls_lane,_u64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmls_lane_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmls_lane_u64_1u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmls_lane_u64_1(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svmls_lane_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mls.lane.nxv2i64( %op1, %op2, %op3, i32 1) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmls_lane_u64'}} return SVE_ACLE_FUNC(svmls_lane,_u64,,)(op1, op2, op3, 1); } diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c index 457abe252c3f..f96e1d9dba4c 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,423 +14,248 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmlslb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlslb_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svmlslb_s16(svint16_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svmlslb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslb.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_s16'}} return SVE_ACLE_FUNC(svmlslb,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlslb_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmlslb_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmlslb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslb.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_s32'}} return SVE_ACLE_FUNC(svmlslb,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlslb_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmlslb_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmlslb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslb.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_s64'}} return SVE_ACLE_FUNC(svmlslb,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlslb_u16u12__SVUint16_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svmlslb_u16(svuint16_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svmlslb_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslb.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_u16'}} return SVE_ACLE_FUNC(svmlslb,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlslb_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmlslb_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmlslb_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslb.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_u32'}} return SVE_ACLE_FUNC(svmlslb,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlslb_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmlslb_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmlslb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslb.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_u64'}} return SVE_ACLE_FUNC(svmlslb,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlslb_n_s16u11__SVInt16_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmlslb_n_s16(svint16_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svmlslb_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslb.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_n_s16'}} return SVE_ACLE_FUNC(svmlslb,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlslb_n_s32u11__SVInt32_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmlslb_n_s32(svint32_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svmlslb_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslb.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_n_s32'}} return SVE_ACLE_FUNC(svmlslb,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlslb_n_s64u11__SVInt64_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmlslb_n_s64(svint64_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svmlslb_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslb.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_n_s64'}} return SVE_ACLE_FUNC(svmlslb,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlslb_n_u16u12__SVUint16_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmlslb_n_u16(svuint16_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svmlslb_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslb.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_n_u16'}} return SVE_ACLE_FUNC(svmlslb,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlslb_n_u32u12__SVUint32_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmlslb_n_u32(svuint32_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svmlslb_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslb.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_n_u32'}} return SVE_ACLE_FUNC(svmlslb,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlslb_n_u64u12__SVUint64_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmlslb_n_u64(svuint64_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svmlslb_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslb.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_n_u64'}} return SVE_ACLE_FUNC(svmlslb,_n_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslb_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlslb_lane_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmlslb_lane_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmlslb_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_lane_s32'}} return SVE_ACLE_FUNC(svmlslb_lane,_s32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlslb_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlslb_lane_s32_1u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmlslb_lane_s32_1(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmlslb_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv4i32( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_lane_s32'}} return SVE_ACLE_FUNC(svmlslb_lane,_s32,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svmlslb_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlslb_lane_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmlslb_lane_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmlslb_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_lane_s64'}} return SVE_ACLE_FUNC(svmlslb_lane,_s64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlslb_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlslb_lane_s64_1u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmlslb_lane_s64_1(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmlslb_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslb.lane.nxv2i64( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_lane_s64'}} return SVE_ACLE_FUNC(svmlslb_lane,_s64,,)(op1, op2, op3, 3); } -// CHECK-LABEL: @test_svmlslb_lane_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlslb_lane_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmlslb_lane_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmlslb_lane_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_lane_u32'}} return SVE_ACLE_FUNC(svmlslb_lane,_u32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlslb_lane_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlslb_lane_u32_1u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmlslb_lane_u32_1(svuint32_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmlslb_lane_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv4i32( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_lane_u32'}} return SVE_ACLE_FUNC(svmlslb_lane,_u32,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svmlslb_lane_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlslb_lane_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmlslb_lane_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmlslb_lane_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_lane_u64'}} return SVE_ACLE_FUNC(svmlslb_lane,_u64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlslb_lane_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlslb_lane_u64_1u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmlslb_lane_u64_1(svuint64_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmlslb_lane_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslb.lane.nxv2i64( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_lane_u64'}} return SVE_ACLE_FUNC(svmlslb_lane,_u64,,)(op1, op2, op3, 3); } -// CHECK-LABEL: @test_svmlslb_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlslb_f32u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmlslb_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmlslb_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmlslb.nxv4f32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_f32'}} return SVE_ACLE_FUNC(svmlslb,_f32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslb_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlslb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlslb_n_f32u13__SVFloat32_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlslb.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmlslb_n_f32(svfloat32_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svmlslb_n_f32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmlslb.nxv4f32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_n_f32'}} return SVE_ACLE_FUNC(svmlslb,_n_f32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslb_lane_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlslb_lane_f32u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmlslb_lane_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmlslb_lane_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmlslb.lane.nxv4f32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_lane_f32'}} return SVE_ACLE_FUNC(svmlslb_lane,_f32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlslb_lane_f32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlslb_lane_f32_1u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslb.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmlslb_lane_f32_1(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmlslb_lane_f32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmlslb.lane.nxv4f32( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslb_lane_f32'}} return SVE_ACLE_FUNC(svmlslb_lane,_f32,,)(op1, op2, op3, 7); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c index 66ee032b91b1..458ddd26c2a3 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mlslt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,423 +14,248 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmlslt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlslt_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svmlslt_s16(svint16_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svmlslt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_s16'}} return SVE_ACLE_FUNC(svmlslt,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlslt_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmlslt_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmlslt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_s32'}} return SVE_ACLE_FUNC(svmlslt,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlslt_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmlslt_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmlslt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_s64'}} return SVE_ACLE_FUNC(svmlslt,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlslt_u16u12__SVUint16_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svmlslt_u16(svuint16_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svmlslt_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_u16'}} return SVE_ACLE_FUNC(svmlslt,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlslt_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmlslt_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmlslt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_u32'}} return SVE_ACLE_FUNC(svmlslt,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlslt_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmlslt_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmlslt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_u64'}} return SVE_ACLE_FUNC(svmlslt,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlslt_n_s16u11__SVInt16_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmlslt_n_s16(svint16_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svmlslt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_n_s16'}} return SVE_ACLE_FUNC(svmlslt,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlslt_n_s32u11__SVInt32_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmlslt_n_s32(svint32_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svmlslt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_n_s32'}} return SVE_ACLE_FUNC(svmlslt,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlslt_n_s64u11__SVInt64_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmlslt_n_s64(svint64_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svmlslt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_n_s64'}} return SVE_ACLE_FUNC(svmlslt,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlslt_n_u16u12__SVUint16_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmlslt_n_u16(svuint16_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svmlslt_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_n_u16'}} return SVE_ACLE_FUNC(svmlslt,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlslt_n_u32u12__SVUint32_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmlslt_n_u32(svuint32_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svmlslt_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_n_u32'}} return SVE_ACLE_FUNC(svmlslt,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlslt_n_u64u12__SVUint64_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmlslt_n_u64(svuint64_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svmlslt_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_n_u64'}} return SVE_ACLE_FUNC(svmlslt,_n_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslt_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlslt_lane_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmlslt_lane_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmlslt_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_lane_s32'}} return SVE_ACLE_FUNC(svmlslt_lane,_s32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlslt_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlslt_lane_s32_1u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmlslt_lane_s32_1(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svmlslt_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv4i32( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_lane_s32'}} return SVE_ACLE_FUNC(svmlslt_lane,_s32,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svmlslt_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlslt_lane_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmlslt_lane_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmlslt_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_lane_s64'}} return SVE_ACLE_FUNC(svmlslt_lane,_s64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlslt_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlslt_lane_s64_1u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmlslt_lane_s64_1(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svmlslt_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smlslt.lane.nxv2i64( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_lane_s64'}} return SVE_ACLE_FUNC(svmlslt_lane,_s64,,)(op1, op2, op3, 3); } -// CHECK-LABEL: @test_svmlslt_lane_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlslt_lane_u32u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmlslt_lane_u32(svuint32_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmlslt_lane_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_lane_u32'}} return SVE_ACLE_FUNC(svmlslt_lane,_u32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlslt_lane_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlslt_lane_u32_1u12__SVUint32_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmlslt_lane_u32_1(svuint32_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svmlslt_lane_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv4i32( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_lane_u32'}} return SVE_ACLE_FUNC(svmlslt_lane,_u32,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svmlslt_lane_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlslt_lane_u64u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmlslt_lane_u64(svuint64_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmlslt_lane_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_lane_u64'}} return SVE_ACLE_FUNC(svmlslt_lane,_u64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlslt_lane_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlslt_lane_u64_1u12__SVUint64_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmlslt_lane_u64_1(svuint64_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svmlslt_lane_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umlslt.lane.nxv2i64( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_lane_u64'}} return SVE_ACLE_FUNC(svmlslt_lane,_u64,,)(op1, op2, op3, 3); } -// CHECK-LABEL: @test_svmlslt_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmlslt_f32u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmlslt_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmlslt_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmlslt.nxv4f32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_f32'}} return SVE_ACLE_FUNC(svmlslt,_f32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslt_n_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlslt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmlslt_n_f32u13__SVFloat32_tu13__SVFloat16_tDh( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.fmlslt.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svfloat32_t test_svmlslt_n_f32(svfloat32_t op1, svfloat16_t op2, float16_t op3) { + // CHECK-LABEL: test_svmlslt_n_f32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8f16(half %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmlslt.nxv4f32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_n_f32'}} return SVE_ACLE_FUNC(svmlslt,_n_f32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svmlslt_lane_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmlslt_lane_f32u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmlslt_lane_f32(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmlslt_lane_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmlslt.lane.nxv4f32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_lane_f32'}} return SVE_ACLE_FUNC(svmlslt_lane,_f32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svmlslt_lane_f32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmlslt_lane_f32_1u13__SVFloat32_tu13__SVFloat16_tu13__SVFloat16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.fmlslt.lane.nxv4f32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svmlslt_lane_f32_1(svfloat32_t op1, svfloat16_t op2, svfloat16_t op3) { + // CHECK-LABEL: test_svmlslt_lane_f32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.fmlslt.lane.nxv4f32( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmlslt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmlslt_lane_f32'}} return SVE_ACLE_FUNC(svmlslt_lane,_f32,,)(op1, op2, op3, 7); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlb.c index 2157d147e515..0fbffffcc771 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,103 +14,61 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmovlb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv8i16( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmovlb_s16u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv8i16( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svmovlb_s16(svint8_t op1) { + // CHECK-LABEL: test_svmovlb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sshllb.nxv8i16( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmovlb'}} // expected-warning@+1 {{implicit declaration of function 'svmovlb_s16'}} return SVE_ACLE_FUNC(svmovlb,_s16,,)(op1); } -// CHECK-LABEL: @test_svmovlb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv4i32( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmovlb_s32u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv4i32( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmovlb_s32(svint16_t op1) { + // CHECK-LABEL: test_svmovlb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sshllb.nxv4i32( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmovlb'}} // expected-warning@+1 {{implicit declaration of function 'svmovlb_s32'}} return SVE_ACLE_FUNC(svmovlb,_s32,,)(op1); } -// CHECK-LABEL: @test_svmovlb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv2i64( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmovlb_s64u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv2i64( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmovlb_s64(svint32_t op1) { + // CHECK-LABEL: test_svmovlb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sshllb.nxv2i64( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmovlb'}} // expected-warning@+1 {{implicit declaration of function 'svmovlb_s64'}} return SVE_ACLE_FUNC(svmovlb,_s64,,)(op1); } -// CHECK-LABEL: @test_svmovlb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv8i16( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmovlb_u16u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv8i16( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svmovlb_u16(svuint8_t op1) { + // CHECK-LABEL: test_svmovlb_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ushllb.nxv8i16( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmovlb'}} // expected-warning@+1 {{implicit declaration of function 'svmovlb_u16'}} return SVE_ACLE_FUNC(svmovlb,_u16,,)(op1); } -// CHECK-LABEL: @test_svmovlb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv4i32( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmovlb_u32u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv4i32( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmovlb_u32(svuint16_t op1) { + // CHECK-LABEL: test_svmovlb_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ushllb.nxv4i32( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmovlb'}} // expected-warning@+1 {{implicit declaration of function 'svmovlb_u32'}} return SVE_ACLE_FUNC(svmovlb,_u32,,)(op1); } -// CHECK-LABEL: @test_svmovlb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv2i64( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmovlb_u64u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv2i64( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmovlb_u64(svuint32_t op1) { + // CHECK-LABEL: test_svmovlb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ushllb.nxv2i64( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmovlb'}} // expected-warning@+1 {{implicit declaration of function 'svmovlb_u64'}} return SVE_ACLE_FUNC(svmovlb,_u64,,)(op1); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlt.c index c7ceb8655fc7..74c2187f6fcc 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_movlt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,103 +14,61 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmovlt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv8i16( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmovlt_s16u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv8i16( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svmovlt_s16(svint8_t op1) { + // CHECK-LABEL: test_svmovlt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sshllt.nxv8i16( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmovlt'}} // expected-warning@+1 {{implicit declaration of function 'svmovlt_s16'}} return SVE_ACLE_FUNC(svmovlt,_s16,,)(op1); } -// CHECK-LABEL: @test_svmovlt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv4i32( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmovlt_s32u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv4i32( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmovlt_s32(svint16_t op1) { + // CHECK-LABEL: test_svmovlt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sshllt.nxv4i32( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmovlt'}} // expected-warning@+1 {{implicit declaration of function 'svmovlt_s32'}} return SVE_ACLE_FUNC(svmovlt,_s32,,)(op1); } -// CHECK-LABEL: @test_svmovlt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv2i64( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmovlt_s64u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv2i64( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmovlt_s64(svint32_t op1) { + // CHECK-LABEL: test_svmovlt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sshllt.nxv2i64( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmovlt'}} // expected-warning@+1 {{implicit declaration of function 'svmovlt_s64'}} return SVE_ACLE_FUNC(svmovlt,_s64,,)(op1); } -// CHECK-LABEL: @test_svmovlt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv8i16( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmovlt_u16u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv8i16( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svmovlt_u16(svuint8_t op1) { + // CHECK-LABEL: test_svmovlt_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ushllt.nxv8i16( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmovlt'}} // expected-warning@+1 {{implicit declaration of function 'svmovlt_u16'}} return SVE_ACLE_FUNC(svmovlt,_u16,,)(op1); } -// CHECK-LABEL: @test_svmovlt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv4i32( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmovlt_u32u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv4i32( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmovlt_u32(svuint16_t op1) { + // CHECK-LABEL: test_svmovlt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ushllt.nxv4i32( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmovlt'}} // expected-warning@+1 {{implicit declaration of function 'svmovlt_u32'}} return SVE_ACLE_FUNC(svmovlt,_u32,,)(op1); } -// CHECK-LABEL: @test_svmovlt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv2i64( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmovlt_u64u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv2i64( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmovlt_u64(svuint32_t op1) { + // CHECK-LABEL: test_svmovlt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ushllt.nxv2i64( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmovlt'}} // expected-warning@+1 {{implicit declaration of function 'svmovlt_u64'}} return SVE_ACLE_FUNC(svmovlt,_u64,,)(op1); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mul.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mul.c index eeda5b494b60..bd4559e1e9ea 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mul.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mul.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s #include @@ -14,194 +13,110 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmul_lane_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmul_lane_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svmul_lane_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmul_lane_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmul_lane_s16'}} return SVE_ACLE_FUNC(svmul_lane,_s16,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svmul_lane_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmul_lane_s16_1u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svmul_lane_s16_1(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmul_lane_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( %op1, %op2, i32 7) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmul_lane_s16'}} return SVE_ACLE_FUNC(svmul_lane,_s16,,)(op1, op2, 7); } -// CHECK-LABEL: @test_svmul_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmul_lane_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmul_lane_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmul_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmul_lane_s32'}} return SVE_ACLE_FUNC(svmul_lane,_s32,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svmul_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmul_lane_s32_1u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmul_lane_s32_1(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmul_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( %op1, %op2, i32 3) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmul_lane_s32'}} return SVE_ACLE_FUNC(svmul_lane,_s32,,)(op1, op2, 3); } -// CHECK-LABEL: @test_svmul_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmul_lane_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmul_lane_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svmul_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmul_lane_s64'}} return SVE_ACLE_FUNC(svmul_lane,_s64,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svmul_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmul_lane_s64_1u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmul_lane_s64_1(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svmul_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmul_lane_s64'}} return SVE_ACLE_FUNC(svmul_lane,_s64,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svmul_lane_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmul_lane_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svmul_lane_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmul_lane_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmul_lane_u16'}} return SVE_ACLE_FUNC(svmul_lane,_u16,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svmul_lane_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmul_lane_u16_1u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svmul_lane_u16_1(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmul_lane_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.lane.nxv8i16( %op1, %op2, i32 7) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmul_lane_u16'}} return SVE_ACLE_FUNC(svmul_lane,_u16,,)(op1, op2, 7); } -// CHECK-LABEL: @test_svmul_lane_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmul_lane_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmul_lane_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmul_lane_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmul_lane_u32'}} return SVE_ACLE_FUNC(svmul_lane,_u32,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svmul_lane_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmul_lane_u32_1u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmul_lane_u32_1(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmul_lane_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.lane.nxv4i32( %op1, %op2, i32 3) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmul_lane_u32'}} return SVE_ACLE_FUNC(svmul_lane,_u32,,)(op1, op2, 3); } -// CHECK-LABEL: @test_svmul_lane_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svmul_lane_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmul_lane_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svmul_lane_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmul_lane_u64'}} return SVE_ACLE_FUNC(svmul_lane,_u64,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svmul_lane_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmul_lane_u64_1u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmul_lane_u64_1(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svmul_lane_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.mul.lane.nxv2i64( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // expected-warning@+1 {{implicit declaration of function 'svmul_lane_u64'}} return SVE_ACLE_FUNC(svmul_lane,_u64,,)(op1, op2, 1); } diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c index 70723deb57bf..c8f6166e708d 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,353 +14,207 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmullb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmullb_s16u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svmullb_s16(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svmullb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_s16'}} return SVE_ACLE_FUNC(svmullb,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svmullb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmullb_s32u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmullb_s32(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmullb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_s32'}} return SVE_ACLE_FUNC(svmullb,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svmullb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmullb_s64u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmullb_s64(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmullb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_s64'}} return SVE_ACLE_FUNC(svmullb,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svmullb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmullb_u16u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svmullb_u16(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svmullb_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_u16'}} return SVE_ACLE_FUNC(svmullb,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svmullb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmullb_u32u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmullb_u32(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmullb_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_u32'}} return SVE_ACLE_FUNC(svmullb,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svmullb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmullb_u64u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmullb_u64(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmullb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_u64'}} return SVE_ACLE_FUNC(svmullb,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svmullb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmullb_n_s16u10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmullb_n_s16(svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svmullb_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_n_s16'}} return SVE_ACLE_FUNC(svmullb,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svmullb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmullb_n_s32u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmullb_n_s32(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svmullb_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_n_s32'}} return SVE_ACLE_FUNC(svmullb,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svmullb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmullb_n_s64u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmullb_n_s64(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svmullb_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_n_s64'}} return SVE_ACLE_FUNC(svmullb,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svmullb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmullb_n_u16u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmullb_n_u16(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svmullb_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_n_u16'}} return SVE_ACLE_FUNC(svmullb,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svmullb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmullb_n_u32u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmullb_n_u32(svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svmullb_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_n_u32'}} return SVE_ACLE_FUNC(svmullb,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svmullb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmullb_n_u64u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmullb_n_u64(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svmullb_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_n_u64'}} return SVE_ACLE_FUNC(svmullb,_n_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svmullb_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmullb_lane_s32u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmullb_lane_s32(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmullb_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullb.lane.nxv4i32( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_lane_s32'}} return SVE_ACLE_FUNC(svmullb_lane,_s32,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svmullb_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmullb_lane_s32_1u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmullb_lane_s32_1(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmullb_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullb.lane.nxv4i32( %op1, %op2, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_lane_s32'}} return SVE_ACLE_FUNC(svmullb_lane,_s32,,)(op1, op2, 7); } -// CHECK-LABEL: @test_svmullb_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmullb_lane_s64u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmullb_lane_s64(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmullb_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullb.lane.nxv2i64( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_lane_s64'}} return SVE_ACLE_FUNC(svmullb_lane,_s64,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svmullb_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmullb_lane_s64_1u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmullb_lane_s64_1(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmullb_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullb.lane.nxv2i64( %op1, %op2, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_lane_s64'}} return SVE_ACLE_FUNC(svmullb_lane,_s64,,)(op1, op2, 3); } -// CHECK-LABEL: @test_svmullb_lane_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmullb_lane_u32u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmullb_lane_u32(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmullb_lane_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullb.lane.nxv4i32( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_lane_u32'}} return SVE_ACLE_FUNC(svmullb_lane,_u32,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svmullb_lane_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmullb_lane_u32_1u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmullb_lane_u32_1(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmullb_lane_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullb.lane.nxv4i32( %op1, %op2, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_lane_u32'}} return SVE_ACLE_FUNC(svmullb_lane,_u32,,)(op1, op2, 7); } -// CHECK-LABEL: @test_svmullb_lane_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmullb_lane_u64u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmullb_lane_u64(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmullb_lane_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullb.lane.nxv2i64( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_lane_u64'}} return SVE_ACLE_FUNC(svmullb_lane,_u64,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svmullb_lane_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmullb_lane_u64_1u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmullb_lane_u64_1(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmullb_lane_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullb.lane.nxv2i64( %op1, %op2, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmullb_lane_u64'}} return SVE_ACLE_FUNC(svmullb_lane,_u64,,)(op1, op2, 3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c index b02989e681e5..13ac0f34e905 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_mullt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,353 +14,207 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svmullt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmullt_s16u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svmullt_s16(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svmullt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullt.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_s16'}} return SVE_ACLE_FUNC(svmullt,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svmullt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmullt_s32u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmullt_s32(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmullt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullt.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_s32'}} return SVE_ACLE_FUNC(svmullt,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svmullt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmullt_s64u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmullt_s64(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmullt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullt.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_s64'}} return SVE_ACLE_FUNC(svmullt,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svmullt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmullt_u16u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svmullt_u16(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svmullt_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullt.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_u16'}} return SVE_ACLE_FUNC(svmullt,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svmullt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmullt_u32u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmullt_u32(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmullt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullt.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_u32'}} return SVE_ACLE_FUNC(svmullt,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svmullt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svmullt_u64u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmullt_u64(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmullt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullt.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_u64'}} return SVE_ACLE_FUNC(svmullt,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svmullt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmullt_n_s16u10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svmullt_n_s16(svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svmullt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullt.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_n_s16'}} return SVE_ACLE_FUNC(svmullt,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svmullt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmullt_n_s32u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svmullt_n_s32(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svmullt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullt.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_n_s32'}} return SVE_ACLE_FUNC(svmullt,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svmullt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmullt_n_s64u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.smullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svmullt_n_s64(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svmullt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullt.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_n_s64'}} return SVE_ACLE_FUNC(svmullt,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svmullt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmullt_n_u16u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svmullt_n_u16(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svmullt_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullt.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_n_u16'}} return SVE_ACLE_FUNC(svmullt,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svmullt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmullt_n_u32u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svmullt_n_u32(svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svmullt_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullt.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_n_u32'}} return SVE_ACLE_FUNC(svmullt,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svmullt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svmullt_n_u64u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.umullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svmullt_n_u64(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svmullt_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullt.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_n_u64'}} return SVE_ACLE_FUNC(svmullt,_n_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svmullt_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmullt_lane_s32u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmullt_lane_s32(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmullt_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullt.lane.nxv4i32( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_lane_s32'}} return SVE_ACLE_FUNC(svmullt_lane,_s32,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svmullt_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmullt_lane_s32_1u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svmullt_lane_s32_1(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svmullt_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullt.lane.nxv4i32( %op1, %op2, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_lane_s32'}} return SVE_ACLE_FUNC(svmullt_lane,_s32,,)(op1, op2, 7); } -// CHECK-LABEL: @test_svmullt_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmullt_lane_s64u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmullt_lane_s64(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmullt_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullt.lane.nxv2i64( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_lane_s64'}} return SVE_ACLE_FUNC(svmullt_lane,_s64,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svmullt_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmullt_lane_s64_1u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.smullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svmullt_lane_s64_1(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svmullt_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.smullt.lane.nxv2i64( %op1, %op2, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_lane_s64'}} return SVE_ACLE_FUNC(svmullt_lane,_s64,,)(op1, op2, 3); } -// CHECK-LABEL: @test_svmullt_lane_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmullt_lane_u32u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmullt_lane_u32(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmullt_lane_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullt.lane.nxv4i32( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_lane_u32'}} return SVE_ACLE_FUNC(svmullt_lane,_u32,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svmullt_lane_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmullt_lane_u32_1u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svmullt_lane_u32_1(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svmullt_lane_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullt.lane.nxv4i32( %op1, %op2, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_lane_u32'}} return SVE_ACLE_FUNC(svmullt_lane,_u32,,)(op1, op2, 7); } -// CHECK-LABEL: @test_svmullt_lane_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svmullt_lane_u64u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmullt_lane_u64(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmullt_lane_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullt.lane.nxv2i64( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_lane_u64'}} return SVE_ACLE_FUNC(svmullt_lane,_u64,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svmullt_lane_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svmullt_lane_u64_1u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.umullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svmullt_lane_u64_1(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svmullt_lane_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.umullt.lane.nxv2i64( %op1, %op2, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svmullt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svmullt_lane_u64'}} return SVE_ACLE_FUNC(svmullt_lane,_u64,,)(op1, op2, 3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c index 54e5a9314a2a..444606b295a0 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nbsl.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,289 +14,169 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svnbsl_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svnbsl_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svnbsl_s8(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svnbsl_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svnbsl'}} // expected-warning@+1 {{implicit declaration of function 'svnbsl_s8'}} return SVE_ACLE_FUNC(svnbsl,_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svnbsl_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svnbsl_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svnbsl_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svnbsl_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svnbsl'}} // expected-warning@+1 {{implicit declaration of function 'svnbsl_s16'}} return SVE_ACLE_FUNC(svnbsl,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svnbsl_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svnbsl_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svnbsl_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svnbsl_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svnbsl'}} // expected-warning@+1 {{implicit declaration of function 'svnbsl_s32'}} return SVE_ACLE_FUNC(svnbsl,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svnbsl_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svnbsl_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svnbsl_s64(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svnbsl_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svnbsl'}} // expected-warning@+1 {{implicit declaration of function 'svnbsl_s64'}} return SVE_ACLE_FUNC(svnbsl,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svnbsl_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svnbsl_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svnbsl_u8(svuint8_t op1, svuint8_t op2, svuint8_t op3) { + // CHECK-LABEL: test_svnbsl_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svnbsl'}} // expected-warning@+1 {{implicit declaration of function 'svnbsl_u8'}} return SVE_ACLE_FUNC(svnbsl,_u8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svnbsl_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svnbsl_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svnbsl_u16(svuint16_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svnbsl_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svnbsl'}} // expected-warning@+1 {{implicit declaration of function 'svnbsl_u16'}} return SVE_ACLE_FUNC(svnbsl,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svnbsl_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svnbsl_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svnbsl_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svnbsl_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svnbsl'}} // expected-warning@+1 {{implicit declaration of function 'svnbsl_u32'}} return SVE_ACLE_FUNC(svnbsl,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svnbsl_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svnbsl_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svnbsl_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svnbsl_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svnbsl'}} // expected-warning@+1 {{implicit declaration of function 'svnbsl_u64'}} return SVE_ACLE_FUNC(svnbsl,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svnbsl_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnbsl_n_s8u10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svnbsl_n_s8(svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svnbsl_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svnbsl'}} // expected-warning@+1 {{implicit declaration of function 'svnbsl_n_s8'}} return SVE_ACLE_FUNC(svnbsl,_n_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svnbsl_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnbsl_n_s16u11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svnbsl_n_s16(svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svnbsl_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svnbsl'}} // expected-warning@+1 {{implicit declaration of function 'svnbsl_n_s16'}} return SVE_ACLE_FUNC(svnbsl,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svnbsl_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnbsl_n_s32u11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svnbsl_n_s32(svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svnbsl_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svnbsl'}} // expected-warning@+1 {{implicit declaration of function 'svnbsl_n_s32'}} return SVE_ACLE_FUNC(svnbsl,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svnbsl_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnbsl_n_s64u11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svnbsl_n_s64(svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svnbsl_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svnbsl'}} // expected-warning@+1 {{implicit declaration of function 'svnbsl_n_s64'}} return SVE_ACLE_FUNC(svnbsl,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svnbsl_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svnbsl_n_u8u11__SVUint8_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svnbsl_n_u8(svuint8_t op1, svuint8_t op2, uint8_t op3) { + // CHECK-LABEL: test_svnbsl_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nbsl.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svnbsl'}} // expected-warning@+1 {{implicit declaration of function 'svnbsl_n_u8'}} return SVE_ACLE_FUNC(svnbsl,_n_u8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svnbsl_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnbsl_n_u16u12__SVUint16_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svnbsl_n_u16(svuint16_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svnbsl_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nbsl.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svnbsl'}} // expected-warning@+1 {{implicit declaration of function 'svnbsl_n_u16'}} return SVE_ACLE_FUNC(svnbsl,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svnbsl_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnbsl_n_u32u12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svnbsl_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svnbsl_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nbsl.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svnbsl'}} // expected-warning@+1 {{implicit declaration of function 'svnbsl_n_u32'}} return SVE_ACLE_FUNC(svnbsl,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svnbsl_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svnbsl_n_u64u12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svnbsl_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svnbsl_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nbsl.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svnbsl'}} // expected-warning@+1 {{implicit declaration of function 'svnbsl_n_u64'}} return SVE_ACLE_FUNC(svnbsl,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nmatch.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nmatch.c index 9be3f5d0e92f..2580268bf151 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nmatch.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_nmatch.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,77 +14,45 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svnmatch_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nmatch.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svnmatch_s8u10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nmatch.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svnmatch_s8(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svnmatch_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nmatch.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svnmatch'}} // expected-warning@+1 {{implicit declaration of function 'svnmatch_s8'}} return SVE_ACLE_FUNC(svnmatch,_s8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svnmatch_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nmatch.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmatch_s16u10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nmatch.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svnmatch_s16(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svnmatch_s16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nmatch.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[RET]] // overload-warning@+2 {{implicit declaration of function 'svnmatch'}} // expected-warning@+1 {{implicit declaration of function 'svnmatch_s16'}} return SVE_ACLE_FUNC(svnmatch,_s16,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svnmatch_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nmatch.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svnmatch_u8u10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.nmatch.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svnmatch_u8(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svnmatch_u8 + // CHECK: %[[intrinsic:.*]] = call @llvm.aarch64.sve.nmatch.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[intrinsic]] // overload-warning@+2 {{implicit declaration of function 'svnmatch'}} // expected-warning@+1 {{implicit declaration of function 'svnmatch_u8'}} return SVE_ACLE_FUNC(svnmatch,_u8,,)(pg, op1, op2); } -// CHECK-LABEL: @test_svnmatch_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nmatch.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svnmatch_u16u10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.nmatch.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbool_t test_svnmatch_u16(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svnmatch_u16 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.nmatch.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: %[[RET:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[RET]] // overload-warning@+2 {{implicit declaration of function 'svnmatch'}} // expected-warning@+1 {{implicit declaration of function 'svnmatch_u16'}} return SVE_ACLE_FUNC(svnmatch,_u16,,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c index 9e85b316b120..c0f9b4e5f31c 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmul.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,37 +14,22 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svpmul_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmul.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svpmul_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmul.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svpmul_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svpmul_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmul.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svpmul'}} // expected-warning@+1 {{implicit declaration of function 'svpmul_u8'}} return SVE_ACLE_FUNC(svpmul,_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svpmul_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmul.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svpmul_n_u8u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmul.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svpmul_n_u8(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svpmul_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmul.nxv16i8( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svpmul'}} // expected-warning@+1 {{implicit declaration of function 'svpmul_n_u8'}} return SVE_ACLE_FUNC(svpmul,_n_u8,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c index 767f4ff1fdb6..c7be4eac2d75 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,153 +14,89 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svpmullb_pair_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svpmullb_pair_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svpmullb_pair_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svpmullb_pair_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svpmullb_pair'}} // expected-warning@+1 {{implicit declaration of function 'svpmullb_pair_u8'}} return SVE_ACLE_FUNC(svpmullb_pair,_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svpmullb_pair_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svpmullb_pair_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svpmullb_pair_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svpmullb_pair_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svpmullb_pair'}} // expected-warning@+1 {{implicit declaration of function 'svpmullb_pair_u32'}} return SVE_ACLE_FUNC(svpmullb_pair,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svpmullb_pair_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z23test_svpmullb_pair_n_u8u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svpmullb_pair_n_u8(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svpmullb_pair_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svpmullb_pair'}} // expected-warning@+1 {{implicit declaration of function 'svpmullb_pair_n_u8'}} return SVE_ACLE_FUNC(svpmullb_pair,_n_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svpmullb_pair_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z24test_svpmullb_pair_n_u32u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svpmullb_pair_n_u32(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svpmullb_pair_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svpmullb_pair'}} // expected-warning@+1 {{implicit declaration of function 'svpmullb_pair_n_u32'}} return SVE_ACLE_FUNC(svpmullb_pair,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svpmullb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast [[TMP0]] to -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svpmullb_u16u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast [[TMP0]] to -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svpmullb_u16(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svpmullb_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( %op1, %op2) + // CHECK: %[[BITCAST:.*]] = bitcast %[[INTRINSIC]] to + // CHECK: ret %[[BITCAST]] // overload-warning@+2 {{implicit declaration of function 'svpmullb'}} // expected-warning@+1 {{implicit declaration of function 'svpmullb_u16'}} return SVE_ACLE_FUNC(svpmullb,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svpmullb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast [[TMP0]] to -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svpmullb_u64u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast [[TMP0]] to -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svpmullb_u64(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svpmullb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( %op1, %op2) + // CHECK: %[[BITCAST:.*]] = bitcast %[[INTRINSIC]] to + // CHECK: ret %[[BITCAST]] // overload-warning@+2 {{implicit declaration of function 'svpmullb'}} // expected-warning@+1 {{implicit declaration of function 'svpmullb_u64'}} return SVE_ACLE_FUNC(svpmullb,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svpmullb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svpmullb_n_u16u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svpmullb_n_u16(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svpmullb_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv16i8( %op1, %[[DUP]]) + // CHECK: %[[BITCAST:.*]] = bitcast %[[INTRINSIC]] to + // CHECK: ret %[[BITCAST]] // overload-warning@+2 {{implicit declaration of function 'svpmullb'}} // expected-warning@+1 {{implicit declaration of function 'svpmullb_n_u16'}} return SVE_ACLE_FUNC(svpmullb,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svpmullb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svpmullb_n_u64u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svpmullb_n_u64(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svpmullb_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv4i32( %op1, %[[DUP]]) + // CHECK: %[[BITCAST:.*]] = bitcast %[[INTRINSIC]] to + // CHECK: ret %[[BITCAST]] // overload-warning@+2 {{implicit declaration of function 'svpmullb'}} // expected-warning@+1 {{implicit declaration of function 'svpmullb_n_u64'}} return SVE_ACLE_FUNC(svpmullb,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c index 43b3f0d27166..41bd143e11a5 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullb_128.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,37 +14,22 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svpmullb_pair_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svpmullb_pair_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svpmullb_pair_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svpmullb_pair_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svpmullb_pair'}} // expected-warning@+1 {{implicit declaration of function 'svpmullb_pair_u64'}} return SVE_ACLE_FUNC(svpmullb_pair,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svpmullb_pair_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z24test_svpmullb_pair_n_u64u12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svpmullb_pair_n_u64(svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svpmullb_pair_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullb.pair.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svpmullb_pair'}} // expected-warning@+1 {{implicit declaration of function 'svpmullb_pair_n_u64'}} return SVE_ACLE_FUNC(svpmullb_pair,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c index 355a6ddafe7a..e196e9bf0dbb 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,153 +14,89 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svpmullt_pair_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svpmullt_pair_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svpmullt_pair_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svpmullt_pair_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svpmullt_pair'}} // expected-warning@+1 {{implicit declaration of function 'svpmullt_pair_u8'}} return SVE_ACLE_FUNC(svpmullt_pair,_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svpmullt_pair_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svpmullt_pair_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svpmullt_pair_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svpmullt_pair_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svpmullt_pair'}} // expected-warning@+1 {{implicit declaration of function 'svpmullt_pair_u32'}} return SVE_ACLE_FUNC(svpmullt_pair,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svpmullt_pair_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z23test_svpmullt_pair_n_u8u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svpmullt_pair_n_u8(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svpmullt_pair_n_u8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svpmullt_pair'}} // expected-warning@+1 {{implicit declaration of function 'svpmullt_pair_n_u8'}} return SVE_ACLE_FUNC(svpmullt_pair,_n_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svpmullt_pair_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z24test_svpmullt_pair_n_u32u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svpmullt_pair_n_u32(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svpmullt_pair_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svpmullt_pair'}} // expected-warning@+1 {{implicit declaration of function 'svpmullt_pair_n_u32'}} return SVE_ACLE_FUNC(svpmullt_pair,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svpmullt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast [[TMP0]] to -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svpmullt_u16u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast [[TMP0]] to -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svpmullt_u16(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svpmullt_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( %op1, %op2) + // CHECK: %[[BITCAST:.*]] = bitcast %[[INTRINSIC]] to + // CHECK: ret %[[BITCAST]] // overload-warning@+2 {{implicit declaration of function 'svpmullt'}} // expected-warning@+1 {{implicit declaration of function 'svpmullt_u16'}} return SVE_ACLE_FUNC(svpmullt,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svpmullt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = bitcast [[TMP0]] to -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svpmullt_u64u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = bitcast [[TMP0]] to -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svpmullt_u64(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svpmullt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( %op1, %op2) + // CHECK: %[[BITCAST:.*]] = bitcast %[[INTRINSIC]] to + // CHECK: ret %[[BITCAST]] // overload-warning@+2 {{implicit declaration of function 'svpmullt'}} // expected-warning@+1 {{implicit declaration of function 'svpmullt_u64'}} return SVE_ACLE_FUNC(svpmullt,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svpmullt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svpmullt_n_u16u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svpmullt_n_u16(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svpmullt_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv16i8( %op1, %[[DUP]]) + // CHECK: %[[BITCAST:.*]] = bitcast %[[INTRINSIC]] to + // CHECK: ret %[[BITCAST]] // overload-warning@+2 {{implicit declaration of function 'svpmullt'}} // expected-warning@+1 {{implicit declaration of function 'svpmullt_n_u16'}} return SVE_ACLE_FUNC(svpmullt,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svpmullt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svpmullt_n_u64u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = bitcast [[TMP1]] to -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svpmullt_n_u64(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svpmullt_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv4i32( %op1, %[[DUP]]) + // CHECK: %[[BITCAST:.*]] = bitcast %[[INTRINSIC]] to + // CHECK: ret %[[BITCAST]] // overload-warning@+2 {{implicit declaration of function 'svpmullt'}} // expected-warning@+1 {{implicit declaration of function 'svpmullt_n_u64'}} return SVE_ACLE_FUNC(svpmullt,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c index 298073adb321..398e876ab183 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_pmullt_128.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-aes -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,37 +14,22 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svpmullt_pair_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svpmullt_pair_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svpmullt_pair_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svpmullt_pair_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svpmullt_pair'}} // expected-warning@+1 {{implicit declaration of function 'svpmullt_pair_u64'}} return SVE_ACLE_FUNC(svpmullt_pair,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svpmullt_pair_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z24test_svpmullt_pair_n_u64u12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svpmullt_pair_n_u64(svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svpmullt_pair_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.pmullt.pair.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svpmullt_pair'}} // expected-warning@+1 {{implicit declaration of function 'svpmullt_pair_n_u64'}} return SVE_ACLE_FUNC(svpmullt_pair,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qabs.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qabs.c index 4410ee505e4b..97d6c4c95940 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qabs.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qabs.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,223 +14,130 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqabs_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqabs.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqabs_s8_zu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqabs.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqabs_s8_z(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svqabs_s8_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqabs.nxv16i8( zeroinitializer, %pg, %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqabs_z'}} // expected-warning@+1 {{implicit declaration of function 'svqabs_s8_z'}} return SVE_ACLE_FUNC(svqabs,_s8,_z,)(pg, op); } -// CHECK-LABEL: @test_svqabs_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqabs_s16_zu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqabs_s16_z(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svqabs_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqabs.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqabs_z'}} // expected-warning@+1 {{implicit declaration of function 'svqabs_s16_z'}} return SVE_ACLE_FUNC(svqabs,_s16,_z,)(pg, op); } -// CHECK-LABEL: @test_svqabs_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqabs_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqabs_s32_z(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svqabs_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqabs.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqabs_z'}} // expected-warning@+1 {{implicit declaration of function 'svqabs_s32_z'}} return SVE_ACLE_FUNC(svqabs,_s32,_z,)(pg, op); } -// CHECK-LABEL: @test_svqabs_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqabs_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqabs_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svqabs_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqabs.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqabs_z'}} // expected-warning@+1 {{implicit declaration of function 'svqabs_s64_z'}} return SVE_ACLE_FUNC(svqabs,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svqabs_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqabs.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqabs_s8_mu10__SVInt8_tu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqabs.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqabs_s8_m(svint8_t inactive, svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svqabs_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqabs.nxv16i8( %inactive, %pg, %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqabs_m'}} // expected-warning@+1 {{implicit declaration of function 'svqabs_s8_m'}} return SVE_ACLE_FUNC(svqabs,_s8,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svqabs_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqabs_s16_mu11__SVInt16_tu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqabs_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svqabs_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqabs.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqabs_m'}} // expected-warning@+1 {{implicit declaration of function 'svqabs_s16_m'}} return SVE_ACLE_FUNC(svqabs,_s16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svqabs_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqabs_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqabs_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svqabs_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqabs.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqabs_m'}} // expected-warning@+1 {{implicit declaration of function 'svqabs_s32_m'}} return SVE_ACLE_FUNC(svqabs,_s32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svqabs_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqabs_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqabs_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svqabs_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqabs.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqabs_m'}} // expected-warning@+1 {{implicit declaration of function 'svqabs_s64_m'}} return SVE_ACLE_FUNC(svqabs,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svqabs_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqabs.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqabs_s8_xu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqabs.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqabs_s8_x(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svqabs_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqabs.nxv16i8( undef, %pg, %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqabs_x'}} // expected-warning@+1 {{implicit declaration of function 'svqabs_s8_x'}} return SVE_ACLE_FUNC(svqabs,_s8,_x,)(pg, op); } -// CHECK-LABEL: @test_svqabs_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqabs_s16_xu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqabs_s16_x(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svqabs_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqabs.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqabs_x'}} // expected-warning@+1 {{implicit declaration of function 'svqabs_s16_x'}} return SVE_ACLE_FUNC(svqabs,_s16,_x,)(pg, op); } -// CHECK-LABEL: @test_svqabs_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqabs_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqabs_s32_x(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svqabs_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqabs.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqabs_x'}} // expected-warning@+1 {{implicit declaration of function 'svqabs_s32_x'}} return SVE_ACLE_FUNC(svqabs,_s32,_x,)(pg, op); } -// CHECK-LABEL: @test_svqabs_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqabs_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqabs.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqabs_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svqabs_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqabs.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqabs_x'}} // expected-warning@+1 {{implicit declaration of function 'svqabs_s64_x'}} return SVE_ACLE_FUNC(svqabs,_s64,_x,)(pg, op); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c index b6f35b2e7ff1..3d843dcf642f 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qadd.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,972 +14,556 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqadd_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqadd_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqadd_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqadd_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_s8_m'}} return SVE_ACLE_FUNC(svqadd,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqadd_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqadd_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_s16_m'}} return SVE_ACLE_FUNC(svqadd,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqadd_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqadd_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_s32_m'}} return SVE_ACLE_FUNC(svqadd,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqadd_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqadd_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_s64_m'}} return SVE_ACLE_FUNC(svqadd,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqadd_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqadd_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svqadd_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_u8_m'}} return SVE_ACLE_FUNC(svqadd,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svqadd_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svqadd_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_u16_m'}} return SVE_ACLE_FUNC(svqadd,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svqadd_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { // CHECKA-LABEL: test_svqadd_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_u32_m'}} return SVE_ACLE_FUNC(svqadd,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svqadd_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svqadd_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_u64_m'}} return SVE_ACLE_FUNC(svqadd,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqadd_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqadd_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqadd_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s8_m'}} return SVE_ACLE_FUNC(svqadd,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqadd_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svqadd_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqadd_n_s16_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s16_m'}} return SVE_ACLE_FUNC(svqadd,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqadd_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svqadd_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqadd_n_s32_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s32_m'}} return SVE_ACLE_FUNC(svqadd,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqadd_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svqadd_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqadd_n_s64_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s64_m'}} return SVE_ACLE_FUNC(svqadd,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqadd_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqadd_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svqadd_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u8_m'}} return SVE_ACLE_FUNC(svqadd,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqadd_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svqadd_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svqadd_n_u16_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u16_m'}} return SVE_ACLE_FUNC(svqadd,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqadd_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svqadd_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svqadd_n_u32_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u32_m'}} return SVE_ACLE_FUNC(svqadd,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqadd_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svqadd_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svqadd_n_u64_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u64_m'}} return SVE_ACLE_FUNC(svqadd,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqadd_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqadd_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqadd_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_s8_z'}} return SVE_ACLE_FUNC(svqadd,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svqadd_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqadd_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_s16_z'}} return SVE_ACLE_FUNC(svqadd,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svqadd_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqadd_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_s32_z'}} return SVE_ACLE_FUNC(svqadd,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svqadd_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqadd_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_s64_z'}} return SVE_ACLE_FUNC(svqadd,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqadd_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqadd_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svqadd_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_u8_z'}} return SVE_ACLE_FUNC(svqadd,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svqadd_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svqadd_u16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_u16_z'}} return SVE_ACLE_FUNC(svqadd,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svqadd_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { // CHECKA-LABEL: test_svqadd_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_u32_z'}} return SVE_ACLE_FUNC(svqadd,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svqadd_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svqadd_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_u64_z'}} return SVE_ACLE_FUNC(svqadd,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svqadd_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svqadd_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqadd_n_s8_z + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s8_z'}} return SVE_ACLE_FUNC(svqadd,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svqadd_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svqadd_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqadd_n_s16_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s16_z'}} return SVE_ACLE_FUNC(svqadd,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svqadd_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svqadd_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqadd_n_s32_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s32_z'}} return SVE_ACLE_FUNC(svqadd,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svqadd_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svqadd_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqadd_n_s64_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s64_z'}} return SVE_ACLE_FUNC(svqadd,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svqadd_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svqadd_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svqadd_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u8_z'}} return SVE_ACLE_FUNC(svqadd,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svqadd_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svqadd_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svqadd_n_u16_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u16_z'}} return SVE_ACLE_FUNC(svqadd,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svqadd_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svqadd_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svqadd_n_u32_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u32_z'}} return SVE_ACLE_FUNC(svqadd,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svqadd_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svqadd_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svqadd_n_u64_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u64_z'}} return SVE_ACLE_FUNC(svqadd,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqadd_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqadd_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqadd_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_s8_x'}} return SVE_ACLE_FUNC(svqadd,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqadd_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqadd_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_s16_x'}} return SVE_ACLE_FUNC(svqadd,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqadd_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqadd_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_s32_x'}} return SVE_ACLE_FUNC(svqadd,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqadd_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqadd_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_s64_x'}} return SVE_ACLE_FUNC(svqadd,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqadd_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqadd_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svqadd_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_u8_x'}} return SVE_ACLE_FUNC(svqadd,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svqadd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svqadd_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_u16_x'}} return SVE_ACLE_FUNC(svqadd,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svqadd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { // CHECKA-LABEL: test_svqadd_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_u32_x'}} return SVE_ACLE_FUNC(svqadd,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqadd_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svqadd_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svqadd_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_u64_x'}} return SVE_ACLE_FUNC(svqadd,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqadd_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqadd_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqadd_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s8_x'}} return SVE_ACLE_FUNC(svqadd,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqadd_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svqadd_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqadd_n_s16_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s16_x'}} return SVE_ACLE_FUNC(svqadd,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqadd_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svqadd_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqadd_n_s32_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s32_x'}} return SVE_ACLE_FUNC(svqadd,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqadd_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svqadd_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqadd_n_s64_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqadd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_s64_x'}} return SVE_ACLE_FUNC(svqadd,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqadd_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqadd_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svqadd_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u8_x'}} return SVE_ACLE_FUNC(svqadd,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqadd_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svqadd_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svqadd_n_u16_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u16_x'}} return SVE_ACLE_FUNC(svqadd,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqadd_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svqadd_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svqadd_n_u32_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u32_x'}} return SVE_ACLE_FUNC(svqadd,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqadd_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqadd_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svqadd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svqadd_n_u64_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqadd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svqadd_n_u64_x'}} return SVE_ACLE_FUNC(svqadd,_n_u64,_x,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c index 6825960f8535..d5956427e363 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qcadd.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,137 +14,81 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqcadd_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svqcadd_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqcadd_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqcadd_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv16i8( %op1, %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqcadd'}} // expected-warning@+1 {{implicit declaration of function 'svqcadd_s8'}} return SVE_ACLE_FUNC(svqcadd,_s8,,)(op1, op2, 90); } -// CHECK-LABEL: @test_svqcadd_s8_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqcadd_s8_1u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqcadd_s8_1(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqcadd_s8_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv16i8( %op1, %op2, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqcadd'}} // expected-warning@+1 {{implicit declaration of function 'svqcadd_s8'}} return SVE_ACLE_FUNC(svqcadd,_s8,,)(op1, op2, 270); } -// CHECK-LABEL: @test_svqcadd_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqcadd_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqcadd_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqcadd_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv8i16( %op1, %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqcadd'}} // expected-warning@+1 {{implicit declaration of function 'svqcadd_s16'}} return SVE_ACLE_FUNC(svqcadd,_s16,,)(op1, op2, 90); } -// CHECK-LABEL: @test_svqcadd_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqcadd_s16_1u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqcadd_s16_1(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqcadd_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv8i16( %op1, %op2, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqcadd'}} // expected-warning@+1 {{implicit declaration of function 'svqcadd_s16'}} return SVE_ACLE_FUNC(svqcadd,_s16,,)(op1, op2, 270); } -// CHECK-LABEL: @test_svqcadd_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqcadd_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqcadd_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqcadd_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv4i32( %op1, %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqcadd'}} // expected-warning@+1 {{implicit declaration of function 'svqcadd_s32'}} return SVE_ACLE_FUNC(svqcadd,_s32,,)(op1, op2, 90); } -// CHECK-LABEL: @test_svqcadd_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqcadd_s32_1u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqcadd_s32_1(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqcadd_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv4i32( %op1, %op2, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqcadd'}} // expected-warning@+1 {{implicit declaration of function 'svqcadd_s32'}} return SVE_ACLE_FUNC(svqcadd,_s32,,)(op1, op2, 270); } -// CHECK-LABEL: @test_svqcadd_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqcadd_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqcadd_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqcadd_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv2i64( %op1, %op2, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqcadd'}} // expected-warning@+1 {{implicit declaration of function 'svqcadd_s64'}} return SVE_ACLE_FUNC(svqcadd,_s64,,)(op1, op2, 90); } -// CHECK-LABEL: @test_svqcadd_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqcadd_s64_1u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqcadd_s64_1(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqcadd_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqcadd.x.nxv2i64( %op1, %op2, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqcadd'}} // expected-warning@+1 {{implicit declaration of function 'svqcadd_s64'}} return SVE_ACLE_FUNC(svqcadd,_s64,,)(op1, op2, 270); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c index b9b5e3cc23d1..51073ec47c9e 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,177 +14,104 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqdmlalb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmlalb_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqdmlalb_s16(svint16_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svqdmlalb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalb_s16'}} return SVE_ACLE_FUNC(svqdmlalb,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlalb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmlalb_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmlalb_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqdmlalb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalb_s32'}} return SVE_ACLE_FUNC(svqdmlalb,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlalb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmlalb_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmlalb_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqdmlalb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalb_s64'}} return SVE_ACLE_FUNC(svqdmlalb,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlalb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdmlalb_n_s16u11__SVInt16_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqdmlalb_n_s16(svint16_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svqdmlalb_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalb_n_s16'}} return SVE_ACLE_FUNC(svqdmlalb,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlalb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdmlalb_n_s32u11__SVInt32_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqdmlalb_n_s32(svint32_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svqdmlalb_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalb_n_s32'}} return SVE_ACLE_FUNC(svqdmlalb,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlalb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdmlalb_n_s64u11__SVInt64_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqdmlalb_n_s64(svint64_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svqdmlalb_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalb.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalb'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalb_n_s64'}} return SVE_ACLE_FUNC(svqdmlalb,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlalb_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqdmlalb_lane_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmlalb_lane_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqdmlalb_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalb_lane_s32'}} return SVE_ACLE_FUNC(svqdmlalb_lane,_s32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svqdmlalb_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqdmlalb_lane_s32_1u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmlalb_lane_s32_1(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqdmlalb_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv4i32( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalb_lane_s32'}} return SVE_ACLE_FUNC(svqdmlalb_lane,_s32,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svqdmlalb_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqdmlalb_lane_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmlalb_lane_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqdmlalb_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalb_lane_s64'}} return SVE_ACLE_FUNC(svqdmlalb_lane,_s64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svqdmlalb_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqdmlalb_lane_s64_1u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmlalb_lane_s64_1(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqdmlalb_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalb.lane.nxv2i64( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalb_lane_s64'}} return SVE_ACLE_FUNC(svqdmlalb_lane,_s64,,)(op1, op2, op3, 3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c index 8d323d689706..59082de1c309 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalbt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,109 +14,64 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqdmlalbt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqdmlalbt_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqdmlalbt_s16(svint16_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svqdmlalbt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalbt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalbt_s16'}} return SVE_ACLE_FUNC(svqdmlalbt,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlalbt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqdmlalbt_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmlalbt_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqdmlalbt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalbt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalbt_s32'}} return SVE_ACLE_FUNC(svqdmlalbt,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlalbt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqdmlalbt_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmlalbt_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqdmlalbt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalbt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalbt_s64'}} return SVE_ACLE_FUNC(svqdmlalbt,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlalbt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svqdmlalbt_n_s16u11__SVInt16_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqdmlalbt_n_s16(svint16_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svqdmlalbt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalbt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalbt_n_s16'}} return SVE_ACLE_FUNC(svqdmlalbt,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlalbt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svqdmlalbt_n_s32u11__SVInt32_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqdmlalbt_n_s32(svint32_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svqdmlalbt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalbt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalbt_n_s32'}} return SVE_ACLE_FUNC(svqdmlalbt,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlalbt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svqdmlalbt_n_s64u11__SVInt64_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqdmlalbt_n_s64(svint64_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svqdmlalbt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalbt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalbt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalbt_n_s64'}} return SVE_ACLE_FUNC(svqdmlalbt,_n_s64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c index 7a1691303e83..605bce53b091 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlalt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,177 +14,104 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqdmlalt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmlalt_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqdmlalt_s16(svint16_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svqdmlalt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalt_s16'}} return SVE_ACLE_FUNC(svqdmlalt,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlalt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmlalt_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmlalt_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqdmlalt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalt_s32'}} return SVE_ACLE_FUNC(svqdmlalt,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlalt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmlalt_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmlalt_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqdmlalt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalt_s64'}} return SVE_ACLE_FUNC(svqdmlalt,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlalt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdmlalt_n_s16u11__SVInt16_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqdmlalt_n_s16(svint16_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svqdmlalt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalt_n_s16'}} return SVE_ACLE_FUNC(svqdmlalt,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlalt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdmlalt_n_s32u11__SVInt32_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqdmlalt_n_s32(svint32_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svqdmlalt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalt_n_s32'}} return SVE_ACLE_FUNC(svqdmlalt,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlalt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdmlalt_n_s64u11__SVInt64_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqdmlalt_n_s64(svint64_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svqdmlalt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalt_n_s64'}} return SVE_ACLE_FUNC(svqdmlalt,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlalt_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqdmlalt_lane_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmlalt_lane_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqdmlalt_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalt_lane_s32'}} return SVE_ACLE_FUNC(svqdmlalt_lane,_s32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svqdmlalt_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqdmlalt_lane_s32_1u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmlalt_lane_s32_1(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqdmlalt_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv4i32( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalt_lane_s32'}} return SVE_ACLE_FUNC(svqdmlalt_lane,_s32,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svqdmlalt_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqdmlalt_lane_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmlalt_lane_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqdmlalt_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalt_lane_s64'}} return SVE_ACLE_FUNC(svqdmlalt_lane,_s64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svqdmlalt_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqdmlalt_lane_s64_1u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmlalt_lane_s64_1(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqdmlalt_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlalt.lane.nxv2i64( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlalt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlalt_lane_s64'}} return SVE_ACLE_FUNC(svqdmlalt_lane,_s64,,)(op1, op2, op3, 3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c index e4fd60422eba..f331e6f24d1f 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,177 +14,104 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqdmlslb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmlslb_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqdmlslb_s16(svint16_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svqdmlslb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslb_s16'}} return SVE_ACLE_FUNC(svqdmlslb,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlslb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmlslb_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmlslb_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqdmlslb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslb_s32'}} return SVE_ACLE_FUNC(svqdmlslb,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlslb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmlslb_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmlslb_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqdmlslb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslb_s64'}} return SVE_ACLE_FUNC(svqdmlslb,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlslb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdmlslb_n_s16u11__SVInt16_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqdmlslb_n_s16(svint16_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svqdmlslb_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslb_n_s16'}} return SVE_ACLE_FUNC(svqdmlslb,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlslb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdmlslb_n_s32u11__SVInt32_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqdmlslb_n_s32(svint32_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svqdmlslb_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslb_n_s32'}} return SVE_ACLE_FUNC(svqdmlslb,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlslb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdmlslb_n_s64u11__SVInt64_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqdmlslb_n_s64(svint64_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svqdmlslb_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslb.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslb'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslb_n_s64'}} return SVE_ACLE_FUNC(svqdmlslb,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlslb_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqdmlslb_lane_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmlslb_lane_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqdmlslb_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslb_lane_s32'}} return SVE_ACLE_FUNC(svqdmlslb_lane,_s32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svqdmlslb_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqdmlslb_lane_s32_1u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmlslb_lane_s32_1(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqdmlslb_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv4i32( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslb_lane_s32'}} return SVE_ACLE_FUNC(svqdmlslb_lane,_s32,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svqdmlslb_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqdmlslb_lane_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmlslb_lane_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqdmlslb_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslb_lane_s64'}} return SVE_ACLE_FUNC(svqdmlslb_lane,_s64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svqdmlslb_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqdmlslb_lane_s64_1u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmlslb_lane_s64_1(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqdmlslb_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslb.lane.nxv2i64( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslb_lane_s64'}} return SVE_ACLE_FUNC(svqdmlslb_lane,_s64,,)(op1, op2, op3, 3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c index 56a5fe1a1788..4584e4ff5d7e 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslbt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,109 +14,64 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqdmlslbt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqdmlslbt_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqdmlslbt_s16(svint16_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svqdmlslbt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslbt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslbt_s16'}} return SVE_ACLE_FUNC(svqdmlslbt,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlslbt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqdmlslbt_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmlslbt_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqdmlslbt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslbt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslbt_s32'}} return SVE_ACLE_FUNC(svqdmlslbt,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlslbt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqdmlslbt_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmlslbt_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqdmlslbt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslbt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslbt_s64'}} return SVE_ACLE_FUNC(svqdmlslbt,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlslbt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svqdmlslbt_n_s16u11__SVInt16_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqdmlslbt_n_s16(svint16_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svqdmlslbt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslbt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslbt_n_s16'}} return SVE_ACLE_FUNC(svqdmlslbt,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlslbt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svqdmlslbt_n_s32u11__SVInt32_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqdmlslbt_n_s32(svint32_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svqdmlslbt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslbt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslbt_n_s32'}} return SVE_ACLE_FUNC(svqdmlslbt,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlslbt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svqdmlslbt_n_s64u11__SVInt64_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqdmlslbt_n_s64(svint64_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svqdmlslbt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslbt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslbt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslbt_n_s64'}} return SVE_ACLE_FUNC(svqdmlslbt,_n_s64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c index 30444905ac21..52694173d2a9 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmlslt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,177 +14,104 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqdmlslt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmlslt_s16u11__SVInt16_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqdmlslt_s16(svint16_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svqdmlslt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslt_s16'}} return SVE_ACLE_FUNC(svqdmlslt,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlslt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmlslt_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmlslt_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqdmlslt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslt_s32'}} return SVE_ACLE_FUNC(svqdmlslt,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlslt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmlslt_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmlslt_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqdmlslt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslt_s64'}} return SVE_ACLE_FUNC(svqdmlslt,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlslt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdmlslt_n_s16u11__SVInt16_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqdmlslt_n_s16(svint16_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svqdmlslt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslt_n_s16'}} return SVE_ACLE_FUNC(svqdmlslt,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlslt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdmlslt_n_s32u11__SVInt32_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqdmlslt_n_s32(svint32_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svqdmlslt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslt_n_s32'}} return SVE_ACLE_FUNC(svqdmlslt,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlslt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdmlslt_n_s64u11__SVInt64_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqdmlslt_n_s64(svint64_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svqdmlslt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslt_n_s64'}} return SVE_ACLE_FUNC(svqdmlslt,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqdmlslt_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqdmlslt_lane_s32u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmlslt_lane_s32(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqdmlslt_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslt_lane_s32'}} return SVE_ACLE_FUNC(svqdmlslt_lane,_s32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svqdmlslt_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqdmlslt_lane_s32_1u11__SVInt32_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmlslt_lane_s32_1(svint32_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqdmlslt_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv4i32( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslt_lane_s32'}} return SVE_ACLE_FUNC(svqdmlslt_lane,_s32,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svqdmlslt_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqdmlslt_lane_s64u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmlslt_lane_s64(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqdmlslt_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslt_lane_s64'}} return SVE_ACLE_FUNC(svqdmlslt_lane,_s64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svqdmlslt_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqdmlslt_lane_s64_1u11__SVInt64_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmlslt_lane_s64_1(svint64_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqdmlslt_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmlslt.lane.nxv2i64( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmlslt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmlslt_lane_s64'}} return SVE_ACLE_FUNC(svqdmlslt_lane,_s64,,)(op1, op2, op3, 3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c index ad3279d67ecc..7d48bca9c7be 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmulh.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,247 +14,145 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqdmulh_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqdmulh_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqdmulh_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqdmulh_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmulh.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmulh'}} // expected-warning@+1 {{implicit declaration of function 'svqdmulh_s8'}} return SVE_ACLE_FUNC(svqdmulh,_s8,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmulh_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqdmulh_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqdmulh_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqdmulh_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmulh.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmulh'}} // expected-warning@+1 {{implicit declaration of function 'svqdmulh_s16'}} return SVE_ACLE_FUNC(svqdmulh,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmulh_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqdmulh_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmulh_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqdmulh_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmulh.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmulh'}} // expected-warning@+1 {{implicit declaration of function 'svqdmulh_s32'}} return SVE_ACLE_FUNC(svqdmulh,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmulh_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqdmulh_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmulh_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqdmulh_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmulh.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmulh'}} // expected-warning@+1 {{implicit declaration of function 'svqdmulh_s64'}} return SVE_ACLE_FUNC(svqdmulh,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmulh_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmulh_n_s8u10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqdmulh_n_s8(svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqdmulh_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmulh.nxv16i8( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmulh'}} // expected-warning@+1 {{implicit declaration of function 'svqdmulh_n_s8'}} return SVE_ACLE_FUNC(svqdmulh,_n_s8,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmulh_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svqdmulh_n_s16u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqdmulh_n_s16(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqdmulh_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmulh.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmulh'}} // expected-warning@+1 {{implicit declaration of function 'svqdmulh_n_s16'}} return SVE_ACLE_FUNC(svqdmulh,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmulh_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svqdmulh_n_s32u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqdmulh_n_s32(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqdmulh_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmulh.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmulh'}} // expected-warning@+1 {{implicit declaration of function 'svqdmulh_n_s32'}} return SVE_ACLE_FUNC(svqdmulh,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmulh_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svqdmulh_n_s64u11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmulh.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqdmulh_n_s64(svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqdmulh_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmulh.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmulh'}} // expected-warning@+1 {{implicit declaration of function 'svqdmulh_n_s64'}} return SVE_ACLE_FUNC(svqdmulh,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmulh_lane_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdmulh_lane_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqdmulh_lane_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqdmulh_lane_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv8i16( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmulh_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmulh_lane_s16'}} return SVE_ACLE_FUNC(svqdmulh_lane,_s16,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svqdmulh_lane_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z24test_svqdmulh_lane_s16_1u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqdmulh_lane_s16_1(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqdmulh_lane_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv8i16( %op1, %op2, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmulh_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmulh_lane_s16'}} return SVE_ACLE_FUNC(svqdmulh_lane,_s16,,)(op1, op2, 7); } -// CHECK-LABEL: @test_svqdmulh_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdmulh_lane_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmulh_lane_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqdmulh_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv4i32( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmulh_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmulh_lane_s32'}} return SVE_ACLE_FUNC(svqdmulh_lane,_s32,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svqdmulh_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z24test_svqdmulh_lane_s32_1u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmulh_lane_s32_1(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqdmulh_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv4i32( %op1, %op2, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmulh_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmulh_lane_s32'}} return SVE_ACLE_FUNC(svqdmulh_lane,_s32,,)(op1, op2, 3); } -// CHECK-LABEL: @test_svqdmulh_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqdmulh_lane_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmulh_lane_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqdmulh_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv2i64( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmulh_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmulh_lane_s64'}} return SVE_ACLE_FUNC(svqdmulh_lane,_s64,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svqdmulh_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z24test_svqdmulh_lane_s64_1u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmulh_lane_s64_1(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqdmulh_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmulh.lane.nxv2i64( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmulh_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmulh_lane_s64'}} return SVE_ACLE_FUNC(svqdmulh_lane,_s64,,)(op1, op2, 1); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c index 61fedbfc0bb3..62fb6ecde66f 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,177 +14,104 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqdmullb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmullb_s16u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqdmullb_s16(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqdmullb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullb'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullb_s16'}} return SVE_ACLE_FUNC(svqdmullb,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmullb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmullb_s32u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmullb_s32(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqdmullb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullb'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullb_s32'}} return SVE_ACLE_FUNC(svqdmullb,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmullb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmullb_s64u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmullb_s64(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqdmullb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullb'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullb_s64'}} return SVE_ACLE_FUNC(svqdmullb,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmullb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdmullb_n_s16u10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqdmullb_n_s16(svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqdmullb_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullb'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullb_n_s16'}} return SVE_ACLE_FUNC(svqdmullb,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmullb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdmullb_n_s32u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqdmullb_n_s32(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqdmullb_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullb'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullb_n_s32'}} return SVE_ACLE_FUNC(svqdmullb,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmullb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdmullb_n_s64u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqdmullb_n_s64(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqdmullb_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullb'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullb_n_s64'}} return SVE_ACLE_FUNC(svqdmullb,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmullb_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqdmullb_lane_s32u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmullb_lane_s32(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqdmullb_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv4i32( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullb_lane_s32'}} return SVE_ACLE_FUNC(svqdmullb_lane,_s32,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svqdmullb_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqdmullb_lane_s32_1u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmullb_lane_s32_1(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqdmullb_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv4i32( %op1, %op2, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullb_lane_s32'}} return SVE_ACLE_FUNC(svqdmullb_lane,_s32,,)(op1, op2, 7); } -// CHECK-LABEL: @test_svqdmullb_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqdmullb_lane_s64u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmullb_lane_s64(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqdmullb_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv2i64( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullb_lane_s64'}} return SVE_ACLE_FUNC(svqdmullb_lane,_s64,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svqdmullb_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqdmullb_lane_s64_1u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmullb_lane_s64_1(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqdmullb_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullb.lane.nxv2i64( %op1, %op2, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullb_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullb_lane_s64'}} return SVE_ACLE_FUNC(svqdmullb_lane,_s64,,)(op1, op2, 3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c index d14c758274cd..df4262e54874 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qdmullt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,177 +14,104 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqdmullt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmullt_s16u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqdmullt_s16(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqdmullt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullt.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullt_s16'}} return SVE_ACLE_FUNC(svqdmullt,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmullt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmullt_s32u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmullt_s32(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqdmullt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullt.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullt_s32'}} return SVE_ACLE_FUNC(svqdmullt,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmullt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqdmullt_s64u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmullt_s64(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqdmullt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullt.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullt_s64'}} return SVE_ACLE_FUNC(svqdmullt,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmullt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdmullt_n_s16u10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqdmullt_n_s16(svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqdmullt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullt.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullt_n_s16'}} return SVE_ACLE_FUNC(svqdmullt,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmullt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdmullt_n_s32u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqdmullt_n_s32(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqdmullt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullt.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullt_n_s32'}} return SVE_ACLE_FUNC(svqdmullt,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmullt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqdmullt_n_s64u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqdmullt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqdmullt_n_s64(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqdmullt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullt.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullt'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullt_n_s64'}} return SVE_ACLE_FUNC(svqdmullt,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svqdmullt_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqdmullt_lane_s32u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmullt_lane_s32(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqdmullt_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv4i32( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullt_lane_s32'}} return SVE_ACLE_FUNC(svqdmullt_lane,_s32,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svqdmullt_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqdmullt_lane_s32_1u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqdmullt_lane_s32_1(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqdmullt_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv4i32( %op1, %op2, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullt_lane_s32'}} return SVE_ACLE_FUNC(svqdmullt_lane,_s32,,)(op1, op2, 7); } -// CHECK-LABEL: @test_svqdmullt_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqdmullt_lane_s64u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmullt_lane_s64(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqdmullt_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv2i64( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullt_lane_s64'}} return SVE_ACLE_FUNC(svqdmullt_lane,_s64,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svqdmullt_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqdmullt_lane_s64_1u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqdmullt_lane_s64_1(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqdmullt_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqdmullt.lane.nxv2i64( %op1, %op2, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqdmullt_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqdmullt_lane_s64'}} return SVE_ACLE_FUNC(svqdmullt_lane,_s64,,)(op1, op2, 3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qneg.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qneg.c index f07f88a59555..59af8c87fc69 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qneg.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qneg.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,223 +14,130 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqneg_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqneg.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqneg_s8_zu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqneg.nxv16i8( zeroinitializer, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqneg_s8_z(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svqneg_s8_z + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqneg.nxv16i8( zeroinitializer, %pg, %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqneg_z'}} // expected-warning@+1 {{implicit declaration of function 'svqneg_s8_z'}} return SVE_ACLE_FUNC(svqneg,_s8,_z,)(pg, op); } -// CHECK-LABEL: @test_svqneg_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqneg_s16_zu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv8i16( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqneg_s16_z(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svqneg_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqneg.nxv8i16( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqneg_z'}} // expected-warning@+1 {{implicit declaration of function 'svqneg_s16_z'}} return SVE_ACLE_FUNC(svqneg,_s16,_z,)(pg, op); } -// CHECK-LABEL: @test_svqneg_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqneg_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqneg_s32_z(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svqneg_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqneg.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqneg_z'}} // expected-warning@+1 {{implicit declaration of function 'svqneg_s32_z'}} return SVE_ACLE_FUNC(svqneg,_s32,_z,)(pg, op); } -// CHECK-LABEL: @test_svqneg_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqneg_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv2i64( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqneg_s64_z(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svqneg_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqneg.nxv2i64( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqneg_z'}} // expected-warning@+1 {{implicit declaration of function 'svqneg_s64_z'}} return SVE_ACLE_FUNC(svqneg,_s64,_z,)(pg, op); } -// CHECK-LABEL: @test_svqneg_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqneg.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqneg_s8_mu10__SVInt8_tu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqneg.nxv16i8( [[INACTIVE:%.*]], [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqneg_s8_m(svint8_t inactive, svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svqneg_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqneg.nxv16i8( %inactive, %pg, %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqneg_m'}} // expected-warning@+1 {{implicit declaration of function 'svqneg_s8_m'}} return SVE_ACLE_FUNC(svqneg,_s8,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svqneg_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqneg_s16_mu11__SVInt16_tu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv8i16( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqneg_s16_m(svint16_t inactive, svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svqneg_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqneg.nxv8i16( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqneg_m'}} // expected-warning@+1 {{implicit declaration of function 'svqneg_s16_m'}} return SVE_ACLE_FUNC(svqneg,_s16,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svqneg_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqneg_s32_mu11__SVInt32_tu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqneg_s32_m(svint32_t inactive, svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svqneg_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqneg.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqneg_m'}} // expected-warning@+1 {{implicit declaration of function 'svqneg_s32_m'}} return SVE_ACLE_FUNC(svqneg,_s32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svqneg_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqneg_s64_mu11__SVInt64_tu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv2i64( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqneg_s64_m(svint64_t inactive, svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svqneg_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqneg.nxv2i64( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqneg_m'}} // expected-warning@+1 {{implicit declaration of function 'svqneg_s64_m'}} return SVE_ACLE_FUNC(svqneg,_s64,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svqneg_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqneg.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqneg_s8_xu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqneg.nxv16i8( undef, [[PG:%.*]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqneg_s8_x(svbool_t pg, svint8_t op) { + // CHECK-LABEL: test_svqneg_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqneg.nxv16i8( undef, %pg, %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqneg_x'}} // expected-warning@+1 {{implicit declaration of function 'svqneg_s8_x'}} return SVE_ACLE_FUNC(svqneg,_s8,_x,)(pg, op); } -// CHECK-LABEL: @test_svqneg_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqneg_s16_xu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv8i16( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqneg_s16_x(svbool_t pg, svint16_t op) { + // CHECK-LABEL: test_svqneg_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqneg.nxv8i16( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqneg_x'}} // expected-warning@+1 {{implicit declaration of function 'svqneg_s16_x'}} return SVE_ACLE_FUNC(svqneg,_s16,_x,)(pg, op); } -// CHECK-LABEL: @test_svqneg_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqneg_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqneg_s32_x(svbool_t pg, svint32_t op) { + // CHECK-LABEL: test_svqneg_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqneg.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqneg_x'}} // expected-warning@+1 {{implicit declaration of function 'svqneg_s32_x'}} return SVE_ACLE_FUNC(svqneg,_s32,_x,)(pg, op); } -// CHECK-LABEL: @test_svqneg_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqneg_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqneg.nxv2i64( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqneg_s64_x(svbool_t pg, svint64_t op) { + // CHECK-LABEL: test_svqneg_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqneg.nxv2i64( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqneg_x'}} // expected-warning@+1 {{implicit declaration of function 'svqneg_s64_x'}} return SVE_ACLE_FUNC(svqneg,_s64,_x,)(pg, op); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c index 471968a380a2..4b8dd93bf08b 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdcmlah.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,341 +14,201 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqrdcmlah_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrdcmlah_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqrdcmlah_s8(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svqrdcmlah_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s8'}} return SVE_ACLE_FUNC(svqrdcmlah,_s8,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svqrdcmlah_s8_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrdcmlah_s8_1u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqrdcmlah_s8_1(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svqrdcmlah_s8_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( %op1, %op2, %op3, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s8'}} return SVE_ACLE_FUNC(svqrdcmlah,_s8,,)(op1, op2, op3, 90); } -// CHECK-LABEL: @test_svqrdcmlah_s8_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrdcmlah_s8_2u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqrdcmlah_s8_2(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svqrdcmlah_s8_2 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( %op1, %op2, %op3, i32 180) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s8'}} return SVE_ACLE_FUNC(svqrdcmlah,_s8,,)(op1, op2, op3, 180); } -// CHECK-LABEL: @test_svqrdcmlah_s8_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrdcmlah_s8_3u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqrdcmlah_s8_3(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svqrdcmlah_s8_3 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv16i8( %op1, %op2, %op3, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s8'}} return SVE_ACLE_FUNC(svqrdcmlah,_s8,,)(op1, op2, op3, 270); } -// CHECK-LABEL: @test_svqrdcmlah_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqrdcmlah_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrdcmlah_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqrdcmlah_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s16'}} return SVE_ACLE_FUNC(svqrdcmlah,_s16,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svqrdcmlah_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqrdcmlah_s16_1u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrdcmlah_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqrdcmlah_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( %op1, %op2, %op3, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s16'}} return SVE_ACLE_FUNC(svqrdcmlah,_s16,,)(op1, op2, op3, 90); } -// CHECK-LABEL: @test_svqrdcmlah_s16_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqrdcmlah_s16_2u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrdcmlah_s16_2(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqrdcmlah_s16_2 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( %op1, %op2, %op3, i32 180) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s16'}} return SVE_ACLE_FUNC(svqrdcmlah,_s16,,)(op1, op2, op3, 180); } -// CHECK-LABEL: @test_svqrdcmlah_s16_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqrdcmlah_s16_3u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrdcmlah_s16_3(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqrdcmlah_s16_3 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv8i16( %op1, %op2, %op3, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s16'}} return SVE_ACLE_FUNC(svqrdcmlah,_s16,,)(op1, op2, op3, 270); } -// CHECK-LABEL: @test_svqrdcmlah_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqrdcmlah_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrdcmlah_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqrdcmlah_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s32'}} return SVE_ACLE_FUNC(svqrdcmlah,_s32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svqrdcmlah_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqrdcmlah_s32_1u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrdcmlah_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqrdcmlah_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( %op1, %op2, %op3, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s32'}} return SVE_ACLE_FUNC(svqrdcmlah,_s32,,)(op1, op2, op3, 90); } -// CHECK-LABEL: @test_svqrdcmlah_s32_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqrdcmlah_s32_2u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrdcmlah_s32_2(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqrdcmlah_s32_2 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( %op1, %op2, %op3, i32 180) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s32'}} return SVE_ACLE_FUNC(svqrdcmlah,_s32,,)(op1, op2, op3, 180); } -// CHECK-LABEL: @test_svqrdcmlah_s32_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqrdcmlah_s32_3u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrdcmlah_s32_3(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqrdcmlah_s32_3 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv4i32( %op1, %op2, %op3, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s32'}} return SVE_ACLE_FUNC(svqrdcmlah,_s32,,)(op1, op2, op3, 270); } -// CHECK-LABEL: @test_svqrdcmlah_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqrdcmlah_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqrdcmlah_s64(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svqrdcmlah_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s64'}} return SVE_ACLE_FUNC(svqrdcmlah,_s64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svqrdcmlah_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqrdcmlah_s64_1u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqrdcmlah_s64_1(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svqrdcmlah_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( %op1, %op2, %op3, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s64'}} return SVE_ACLE_FUNC(svqrdcmlah,_s64,,)(op1, op2, op3, 90); } -// CHECK-LABEL: @test_svqrdcmlah_s64_2( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqrdcmlah_s64_2u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqrdcmlah_s64_2(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svqrdcmlah_s64_2 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( %op1, %op2, %op3, i32 180) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s64'}} return SVE_ACLE_FUNC(svqrdcmlah,_s64,,)(op1, op2, op3, 180); } -// CHECK-LABEL: @test_svqrdcmlah_s64_3( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqrdcmlah_s64_3u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqrdcmlah_s64_3(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svqrdcmlah_s64_3 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.x.nxv2i64( %op1, %op2, %op3, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_s64'}} return SVE_ACLE_FUNC(svqrdcmlah,_s64,,)(op1, op2, op3, 270); } -// CHECK-LABEL: @test_svqrdcmlah_lane_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z24test_svqrdcmlah_lane_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrdcmlah_lane_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqrdcmlah_lane_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv8i16( %op1, %op2, %op3, i32 0, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_lane_s16'}} return SVE_ACLE_FUNC(svqrdcmlah_lane,_s16,,)(op1, op2, op3, 0, 0); } -// CHECK-LABEL: @test_svqrdcmlah_lane_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 90) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svqrdcmlah_lane_s16_1u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3, i32 90) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrdcmlah_lane_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqrdcmlah_lane_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv8i16( %op1, %op2, %op3, i32 3, i32 90) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_lane_s16'}} return SVE_ACLE_FUNC(svqrdcmlah_lane,_s16,,)(op1, op2, op3, 3, 90); } -// CHECK-LABEL: @test_svqrdcmlah_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 180) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z24test_svqrdcmlah_lane_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0, i32 180) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrdcmlah_lane_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqrdcmlah_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv4i32( %op1, %op2, %op3, i32 0, i32 180) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_lane_s32'}} return SVE_ACLE_FUNC(svqrdcmlah_lane,_s32,,)(op1, op2, op3, 0, 180); } -// CHECK-LABEL: @test_svqrdcmlah_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 270) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z26test_svqrdcmlah_lane_s32_1u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1, i32 270) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrdcmlah_lane_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqrdcmlah_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdcmlah.lane.x.nxv4i32( %op1, %op2, %op3, i32 1, i32 270) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdcmlah_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdcmlah_lane_s32'}} return SVE_ACLE_FUNC(svqrdcmlah_lane,_s32,,)(op1, op2, op3, 1, 270); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c index af000b628402..5cc49a713072 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlah.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,247 +14,145 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqrdmlah_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqrdmlah_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqrdmlah_s8(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svqrdmlah_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlah_s8'}} return SVE_ACLE_FUNC(svqrdmlah,_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqrdmlah_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrdmlah_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrdmlah_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqrdmlah_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlah_s16'}} return SVE_ACLE_FUNC(svqrdmlah,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqrdmlah_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrdmlah_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrdmlah_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqrdmlah_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlah_s32'}} return SVE_ACLE_FUNC(svqrdmlah,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqrdmlah_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrdmlah_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqrdmlah_s64(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svqrdmlah_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlah_s64'}} return SVE_ACLE_FUNC(svqrdmlah,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqrdmlah_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svqrdmlah_n_s8u10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqrdmlah_n_s8(svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svqrdmlah_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlah_n_s8'}} return SVE_ACLE_FUNC(svqrdmlah,_n_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqrdmlah_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrdmlah_n_s16u11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqrdmlah_n_s16(svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svqrdmlah_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlah_n_s16'}} return SVE_ACLE_FUNC(svqrdmlah,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqrdmlah_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrdmlah_n_s32u11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqrdmlah_n_s32(svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svqrdmlah_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlah_n_s32'}} return SVE_ACLE_FUNC(svqrdmlah,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqrdmlah_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrdmlah_n_s64u11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqrdmlah_n_s64(svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svqrdmlah_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlah.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlah'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlah_n_s64'}} return SVE_ACLE_FUNC(svqrdmlah,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqrdmlah_lane_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqrdmlah_lane_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrdmlah_lane_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqrdmlah_lane_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv8i16( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlah_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlah_lane_s16'}} return SVE_ACLE_FUNC(svqrdmlah_lane,_s16,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svqrdmlah_lane_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqrdmlah_lane_s16_1u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrdmlah_lane_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqrdmlah_lane_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv8i16( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlah_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlah_lane_s16'}} return SVE_ACLE_FUNC(svqrdmlah_lane,_s16,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svqrdmlah_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqrdmlah_lane_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrdmlah_lane_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqrdmlah_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlah_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlah_lane_s32'}} return SVE_ACLE_FUNC(svqrdmlah_lane,_s32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svqrdmlah_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqrdmlah_lane_s32_1u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrdmlah_lane_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqrdmlah_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv4i32( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlah_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlah_lane_s32'}} return SVE_ACLE_FUNC(svqrdmlah_lane,_s32,,)(op1, op2, op3, 3); } -// CHECK-LABEL: @test_svqrdmlah_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqrdmlah_lane_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqrdmlah_lane_s64(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svqrdmlah_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlah_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlah_lane_s64'}} return SVE_ACLE_FUNC(svqrdmlah_lane,_s64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svqrdmlah_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqrdmlah_lane_s64_1u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqrdmlah_lane_s64_1(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svqrdmlah_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlah.lane.nxv2i64( %op1, %op2, %op3, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlah_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlah_lane_s64'}} return SVE_ACLE_FUNC(svqrdmlah_lane,_s64,,)(op1, op2, op3, 1); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c index 07b36721bf3b..3838bdc53e1e 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmlsh.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,247 +14,145 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqrdmlsh_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqrdmlsh_s8u10__SVInt8_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqrdmlsh_s8(svint8_t op1, svint8_t op2, svint8_t op3) { + // CHECK-LABEL: test_svqrdmlsh_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv16i8( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlsh'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlsh_s8'}} return SVE_ACLE_FUNC(svqrdmlsh,_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqrdmlsh_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrdmlsh_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrdmlsh_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqrdmlsh_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlsh'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlsh_s16'}} return SVE_ACLE_FUNC(svqrdmlsh,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqrdmlsh_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrdmlsh_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrdmlsh_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqrdmlsh_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlsh'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlsh_s32'}} return SVE_ACLE_FUNC(svqrdmlsh,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqrdmlsh_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrdmlsh_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqrdmlsh_s64(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svqrdmlsh_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlsh'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlsh_s64'}} return SVE_ACLE_FUNC(svqrdmlsh,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqrdmlsh_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svqrdmlsh_n_s8u10__SVInt8_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqrdmlsh_n_s8(svint8_t op1, svint8_t op2, int8_t op3) { + // CHECK-LABEL: test_svqrdmlsh_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv16i8( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlsh'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlsh_n_s8'}} return SVE_ACLE_FUNC(svqrdmlsh,_n_s8,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqrdmlsh_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrdmlsh_n_s16u11__SVInt16_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqrdmlsh_n_s16(svint16_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svqrdmlsh_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlsh'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlsh_n_s16'}} return SVE_ACLE_FUNC(svqrdmlsh,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqrdmlsh_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrdmlsh_n_s32u11__SVInt32_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqrdmlsh_n_s32(svint32_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svqrdmlsh_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlsh'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlsh_n_s32'}} return SVE_ACLE_FUNC(svqrdmlsh,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqrdmlsh_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrdmlsh_n_s64u11__SVInt64_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqrdmlsh_n_s64(svint64_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svqrdmlsh_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlsh.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlsh'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlsh_n_s64'}} return SVE_ACLE_FUNC(svqrdmlsh,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svqrdmlsh_lane_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqrdmlsh_lane_s16u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrdmlsh_lane_s16(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqrdmlsh_lane_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv8i16( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlsh_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlsh_lane_s16'}} return SVE_ACLE_FUNC(svqrdmlsh_lane,_s16,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svqrdmlsh_lane_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqrdmlsh_lane_s16_1u11__SVInt16_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrdmlsh_lane_s16_1(svint16_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svqrdmlsh_lane_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv8i16( %op1, %op2, %op3, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlsh_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlsh_lane_s16'}} return SVE_ACLE_FUNC(svqrdmlsh_lane,_s16,,)(op1, op2, op3, 7); } -// CHECK-LABEL: @test_svqrdmlsh_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqrdmlsh_lane_s32u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrdmlsh_lane_s32(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqrdmlsh_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv4i32( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlsh_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlsh_lane_s32'}} return SVE_ACLE_FUNC(svqrdmlsh_lane,_s32,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svqrdmlsh_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqrdmlsh_lane_s32_1u11__SVInt32_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrdmlsh_lane_s32_1(svint32_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svqrdmlsh_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv4i32( %op1, %op2, %op3, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlsh_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlsh_lane_s32'}} return SVE_ACLE_FUNC(svqrdmlsh_lane,_s32,,)(op1, op2, op3, 3); } -// CHECK-LABEL: @test_svqrdmlsh_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqrdmlsh_lane_s64u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqrdmlsh_lane_s64(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svqrdmlsh_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv2i64( %op1, %op2, %op3, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlsh_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlsh_lane_s64'}} return SVE_ACLE_FUNC(svqrdmlsh_lane,_s64,,)(op1, op2, op3, 0); } -// CHECK-LABEL: @test_svqrdmlsh_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqrdmlsh_lane_s64_1u11__SVInt64_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqrdmlsh_lane_s64_1(svint64_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svqrdmlsh_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmlsh.lane.nxv2i64( %op1, %op2, %op3, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmlsh_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmlsh_lane_s64'}} return SVE_ACLE_FUNC(svqrdmlsh_lane,_s64,,)(op1, op2, op3, 1); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c index 0a5727d8599f..e009441ffcbf 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrdmulh.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,247 +14,145 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqrdmulh_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqrdmulh_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv16i8( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqrdmulh_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqrdmulh_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv16i8( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmulh'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmulh_s8'}} return SVE_ACLE_FUNC(svqrdmulh,_s8,,)(op1, op2); } -// CHECK-LABEL: @test_svqrdmulh_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrdmulh_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrdmulh_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqrdmulh_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmulh'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmulh_s16'}} return SVE_ACLE_FUNC(svqrdmulh,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svqrdmulh_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrdmulh_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrdmulh_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqrdmulh_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmulh'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmulh_s32'}} return SVE_ACLE_FUNC(svqrdmulh,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svqrdmulh_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrdmulh_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqrdmulh_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqrdmulh_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmulh'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmulh_s64'}} return SVE_ACLE_FUNC(svqrdmulh,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svqrdmulh_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svqrdmulh_n_s8u10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv16i8( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqrdmulh_n_s8(svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqrdmulh_n_s8 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv16i8( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmulh'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmulh_n_s8'}} return SVE_ACLE_FUNC(svqrdmulh,_n_s8,,)(op1, op2); } -// CHECK-LABEL: @test_svqrdmulh_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrdmulh_n_s16u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqrdmulh_n_s16(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqrdmulh_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmulh'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmulh_n_s16'}} return SVE_ACLE_FUNC(svqrdmulh,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svqrdmulh_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrdmulh_n_s32u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqrdmulh_n_s32(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqrdmulh_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmulh'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmulh_n_s32'}} return SVE_ACLE_FUNC(svqrdmulh,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svqrdmulh_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrdmulh_n_s64u11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqrdmulh_n_s64(svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqrdmulh_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmulh.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmulh'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmulh_n_s64'}} return SVE_ACLE_FUNC(svqrdmulh,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svqrdmulh_lane_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqrdmulh_lane_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrdmulh_lane_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqrdmulh_lane_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv8i16( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmulh_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmulh_lane_s16'}} return SVE_ACLE_FUNC(svqrdmulh_lane,_s16,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svqrdmulh_lane_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqrdmulh_lane_s16_1u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrdmulh_lane_s16_1(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqrdmulh_lane_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv8i16( %op1, %op2, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmulh_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmulh_lane_s16'}} return SVE_ACLE_FUNC(svqrdmulh_lane,_s16,,)(op1, op2, 7); } -// CHECK-LABEL: @test_svqrdmulh_lane_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqrdmulh_lane_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrdmulh_lane_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqrdmulh_lane_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv4i32( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmulh_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmulh_lane_s32'}} return SVE_ACLE_FUNC(svqrdmulh_lane,_s32,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svqrdmulh_lane_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqrdmulh_lane_s32_1u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 3) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrdmulh_lane_s32_1(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqrdmulh_lane_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv4i32( %op1, %op2, i32 3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmulh_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmulh_lane_s32'}} return SVE_ACLE_FUNC(svqrdmulh_lane,_s32,,)(op1, op2, 3); } -// CHECK-LABEL: @test_svqrdmulh_lane_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqrdmulh_lane_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqrdmulh_lane_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqrdmulh_lane_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv2i64( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmulh_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmulh_lane_s64'}} return SVE_ACLE_FUNC(svqrdmulh_lane,_s64,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svqrdmulh_lane_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z25test_svqrdmulh_lane_s64_1u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svqrdmulh_lane_s64_1(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqrdmulh_lane_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrdmulh.lane.nxv2i64( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrdmulh_lane'}} // expected-warning@+1 {{implicit declaration of function 'svqrdmulh_lane_s64'}} return SVE_ACLE_FUNC(svqrdmulh_lane,_s64,,)(op1, op2, 1); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c index 38c6dbf5816e..475e2ef22117 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshl.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,969 +14,557 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqrshl_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqrshl_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqrshl_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqrshl_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_s8_z'}} return SVE_ACLE_FUNC(svqrshl,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrshl_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svqrshl_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqrshl_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_s16_z'}} return SVE_ACLE_FUNC(svqrshl,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrshl_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svqrshl_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqrshl_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_s32_z'}} return SVE_ACLE_FUNC(svqrshl,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrshl_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svqrshl_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqrshl_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_s64_z'}} return SVE_ACLE_FUNC(svqrshl,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqrshl_u8_zu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqrshl_u8_z(svbool_t pg, svuint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqrshl_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_u8_z'}} return SVE_ACLE_FUNC(svqrshl,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrshl_u16_zu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svqrshl_u16_z(svbool_t pg, svuint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqrshl_u16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_u16_z'}} return SVE_ACLE_FUNC(svqrshl,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrshl_u32_zu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svqrshl_u32_z(svbool_t pg, svuint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqrshl_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_u32_z'}} return SVE_ACLE_FUNC(svqrshl,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrshl_u64_zu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svqrshl_u64_z(svbool_t pg, svuint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqrshl_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_u64_z'}} return SVE_ACLE_FUNC(svqrshl,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqrshl_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqrshl_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqrshl_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_s8_m'}} return SVE_ACLE_FUNC(svqrshl,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrshl_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqrshl_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqrshl_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_s16_m'}} return SVE_ACLE_FUNC(svqrshl,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrshl_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqrshl_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqrshl_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_s32_m'}} return SVE_ACLE_FUNC(svqrshl,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrshl_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqrshl_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqrshl_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_s64_m'}} return SVE_ACLE_FUNC(svqrshl,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqrshl_u8_mu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqrshl_u8_m(svbool_t pg, svuint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqrshl_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_u8_m'}} return SVE_ACLE_FUNC(svqrshl,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrshl_u16_mu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svqrshl_u16_m(svbool_t pg, svuint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqrshl_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_u16_m'}} return SVE_ACLE_FUNC(svqrshl,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrshl_u32_mu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svqrshl_u32_m(svbool_t pg, svuint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqrshl_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_u32_m'}} return SVE_ACLE_FUNC(svqrshl,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrshl_u64_mu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svqrshl_u64_m(svbool_t pg, svuint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqrshl_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_u64_m'}} return SVE_ACLE_FUNC(svqrshl,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqrshl_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqrshl_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqrshl_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_s8_x'}} return SVE_ACLE_FUNC(svqrshl,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrshl_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqrshl_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqrshl_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_s16_x'}} return SVE_ACLE_FUNC(svqrshl,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrshl_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqrshl_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqrshl_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_s32_x'}} return SVE_ACLE_FUNC(svqrshl,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrshl_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqrshl_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqrshl_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_s64_x'}} return SVE_ACLE_FUNC(svqrshl,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqrshl_u8_xu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqrshl_u8_x(svbool_t pg, svuint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqrshl_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_u8_x'}} return SVE_ACLE_FUNC(svqrshl,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrshl_u16_xu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svqrshl_u16_x(svbool_t pg, svuint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqrshl_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_u16_x'}} return SVE_ACLE_FUNC(svqrshl,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrshl_u32_xu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svqrshl_u32_x(svbool_t pg, svuint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqrshl_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_u32_x'}} return SVE_ACLE_FUNC(svqrshl,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqrshl_u64_xu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svqrshl_u64_x(svbool_t pg, svuint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqrshl_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_u64_x'}} return SVE_ACLE_FUNC(svqrshl,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqrshl_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svqrshl_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqrshl_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_s8_z'}} return SVE_ACLE_FUNC(svqrshl,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svqrshl_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqrshl_n_s16_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_s16_z'}} return SVE_ACLE_FUNC(svqrshl,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svqrshl_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqrshl_n_s32_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_s32_z'}} return SVE_ACLE_FUNC(svqrshl,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svqrshl_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqrshl_n_s64_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_s64_z'}} return SVE_ACLE_FUNC(svqrshl,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqrshl_n_u8_zu10__SVBool_tu11__SVUint8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svqrshl_n_u8_z(svbool_t pg, svuint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqrshl_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_u8_z'}} return SVE_ACLE_FUNC(svqrshl,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u16_zu10__SVBool_tu12__SVUint16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svqrshl_n_u16_z(svbool_t pg, svuint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqrshl_n_u16_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_u16_z'}} return SVE_ACLE_FUNC(svqrshl,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u32_zu10__SVBool_tu12__SVUint32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svqrshl_n_u32_z(svbool_t pg, svuint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqrshl_n_u32_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_u32_z'}} return SVE_ACLE_FUNC(svqrshl,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u64_zu10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svqrshl_n_u64_z(svbool_t pg, svuint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqrshl_n_u64_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_u64_z'}} return SVE_ACLE_FUNC(svqrshl,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svqrshl_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqrshl_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqrshl_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_s8_m'}} return SVE_ACLE_FUNC(svqrshl,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svqrshl_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqrshl_n_s16_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_s16_m'}} return SVE_ACLE_FUNC(svqrshl,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svqrshl_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqrshl_n_s32_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_s32_m'}} return SVE_ACLE_FUNC(svqrshl,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svqrshl_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqrshl_n_s64_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_s64_m'}} return SVE_ACLE_FUNC(svqrshl,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svqrshl_n_u8_mu10__SVBool_tu11__SVUint8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqrshl_n_u8_m(svbool_t pg, svuint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqrshl_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_u8_m'}} return SVE_ACLE_FUNC(svqrshl,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u16_mu10__SVBool_tu12__SVUint16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svqrshl_n_u16_m(svbool_t pg, svuint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqrshl_n_u16_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_u16_m'}} return SVE_ACLE_FUNC(svqrshl,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u32_mu10__SVBool_tu12__SVUint32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svqrshl_n_u32_m(svbool_t pg, svuint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqrshl_n_u32_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_u32_m'}} return SVE_ACLE_FUNC(svqrshl,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u64_mu10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svqrshl_n_u64_m(svbool_t pg, svuint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqrshl_n_u64_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_u64_m'}} return SVE_ACLE_FUNC(svqrshl,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svqrshl_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqrshl_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqrshl_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_s8_x'}} return SVE_ACLE_FUNC(svqrshl,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svqrshl_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqrshl_n_s16_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_s16_x'}} return SVE_ACLE_FUNC(svqrshl,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svqrshl_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqrshl_n_s32_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_s32_x'}} return SVE_ACLE_FUNC(svqrshl,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshl_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svqrshl_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqrshl_n_s64_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshl.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_s64_x'}} return SVE_ACLE_FUNC(svqrshl,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svqrshl_n_u8_xu10__SVBool_tu11__SVUint8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqrshl_n_u8_x(svbool_t pg, svuint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqrshl_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_u8_x'}} return SVE_ACLE_FUNC(svqrshl,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u16_xu10__SVBool_tu12__SVUint16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svqrshl_n_u16_x(svbool_t pg, svuint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqrshl_n_u16_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_u16_x'}} return SVE_ACLE_FUNC(svqrshl,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u32_xu10__SVBool_tu12__SVUint32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svqrshl_n_u32_x(svbool_t pg, svuint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqrshl_n_u32_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_u32_x'}} return SVE_ACLE_FUNC(svqrshl,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqrshl_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshl_n_u64_xu10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svqrshl_n_u64_x(svbool_t pg, svuint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqrshl_n_u64_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshl.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqrshl_n_u64_x'}} return SVE_ACLE_FUNC(svqrshl,_n_u64,_x,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnb.c index 5ddc73f0faac..3e31a7ecaf25 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,205 +14,121 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqrshrnb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv8i16( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshrnb_n_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv8i16( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqrshrnb_n_s16(svint16_t op1) { + // CHECK-LABEL: test_svqrshrnb_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv8i16( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnb_n_s16'}} return SVE_ACLE_FUNC(svqrshrnb,_n_s16,,)(op1, 1); } -// CHECK-LABEL: @test_svqrshrnb_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv8i16( [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqrshrnb_n_s16_1u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv8i16( [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqrshrnb_n_s16_1(svint16_t op1) { + // CHECK-LABEL: test_svqrshrnb_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv8i16( %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnb_n_s16'}} return SVE_ACLE_FUNC(svqrshrnb,_n_s16,,)(op1, 8); } -// CHECK-LABEL: @test_svqrshrnb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv4i32( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshrnb_n_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv4i32( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrshrnb_n_s32(svint32_t op1) { + // CHECK-LABEL: test_svqrshrnb_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv4i32( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnb_n_s32'}} return SVE_ACLE_FUNC(svqrshrnb,_n_s32,,)(op1, 1); } -// CHECK-LABEL: @test_svqrshrnb_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv4i32( [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqrshrnb_n_s32_1u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv4i32( [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrshrnb_n_s32_1(svint32_t op1) { + // CHECK-LABEL: test_svqrshrnb_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv4i32( %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnb_n_s32'}} return SVE_ACLE_FUNC(svqrshrnb,_n_s32,,)(op1, 16); } -// CHECK-LABEL: @test_svqrshrnb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv2i64( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshrnb_n_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv2i64( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrshrnb_n_s64(svint64_t op1) { + // CHECK-LABEL: test_svqrshrnb_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv2i64( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnb_n_s64'}} return SVE_ACLE_FUNC(svqrshrnb,_n_s64,,)(op1, 1); } -// CHECK-LABEL: @test_svqrshrnb_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv2i64( [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqrshrnb_n_s64_1u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv2i64( [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrshrnb_n_s64_1(svint64_t op1) { + // CHECK-LABEL: test_svqrshrnb_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrnb.nxv2i64( %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnb_n_s64'}} return SVE_ACLE_FUNC(svqrshrnb,_n_s64,,)(op1, 32); } -// CHECK-LABEL: @test_svqrshrnb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv8i16( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshrnb_n_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv8i16( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqrshrnb_n_u16(svuint16_t op1) { + // CHECK-LABEL: test_svqrshrnb_n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv8i16( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnb_n_u16'}} return SVE_ACLE_FUNC(svqrshrnb,_n_u16,,)(op1, 1); } -// CHECK-LABEL: @test_svqrshrnb_n_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv8i16( [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqrshrnb_n_u16_1u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv8i16( [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqrshrnb_n_u16_1(svuint16_t op1) { + // CHECK-LABEL: test_svqrshrnb_n_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv8i16( %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnb_n_u16'}} return SVE_ACLE_FUNC(svqrshrnb,_n_u16,,)(op1, 8); } -// CHECK-LABEL: @test_svqrshrnb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv4i32( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshrnb_n_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv4i32( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqrshrnb_n_u32(svuint32_t op1) { + // CHECK-LABEL: test_svqrshrnb_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv4i32( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnb_n_u32'}} return SVE_ACLE_FUNC(svqrshrnb,_n_u32,,)(op1, 1); } -// CHECK-LABEL: @test_svqrshrnb_n_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv4i32( [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqrshrnb_n_u32_1u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv4i32( [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqrshrnb_n_u32_1(svuint32_t op1) { + // CHECK-LABEL: test_svqrshrnb_n_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv4i32( %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnb_n_u32'}} return SVE_ACLE_FUNC(svqrshrnb,_n_u32,,)(op1, 16); } -// CHECK-LABEL: @test_svqrshrnb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv2i64( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshrnb_n_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv2i64( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqrshrnb_n_u64(svuint64_t op1) { + // CHECK-LABEL: test_svqrshrnb_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv2i64( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnb_n_u64'}} return SVE_ACLE_FUNC(svqrshrnb,_n_u64,,)(op1, 1); } -// CHECK-LABEL: @test_svqrshrnb_n_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv2i64( [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqrshrnb_n_u64_1u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv2i64( [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqrshrnb_n_u64_1(svuint64_t op1) { + // CHECK-LABEL: test_svqrshrnb_n_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshrnb.nxv2i64( %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnb_n_u64'}} return SVE_ACLE_FUNC(svqrshrnb,_n_u64,,)(op1, 32); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnt.c index 91584307ed93..0f996502d9bd 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrnt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,205 +14,121 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqrshrnt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshrnt_n_s16u10__SVInt8_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqrshrnt_n_s16(svint8_t op, svint16_t op1) { + // CHECK-LABEL: test_svqrshrnt_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv8i16( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnt_n_s16'}} return SVE_ACLE_FUNC(svqrshrnt,_n_s16,,)(op, op1, 1); } -// CHECK-LABEL: @test_svqrshrnt_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqrshrnt_n_s16_1u10__SVInt8_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqrshrnt_n_s16_1(svint8_t op, svint16_t op1) { + // CHECK-LABEL: test_svqrshrnt_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv8i16( %op, %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnt_n_s16'}} return SVE_ACLE_FUNC(svqrshrnt,_n_s16,,)(op, op1, 8); } -// CHECK-LABEL: @test_svqrshrnt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshrnt_n_s32u11__SVInt16_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrshrnt_n_s32(svint16_t op, svint32_t op1) { + // CHECK-LABEL: test_svqrshrnt_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv4i32( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnt_n_s32'}} return SVE_ACLE_FUNC(svqrshrnt,_n_s32,,)(op, op1, 1); } -// CHECK-LABEL: @test_svqrshrnt_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqrshrnt_n_s32_1u11__SVInt16_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqrshrnt_n_s32_1(svint16_t op, svint32_t op1) { + // CHECK-LABEL: test_svqrshrnt_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv4i32( %op, %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnt_n_s32'}} return SVE_ACLE_FUNC(svqrshrnt,_n_s32,,)(op, op1, 16); } -// CHECK-LABEL: @test_svqrshrnt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshrnt_n_s64u11__SVInt32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrshrnt_n_s64(svint32_t op, svint64_t op1) { + // CHECK-LABEL: test_svqrshrnt_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv2i64( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnt_n_s64'}} return SVE_ACLE_FUNC(svqrshrnt,_n_s64,,)(op, op1, 1); } -// CHECK-LABEL: @test_svqrshrnt_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqrshrnt_n_s64_1u11__SVInt32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqrshrnt_n_s64_1(svint32_t op, svint64_t op1) { + // CHECK-LABEL: test_svqrshrnt_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrnt.nxv2i64( %op, %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnt_n_s64'}} return SVE_ACLE_FUNC(svqrshrnt,_n_s64,,)(op, op1, 32); } -// CHECK-LABEL: @test_svqrshrnt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshrnt_n_u16u11__SVUint8_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqrshrnt_n_u16(svuint8_t op, svuint16_t op1) { + // CHECK-LABEL: test_svqrshrnt_n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv8i16( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnt_n_u16'}} return SVE_ACLE_FUNC(svqrshrnt,_n_u16,,)(op, op1, 1); } -// CHECK-LABEL: @test_svqrshrnt_n_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqrshrnt_n_u16_1u11__SVUint8_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqrshrnt_n_u16_1(svuint8_t op, svuint16_t op1) { + // CHECK-LABEL: test_svqrshrnt_n_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv8i16( %op, %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnt_n_u16'}} return SVE_ACLE_FUNC(svqrshrnt,_n_u16,,)(op, op1, 8); } -// CHECK-LABEL: @test_svqrshrnt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshrnt_n_u32u12__SVUint16_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqrshrnt_n_u32(svuint16_t op, svuint32_t op1) { + // CHECK-LABEL: test_svqrshrnt_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv4i32( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnt_n_u32'}} return SVE_ACLE_FUNC(svqrshrnt,_n_u32,,)(op, op1, 1); } -// CHECK-LABEL: @test_svqrshrnt_n_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqrshrnt_n_u32_1u12__SVUint16_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqrshrnt_n_u32_1(svuint16_t op, svuint32_t op1) { + // CHECK-LABEL: test_svqrshrnt_n_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv4i32( %op, %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnt_n_u32'}} return SVE_ACLE_FUNC(svqrshrnt,_n_u32,,)(op, op1, 16); } -// CHECK-LABEL: @test_svqrshrnt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqrshrnt_n_u64u12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqrshrnt_n_u64(svuint32_t op, svuint64_t op1) { + // CHECK-LABEL: test_svqrshrnt_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv2i64( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnt_n_u64'}} return SVE_ACLE_FUNC(svqrshrnt,_n_u64,,)(op, op1, 1); } -// CHECK-LABEL: @test_svqrshrnt_n_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqrshrnt_n_u64_1u12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqrshrnt_n_u64_1(svuint32_t op, svuint64_t op1) { + // CHECK-LABEL: test_svqrshrnt_n_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqrshrnt.nxv2i64( %op, %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrnt_n_u64'}} return SVE_ACLE_FUNC(svqrshrnt,_n_u64,,)(op, op1, 32); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunb.c index 9d767998cd2a..a4256ec54c62 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,103 +14,61 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqrshrunb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv8i16( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqrshrunb_n_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv8i16( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqrshrunb_n_s16(svint16_t op1) { + // CHECK-LABEL: test_svqrshrunb_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv8i16( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrunb'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrunb_n_s16'}} return SVE_ACLE_FUNC(svqrshrunb,_n_s16,,)(op1, 1); } -// CHECK-LABEL: @test_svqrshrunb_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv8i16( [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqrshrunb_n_s16_1u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv8i16( [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqrshrunb_n_s16_1(svint16_t op1) { + // CHECK-LABEL: test_svqrshrunb_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv8i16( %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrunb'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrunb_n_s16'}} return SVE_ACLE_FUNC(svqrshrunb,_n_s16,,)(op1, 8); } -// CHECK-LABEL: @test_svqrshrunb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv4i32( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqrshrunb_n_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv4i32( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqrshrunb_n_s32(svint32_t op1) { + // CHECK-LABEL: test_svqrshrunb_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv4i32( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrunb'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrunb_n_s32'}} return SVE_ACLE_FUNC(svqrshrunb,_n_s32,,)(op1, 1); } -// CHECK-LABEL: @test_svqrshrunb_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv4i32( [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqrshrunb_n_s32_1u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv4i32( [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqrshrunb_n_s32_1(svint32_t op1) { + // CHECK-LABEL: test_svqrshrunb_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv4i32( %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrunb'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrunb_n_s32'}} return SVE_ACLE_FUNC(svqrshrunb,_n_s32,,)(op1, 16); } -// CHECK-LABEL: @test_svqrshrunb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv2i64( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqrshrunb_n_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv2i64( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqrshrunb_n_s64(svint64_t op1) { + // CHECK-LABEL: test_svqrshrunb_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv2i64( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrunb'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrunb_n_s64'}} return SVE_ACLE_FUNC(svqrshrunb,_n_s64,,)(op1, 1); } -// CHECK-LABEL: @test_svqrshrunb_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv2i64( [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqrshrunb_n_s64_1u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv2i64( [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqrshrunb_n_s64_1(svint64_t op1) { + // CHECK-LABEL: test_svqrshrunb_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrunb.nxv2i64( %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrunb'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrunb_n_s64'}} return SVE_ACLE_FUNC(svqrshrunb,_n_s64,,)(op1, 32); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunt.c index bb3a90bb36be..2ae6c61db07f 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qrshrunt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,103 +14,61 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqrshrunt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqrshrunt_n_s16u11__SVUint8_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqrshrunt_n_s16(svuint8_t op, svint16_t op1) { + // CHECK-LABEL: test_svqrshrunt_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv8i16( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrunt'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrunt_n_s16'}} return SVE_ACLE_FUNC(svqrshrunt,_n_s16,,)(op, op1, 1); } -// CHECK-LABEL: @test_svqrshrunt_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqrshrunt_n_s16_1u11__SVUint8_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqrshrunt_n_s16_1(svuint8_t op, svint16_t op1) { + // CHECK-LABEL: test_svqrshrunt_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv8i16( %op, %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrunt'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrunt_n_s16'}} return SVE_ACLE_FUNC(svqrshrunt,_n_s16,,)(op, op1, 8); } -// CHECK-LABEL: @test_svqrshrunt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqrshrunt_n_s32u12__SVUint16_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqrshrunt_n_s32(svuint16_t op, svint32_t op1) { + // CHECK-LABEL: test_svqrshrunt_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv4i32( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrunt'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrunt_n_s32'}} return SVE_ACLE_FUNC(svqrshrunt,_n_s32,,)(op, op1, 1); } -// CHECK-LABEL: @test_svqrshrunt_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqrshrunt_n_s32_1u12__SVUint16_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqrshrunt_n_s32_1(svuint16_t op, svint32_t op1) { + // CHECK-LABEL: test_svqrshrunt_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv4i32( %op, %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrunt'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrunt_n_s32'}} return SVE_ACLE_FUNC(svqrshrunt,_n_s32,,)(op, op1, 16); } -// CHECK-LABEL: @test_svqrshrunt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqrshrunt_n_s64u12__SVUint32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqrshrunt_n_s64(svuint32_t op, svint64_t op1) { + // CHECK-LABEL: test_svqrshrunt_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv2i64( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrunt'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrunt_n_s64'}} return SVE_ACLE_FUNC(svqrshrunt,_n_s64,,)(op, op1, 1); } -// CHECK-LABEL: @test_svqrshrunt_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z23test_svqrshrunt_n_s64_1u12__SVUint32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqrshrunt_n_s64_1(svuint32_t op, svint64_t op1) { + // CHECK-LABEL: test_svqrshrunt_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqrshrunt.nxv2i64( %op, %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqrshrunt'}} // expected-warning@+1 {{implicit declaration of function 'svqrshrunt_n_s64'}} return SVE_ACLE_FUNC(svqrshrunt,_n_s64,,)(op, op1, 32); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c index 3fde6854a1b4..23aea5df55d6 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshl.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,969 +14,557 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqshl_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqshl_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqshl_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqshl_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_s8_z'}} return SVE_ACLE_FUNC(svqshl,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svqshl_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svqshl_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqshl_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_s16_z'}} return SVE_ACLE_FUNC(svqshl,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svqshl_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svqshl_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqshl_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_s32_z'}} return SVE_ACLE_FUNC(svqshl,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svqshl_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svqshl_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqshl_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_s64_z'}} return SVE_ACLE_FUNC(svqshl,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqshl_u8_zu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqshl_u8_z(svbool_t pg, svuint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqshl_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_u8_z'}} return SVE_ACLE_FUNC(svqshl,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svqshl_u16_zu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svqshl_u16_z(svbool_t pg, svuint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqshl_u16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_u16_z'}} return SVE_ACLE_FUNC(svqshl,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svqshl_u32_zu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svqshl_u32_z(svbool_t pg, svuint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqshl_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_u32_z'}} return SVE_ACLE_FUNC(svqshl,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svqshl_u64_zu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svqshl_u64_z(svbool_t pg, svuint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqshl_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_u64_z'}} return SVE_ACLE_FUNC(svqshl,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqshl_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqshl_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqshl_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_s8_m'}} return SVE_ACLE_FUNC(svqshl,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqshl_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqshl_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqshl_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_s16_m'}} return SVE_ACLE_FUNC(svqshl,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqshl_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqshl_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqshl_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_s32_m'}} return SVE_ACLE_FUNC(svqshl,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqshl_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqshl_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqshl_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_s64_m'}} return SVE_ACLE_FUNC(svqshl,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqshl_u8_mu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqshl_u8_m(svbool_t pg, svuint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqshl_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_u8_m'}} return SVE_ACLE_FUNC(svqshl,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqshl_u16_mu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svqshl_u16_m(svbool_t pg, svuint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqshl_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_u16_m'}} return SVE_ACLE_FUNC(svqshl,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqshl_u32_mu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svqshl_u32_m(svbool_t pg, svuint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqshl_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_u32_m'}} return SVE_ACLE_FUNC(svqshl,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqshl_u64_mu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svqshl_u64_m(svbool_t pg, svuint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqshl_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_u64_m'}} return SVE_ACLE_FUNC(svqshl,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqshl_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqshl_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqshl_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_s8_x'}} return SVE_ACLE_FUNC(svqshl,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqshl_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqshl_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqshl_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_s16_x'}} return SVE_ACLE_FUNC(svqshl,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqshl_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqshl_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqshl_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_s32_x'}} return SVE_ACLE_FUNC(svqshl,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqshl_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqshl_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqshl_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_s64_x'}} return SVE_ACLE_FUNC(svqshl,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqshl_u8_xu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqshl_u8_x(svbool_t pg, svuint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqshl_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_u8_x'}} return SVE_ACLE_FUNC(svqshl,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqshl_u16_xu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svqshl_u16_x(svbool_t pg, svuint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqshl_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_u16_x'}} return SVE_ACLE_FUNC(svqshl,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqshl_u32_xu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svqshl_u32_x(svbool_t pg, svuint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqshl_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_u32_x'}} return SVE_ACLE_FUNC(svqshl,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqshl_u64_xu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svqshl_u64_x(svbool_t pg, svuint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqshl_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_u64_x'}} return SVE_ACLE_FUNC(svqshl,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svqshl_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svqshl_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqshl_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_s8_z'}} return SVE_ACLE_FUNC(svqshl,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshl_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svqshl_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqshl_n_s16_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_s16_z'}} return SVE_ACLE_FUNC(svqshl,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshl_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svqshl_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqshl_n_s32_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_s32_z'}} return SVE_ACLE_FUNC(svqshl,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshl_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svqshl_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqshl_n_s64_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_s64_z'}} return SVE_ACLE_FUNC(svqshl,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svqshl_n_u8_zu10__SVBool_tu11__SVUint8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svqshl_n_u8_z(svbool_t pg, svuint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqshl_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_u8_z'}} return SVE_ACLE_FUNC(svqshl,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshl_n_u16_zu10__SVBool_tu12__SVUint16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svqshl_n_u16_z(svbool_t pg, svuint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqshl_n_u16_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_u16_z'}} return SVE_ACLE_FUNC(svqshl,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshl_n_u32_zu10__SVBool_tu12__SVUint32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svqshl_n_u32_z(svbool_t pg, svuint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqshl_n_u32_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_u32_z'}} return SVE_ACLE_FUNC(svqshl,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshl_n_u64_zu10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svqshl_n_u64_z(svbool_t pg, svuint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqshl_n_u64_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_u64_z'}} return SVE_ACLE_FUNC(svqshl,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqshl_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqshl_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqshl_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_s8_m'}} return SVE_ACLE_FUNC(svqshl,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshl_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svqshl_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqshl_n_s16_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_s16_m'}} return SVE_ACLE_FUNC(svqshl,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshl_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svqshl_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqshl_n_s32_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_s32_m'}} return SVE_ACLE_FUNC(svqshl,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshl_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svqshl_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqshl_n_s64_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_s64_m'}} return SVE_ACLE_FUNC(svqshl,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqshl_n_u8_mu10__SVBool_tu11__SVUint8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqshl_n_u8_m(svbool_t pg, svuint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqshl_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_u8_m'}} return SVE_ACLE_FUNC(svqshl,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshl_n_u16_mu10__SVBool_tu12__SVUint16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svqshl_n_u16_m(svbool_t pg, svuint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqshl_n_u16_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_u16_m'}} return SVE_ACLE_FUNC(svqshl,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshl_n_u32_mu10__SVBool_tu12__SVUint32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svqshl_n_u32_m(svbool_t pg, svuint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqshl_n_u32_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_u32_m'}} return SVE_ACLE_FUNC(svqshl,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshl_n_u64_mu10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svqshl_n_u64_m(svbool_t pg, svuint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqshl_n_u64_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_u64_m'}} return SVE_ACLE_FUNC(svqshl,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqshl_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqshl_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqshl_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_s8_x'}} return SVE_ACLE_FUNC(svqshl,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshl_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svqshl_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqshl_n_s16_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_s16_x'}} return SVE_ACLE_FUNC(svqshl,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshl_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svqshl_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqshl_n_s32_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_s32_x'}} return SVE_ACLE_FUNC(svqshl,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshl_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svqshl_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqshl_n_s64_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshl.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_s64_x'}} return SVE_ACLE_FUNC(svqshl,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqshl_n_u8_xu10__SVBool_tu11__SVUint8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqshl_n_u8_x(svbool_t pg, svuint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqshl_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_u8_x'}} return SVE_ACLE_FUNC(svqshl,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshl_n_u16_xu10__SVBool_tu12__SVUint16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svqshl_n_u16_x(svbool_t pg, svuint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqshl_n_u16_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_u16_x'}} return SVE_ACLE_FUNC(svqshl,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshl_n_u32_xu10__SVBool_tu12__SVUint32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svqshl_n_u32_x(svbool_t pg, svuint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqshl_n_u32_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_u32_x'}} return SVE_ACLE_FUNC(svqshl,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqshl_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshl_n_u64_xu10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svqshl_n_u64_x(svbool_t pg, svuint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqshl_n_u64_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshl.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshl_n_u64_x'}} return SVE_ACLE_FUNC(svqshl,_n_u64,_x,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshlu.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshlu.c index 0df31a9a303a..93618ea3ceeb 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshlu.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshlu.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,461 +14,267 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqshlu_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG]], [[TMP0]], i32 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshlu_n_s8_zu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG]], [[TMP0]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqshlu_n_s8_z(svbool_t pg, svint8_t op1) { + // CHECK-LABEL: test_svqshlu_n_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( %pg, %[[SEL]], i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s8_z'}} return SVE_ACLE_FUNC(svqshlu,_n_s8,_z,)(pg, op1, 0); } -// CHECK-LABEL: @test_svqshlu_n_s8_z_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG]], [[TMP0]], i32 7) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svqshlu_n_s8_z_1u10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG]], [[TMP0]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqshlu_n_s8_z_1(svbool_t pg, svint8_t op1) { + // CHECK-LABEL: test_svqshlu_n_s8_z_1 + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( %pg, %[[SEL]], i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s8_z'}} return SVE_ACLE_FUNC(svqshlu,_n_s8,_z,)(pg, op1, 7); } -// CHECK-LABEL: @test_svqshlu_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[TMP1]], i32 0) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s16_zu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[TMP1]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svqshlu_n_s16_z(svbool_t pg, svint16_t op1) { + // CHECK-LABEL: test_svqshlu_n_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( %[[PG]], %[[SEL]], i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s16_z'}} return SVE_ACLE_FUNC(svqshlu,_n_s16,_z,)(pg, op1, 0); } -// CHECK-LABEL: @test_svqshlu_n_s16_z_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[TMP1]], i32 15) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s16_z_1u10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[TMP1]], i32 15) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svqshlu_n_s16_z_1(svbool_t pg, svint16_t op1) { + // CHECK-LABEL: test_svqshlu_n_s16_z_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( %[[PG]], %[[SEL]], i32 15) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s16_z'}} return SVE_ACLE_FUNC(svqshlu,_n_s16,_z,)(pg, op1, 15); } -// CHECK-LABEL: @test_svqshlu_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[TMP1]], i32 0) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[TMP1]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svqshlu_n_s32_z(svbool_t pg, svint32_t op1) { + // CHECK-LABEL: test_svqshlu_n_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( %[[PG]], %[[SEL]], i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s32_z'}} return SVE_ACLE_FUNC(svqshlu,_n_s32,_z,)(pg, op1, 0); } -// CHECK-LABEL: @test_svqshlu_n_s32_z_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[TMP1]], i32 31) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s32_z_1u10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[TMP1]], i32 31) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svqshlu_n_s32_z_1(svbool_t pg, svint32_t op1) { + // CHECK-LABEL: test_svqshlu_n_s32_z_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( %[[PG]], %[[SEL]], i32 31) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s32_z'}} return SVE_ACLE_FUNC(svqshlu,_n_s32,_z,)(pg, op1, 31); } -// CHECK-LABEL: @test_svqshlu_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[TMP1]], i32 0) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[TMP1]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svqshlu_n_s64_z(svbool_t pg, svint64_t op1) { + // CHECK-LABEL: test_svqshlu_n_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( %[[PG]], %[[SEL]], i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s64_z'}} return SVE_ACLE_FUNC(svqshlu,_n_s64,_z,)(pg, op1, 0); } -// CHECK-LABEL: @test_svqshlu_n_s64_z_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[TMP1]], i32 63) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s64_z_1u10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[TMP1]], i32 63) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svqshlu_n_s64_z_1(svbool_t pg, svint64_t op1) { + // CHECK-LABEL: test_svqshlu_n_s64_z_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( %[[PG]], %[[SEL]], i32 63) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_z'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s64_z'}} return SVE_ACLE_FUNC(svqshlu,_n_s64,_z,)(pg, op1, 63); } -// CHECK-LABEL: @test_svqshlu_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshlu_n_s8_mu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqshlu_n_s8_m(svbool_t pg, svint8_t op1) { + // CHECK-LABEL: test_svqshlu_n_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( %pg, %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s8_m'}} return SVE_ACLE_FUNC(svqshlu,_n_s8,_m,)(pg, op1, 0); } -// CHECK-LABEL: @test_svqshlu_n_s8_m_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqshlu_n_s8_m_1u10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqshlu_n_s8_m_1(svbool_t pg, svint8_t op1) { + // CHECK-LABEL: test_svqshlu_n_s8_m_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( %pg, %op1, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s8_m'}} return SVE_ACLE_FUNC(svqshlu,_n_s8,_m,)(pg, op1, 7); } -// CHECK-LABEL: @test_svqshlu_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s16_mu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svqshlu_n_s16_m(svbool_t pg, svint16_t op1) { + // CHECK-LABEL: test_svqshlu_n_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( %[[PG]], %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s16_m'}} return SVE_ACLE_FUNC(svqshlu,_n_s16,_m,)(pg, op1, 0); } -// CHECK-LABEL: @test_svqshlu_n_s16_m_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 15) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s16_m_1u10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 15) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svqshlu_n_s16_m_1(svbool_t pg, svint16_t op1) { + // CHECK-LABEL: test_svqshlu_n_s16_m_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( %[[PG]], %op1, i32 15) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s16_m'}} return SVE_ACLE_FUNC(svqshlu,_n_s16,_m,)(pg, op1, 15); } -// CHECK-LABEL: @test_svqshlu_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s32_mu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svqshlu_n_s32_m(svbool_t pg, svint32_t op1) { + // CHECK-LABEL: test_svqshlu_n_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( %[[PG]], %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s32_m'}} return SVE_ACLE_FUNC(svqshlu,_n_s32,_m,)(pg, op1, 0); } -// CHECK-LABEL: @test_svqshlu_n_s32_m_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 31) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s32_m_1u10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 31) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svqshlu_n_s32_m_1(svbool_t pg, svint32_t op1) { + // CHECK-LABEL: test_svqshlu_n_s32_m_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( %[[PG]], %op1, i32 31) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s32_m'}} return SVE_ACLE_FUNC(svqshlu,_n_s32,_m,)(pg, op1, 31); } -// CHECK-LABEL: @test_svqshlu_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s64_mu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svqshlu_n_s64_m(svbool_t pg, svint64_t op1) { + // CHECK-LABEL: test_svqshlu_n_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( %[[PG]], %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s64_m'}} return SVE_ACLE_FUNC(svqshlu,_n_s64,_m,)(pg, op1, 0); } -// CHECK-LABEL: @test_svqshlu_n_s64_m_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 63) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s64_m_1u10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 63) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svqshlu_n_s64_m_1(svbool_t pg, svint64_t op1) { + // CHECK-LABEL: test_svqshlu_n_s64_m_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( %[[PG]], %op1, i32 63) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_m'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s64_m'}} return SVE_ACLE_FUNC(svqshlu,_n_s64,_m,)(pg, op1, 63); } -// CHECK-LABEL: @test_svqshlu_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshlu_n_s8_xu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqshlu_n_s8_x(svbool_t pg, svint8_t op1) { + // CHECK-LABEL: test_svqshlu_n_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( %pg, %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s8_x'}} return SVE_ACLE_FUNC(svqshlu,_n_s8,_x,)(pg, op1, 0); } -// CHECK-LABEL: @test_svqshlu_n_s8_x_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqshlu_n_s8_x_1u10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqshlu_n_s8_x_1(svbool_t pg, svint8_t op1) { + // CHECK-LABEL: test_svqshlu_n_s8_x_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv16i8( %pg, %op1, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s8_x'}} return SVE_ACLE_FUNC(svqshlu,_n_s8,_x,)(pg, op1, 7); } -// CHECK-LABEL: @test_svqshlu_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s16_xu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svqshlu_n_s16_x(svbool_t pg, svint16_t op1) { + // CHECK-LABEL: test_svqshlu_n_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( %[[PG]], %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s16_x'}} return SVE_ACLE_FUNC(svqshlu,_n_s16,_x,)(pg, op1, 0); } -// CHECK-LABEL: @test_svqshlu_n_s16_x_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 15) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s16_x_1u10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 15) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svqshlu_n_s16_x_1(svbool_t pg, svint16_t op1) { + // CHECK-LABEL: test_svqshlu_n_s16_x_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv8i16( %[[PG]], %op1, i32 15) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s16_x'}} return SVE_ACLE_FUNC(svqshlu,_n_s16,_x,)(pg, op1, 15); } -// CHECK-LABEL: @test_svqshlu_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svqshlu_n_s32_x(svbool_t pg, svint32_t op1) { + // CHECK-LABEL: test_svqshlu_n_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( %[[PG]], %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s32_x'}} return SVE_ACLE_FUNC(svqshlu,_n_s32,_x,)(pg, op1, 0); } -// CHECK-LABEL: @test_svqshlu_n_s32_x_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 31) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s32_x_1u10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 31) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svqshlu_n_s32_x_1(svbool_t pg, svint32_t op1) { + // CHECK-LABEL: test_svqshlu_n_s32_x_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv4i32( %[[PG]], %op1, i32 31) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s32_x'}} return SVE_ACLE_FUNC(svqshlu,_n_s32,_x,)(pg, op1, 31); } -// CHECK-LABEL: @test_svqshlu_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svqshlu_n_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svqshlu_n_s64_x(svbool_t pg, svint64_t op1) { + // CHECK-LABEL: test_svqshlu_n_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( %[[PG]], %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s64_x'}} return SVE_ACLE_FUNC(svqshlu,_n_s64,_x,)(pg, op1, 0); } -// CHECK-LABEL: @test_svqshlu_n_s64_x_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 63) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svqshlu_n_s64_x_1u10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 63) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svqshlu_n_s64_x_1(svbool_t pg, svint64_t op1) { + // CHECK-LABEL: test_svqshlu_n_s64_x_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshlu.nxv2i64( %[[PG]], %op1, i32 63) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshlu_x'}} // expected-warning@+1 {{implicit declaration of function 'svqshlu_n_s64_x'}} return SVE_ACLE_FUNC(svqshlu,_n_s64,_x,)(pg, op1, 63); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnb.c index af93d5952e46..a06cc62a94bb 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,205 +14,121 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqshrnb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv8i16( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshrnb_n_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv8i16( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqshrnb_n_s16(svint16_t op1) { + // CHECK-LABEL: test_svqshrnb_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrnb.nxv8i16( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnb_n_s16'}} return SVE_ACLE_FUNC(svqshrnb,_n_s16,,)(op1, 1); } -// CHECK-LABEL: @test_svqshrnb_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv8i16( [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqshrnb_n_s16_1u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv8i16( [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqshrnb_n_s16_1(svint16_t op1) { + // CHECK-LABEL: test_svqshrnb_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrnb.nxv8i16( %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnb_n_s16'}} return SVE_ACLE_FUNC(svqshrnb,_n_s16,,)(op1, 8); } -// CHECK-LABEL: @test_svqshrnb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv4i32( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshrnb_n_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv4i32( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqshrnb_n_s32(svint32_t op1) { + // CHECK-LABEL: test_svqshrnb_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrnb.nxv4i32( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnb_n_s32'}} return SVE_ACLE_FUNC(svqshrnb,_n_s32,,)(op1, 1); } -// CHECK-LABEL: @test_svqshrnb_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv4i32( [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqshrnb_n_s32_1u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv4i32( [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqshrnb_n_s32_1(svint32_t op1) { + // CHECK-LABEL: test_svqshrnb_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrnb.nxv4i32( %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnb_n_s32'}} return SVE_ACLE_FUNC(svqshrnb,_n_s32,,)(op1, 16); } -// CHECK-LABEL: @test_svqshrnb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv2i64( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshrnb_n_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv2i64( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqshrnb_n_s64(svint64_t op1) { + // CHECK-LABEL: test_svqshrnb_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrnb.nxv2i64( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnb_n_s64'}} return SVE_ACLE_FUNC(svqshrnb,_n_s64,,)(op1, 1); } -// CHECK-LABEL: @test_svqshrnb_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv2i64( [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqshrnb_n_s64_1u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnb.nxv2i64( [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqshrnb_n_s64_1(svint64_t op1) { + // CHECK-LABEL: test_svqshrnb_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrnb.nxv2i64( %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnb_n_s64'}} return SVE_ACLE_FUNC(svqshrnb,_n_s64,,)(op1, 32); } -// CHECK-LABEL: @test_svqshrnb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv8i16( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshrnb_n_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv8i16( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqshrnb_n_u16(svuint16_t op1) { + // CHECK-LABEL: test_svqshrnb_n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshrnb.nxv8i16( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnb_n_u16'}} return SVE_ACLE_FUNC(svqshrnb,_n_u16,,)(op1, 1); } -// CHECK-LABEL: @test_svqshrnb_n_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv8i16( [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqshrnb_n_u16_1u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv8i16( [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqshrnb_n_u16_1(svuint16_t op1) { + // CHECK-LABEL: test_svqshrnb_n_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshrnb.nxv8i16( %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnb_n_u16'}} return SVE_ACLE_FUNC(svqshrnb,_n_u16,,)(op1, 8); } -// CHECK-LABEL: @test_svqshrnb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv4i32( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshrnb_n_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv4i32( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqshrnb_n_u32(svuint32_t op1) { + // CHECK-LABEL: test_svqshrnb_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshrnb.nxv4i32( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnb_n_u32'}} return SVE_ACLE_FUNC(svqshrnb,_n_u32,,)(op1, 1); } -// CHECK-LABEL: @test_svqshrnb_n_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv4i32( [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqshrnb_n_u32_1u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv4i32( [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqshrnb_n_u32_1(svuint32_t op1) { + // CHECK-LABEL: test_svqshrnb_n_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshrnb.nxv4i32( %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnb_n_u32'}} return SVE_ACLE_FUNC(svqshrnb,_n_u32,,)(op1, 16); } -// CHECK-LABEL: @test_svqshrnb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv2i64( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshrnb_n_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv2i64( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqshrnb_n_u64(svuint64_t op1) { + // CHECK-LABEL: test_svqshrnb_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshrnb.nxv2i64( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnb_n_u64'}} return SVE_ACLE_FUNC(svqshrnb,_n_u64,,)(op1, 1); } -// CHECK-LABEL: @test_svqshrnb_n_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv2i64( [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqshrnb_n_u64_1u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnb.nxv2i64( [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqshrnb_n_u64_1(svuint64_t op1) { + // CHECK-LABEL: test_svqshrnb_n_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshrnb.nxv2i64( %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnb_n_u64'}} return SVE_ACLE_FUNC(svqshrnb,_n_u64,,)(op1, 32); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnt.c index fed19c2841b3..13a82a36272a 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrnt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,205 +14,121 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqshrnt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshrnt_n_s16u10__SVInt8_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqshrnt_n_s16(svint8_t op, svint16_t op1) { + // CHECK-LABEL: test_svqshrnt_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrnt.nxv8i16( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnt_n_s16'}} return SVE_ACLE_FUNC(svqshrnt,_n_s16,,)(op, op1, 1); } -// CHECK-LABEL: @test_svqshrnt_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqshrnt_n_s16_1u10__SVInt8_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqshrnt_n_s16_1(svint8_t op, svint16_t op1) { + // CHECK-LABEL: test_svqshrnt_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrnt.nxv8i16( %op, %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnt_n_s16'}} return SVE_ACLE_FUNC(svqshrnt,_n_s16,,)(op, op1, 8); } -// CHECK-LABEL: @test_svqshrnt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshrnt_n_s32u11__SVInt16_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqshrnt_n_s32(svint16_t op, svint32_t op1) { + // CHECK-LABEL: test_svqshrnt_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrnt.nxv4i32( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnt_n_s32'}} return SVE_ACLE_FUNC(svqshrnt,_n_s32,,)(op, op1, 1); } -// CHECK-LABEL: @test_svqshrnt_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqshrnt_n_s32_1u11__SVInt16_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqshrnt_n_s32_1(svint16_t op, svint32_t op1) { + // CHECK-LABEL: test_svqshrnt_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrnt.nxv4i32( %op, %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnt_n_s32'}} return SVE_ACLE_FUNC(svqshrnt,_n_s32,,)(op, op1, 16); } -// CHECK-LABEL: @test_svqshrnt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshrnt_n_s64u11__SVInt32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqshrnt_n_s64(svint32_t op, svint64_t op1) { + // CHECK-LABEL: test_svqshrnt_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrnt.nxv2i64( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnt_n_s64'}} return SVE_ACLE_FUNC(svqshrnt,_n_s64,,)(op, op1, 1); } -// CHECK-LABEL: @test_svqshrnt_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqshrnt_n_s64_1u11__SVInt32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqshrnt_n_s64_1(svint32_t op, svint64_t op1) { + // CHECK-LABEL: test_svqshrnt_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrnt.nxv2i64( %op, %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnt_n_s64'}} return SVE_ACLE_FUNC(svqshrnt,_n_s64,,)(op, op1, 32); } -// CHECK-LABEL: @test_svqshrnt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshrnt_n_u16u11__SVUint8_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqshrnt_n_u16(svuint8_t op, svuint16_t op1) { + // CHECK-LABEL: test_svqshrnt_n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshrnt.nxv8i16( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnt_n_u16'}} return SVE_ACLE_FUNC(svqshrnt,_n_u16,,)(op, op1, 1); } -// CHECK-LABEL: @test_svqshrnt_n_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqshrnt_n_u16_1u11__SVUint8_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqshrnt_n_u16_1(svuint8_t op, svuint16_t op1) { + // CHECK-LABEL: test_svqshrnt_n_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshrnt.nxv8i16( %op, %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnt_n_u16'}} return SVE_ACLE_FUNC(svqshrnt,_n_u16,,)(op, op1, 8); } -// CHECK-LABEL: @test_svqshrnt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshrnt_n_u32u12__SVUint16_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqshrnt_n_u32(svuint16_t op, svuint32_t op1) { + // CHECK-LABEL: test_svqshrnt_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshrnt.nxv4i32( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnt_n_u32'}} return SVE_ACLE_FUNC(svqshrnt,_n_u32,,)(op, op1, 1); } -// CHECK-LABEL: @test_svqshrnt_n_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqshrnt_n_u32_1u12__SVUint16_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqshrnt_n_u32_1(svuint16_t op, svuint32_t op1) { + // CHECK-LABEL: test_svqshrnt_n_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshrnt.nxv4i32( %op, %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnt_n_u32'}} return SVE_ACLE_FUNC(svqshrnt,_n_u32,,)(op, op1, 16); } -// CHECK-LABEL: @test_svqshrnt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svqshrnt_n_u64u12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqshrnt_n_u64(svuint32_t op, svuint64_t op1) { + // CHECK-LABEL: test_svqshrnt_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshrnt.nxv2i64( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnt_n_u64'}} return SVE_ACLE_FUNC(svqshrnt,_n_u64,,)(op, op1, 1); } -// CHECK-LABEL: @test_svqshrnt_n_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svqshrnt_n_u64_1u12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqshrnt_n_u64_1(svuint32_t op, svuint64_t op1) { + // CHECK-LABEL: test_svqshrnt_n_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqshrnt.nxv2i64( %op, %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svqshrnt_n_u64'}} return SVE_ACLE_FUNC(svqshrnt,_n_u64,,)(op, op1, 32); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunb.c index e9bf259b12b9..ab218f35a83c 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,103 +14,61 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqshrunb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv8i16( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqshrunb_n_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv8i16( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqshrunb_n_s16(svint16_t op1) { + // CHECK-LABEL: test_svqshrunb_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrunb.nxv8i16( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrunb'}} // expected-warning@+1 {{implicit declaration of function 'svqshrunb_n_s16'}} return SVE_ACLE_FUNC(svqshrunb,_n_s16,,)(op1, 1); } -// CHECK-LABEL: @test_svqshrunb_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv8i16( [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqshrunb_n_s16_1u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv8i16( [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqshrunb_n_s16_1(svint16_t op1) { + // CHECK-LABEL: test_svqshrunb_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrunb.nxv8i16( %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrunb'}} // expected-warning@+1 {{implicit declaration of function 'svqshrunb_n_s16'}} return SVE_ACLE_FUNC(svqshrunb,_n_s16,,)(op1, 8); } -// CHECK-LABEL: @test_svqshrunb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv4i32( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqshrunb_n_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv4i32( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqshrunb_n_s32(svint32_t op1) { + // CHECK-LABEL: test_svqshrunb_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrunb.nxv4i32( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrunb'}} // expected-warning@+1 {{implicit declaration of function 'svqshrunb_n_s32'}} return SVE_ACLE_FUNC(svqshrunb,_n_s32,,)(op1, 1); } -// CHECK-LABEL: @test_svqshrunb_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv4i32( [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqshrunb_n_s32_1u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv4i32( [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqshrunb_n_s32_1(svint32_t op1) { + // CHECK-LABEL: test_svqshrunb_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrunb.nxv4i32( %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrunb'}} // expected-warning@+1 {{implicit declaration of function 'svqshrunb_n_s32'}} return SVE_ACLE_FUNC(svqshrunb,_n_s32,,)(op1, 16); } -// CHECK-LABEL: @test_svqshrunb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv2i64( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqshrunb_n_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv2i64( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqshrunb_n_s64(svint64_t op1) { + // CHECK-LABEL: test_svqshrunb_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrunb.nxv2i64( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrunb'}} // expected-warning@+1 {{implicit declaration of function 'svqshrunb_n_s64'}} return SVE_ACLE_FUNC(svqshrunb,_n_s64,,)(op1, 1); } -// CHECK-LABEL: @test_svqshrunb_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv2i64( [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqshrunb_n_s64_1u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunb.nxv2i64( [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqshrunb_n_s64_1(svint64_t op1) { + // CHECK-LABEL: test_svqshrunb_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrunb.nxv2i64( %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrunb'}} // expected-warning@+1 {{implicit declaration of function 'svqshrunb_n_s64'}} return SVE_ACLE_FUNC(svqshrunb,_n_s64,,)(op1, 32); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunt.c index 39912d9aca03..7df3a4227d7c 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qshrunt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,103 +14,61 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqshrunt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqshrunt_n_s16u11__SVUint8_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqshrunt_n_s16(svuint8_t op, svint16_t op1) { + // CHECK-LABEL: test_svqshrunt_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrunt.nxv8i16( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrunt'}} // expected-warning@+1 {{implicit declaration of function 'svqshrunt_n_s16'}} return SVE_ACLE_FUNC(svqshrunt,_n_s16,,)(op, op1, 1); } -// CHECK-LABEL: @test_svqshrunt_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqshrunt_n_s16_1u11__SVUint8_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqshrunt_n_s16_1(svuint8_t op, svint16_t op1) { + // CHECK-LABEL: test_svqshrunt_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrunt.nxv8i16( %op, %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrunt'}} // expected-warning@+1 {{implicit declaration of function 'svqshrunt_n_s16'}} return SVE_ACLE_FUNC(svqshrunt,_n_s16,,)(op, op1, 8); } -// CHECK-LABEL: @test_svqshrunt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqshrunt_n_s32u12__SVUint16_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqshrunt_n_s32(svuint16_t op, svint32_t op1) { + // CHECK-LABEL: test_svqshrunt_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrunt.nxv4i32( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrunt'}} // expected-warning@+1 {{implicit declaration of function 'svqshrunt_n_s32'}} return SVE_ACLE_FUNC(svqshrunt,_n_s32,,)(op, op1, 1); } -// CHECK-LABEL: @test_svqshrunt_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqshrunt_n_s32_1u12__SVUint16_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqshrunt_n_s32_1(svuint16_t op, svint32_t op1) { + // CHECK-LABEL: test_svqshrunt_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrunt.nxv4i32( %op, %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrunt'}} // expected-warning@+1 {{implicit declaration of function 'svqshrunt_n_s32'}} return SVE_ACLE_FUNC(svqshrunt,_n_s32,,)(op, op1, 16); } -// CHECK-LABEL: @test_svqshrunt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svqshrunt_n_s64u12__SVUint32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqshrunt_n_s64(svuint32_t op, svint64_t op1) { + // CHECK-LABEL: test_svqshrunt_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrunt.nxv2i64( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrunt'}} // expected-warning@+1 {{implicit declaration of function 'svqshrunt_n_s64'}} return SVE_ACLE_FUNC(svqshrunt,_n_s64,,)(op, op1, 1); } -// CHECK-LABEL: @test_svqshrunt_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z22test_svqshrunt_n_s64_1u12__SVUint32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqshrunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqshrunt_n_s64_1(svuint32_t op, svint64_t op1) { + // CHECK-LABEL: test_svqshrunt_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqshrunt.nxv2i64( %op, %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqshrunt'}} // expected-warning@+1 {{implicit declaration of function 'svqshrunt_n_s64'}} return SVE_ACLE_FUNC(svqshrunt,_n_s64,,)(op, op1, 32); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c index f669fd9d2cba..2522cc4aacf7 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsub.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,969 +14,557 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqsub_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqsub_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqsub_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqsub_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_s8_z'}} return SVE_ACLE_FUNC(svqsub,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svqsub_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqsub_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_s16_z'}} return SVE_ACLE_FUNC(svqsub,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svqsub_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqsub_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_s32_z'}} return SVE_ACLE_FUNC(svqsub,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svqsub_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqsub_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_s64_z'}} return SVE_ACLE_FUNC(svqsub,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svqsub_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqsub_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svqsub_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_u8_z'}} return SVE_ACLE_FUNC(svqsub,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svqsub_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svqsub_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_u16_z'}} return SVE_ACLE_FUNC(svqsub,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svqsub_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svqsub_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_u32_z'}} return SVE_ACLE_FUNC(svqsub,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svqsub_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svqsub_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_u64_z'}} return SVE_ACLE_FUNC(svqsub,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqsub_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqsub_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqsub_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_s8_m'}} return SVE_ACLE_FUNC(svqsub,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqsub_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqsub_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_s16_m'}} return SVE_ACLE_FUNC(svqsub,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqsub_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqsub_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_s32_m'}} return SVE_ACLE_FUNC(svqsub,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqsub_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqsub_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_s64_m'}} return SVE_ACLE_FUNC(svqsub,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqsub_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqsub_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svqsub_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_u8_m'}} return SVE_ACLE_FUNC(svqsub,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svqsub_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svqsub_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_u16_m'}} return SVE_ACLE_FUNC(svqsub,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svqsub_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svqsub_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_u32_m'}} return SVE_ACLE_FUNC(svqsub,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svqsub_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svqsub_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_u64_m'}} return SVE_ACLE_FUNC(svqsub,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqsub_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqsub_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqsub_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_s8_x'}} return SVE_ACLE_FUNC(svqsub,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqsub_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqsub_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_s16_x'}} return SVE_ACLE_FUNC(svqsub,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqsub_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqsub_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_s32_x'}} return SVE_ACLE_FUNC(svqsub,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqsub_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqsub_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_s64_x'}} return SVE_ACLE_FUNC(svqsub,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqsub_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqsub_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svqsub_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_u8_x'}} return SVE_ACLE_FUNC(svqsub,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svqsub_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svqsub_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_u16_x'}} return SVE_ACLE_FUNC(svqsub,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svqsub_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svqsub_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_u32_x'}} return SVE_ACLE_FUNC(svqsub,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsub_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svqsub_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svqsub_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_u64_x'}} return SVE_ACLE_FUNC(svqsub,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsub_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svqsub_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqsub_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_s8_z'}} return SVE_ACLE_FUNC(svqsub,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsub_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svqsub_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqsub_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_s16_z'}} return SVE_ACLE_FUNC(svqsub,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsub_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svqsub_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqsub_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_s32_z'}} return SVE_ACLE_FUNC(svqsub,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsub_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svqsub_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqsub_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_s64_z'}} return SVE_ACLE_FUNC(svqsub,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsub_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svqsub_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svqsub_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_u8_z'}} return SVE_ACLE_FUNC(svqsub,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsub_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svqsub_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svqsub_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_u16_z'}} return SVE_ACLE_FUNC(svqsub,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsub_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svqsub_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svqsub_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_u32_z'}} return SVE_ACLE_FUNC(svqsub,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsub_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svqsub_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svqsub_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_u64_z'}} return SVE_ACLE_FUNC(svqsub,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsub_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqsub_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqsub_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_s8_m'}} return SVE_ACLE_FUNC(svqsub,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsub_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svqsub_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqsub_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_s16_m'}} return SVE_ACLE_FUNC(svqsub,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsub_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svqsub_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqsub_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_s32_m'}} return SVE_ACLE_FUNC(svqsub,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsub_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svqsub_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqsub_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_s64_m'}} return SVE_ACLE_FUNC(svqsub,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsub_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqsub_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svqsub_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_u8_m'}} return SVE_ACLE_FUNC(svqsub,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsub_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svqsub_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svqsub_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_u16_m'}} return SVE_ACLE_FUNC(svqsub,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsub_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svqsub_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svqsub_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_u32_m'}} return SVE_ACLE_FUNC(svqsub,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsub_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svqsub_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svqsub_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_u64_m'}} return SVE_ACLE_FUNC(svqsub,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsub_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqsub_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqsub_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_s8_x'}} return SVE_ACLE_FUNC(svqsub,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsub_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svqsub_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqsub_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_s16_x'}} return SVE_ACLE_FUNC(svqsub,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsub_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svqsub_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqsub_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_s32_x'}} return SVE_ACLE_FUNC(svqsub,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsub_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svqsub_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqsub_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsub.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_s64_x'}} return SVE_ACLE_FUNC(svqsub,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsub_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqsub_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svqsub_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_u8_x'}} return SVE_ACLE_FUNC(svqsub,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsub_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svqsub_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svqsub_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_u16_x'}} return SVE_ACLE_FUNC(svqsub,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsub_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svqsub_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svqsub_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_u32_x'}} return SVE_ACLE_FUNC(svqsub,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsub_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsub_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svqsub_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svqsub_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsub.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsub_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsub_n_u64_x'}} return SVE_ACLE_FUNC(svqsub,_n_u64,_x,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c index 69784968550f..2150fd13f69c 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qsubr.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,969 +14,557 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqsubr_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsubr_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqsubr_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqsubr_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_s8_z'}} return SVE_ACLE_FUNC(svqsubr,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsubr_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svqsubr_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqsubr_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_s16_z'}} return SVE_ACLE_FUNC(svqsubr,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsubr_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svqsubr_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqsubr_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_s32_z'}} return SVE_ACLE_FUNC(svqsubr,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsubr_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svqsubr_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqsubr_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_s64_z'}} return SVE_ACLE_FUNC(svqsubr,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsubr_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqsubr_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svqsubr_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_u8_z'}} return SVE_ACLE_FUNC(svqsubr,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsubr_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svqsubr_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svqsubr_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_u16_z'}} return SVE_ACLE_FUNC(svqsubr,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsubr_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svqsubr_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svqsubr_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_u32_z'}} return SVE_ACLE_FUNC(svqsubr,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsubr_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svqsubr_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svqsubr_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_u64_z'}} return SVE_ACLE_FUNC(svqsubr,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsubr_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqsubr_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqsubr_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_s8_m'}} return SVE_ACLE_FUNC(svqsubr,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsubr_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqsubr_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqsubr_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_s16_m'}} return SVE_ACLE_FUNC(svqsubr,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsubr_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqsubr_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqsubr_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_s32_m'}} return SVE_ACLE_FUNC(svqsubr,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsubr_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqsubr_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqsubr_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_s64_m'}} return SVE_ACLE_FUNC(svqsubr,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsubr_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqsubr_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svqsubr_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_u8_m'}} return SVE_ACLE_FUNC(svqsubr,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsubr_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svqsubr_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svqsubr_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_u16_m'}} return SVE_ACLE_FUNC(svqsubr,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsubr_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svqsubr_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svqsubr_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_u32_m'}} return SVE_ACLE_FUNC(svqsubr,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsubr_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svqsubr_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svqsubr_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_u64_m'}} return SVE_ACLE_FUNC(svqsubr,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsubr_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqsubr_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svqsubr_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_s8_x'}} return SVE_ACLE_FUNC(svqsubr,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsubr_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svqsubr_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svqsubr_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_s16_x'}} return SVE_ACLE_FUNC(svqsubr,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsubr_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svqsubr_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svqsubr_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_s32_x'}} return SVE_ACLE_FUNC(svqsubr,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsubr_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svqsubr_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svqsubr_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_s64_x'}} return SVE_ACLE_FUNC(svqsubr,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqsubr_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqsubr_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svqsubr_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_u8_x'}} return SVE_ACLE_FUNC(svqsubr,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsubr_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svqsubr_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svqsubr_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_u16_x'}} return SVE_ACLE_FUNC(svqsubr,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsubr_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svqsubr_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svqsubr_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_u32_x'}} return SVE_ACLE_FUNC(svqsubr,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svqsubr_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svqsubr_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svqsubr_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_u64_x'}} return SVE_ACLE_FUNC(svqsubr,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsubr_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svqsubr_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqsubr_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_s8_z'}} return SVE_ACLE_FUNC(svqsubr,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svqsubr_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqsubr_n_s16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_s16_z'}} return SVE_ACLE_FUNC(svqsubr,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svqsubr_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqsubr_n_s32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_s32_z'}} return SVE_ACLE_FUNC(svqsubr,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svqsubr_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqsubr_n_s64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_s64_z'}} return SVE_ACLE_FUNC(svqsubr,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsubr_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svqsubr_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svqsubr_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_u8_z'}} return SVE_ACLE_FUNC(svqsubr,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svqsubr_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svqsubr_n_u16_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_u16_z'}} return SVE_ACLE_FUNC(svqsubr,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svqsubr_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svqsubr_n_u32_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_u32_z'}} return SVE_ACLE_FUNC(svqsubr,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svqsubr_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svqsubr_n_u64_z + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_z'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_u64_z'}} return SVE_ACLE_FUNC(svqsubr,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsubr_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqsubr_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqsubr_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_s8_m'}} return SVE_ACLE_FUNC(svqsubr,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svqsubr_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqsubr_n_s16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_s16_m'}} return SVE_ACLE_FUNC(svqsubr,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svqsubr_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqsubr_n_s32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_s32_m'}} return SVE_ACLE_FUNC(svqsubr,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svqsubr_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqsubr_n_s64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_s64_m'}} return SVE_ACLE_FUNC(svqsubr,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsubr_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqsubr_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svqsubr_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_u8_m'}} return SVE_ACLE_FUNC(svqsubr,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svqsubr_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svqsubr_n_u16_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_u16_m'}} return SVE_ACLE_FUNC(svqsubr,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svqsubr_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svqsubr_n_u32_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_u32_m'}} return SVE_ACLE_FUNC(svqsubr,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svqsubr_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svqsubr_n_u64_m + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_m'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_u64_m'}} return SVE_ACLE_FUNC(svqsubr,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsubr_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svqsubr_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svqsubr_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_s8_x'}} return SVE_ACLE_FUNC(svqsubr,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svqsubr_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svqsubr_n_s16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_s16_x'}} return SVE_ACLE_FUNC(svqsubr,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svqsubr_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svqsubr_n_s32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_s32_x'}} return SVE_ACLE_FUNC(svqsubr,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqsubr_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svqsubr_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svqsubr_n_s64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqsubr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_s64_x'}} return SVE_ACLE_FUNC(svqsubr,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svqsubr_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svqsubr_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svqsubr_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_u8_x'}} return SVE_ACLE_FUNC(svqsubr,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svqsubr_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svqsubr_n_u16_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_u16_x'}} return SVE_ACLE_FUNC(svqsubr,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svqsubr_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svqsubr_n_u32_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_u32_x'}} return SVE_ACLE_FUNC(svqsubr,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svqsubr_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svqsubr_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svqsubr_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svqsubr_n_u64_x + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqsubr.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqsubr_x'}} // expected-warning@+1 {{implicit declaration of function 'svqsubr_n_u64_x'}} return SVE_ACLE_FUNC(svqsubr,_n_u64,_x,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnb.c index bc6047fd6548..267a953c2c3c 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,103 +14,61 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqxtnb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnb.nxv8i16( [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqxtnb_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnb.nxv8i16( [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqxtnb_s16(svint16_t op1) { + // CHECK-LABEL: test_svqxtnb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqxtnb.nxv8i16( %op1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqxtnb'}} // expected-warning@+1 {{implicit declaration of function 'svqxtnb_s16'}} return SVE_ACLE_FUNC(svqxtnb,_s16,,)(op1); } -// CHECK-LABEL: @test_svqxtnb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnb.nxv4i32( [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqxtnb_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnb.nxv4i32( [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqxtnb_s32(svint32_t op1) { + // CHECK-LABEL: test_svqxtnb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqxtnb.nxv4i32( %op1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqxtnb'}} // expected-warning@+1 {{implicit declaration of function 'svqxtnb_s32'}} return SVE_ACLE_FUNC(svqxtnb,_s32,,)(op1); } -// CHECK-LABEL: @test_svqxtnb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnb.nxv2i64( [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqxtnb_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnb.nxv2i64( [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqxtnb_s64(svint64_t op1) { + // CHECK-LABEL: test_svqxtnb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqxtnb.nxv2i64( %op1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqxtnb'}} // expected-warning@+1 {{implicit declaration of function 'svqxtnb_s64'}} return SVE_ACLE_FUNC(svqxtnb,_s64,,)(op1); } -// CHECK-LABEL: @test_svqxtnb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnb.nxv8i16( [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqxtnb_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnb.nxv8i16( [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqxtnb_u16(svuint16_t op1) { + // CHECK-LABEL: test_svqxtnb_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqxtnb.nxv8i16( %op1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqxtnb'}} // expected-warning@+1 {{implicit declaration of function 'svqxtnb_u16'}} return SVE_ACLE_FUNC(svqxtnb,_u16,,)(op1); } -// CHECK-LABEL: @test_svqxtnb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnb.nxv4i32( [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqxtnb_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnb.nxv4i32( [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqxtnb_u32(svuint32_t op1) { + // CHECK-LABEL: test_svqxtnb_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqxtnb.nxv4i32( %op1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqxtnb'}} // expected-warning@+1 {{implicit declaration of function 'svqxtnb_u32'}} return SVE_ACLE_FUNC(svqxtnb,_u32,,)(op1); } -// CHECK-LABEL: @test_svqxtnb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnb.nxv2i64( [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqxtnb_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnb.nxv2i64( [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqxtnb_u64(svuint64_t op1) { + // CHECK-LABEL: test_svqxtnb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqxtnb.nxv2i64( %op1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqxtnb'}} // expected-warning@+1 {{implicit declaration of function 'svqxtnb_u64'}} return SVE_ACLE_FUNC(svqxtnb,_u64,,)(op1); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnt.c index 0cfd9d3cdf63..5c1da4ba561e 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtnt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,103 +14,61 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqxtnt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqxtnt_s16u10__SVInt8_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svqxtnt_s16(svint8_t op, svint16_t op1) { + // CHECK-LABEL: test_svqxtnt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqxtnt.nxv8i16( %op, %op1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqxtnt'}} // expected-warning@+1 {{implicit declaration of function 'svqxtnt_s16'}} return SVE_ACLE_FUNC(svqxtnt,_s16,,)(op, op1); } -// CHECK-LABEL: @test_svqxtnt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqxtnt_s32u11__SVInt16_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svqxtnt_s32(svint16_t op, svint32_t op1) { + // CHECK-LABEL: test_svqxtnt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqxtnt.nxv4i32( %op, %op1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqxtnt'}} // expected-warning@+1 {{implicit declaration of function 'svqxtnt_s32'}} return SVE_ACLE_FUNC(svqxtnt,_s32,,)(op, op1); } -// CHECK-LABEL: @test_svqxtnt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqxtnt_s64u11__SVInt32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svqxtnt_s64(svint32_t op, svint64_t op1) { + // CHECK-LABEL: test_svqxtnt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqxtnt.nxv2i64( %op, %op1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqxtnt'}} // expected-warning@+1 {{implicit declaration of function 'svqxtnt_s64'}} return SVE_ACLE_FUNC(svqxtnt,_s64,,)(op, op1); } -// CHECK-LABEL: @test_svqxtnt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqxtnt_u16u11__SVUint8_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqxtnt_u16(svuint8_t op, svuint16_t op1) { + // CHECK-LABEL: test_svqxtnt_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqxtnt.nxv8i16( %op, %op1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqxtnt'}} // expected-warning@+1 {{implicit declaration of function 'svqxtnt_u16'}} return SVE_ACLE_FUNC(svqxtnt,_u16,,)(op, op1); } -// CHECK-LABEL: @test_svqxtnt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqxtnt_u32u12__SVUint16_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqxtnt_u32(svuint16_t op, svuint32_t op1) { + // CHECK-LABEL: test_svqxtnt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqxtnt.nxv4i32( %op, %op1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqxtnt'}} // expected-warning@+1 {{implicit declaration of function 'svqxtnt_u32'}} return SVE_ACLE_FUNC(svqxtnt,_u32,,)(op, op1); } -// CHECK-LABEL: @test_svqxtnt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svqxtnt_u64u12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.uqxtnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqxtnt_u64(svuint32_t op, svuint64_t op1) { + // CHECK-LABEL: test_svqxtnt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.uqxtnt.nxv2i64( %op, %op1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqxtnt'}} // expected-warning@+1 {{implicit declaration of function 'svqxtnt_u64'}} return SVE_ACLE_FUNC(svqxtnt,_u64,,)(op, op1); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunb.c index cb244a4f9884..7fa498ee212b 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,52 +14,31 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqxtunb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunb.nxv8i16( [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqxtunb_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunb.nxv8i16( [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqxtunb_s16(svint16_t op1) { + // CHECK-LABEL: test_svqxtunb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqxtunb.nxv8i16( %op1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqxtunb'}} // expected-warning@+1 {{implicit declaration of function 'svqxtunb_s16'}} return SVE_ACLE_FUNC(svqxtunb,_s16,,)(op1); } -// CHECK-LABEL: @test_svqxtunb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunb.nxv4i32( [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqxtunb_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunb.nxv4i32( [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqxtunb_s32(svint32_t op1) { + // CHECK-LABEL: test_svqxtunb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqxtunb.nxv4i32( %op1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqxtunb'}} // expected-warning@+1 {{implicit declaration of function 'svqxtunb_s32'}} return SVE_ACLE_FUNC(svqxtunb,_s32,,)(op1); } -// CHECK-LABEL: @test_svqxtunb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunb.nxv2i64( [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqxtunb_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunb.nxv2i64( [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqxtunb_s64(svint64_t op1) { + // CHECK-LABEL: test_svqxtunb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqxtunb.nxv2i64( %op1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqxtunb'}} // expected-warning@+1 {{implicit declaration of function 'svqxtunb_s64'}} return SVE_ACLE_FUNC(svqxtunb,_s64,,)(op1); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunt.c index b4ea2415ac21..d039e8c92dda 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_qxtunt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,52 +14,31 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svqxtunt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqxtunt_u16u11__SVUint8_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunt.nxv8i16( [[OP:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svqxtunt_u16(svuint8_t op, svint16_t op1) { + // CHECK-LABEL: test_svqxtunt_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqxtunt.nxv8i16( %op, %op1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqxtunt'}} // expected-warning@+1 {{implicit declaration of function 'svqxtunt_s16'}} return SVE_ACLE_FUNC(svqxtunt,_s16,,)(op, op1); } -// CHECK-LABEL: @test_svqxtunt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqxtunt_u32u12__SVUint16_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunt.nxv4i32( [[OP:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svqxtunt_u32(svuint16_t op, svint32_t op1) { + // CHECK-LABEL: test_svqxtunt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqxtunt.nxv4i32( %op, %op1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqxtunt'}} // expected-warning@+1 {{implicit declaration of function 'svqxtunt_s32'}} return SVE_ACLE_FUNC(svqxtunt,_s32,,)(op, op1); } -// CHECK-LABEL: @test_svqxtunt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svqxtunt_u64u12__SVUint32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sqxtunt.nxv2i64( [[OP:%.*]], [[OP1:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svqxtunt_u64(svuint32_t op, svint64_t op1) { + // CHECK-LABEL: test_svqxtunt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sqxtunt.nxv2i64( %op, %op1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svqxtunt'}} // expected-warning@+1 {{implicit declaration of function 'svqxtunt_s64'}} return SVE_ACLE_FUNC(svqxtunt,_s64,,)(op, op1); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c index af12457ee479..204731fce79e 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svraddhnb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svraddhnb_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svraddhnb_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svraddhnb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnb_s16'}} return SVE_ACLE_FUNC(svraddhnb,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svraddhnb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svraddhnb_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svraddhnb_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svraddhnb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnb_s32'}} return SVE_ACLE_FUNC(svraddhnb,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svraddhnb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svraddhnb_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svraddhnb_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svraddhnb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnb_s64'}} return SVE_ACLE_FUNC(svraddhnb,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svraddhnb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svraddhnb_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svraddhnb_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svraddhnb_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnb_u16'}} return SVE_ACLE_FUNC(svraddhnb,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svraddhnb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svraddhnb_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svraddhnb_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svraddhnb_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnb_u32'}} return SVE_ACLE_FUNC(svraddhnb,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svraddhnb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svraddhnb_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svraddhnb_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svraddhnb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnb_u64'}} return SVE_ACLE_FUNC(svraddhnb,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svraddhnb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svraddhnb_n_s16u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svraddhnb_n_s16(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svraddhnb_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnb_n_s16'}} return SVE_ACLE_FUNC(svraddhnb,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svraddhnb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svraddhnb_n_s32u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svraddhnb_n_s32(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svraddhnb_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnb_n_s32'}} return SVE_ACLE_FUNC(svraddhnb,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svraddhnb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svraddhnb_n_s64u11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svraddhnb_n_s64(svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svraddhnb_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnb_n_s64'}} return SVE_ACLE_FUNC(svraddhnb,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svraddhnb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svraddhnb_n_u16u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svraddhnb_n_u16(svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svraddhnb_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnb_n_u16'}} return SVE_ACLE_FUNC(svraddhnb,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svraddhnb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svraddhnb_n_u32u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svraddhnb_n_u32(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svraddhnb_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnb_n_u32'}} return SVE_ACLE_FUNC(svraddhnb,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svraddhnb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svraddhnb_n_u64u12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svraddhnb_n_u64(svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svraddhnb_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnb'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnb_n_u64'}} return SVE_ACLE_FUNC(svraddhnb,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c index 8d4207176208..15c0e9025b50 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_raddhnt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svraddhnt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svraddhnt_s16u10__SVInt8_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svraddhnt_s16(svint8_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svraddhnt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnt_s16'}} return SVE_ACLE_FUNC(svraddhnt,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svraddhnt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svraddhnt_s32u11__SVInt16_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svraddhnt_s32(svint16_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svraddhnt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnt_s32'}} return SVE_ACLE_FUNC(svraddhnt,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svraddhnt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svraddhnt_s64u11__SVInt32_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svraddhnt_s64(svint32_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svraddhnt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnt_s64'}} return SVE_ACLE_FUNC(svraddhnt,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svraddhnt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svraddhnt_u16u11__SVUint8_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svraddhnt_u16(svuint8_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svraddhnt_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnt_u16'}} return SVE_ACLE_FUNC(svraddhnt,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svraddhnt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svraddhnt_u32u12__SVUint16_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svraddhnt_u32(svuint16_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svraddhnt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnt_u32'}} return SVE_ACLE_FUNC(svraddhnt,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svraddhnt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svraddhnt_u64u12__SVUint32_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svraddhnt_u64(svuint32_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svraddhnt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnt_u64'}} return SVE_ACLE_FUNC(svraddhnt,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svraddhnt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svraddhnt_n_s16u10__SVInt8_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svraddhnt_n_s16(svint8_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svraddhnt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnt_n_s16'}} return SVE_ACLE_FUNC(svraddhnt,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svraddhnt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svraddhnt_n_s32u11__SVInt16_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svraddhnt_n_s32(svint16_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svraddhnt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnt_n_s32'}} return SVE_ACLE_FUNC(svraddhnt,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svraddhnt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svraddhnt_n_s64u11__SVInt32_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svraddhnt_n_s64(svint32_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svraddhnt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnt_n_s64'}} return SVE_ACLE_FUNC(svraddhnt,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svraddhnt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svraddhnt_n_u16u11__SVUint8_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svraddhnt_n_u16(svuint8_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svraddhnt_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnt_n_u16'}} return SVE_ACLE_FUNC(svraddhnt,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svraddhnt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svraddhnt_n_u32u12__SVUint16_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svraddhnt_n_u32(svuint16_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svraddhnt_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnt_n_u32'}} return SVE_ACLE_FUNC(svraddhnt,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svraddhnt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svraddhnt_n_u64u12__SVUint32_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svraddhnt_n_u64(svuint32_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svraddhnt_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.raddhnt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svraddhnt'}} // expected-warning@+1 {{implicit declaration of function 'svraddhnt_n_u64'}} return SVE_ACLE_FUNC(svraddhnt,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rax1.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rax1.c index 41d878086c14..7fdb0bc3ba6f 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rax1.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rax1.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-sha3 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-sha3 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-sha3 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-sha3 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-sha3 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-sha3 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,35 +14,21 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrax1_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rax1( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svrax1_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rax1( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svrax1_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svrax1_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rax1( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrax1'}} // expected-warning@+1 {{implicit declaration of function 'svrax1_s64'}} return SVE_ACLE_FUNC(svrax1,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svrax1_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rax1( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svrax1_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rax1( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svrax1_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svrax1_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rax1( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrax1'}} // expected-warning@+1 {{implicit declaration of function 'svrax1_u64'}} return SVE_ACLE_FUNC(svrax1,_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_recpe.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_recpe.c index b3858698e02c..19a88273caef 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_recpe.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_recpe.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,58 +14,34 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrecpe_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urecpe.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrecpe_u32_zu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urecpe.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrecpe_u32_z(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svrecpe_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urecpe.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrecpe_z'}} // expected-warning@+1 {{implicit declaration of function 'svrecpe_u32_z'}} return SVE_ACLE_FUNC(svrecpe,_u32,_z,)(pg, op); } -// CHECK-LABEL: @test_svrecpe_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urecpe.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrecpe_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urecpe.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrecpe_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svrecpe_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urecpe.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrecpe_m'}} // expected-warning@+1 {{implicit declaration of function 'svrecpe_u32_m'}} return SVE_ACLE_FUNC(svrecpe,_u32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrecpe_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urecpe.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrecpe_u32_xu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urecpe.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrecpe_u32_x(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svrecpe_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urecpe.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrecpe_x'}} // expected-warning@+1 {{implicit declaration of function 'svrecpe_u32_x'}} return SVE_ACLE_FUNC(svrecpe,_u32,_x,)(pg, op); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c index d37487073a7e..6e4f5ca98aa8 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rhadd.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s #include @@ -14,972 +13,557 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrhadd_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svrhadd_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrhadd_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svrhadd_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_s8_m'}} return SVE_ACLE_FUNC(svrhadd,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrhadd_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svrhadd_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svrhadd_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_s16_m'}} return SVE_ACLE_FUNC(svrhadd,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrhadd_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrhadd_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svrhadd_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_s32_m'}} return SVE_ACLE_FUNC(svrhadd,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrhadd_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrhadd_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svrhadd_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_s64_m'}} return SVE_ACLE_FUNC(svrhadd,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svrhadd_u8_mu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrhadd_u8_m(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svrhadd_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_u8_m'}} return SVE_ACLE_FUNC(svrhadd,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrhadd_u16_mu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svrhadd_u16_m(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svrhadd_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_u16_m'}} return SVE_ACLE_FUNC(svrhadd,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrhadd_u32_mu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrhadd_u32_m(svbool_t pg, svuint32_t op1, svuint32_t op2) { // CHECKA-LABEL: test_svrhadd_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_u32_m'}} return SVE_ACLE_FUNC(svrhadd,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrhadd_u64_mu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrhadd_u64_m(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svrhadd_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_u64_m'}} return SVE_ACLE_FUNC(svrhadd,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrhadd_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svrhadd_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svrhadd_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_s8_m'}} return SVE_ACLE_FUNC(svrhadd,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svrhadd_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svrhadd_n_s16_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_s16_m'}} return SVE_ACLE_FUNC(svrhadd,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svrhadd_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svrhadd_n_s32_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_s32_m'}} return SVE_ACLE_FUNC(svrhadd,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svrhadd_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svrhadd_n_s64_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_s64_m'}} return SVE_ACLE_FUNC(svrhadd,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrhadd_n_u8_mu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svrhadd_n_u8_m(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svrhadd_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_u8_m'}} return SVE_ACLE_FUNC(svrhadd,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u16_mu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svrhadd_n_u16_m(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svrhadd_n_u16_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_u16_m'}} return SVE_ACLE_FUNC(svrhadd,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u32_mu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svrhadd_n_u32_m(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svrhadd_n_u32_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_u32_m'}} return SVE_ACLE_FUNC(svrhadd,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u64_mu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svrhadd_n_u64_m(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svrhadd_n_u64_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_u64_m'}} return SVE_ACLE_FUNC(svrhadd,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrhadd_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svrhadd_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svrhadd_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_s8_z'}} return SVE_ACLE_FUNC(svrhadd,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svrhadd_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svrhadd_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svrhadd_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_s16_z'}} return SVE_ACLE_FUNC(svrhadd,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svrhadd_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svrhadd_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svrhadd_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_s32_z'}} return SVE_ACLE_FUNC(svrhadd,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svrhadd_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svrhadd_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svrhadd_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_s64_z'}} return SVE_ACLE_FUNC(svrhadd,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrhadd_u8_zu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svrhadd_u8_z(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svrhadd_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_u8_z'}} return SVE_ACLE_FUNC(svrhadd,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svrhadd_u16_zu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svrhadd_u16_z(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svrhadd_u16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_u16_z'}} return SVE_ACLE_FUNC(svrhadd,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svrhadd_u32_zu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svrhadd_u32_z(svbool_t pg, svuint32_t op1, svuint32_t op2) { // CHECKA-LABEL: test_svrhadd_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_u32_z'}} return SVE_ACLE_FUNC(svrhadd,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svrhadd_u64_zu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svrhadd_u64_z(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svrhadd_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_u64_z'}} return SVE_ACLE_FUNC(svrhadd,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrhadd_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svrhadd_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svrhadd_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_s8_z'}} return SVE_ACLE_FUNC(svrhadd,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svrhadd_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svrhadd_n_s16_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_s16_z'}} return SVE_ACLE_FUNC(svrhadd,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svrhadd_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svrhadd_n_s32_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_s32_z'}} return SVE_ACLE_FUNC(svrhadd,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svrhadd_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svrhadd_n_s64_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_s64_z'}} return SVE_ACLE_FUNC(svrhadd,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrhadd_n_u8_zu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svrhadd_n_u8_z(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svrhadd_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_u8_z'}} return SVE_ACLE_FUNC(svrhadd,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u16_zu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svrhadd_n_u16_z(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svrhadd_n_u16_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_u16_z'}} return SVE_ACLE_FUNC(svrhadd,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u32_zu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svrhadd_n_u32_z(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svrhadd_n_u32_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_u32_z'}} return SVE_ACLE_FUNC(svrhadd,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u64_zu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svrhadd_n_u64_z(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svrhadd_n_u64_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_u64_z'}} return SVE_ACLE_FUNC(svrhadd,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svrhadd_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrhadd_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svrhadd_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_s8_x'}} return SVE_ACLE_FUNC(svrhadd,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrhadd_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svrhadd_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svrhadd_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_s16_x'}} return SVE_ACLE_FUNC(svrhadd,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrhadd_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrhadd_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svrhadd_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_s32_x'}} return SVE_ACLE_FUNC(svrhadd,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrhadd_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrhadd_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svrhadd_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_s64_x'}} return SVE_ACLE_FUNC(svrhadd,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svrhadd_u8_xu10__SVBool_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrhadd_u8_x(svbool_t pg, svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svrhadd_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_u8_x'}} return SVE_ACLE_FUNC(svrhadd,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrhadd_u16_xu10__SVBool_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svrhadd_u16_x(svbool_t pg, svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svrhadd_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_u16_x'}} return SVE_ACLE_FUNC(svrhadd,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrhadd_u32_xu10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrhadd_u32_x(svbool_t pg, svuint32_t op1, svuint32_t op2) { // CHECKA-LABEL: test_svrhadd_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_u32_x'}} return SVE_ACLE_FUNC(svrhadd,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrhadd_u64_xu10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrhadd_u64_x(svbool_t pg, svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svrhadd_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_u64_x'}} return SVE_ACLE_FUNC(svrhadd,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrhadd_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svrhadd_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svrhadd_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_s8_x'}} return SVE_ACLE_FUNC(svrhadd,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svrhadd_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svrhadd_n_s16_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_s16_x'}} return SVE_ACLE_FUNC(svrhadd,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svrhadd_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svrhadd_n_s32_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_s32_x'}} return SVE_ACLE_FUNC(svrhadd,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svrhadd_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svrhadd_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svrhadd_n_s64_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srhadd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_s64_x'}} return SVE_ACLE_FUNC(svrhadd,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrhadd_n_u8_xu10__SVBool_tu11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svrhadd_n_u8_x(svbool_t pg, svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svrhadd_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_u8_x'}} return SVE_ACLE_FUNC(svrhadd,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u16_xu10__SVBool_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svrhadd_n_u16_x(svbool_t pg, svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svrhadd_n_u16_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_u16_x'}} return SVE_ACLE_FUNC(svrhadd,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u32_xu10__SVBool_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svrhadd_n_u32_x(svbool_t pg, svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svrhadd_n_u32_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_u32_x'}} return SVE_ACLE_FUNC(svrhadd,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrhadd_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svrhadd_n_u64_xu10__SVBool_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svrhadd_n_u64_x(svbool_t pg, svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svrhadd_n_u64_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urhadd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrhadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svrhadd_n_u64_x'}} return SVE_ACLE_FUNC(svrhadd,_n_u64,_x,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c index 6df89c4aace8..4debc2d6555e 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshl.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,969 +14,557 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrshl_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svrshl_s8_zu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svrshl_s8_z(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svrshl_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_s8_z'}} return SVE_ACLE_FUNC(svrshl,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svrshl_s16_zu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svrshl_s16_z(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svrshl_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_s16_z'}} return SVE_ACLE_FUNC(svrshl,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svrshl_s32_zu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svrshl_s32_z(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svrshl_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_s32_z'}} return SVE_ACLE_FUNC(svrshl,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svrshl_s64_zu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svrshl_s64_z(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svrshl_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_s64_z'}} return SVE_ACLE_FUNC(svrshl,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z16test_svrshl_u8_zu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svrshl_u8_z(svbool_t pg, svuint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svrshl_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_u8_z'}} return SVE_ACLE_FUNC(svrshl,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svrshl_u16_zu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svrshl_u16_z(svbool_t pg, svuint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svrshl_u16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_u16_z'}} return SVE_ACLE_FUNC(svrshl,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svrshl_u32_zu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svrshl_u32_z(svbool_t pg, svuint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svrshl_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_u32_z'}} return SVE_ACLE_FUNC(svrshl,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z17test_svrshl_u64_zu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svrshl_u64_z(svbool_t pg, svuint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svrshl_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_u64_z'}} return SVE_ACLE_FUNC(svrshl,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svrshl_s8_mu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrshl_s8_m(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svrshl_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_s8_m'}} return SVE_ACLE_FUNC(svrshl,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrshl_s16_mu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svrshl_s16_m(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svrshl_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_s16_m'}} return SVE_ACLE_FUNC(svrshl,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrshl_s32_mu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrshl_s32_m(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svrshl_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_s32_m'}} return SVE_ACLE_FUNC(svrshl,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrshl_s64_mu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrshl_s64_m(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svrshl_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_s64_m'}} return SVE_ACLE_FUNC(svrshl,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svrshl_u8_mu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrshl_u8_m(svbool_t pg, svuint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svrshl_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_u8_m'}} return SVE_ACLE_FUNC(svrshl,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrshl_u16_mu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svrshl_u16_m(svbool_t pg, svuint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svrshl_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_u16_m'}} return SVE_ACLE_FUNC(svrshl,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrshl_u32_mu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrshl_u32_m(svbool_t pg, svuint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svrshl_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_u32_m'}} return SVE_ACLE_FUNC(svrshl,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrshl_u64_mu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrshl_u64_m(svbool_t pg, svuint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svrshl_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_u64_m'}} return SVE_ACLE_FUNC(svrshl,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svrshl_s8_xu10__SVBool_tu10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrshl_s8_x(svbool_t pg, svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svrshl_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_s8_x'}} return SVE_ACLE_FUNC(svrshl,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrshl_s16_xu10__SVBool_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svrshl_s16_x(svbool_t pg, svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svrshl_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_s16_x'}} return SVE_ACLE_FUNC(svrshl,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrshl_s32_xu10__SVBool_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrshl_s32_x(svbool_t pg, svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svrshl_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_s32_x'}} return SVE_ACLE_FUNC(svrshl,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrshl_s64_xu10__SVBool_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrshl_s64_x(svbool_t pg, svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svrshl_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_s64_x'}} return SVE_ACLE_FUNC(svrshl,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svrshl_u8_xu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrshl_u8_x(svbool_t pg, svuint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svrshl_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_u8_x'}} return SVE_ACLE_FUNC(svrshl,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrshl_u16_xu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svrshl_u16_x(svbool_t pg, svuint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svrshl_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_u16_x'}} return SVE_ACLE_FUNC(svrshl,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrshl_u32_xu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrshl_u32_x(svbool_t pg, svuint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svrshl_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_u32_x'}} return SVE_ACLE_FUNC(svrshl,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svrshl_u64_xu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrshl_u64_x(svbool_t pg, svuint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svrshl_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_u64_x'}} return SVE_ACLE_FUNC(svrshl,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svrshl_n_s8_zu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svrshl_n_s8_z(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svrshl_n_s8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_s8_z'}} return SVE_ACLE_FUNC(svrshl,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshl_n_s16_zu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svrshl_n_s16_z(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svrshl_n_s16_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_s16_z'}} return SVE_ACLE_FUNC(svrshl,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshl_n_s32_zu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svrshl_n_s32_z(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svrshl_n_s32_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_s32_z'}} return SVE_ACLE_FUNC(svrshl,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshl_n_s64_zu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svrshl_n_s64_z(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svrshl_n_s64_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_s64_z'}} return SVE_ACLE_FUNC(svrshl,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svrshl_n_u8_zu10__SVBool_tu11__SVUint8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svrshl_n_u8_z(svbool_t pg, svuint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svrshl_n_u8_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_u8_z'}} return SVE_ACLE_FUNC(svrshl,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshl_n_u16_zu10__SVBool_tu12__SVUint16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svrshl_n_u16_z(svbool_t pg, svuint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svrshl_n_u16_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_u16_z'}} return SVE_ACLE_FUNC(svrshl,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshl_n_u32_zu10__SVBool_tu12__SVUint32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svrshl_n_u32_z(svbool_t pg, svuint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svrshl_n_u32_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_u32_z'}} return SVE_ACLE_FUNC(svrshl,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshl_n_u64_zu10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svrshl_n_u64_z(svbool_t pg, svuint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svrshl_n_u64_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_u64_z'}} return SVE_ACLE_FUNC(svrshl,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrshl_n_s8_mu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svrshl_n_s8_m(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svrshl_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_s8_m'}} return SVE_ACLE_FUNC(svrshl,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshl_n_s16_mu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svrshl_n_s16_m(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svrshl_n_s16_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_s16_m'}} return SVE_ACLE_FUNC(svrshl,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshl_n_s32_mu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svrshl_n_s32_m(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svrshl_n_s32_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_s32_m'}} return SVE_ACLE_FUNC(svrshl,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshl_n_s64_mu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svrshl_n_s64_m(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svrshl_n_s64_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_s64_m'}} return SVE_ACLE_FUNC(svrshl,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrshl_n_u8_mu10__SVBool_tu11__SVUint8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svrshl_n_u8_m(svbool_t pg, svuint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svrshl_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_u8_m'}} return SVE_ACLE_FUNC(svrshl,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshl_n_u16_mu10__SVBool_tu12__SVUint16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svrshl_n_u16_m(svbool_t pg, svuint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svrshl_n_u16_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_u16_m'}} return SVE_ACLE_FUNC(svrshl,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshl_n_u32_mu10__SVBool_tu12__SVUint32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svrshl_n_u32_m(svbool_t pg, svuint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svrshl_n_u32_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_u32_m'}} return SVE_ACLE_FUNC(svrshl,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshl_n_u64_mu10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svrshl_n_u64_m(svbool_t pg, svuint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svrshl_n_u64_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_u64_m'}} return SVE_ACLE_FUNC(svrshl,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrshl_n_s8_xu10__SVBool_tu10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svrshl_n_s8_x(svbool_t pg, svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svrshl_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_s8_x'}} return SVE_ACLE_FUNC(svrshl,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshl_n_s16_xu10__SVBool_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svrshl_n_s16_x(svbool_t pg, svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svrshl_n_s16_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_s16_x'}} return SVE_ACLE_FUNC(svrshl,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshl_n_s32_xu10__SVBool_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svrshl_n_s32_x(svbool_t pg, svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svrshl_n_s32_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_s32_x'}} return SVE_ACLE_FUNC(svrshl,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshl_n_s64_xu10__SVBool_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svrshl_n_s64_x(svbool_t pg, svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svrshl_n_s64_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshl.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_s64_x'}} return SVE_ACLE_FUNC(svrshl,_n_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrshl_n_u8_xu10__SVBool_tu11__SVUint8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svrshl_n_u8_x(svbool_t pg, svuint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svrshl_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_u8_x'}} return SVE_ACLE_FUNC(svrshl,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshl_n_u16_xu10__SVBool_tu12__SVUint16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svrshl_n_u16_x(svbool_t pg, svuint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svrshl_n_u16_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_u16_x'}} return SVE_ACLE_FUNC(svrshl,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshl_n_u32_xu10__SVBool_tu12__SVUint32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svrshl_n_u32_x(svbool_t pg, svuint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svrshl_n_u32_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_u32_x'}} return SVE_ACLE_FUNC(svrshl,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svrshl_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshl_n_u64_xu10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svrshl_n_u64_x(svbool_t pg, svuint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svrshl_n_u64_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshl.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshl_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshl_n_u64_x'}} return SVE_ACLE_FUNC(svrshl,_n_u64,_x,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshr.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshr.c index 0ffac50e37f0..8923be452848 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshr.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshr.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,921 +14,533 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrshr_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG]], [[TMP0]], i32 1) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrshr_n_s8_zu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG]], [[TMP0]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svrshr_n_s8_z(svbool_t pg, svint8_t op1) { + // CHECK-LABEL: test_svrshr_n_s8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( %pg, %[[SEL]], i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s8_z'}} return SVE_ACLE_FUNC(svrshr,_n_s8,_z,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_s8_z_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG]], [[TMP0]], i32 8) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svrshr_n_s8_z_1u10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG]], [[TMP0]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svrshr_n_s8_z_1(svbool_t pg, svint8_t op1) { + // CHECK-LABEL: test_svrshr_n_s8_z_1 + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( %pg, %[[SEL]], i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s8_z'}} return SVE_ACLE_FUNC(svrshr,_n_s8,_z,)(pg, op1, 8); } -// CHECK-LABEL: @test_svrshr_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[TMP1]], i32 1) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshr_n_s16_zu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[TMP1]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svrshr_n_s16_z(svbool_t pg, svint16_t op1) { + // CHECK-LABEL: test_svrshr_n_s16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( %[[PG]], %[[SEL]], i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s16_z'}} return SVE_ACLE_FUNC(svrshr,_n_s16,_z,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_s16_z_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[TMP1]], i32 16) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshr_n_s16_z_1u10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[TMP1]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svrshr_n_s16_z_1(svbool_t pg, svint16_t op1) { + // CHECK-LABEL: test_svrshr_n_s16_z_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( %[[PG]], %[[SEL]], i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s16_z'}} return SVE_ACLE_FUNC(svrshr,_n_s16,_z,)(pg, op1, 16); } -// CHECK-LABEL: @test_svrshr_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[TMP1]], i32 1) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshr_n_s32_zu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[TMP1]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svrshr_n_s32_z(svbool_t pg, svint32_t op1) { + // CHECK-LABEL: test_svrshr_n_s32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( %[[PG]], %[[SEL]], i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s32_z'}} return SVE_ACLE_FUNC(svrshr,_n_s32,_z,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_s32_z_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[TMP1]], i32 32) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshr_n_s32_z_1u10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[TMP1]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svrshr_n_s32_z_1(svbool_t pg, svint32_t op1) { + // CHECK-LABEL: test_svrshr_n_s32_z_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( %[[PG]], %[[SEL]], i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s32_z'}} return SVE_ACLE_FUNC(svrshr,_n_s32,_z,)(pg, op1, 32); } -// CHECK-LABEL: @test_svrshr_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[TMP1]], i32 1) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshr_n_s64_zu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[TMP1]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svrshr_n_s64_z(svbool_t pg, svint64_t op1) { + // CHECK-LABEL: test_svrshr_n_s64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( %[[PG]], %[[SEL]], i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s64_z'}} return SVE_ACLE_FUNC(svrshr,_n_s64,_z,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_s64_z_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[TMP1]], i32 64) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshr_n_s64_z_1u10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[TMP1]], i32 64) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svrshr_n_s64_z_1(svbool_t pg, svint64_t op1) { + // CHECK-LABEL: test_svrshr_n_s64_z_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( %[[PG]], %[[SEL]], i32 64) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s64_z'}} return SVE_ACLE_FUNC(svrshr,_n_s64,_z,)(pg, op1, 64); } -// CHECK-LABEL: @test_svrshr_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG]], [[TMP0]], i32 1) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svrshr_n_u8_zu10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG]], [[TMP0]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svrshr_n_u8_z(svbool_t pg, svuint8_t op1) { + // CHECK-LABEL: test_svrshr_n_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( %pg, %[[SEL]], i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u8_z'}} return SVE_ACLE_FUNC(svrshr,_n_u8,_z,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_u8_z_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG]], [[TMP0]], i32 8) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svrshr_n_u8_z_1u10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG]], [[TMP0]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svrshr_n_u8_z_1(svbool_t pg, svuint8_t op1) { + // CHECK-LABEL: test_svrshr_n_u8_z_1 + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( %pg, %[[SEL]], i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u8_z'}} return SVE_ACLE_FUNC(svrshr,_n_u8,_z,)(pg, op1, 8); } -// CHECK-LABEL: @test_svrshr_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[TMP1]], i32 1) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshr_n_u16_zu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[TMP1]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svrshr_n_u16_z(svbool_t pg, svuint16_t op1) { + // CHECK-LABEL: test_svrshr_n_u16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( %[[PG]], %[[SEL]], i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u16_z'}} return SVE_ACLE_FUNC(svrshr,_n_u16,_z,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_u16_z_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[TMP1]], i32 16) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshr_n_u16_z_1u10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[TMP1]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svrshr_n_u16_z_1(svbool_t pg, svuint16_t op1) { + // CHECK-LABEL: test_svrshr_n_u16_z_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( %[[PG]], %[[SEL]], i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u16_z'}} return SVE_ACLE_FUNC(svrshr,_n_u16,_z,)(pg, op1, 16); } -// CHECK-LABEL: @test_svrshr_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[TMP1]], i32 1) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshr_n_u32_zu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[TMP1]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svrshr_n_u32_z(svbool_t pg, svuint32_t op1) { + // CHECK-LABEL: test_svrshr_n_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( %[[PG]], %[[SEL]], i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u32_z'}} return SVE_ACLE_FUNC(svrshr,_n_u32,_z,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_u32_z_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[TMP1]], i32 32) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshr_n_u32_z_1u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[TMP1]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svrshr_n_u32_z_1(svbool_t pg, svuint32_t op1) { + // CHECK-LABEL: test_svrshr_n_u32_z_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( %[[PG]], %[[SEL]], i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u32_z'}} return SVE_ACLE_FUNC(svrshr,_n_u32,_z,)(pg, op1, 32); } -// CHECK-LABEL: @test_svrshr_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[TMP1]], i32 1) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshr_n_u64_zu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[TMP1]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svrshr_n_u64_z(svbool_t pg, svuint64_t op1) { + // CHECK-LABEL: test_svrshr_n_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( %[[PG]], %[[SEL]], i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u64_z'}} return SVE_ACLE_FUNC(svrshr,_n_u64,_z,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_u64_z_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[TMP1]], i32 64) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshr_n_u64_z_1u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[TMP1]], i32 64) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svrshr_n_u64_z_1(svbool_t pg, svuint64_t op1) { + // CHECK-LABEL: test_svrshr_n_u64_z_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( %[[PG]], %[[SEL]], i32 64) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_z'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u64_z'}} return SVE_ACLE_FUNC(svrshr,_n_u64,_z,)(pg, op1, 64); } -// CHECK-LABEL: @test_svrshr_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svrshr_n_s8_mu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrshr_n_s8_m(svbool_t pg, svint8_t op1) { + // CHECK-LABEL: test_svrshr_n_s8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( %pg, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s8_m'}} return SVE_ACLE_FUNC(svrshr,_n_s8,_m,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_s8_m_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svrshr_n_s8_m_1u10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrshr_n_s8_m_1(svbool_t pg, svint8_t op1) { + // CHECK-LABEL: test_svrshr_n_s8_m_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( %pg, %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s8_m'}} return SVE_ACLE_FUNC(svrshr,_n_s8,_m,)(pg, op1, 8); } -// CHECK-LABEL: @test_svrshr_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshr_n_s16_mu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svrshr_n_s16_m(svbool_t pg, svint16_t op1) { + // CHECK-LABEL: test_svrshr_n_s16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( %[[PG]], %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s16_m'}} return SVE_ACLE_FUNC(svrshr,_n_s16,_m,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_s16_m_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshr_n_s16_m_1u10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svrshr_n_s16_m_1(svbool_t pg, svint16_t op1) { + // CHECK-LABEL: test_svrshr_n_s16_m_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( %[[PG]], %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s16_m'}} return SVE_ACLE_FUNC(svrshr,_n_s16,_m,)(pg, op1, 16); } -// CHECK-LABEL: @test_svrshr_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshr_n_s32_mu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrshr_n_s32_m(svbool_t pg, svint32_t op1) { + // CHECK-LABEL: test_svrshr_n_s32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( %[[PG]], %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s32_m'}} return SVE_ACLE_FUNC(svrshr,_n_s32,_m,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_s32_m_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshr_n_s32_m_1u10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrshr_n_s32_m_1(svbool_t pg, svint32_t op1) { + // CHECK-LABEL: test_svrshr_n_s32_m_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( %[[PG]], %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s32_m'}} return SVE_ACLE_FUNC(svrshr,_n_s32,_m,)(pg, op1, 32); } -// CHECK-LABEL: @test_svrshr_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshr_n_s64_mu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrshr_n_s64_m(svbool_t pg, svint64_t op1) { + // CHECK-LABEL: test_svrshr_n_s64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( %[[PG]], %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s64_m'}} return SVE_ACLE_FUNC(svrshr,_n_s64,_m,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_s64_m_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshr_n_s64_m_1u10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrshr_n_s64_m_1(svbool_t pg, svint64_t op1) { + // CHECK-LABEL: test_svrshr_n_s64_m_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( %[[PG]], %op1, i32 64) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s64_m'}} return SVE_ACLE_FUNC(svrshr,_n_s64,_m,)(pg, op1, 64); } -// CHECK-LABEL: @test_svrshr_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svrshr_n_u8_mu10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrshr_n_u8_m(svbool_t pg, svuint8_t op1) { + // CHECK-LABEL: test_svrshr_n_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( %pg, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u8_m'}} return SVE_ACLE_FUNC(svrshr,_n_u8,_m,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_u8_m_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svrshr_n_u8_m_1u10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrshr_n_u8_m_1(svbool_t pg, svuint8_t op1) { + // CHECK-LABEL: test_svrshr_n_u8_m_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( %pg, %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u8_m'}} return SVE_ACLE_FUNC(svrshr,_n_u8,_m,)(pg, op1, 8); } -// CHECK-LABEL: @test_svrshr_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshr_n_u16_mu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svrshr_n_u16_m(svbool_t pg, svuint16_t op1) { + // CHECK-LABEL: test_svrshr_n_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( %[[PG]], %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u16_m'}} return SVE_ACLE_FUNC(svrshr,_n_u16,_m,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_u16_m_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshr_n_u16_m_1u10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svrshr_n_u16_m_1(svbool_t pg, svuint16_t op1) { + // CHECK-LABEL: test_svrshr_n_u16_m_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( %[[PG]], %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u16_m'}} return SVE_ACLE_FUNC(svrshr,_n_u16,_m,)(pg, op1, 16); } -// CHECK-LABEL: @test_svrshr_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshr_n_u32_mu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrshr_n_u32_m(svbool_t pg, svuint32_t op1) { + // CHECK-LABEL: test_svrshr_n_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( %[[PG]], %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u32_m'}} return SVE_ACLE_FUNC(svrshr,_n_u32,_m,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_u32_m_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshr_n_u32_m_1u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrshr_n_u32_m_1(svbool_t pg, svuint32_t op1) { + // CHECK-LABEL: test_svrshr_n_u32_m_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( %[[PG]], %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u32_m'}} return SVE_ACLE_FUNC(svrshr,_n_u32,_m,)(pg, op1, 32); } -// CHECK-LABEL: @test_svrshr_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshr_n_u64_mu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrshr_n_u64_m(svbool_t pg, svuint64_t op1) { + // CHECK-LABEL: test_svrshr_n_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( %[[PG]], %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u64_m'}} return SVE_ACLE_FUNC(svrshr,_n_u64,_m,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_u64_m_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshr_n_u64_m_1u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrshr_n_u64_m_1(svbool_t pg, svuint64_t op1) { + // CHECK-LABEL: test_svrshr_n_u64_m_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( %[[PG]], %op1, i32 64) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_m'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u64_m'}} return SVE_ACLE_FUNC(svrshr,_n_u64,_m,)(pg, op1, 64); } -// CHECK-LABEL: @test_svrshr_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svrshr_n_s8_xu10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrshr_n_s8_x(svbool_t pg, svint8_t op1) { + // CHECK-LABEL: test_svrshr_n_s8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( %pg, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s8_x'}} return SVE_ACLE_FUNC(svrshr,_n_s8,_x,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_s8_x_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svrshr_n_s8_x_1u10__SVBool_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrshr_n_s8_x_1(svbool_t pg, svint8_t op1) { + // CHECK-LABEL: test_svrshr_n_s8_x_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv16i8( %pg, %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s8_x'}} return SVE_ACLE_FUNC(svrshr,_n_s8,_x,)(pg, op1, 8); } -// CHECK-LABEL: @test_svrshr_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshr_n_s16_xu10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svrshr_n_s16_x(svbool_t pg, svint16_t op1) { + // CHECK-LABEL: test_svrshr_n_s16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( %[[PG]], %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s16_x'}} return SVE_ACLE_FUNC(svrshr,_n_s16,_x,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_s16_x_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshr_n_s16_x_1u10__SVBool_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svrshr_n_s16_x_1(svbool_t pg, svint16_t op1) { + // CHECK-LABEL: test_svrshr_n_s16_x_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv8i16( %[[PG]], %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s16_x'}} return SVE_ACLE_FUNC(svrshr,_n_s16,_x,)(pg, op1, 16); } -// CHECK-LABEL: @test_svrshr_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshr_n_s32_xu10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrshr_n_s32_x(svbool_t pg, svint32_t op1) { + // CHECK-LABEL: test_svrshr_n_s32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( %[[PG]], %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s32_x'}} return SVE_ACLE_FUNC(svrshr,_n_s32,_x,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_s32_x_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshr_n_s32_x_1u10__SVBool_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrshr_n_s32_x_1(svbool_t pg, svint32_t op1) { + // CHECK-LABEL: test_svrshr_n_s32_x_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv4i32( %[[PG]], %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s32_x'}} return SVE_ACLE_FUNC(svrshr,_n_s32,_x,)(pg, op1, 32); } -// CHECK-LABEL: @test_svrshr_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshr_n_s64_xu10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrshr_n_s64_x(svbool_t pg, svint64_t op1) { + // CHECK-LABEL: test_svrshr_n_s64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( %[[PG]], %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s64_x'}} return SVE_ACLE_FUNC(svrshr,_n_s64,_x,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_s64_x_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshr_n_s64_x_1u10__SVBool_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svrshr_n_s64_x_1(svbool_t pg, svint64_t op1) { + // CHECK-LABEL: test_svrshr_n_s64_x_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srshr.nxv2i64( %[[PG]], %op1, i32 64) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_s64_x'}} return SVE_ACLE_FUNC(svrshr,_n_s64,_x,)(pg, op1, 64); } -// CHECK-LABEL: @test_svrshr_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svrshr_n_u8_xu10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrshr_n_u8_x(svbool_t pg, svuint8_t op1) { + // CHECK-LABEL: test_svrshr_n_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( %pg, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u8_x'}} return SVE_ACLE_FUNC(svrshr,_n_u8,_x,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_u8_x_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svrshr_n_u8_x_1u10__SVBool_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( [[PG:%.*]], [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrshr_n_u8_x_1(svbool_t pg, svuint8_t op1) { + // CHECK-LABEL: test_svrshr_n_u8_x_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv16i8( %pg, %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u8_x'}} return SVE_ACLE_FUNC(svrshr,_n_u8,_x,)(pg, op1, 8); } -// CHECK-LABEL: @test_svrshr_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshr_n_u16_xu10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svrshr_n_u16_x(svbool_t pg, svuint16_t op1) { + // CHECK-LABEL: test_svrshr_n_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( %[[PG]], %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u16_x'}} return SVE_ACLE_FUNC(svrshr,_n_u16,_x,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_u16_x_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshr_n_u16_x_1u10__SVBool_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( [[TMP0]], [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svrshr_n_u16_x_1(svbool_t pg, svuint16_t op1) { + // CHECK-LABEL: test_svrshr_n_u16_x_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv8i16( %[[PG]], %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u16_x'}} return SVE_ACLE_FUNC(svrshr,_n_u16,_x,)(pg, op1, 16); } -// CHECK-LABEL: @test_svrshr_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshr_n_u32_xu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrshr_n_u32_x(svbool_t pg, svuint32_t op1) { + // CHECK-LABEL: test_svrshr_n_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( %[[PG]], %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u32_x'}} return SVE_ACLE_FUNC(svrshr,_n_u32,_x,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_u32_x_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshr_n_u32_x_1u10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( [[TMP0]], [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrshr_n_u32_x_1(svbool_t pg, svuint32_t op1) { + // CHECK-LABEL: test_svrshr_n_u32_x_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv4i32( %[[PG]], %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u32_x'}} return SVE_ACLE_FUNC(svrshr,_n_u32,_x,)(pg, op1, 32); } -// CHECK-LABEL: @test_svrshr_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshr_n_u64_xu10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrshr_n_u64_x(svbool_t pg, svuint64_t op1) { + // CHECK-LABEL: test_svrshr_n_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( %[[PG]], %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u64_x'}} return SVE_ACLE_FUNC(svrshr,_n_u64,_x,)(pg, op1, 1); } -// CHECK-LABEL: @test_svrshr_n_u64_x_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshr_n_u64_x_1u10__SVBool_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( [[TMP0]], [[OP1:%.*]], i32 64) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svrshr_n_u64_x_1(svbool_t pg, svuint64_t op1) { + // CHECK-LABEL: test_svrshr_n_u64_x_1 + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.urshr.nxv2i64( %[[PG]], %op1, i32 64) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshr_x'}} // expected-warning@+1 {{implicit declaration of function 'svrshr_n_u64_x'}} return SVE_ACLE_FUNC(svrshr,_n_u64,_x,)(pg, op1, 64); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnb.c index 0c227a431c75..031c1381536d 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,205 +14,121 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrshrnb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshrnb_n_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrshrnb_n_s16(svint16_t op1) { + // CHECK-LABEL: test_svrshrnb_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnb_n_s16'}} return SVE_ACLE_FUNC(svrshrnb,_n_s16,,)(op1, 1); } -// CHECK-LABEL: @test_svrshrnb_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshrnb_n_s16_1u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrshrnb_n_s16_1(svint16_t op1) { + // CHECK-LABEL: test_svrshrnb_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnb_n_s16'}} return SVE_ACLE_FUNC(svrshrnb,_n_s16,,)(op1, 8); } -// CHECK-LABEL: @test_svrshrnb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshrnb_n_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svrshrnb_n_s32(svint32_t op1) { + // CHECK-LABEL: test_svrshrnb_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnb_n_s32'}} return SVE_ACLE_FUNC(svrshrnb,_n_s32,,)(op1, 1); } -// CHECK-LABEL: @test_svrshrnb_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshrnb_n_s32_1u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svrshrnb_n_s32_1(svint32_t op1) { + // CHECK-LABEL: test_svrshrnb_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnb_n_s32'}} return SVE_ACLE_FUNC(svrshrnb,_n_s32,,)(op1, 16); } -// CHECK-LABEL: @test_svrshrnb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshrnb_n_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svrshrnb_n_s64(svint64_t op1) { + // CHECK-LABEL: test_svrshrnb_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnb_n_s64'}} return SVE_ACLE_FUNC(svrshrnb,_n_s64,,)(op1, 1); } -// CHECK-LABEL: @test_svrshrnb_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshrnb_n_s64_1u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svrshrnb_n_s64_1(svint64_t op1) { + // CHECK-LABEL: test_svrshrnb_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnb_n_s64'}} return SVE_ACLE_FUNC(svrshrnb,_n_s64,,)(op1, 32); } -// CHECK-LABEL: @test_svrshrnb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshrnb_n_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrshrnb_n_u16(svuint16_t op1) { + // CHECK-LABEL: test_svrshrnb_n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnb_n_u16'}} return SVE_ACLE_FUNC(svrshrnb,_n_u16,,)(op1, 1); } -// CHECK-LABEL: @test_svrshrnb_n_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshrnb_n_u16_1u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrshrnb_n_u16_1(svuint16_t op1) { + // CHECK-LABEL: test_svrshrnb_n_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnb.nxv8i16( %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnb_n_u16'}} return SVE_ACLE_FUNC(svrshrnb,_n_u16,,)(op1, 8); } -// CHECK-LABEL: @test_svrshrnb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshrnb_n_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svrshrnb_n_u32(svuint32_t op1) { + // CHECK-LABEL: test_svrshrnb_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnb_n_u32'}} return SVE_ACLE_FUNC(svrshrnb,_n_u32,,)(op1, 1); } -// CHECK-LABEL: @test_svrshrnb_n_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshrnb_n_u32_1u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svrshrnb_n_u32_1(svuint32_t op1) { + // CHECK-LABEL: test_svrshrnb_n_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnb.nxv4i32( %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnb_n_u32'}} return SVE_ACLE_FUNC(svrshrnb,_n_u32,,)(op1, 16); } -// CHECK-LABEL: @test_svrshrnb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshrnb_n_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svrshrnb_n_u64(svuint64_t op1) { + // CHECK-LABEL: test_svrshrnb_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnb_n_u64'}} return SVE_ACLE_FUNC(svrshrnb,_n_u64,,)(op1, 1); } -// CHECK-LABEL: @test_svrshrnb_n_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshrnb_n_u64_1u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svrshrnb_n_u64_1(svuint64_t op1) { + // CHECK-LABEL: test_svrshrnb_n_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnb.nxv2i64( %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnb_n_u64'}} return SVE_ACLE_FUNC(svrshrnb,_n_u64,,)(op1, 32); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnt.c index fbc26c2b27af..a46ac59b7c4b 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rshrnt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,205 +14,121 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrshrnt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshrnt_n_s16u10__SVInt8_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrshrnt_n_s16(svint8_t op, svint16_t op1) { + // CHECK-LABEL: test_svrshrnt_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnt_n_s16'}} return SVE_ACLE_FUNC(svrshrnt,_n_s16,,)(op, op1, 1); } -// CHECK-LABEL: @test_svrshrnt_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshrnt_n_s16_1u10__SVInt8_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrshrnt_n_s16_1(svint8_t op, svint16_t op1) { + // CHECK-LABEL: test_svrshrnt_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( %op, %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnt_n_s16'}} return SVE_ACLE_FUNC(svrshrnt,_n_s16,,)(op, op1, 8); } -// CHECK-LABEL: @test_svrshrnt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshrnt_n_s32u11__SVInt16_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svrshrnt_n_s32(svint16_t op, svint32_t op1) { + // CHECK-LABEL: test_svrshrnt_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnt_n_s32'}} return SVE_ACLE_FUNC(svrshrnt,_n_s32,,)(op, op1, 1); } -// CHECK-LABEL: @test_svrshrnt_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshrnt_n_s32_1u11__SVInt16_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svrshrnt_n_s32_1(svint16_t op, svint32_t op1) { + // CHECK-LABEL: test_svrshrnt_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( %op, %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnt_n_s32'}} return SVE_ACLE_FUNC(svrshrnt,_n_s32,,)(op, op1, 16); } -// CHECK-LABEL: @test_svrshrnt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshrnt_n_s64u11__SVInt32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svrshrnt_n_s64(svint32_t op, svint64_t op1) { + // CHECK-LABEL: test_svrshrnt_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnt_n_s64'}} return SVE_ACLE_FUNC(svrshrnt,_n_s64,,)(op, op1, 1); } -// CHECK-LABEL: @test_svrshrnt_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshrnt_n_s64_1u11__SVInt32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svrshrnt_n_s64_1(svint32_t op, svint64_t op1) { + // CHECK-LABEL: test_svrshrnt_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( %op, %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnt_n_s64'}} return SVE_ACLE_FUNC(svrshrnt,_n_s64,,)(op, op1, 32); } -// CHECK-LABEL: @test_svrshrnt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshrnt_n_u16u11__SVUint8_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrshrnt_n_u16(svuint8_t op, svuint16_t op1) { + // CHECK-LABEL: test_svrshrnt_n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnt_n_u16'}} return SVE_ACLE_FUNC(svrshrnt,_n_u16,,)(op, op1, 1); } -// CHECK-LABEL: @test_svrshrnt_n_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshrnt_n_u16_1u11__SVUint8_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrshrnt_n_u16_1(svuint8_t op, svuint16_t op1) { + // CHECK-LABEL: test_svrshrnt_n_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnt.nxv8i16( %op, %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnt_n_u16'}} return SVE_ACLE_FUNC(svrshrnt,_n_u16,,)(op, op1, 8); } -// CHECK-LABEL: @test_svrshrnt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshrnt_n_u32u12__SVUint16_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svrshrnt_n_u32(svuint16_t op, svuint32_t op1) { + // CHECK-LABEL: test_svrshrnt_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnt_n_u32'}} return SVE_ACLE_FUNC(svrshrnt,_n_u32,,)(op, op1, 1); } -// CHECK-LABEL: @test_svrshrnt_n_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshrnt_n_u32_1u12__SVUint16_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svrshrnt_n_u32_1(svuint16_t op, svuint32_t op1) { + // CHECK-LABEL: test_svrshrnt_n_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnt.nxv4i32( %op, %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnt_n_u32'}} return SVE_ACLE_FUNC(svrshrnt,_n_u32,,)(op, op1, 16); } -// CHECK-LABEL: @test_svrshrnt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svrshrnt_n_u64u12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svrshrnt_n_u64(svuint32_t op, svuint64_t op1) { + // CHECK-LABEL: test_svrshrnt_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnt_n_u64'}} return SVE_ACLE_FUNC(svrshrnt,_n_u64,,)(op, op1, 1); } -// CHECK-LABEL: @test_svrshrnt_n_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svrshrnt_n_u64_1u12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svrshrnt_n_u64_1(svuint32_t op, svuint64_t op1) { + // CHECK-LABEL: test_svrshrnt_n_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rshrnt.nxv2i64( %op, %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svrshrnt_n_u64'}} return SVE_ACLE_FUNC(svrshrnt,_n_u64,,)(op, op1, 32); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsqrte.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsqrte.c index 9cc80cad7af1..528c838d1fc5 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsqrte.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsqrte.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,58 +14,34 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrsqrte_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ursqrte.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrsqrte_u32_zu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ursqrte.nxv4i32( zeroinitializer, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrsqrte_u32_z(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svrsqrte_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ursqrte.nxv4i32( zeroinitializer, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsqrte_z'}} // expected-warning@+1 {{implicit declaration of function 'svrsqrte_u32_z'}} return SVE_ACLE_FUNC(svrsqrte,_u32,_z,)(pg, op); } -// CHECK-LABEL: @test_svrsqrte_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ursqrte.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrsqrte_u32_mu12__SVUint32_tu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ursqrte.nxv4i32( [[INACTIVE:%.*]], [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrsqrte_u32_m(svuint32_t inactive, svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svrsqrte_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ursqrte.nxv4i32( %inactive, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsqrte_m'}} // expected-warning@+1 {{implicit declaration of function 'svrsqrte_u32_m'}} return SVE_ACLE_FUNC(svrsqrte,_u32,_m,)(inactive, pg, op); } -// CHECK-LABEL: @test_svrsqrte_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ursqrte.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svrsqrte_u32_xu10__SVBool_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ursqrte.nxv4i32( undef, [[TMP0]], [[OP:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrsqrte_u32_x(svbool_t pg, svuint32_t op) { + // CHECK-LABEL: test_svrsqrte_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ursqrte.nxv4i32( undef, %[[PG]], %op) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsqrte_x'}} // expected-warning@+1 {{implicit declaration of function 'svrsqrte_u32_x'}} return SVE_ACLE_FUNC(svrsqrte,_u32,_x,)(pg, op); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsra.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsra.c index cc76cc6d7d6e..50af90afc5a9 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsra.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsra.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,273 +14,161 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrsra_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svrsra_n_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrsra_n_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svrsra_n_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srsra.nxv16i8( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsra'}} // expected-warning@+1 {{implicit declaration of function 'svrsra_n_s8'}} return SVE_ACLE_FUNC(svrsra,_n_s8,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svrsra_n_s8_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svrsra_n_s8_1u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrsra_n_s8_1(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svrsra_n_s8_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srsra.nxv16i8( %op1, %op2, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsra'}} // expected-warning@+1 {{implicit declaration of function 'svrsra_n_s8'}} return SVE_ACLE_FUNC(svrsra,_n_s8,,)(op1, op2, 8); } -// CHECK-LABEL: @test_svrsra_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svrsra_n_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svrsra_n_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svrsra_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srsra.nxv8i16( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsra'}} // expected-warning@+1 {{implicit declaration of function 'svrsra_n_s16'}} return SVE_ACLE_FUNC(svrsra,_n_s16,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svrsra_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svrsra_n_s16_1u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svrsra_n_s16_1(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svrsra_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srsra.nxv8i16( %op1, %op2, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsra'}} // expected-warning@+1 {{implicit declaration of function 'svrsra_n_s16'}} return SVE_ACLE_FUNC(svrsra,_n_s16,,)(op1, op2, 16); } -// CHECK-LABEL: @test_svrsra_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svrsra_n_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svrsra_n_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svrsra_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srsra.nxv4i32( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsra'}} // expected-warning@+1 {{implicit declaration of function 'svrsra_n_s32'}} return SVE_ACLE_FUNC(svrsra,_n_s32,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svrsra_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svrsra_n_s32_1u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svrsra_n_s32_1(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svrsra_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srsra.nxv4i32( %op1, %op2, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsra'}} // expected-warning@+1 {{implicit declaration of function 'svrsra_n_s32'}} return SVE_ACLE_FUNC(svrsra,_n_s32,,)(op1, op2, 32); } -// CHECK-LABEL: @test_svrsra_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svrsra_n_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svrsra_n_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svrsra_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srsra.nxv2i64( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsra'}} // expected-warning@+1 {{implicit declaration of function 'svrsra_n_s64'}} return SVE_ACLE_FUNC(svrsra,_n_s64,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svrsra_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svrsra_n_s64_1u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.srsra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svrsra_n_s64_1(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svrsra_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.srsra.nxv2i64( %op1, %op2, i32 64) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsra'}} // expected-warning@+1 {{implicit declaration of function 'svrsra_n_s64'}} return SVE_ACLE_FUNC(svrsra,_n_s64,,)(op1, op2, 64); } -// CHECK-LABEL: @test_svrsra_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svrsra_n_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrsra_n_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svrsra_n_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ursra.nxv16i8( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsra'}} // expected-warning@+1 {{implicit declaration of function 'svrsra_n_u8'}} return SVE_ACLE_FUNC(svrsra,_n_u8,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svrsra_n_u8_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svrsra_n_u8_1u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrsra_n_u8_1(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svrsra_n_u8_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ursra.nxv16i8( %op1, %op2, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsra'}} // expected-warning@+1 {{implicit declaration of function 'svrsra_n_u8'}} return SVE_ACLE_FUNC(svrsra,_n_u8,,)(op1, op2, 8); } -// CHECK-LABEL: @test_svrsra_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svrsra_n_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svrsra_n_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svrsra_n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ursra.nxv8i16( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsra'}} // expected-warning@+1 {{implicit declaration of function 'svrsra_n_u16'}} return SVE_ACLE_FUNC(svrsra,_n_u16,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svrsra_n_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svrsra_n_u16_1u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svrsra_n_u16_1(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svrsra_n_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ursra.nxv8i16( %op1, %op2, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsra'}} // expected-warning@+1 {{implicit declaration of function 'svrsra_n_u16'}} return SVE_ACLE_FUNC(svrsra,_n_u16,,)(op1, op2, 16); } -// CHECK-LABEL: @test_svrsra_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svrsra_n_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svrsra_n_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svrsra_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ursra.nxv4i32( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsra'}} // expected-warning@+1 {{implicit declaration of function 'svrsra_n_u32'}} return SVE_ACLE_FUNC(svrsra,_n_u32,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svrsra_n_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svrsra_n_u32_1u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svrsra_n_u32_1(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svrsra_n_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ursra.nxv4i32( %op1, %op2, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsra'}} // expected-warning@+1 {{implicit declaration of function 'svrsra_n_u32'}} return SVE_ACLE_FUNC(svrsra,_n_u32,,)(op1, op2, 32); } -// CHECK-LABEL: @test_svrsra_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svrsra_n_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svrsra_n_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svrsra_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ursra.nxv2i64( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsra'}} // expected-warning@+1 {{implicit declaration of function 'svrsra_n_u64'}} return SVE_ACLE_FUNC(svrsra,_n_u64,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svrsra_n_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z19test_svrsra_n_u64_1u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ursra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svrsra_n_u64_1(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svrsra_n_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ursra.nxv2i64( %op1, %op2, i32 64) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsra'}} // expected-warning@+1 {{implicit declaration of function 'svrsra_n_u64'}} return SVE_ACLE_FUNC(svrsra,_n_u64,,)(op1, op2, 64); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c index 10f81f0e6553..8e7532c66f26 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrsubhnb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svrsubhnb_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrsubhnb_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svrsubhnb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnb_s16'}} return SVE_ACLE_FUNC(svrsubhnb,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svrsubhnb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svrsubhnb_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svrsubhnb_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svrsubhnb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnb_s32'}} return SVE_ACLE_FUNC(svrsubhnb,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svrsubhnb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svrsubhnb_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svrsubhnb_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svrsubhnb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnb_s64'}} return SVE_ACLE_FUNC(svrsubhnb,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svrsubhnb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svrsubhnb_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrsubhnb_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svrsubhnb_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnb_u16'}} return SVE_ACLE_FUNC(svrsubhnb,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svrsubhnb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svrsubhnb_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svrsubhnb_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svrsubhnb_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnb_u32'}} return SVE_ACLE_FUNC(svrsubhnb,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svrsubhnb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svrsubhnb_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svrsubhnb_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svrsubhnb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnb_u64'}} return SVE_ACLE_FUNC(svrsubhnb,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svrsubhnb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svrsubhnb_n_s16u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svrsubhnb_n_s16(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svrsubhnb_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnb_n_s16'}} return SVE_ACLE_FUNC(svrsubhnb,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svrsubhnb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svrsubhnb_n_s32u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svrsubhnb_n_s32(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svrsubhnb_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnb_n_s32'}} return SVE_ACLE_FUNC(svrsubhnb,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svrsubhnb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svrsubhnb_n_s64u11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrsubhnb_n_s64(svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svrsubhnb_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnb_n_s64'}} return SVE_ACLE_FUNC(svrsubhnb,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svrsubhnb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svrsubhnb_n_u16u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svrsubhnb_n_u16(svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svrsubhnb_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnb_n_u16'}} return SVE_ACLE_FUNC(svrsubhnb,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svrsubhnb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svrsubhnb_n_u32u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svrsubhnb_n_u32(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svrsubhnb_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnb_n_u32'}} return SVE_ACLE_FUNC(svrsubhnb,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svrsubhnb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svrsubhnb_n_u64u12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrsubhnb_n_u64(svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svrsubhnb_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnb_n_u64'}} return SVE_ACLE_FUNC(svrsubhnb,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c index 27084aaba0d8..0ca5ca1ea1ef 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_rsubhnt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svrsubhnt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svrsubhnt_s16u10__SVInt8_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svrsubhnt_s16(svint8_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svrsubhnt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnt_s16'}} return SVE_ACLE_FUNC(svrsubhnt,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svrsubhnt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svrsubhnt_s32u11__SVInt16_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svrsubhnt_s32(svint16_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svrsubhnt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnt_s32'}} return SVE_ACLE_FUNC(svrsubhnt,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svrsubhnt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svrsubhnt_s64u11__SVInt32_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svrsubhnt_s64(svint32_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svrsubhnt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnt_s64'}} return SVE_ACLE_FUNC(svrsubhnt,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svrsubhnt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svrsubhnt_u16u11__SVUint8_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svrsubhnt_u16(svuint8_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svrsubhnt_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnt_u16'}} return SVE_ACLE_FUNC(svrsubhnt,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svrsubhnt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svrsubhnt_u32u12__SVUint16_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svrsubhnt_u32(svuint16_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svrsubhnt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnt_u32'}} return SVE_ACLE_FUNC(svrsubhnt,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svrsubhnt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svrsubhnt_u64u12__SVUint32_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svrsubhnt_u64(svuint32_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svrsubhnt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnt_u64'}} return SVE_ACLE_FUNC(svrsubhnt,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svrsubhnt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svrsubhnt_n_s16u10__SVInt8_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svrsubhnt_n_s16(svint8_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svrsubhnt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnt_n_s16'}} return SVE_ACLE_FUNC(svrsubhnt,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svrsubhnt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svrsubhnt_n_s32u11__SVInt16_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svrsubhnt_n_s32(svint16_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svrsubhnt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnt_n_s32'}} return SVE_ACLE_FUNC(svrsubhnt,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svrsubhnt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svrsubhnt_n_s64u11__SVInt32_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svrsubhnt_n_s64(svint32_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svrsubhnt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnt_n_s64'}} return SVE_ACLE_FUNC(svrsubhnt,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svrsubhnt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svrsubhnt_n_u16u11__SVUint8_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svrsubhnt_n_u16(svuint8_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svrsubhnt_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnt_n_u16'}} return SVE_ACLE_FUNC(svrsubhnt,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svrsubhnt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svrsubhnt_n_u32u12__SVUint16_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svrsubhnt_n_u32(svuint16_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svrsubhnt_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnt_n_u32'}} return SVE_ACLE_FUNC(svrsubhnt,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svrsubhnt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z20test_svrsubhnt_n_u64u12__SVUint32_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svrsubhnt_n_u64(svuint32_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svrsubhnt_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.rsubhnt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svrsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svrsubhnt_n_u64'}} return SVE_ACLE_FUNC(svrsubhnt,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c index 821bb94873fe..7686f3d6f1ed 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,73 +14,43 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsbclb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sbclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsbclb_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sbclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svsbclb_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svsbclb_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sbclb.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsbclb'}} // expected-warning@+1 {{implicit declaration of function 'svsbclb_u32'}} return SVE_ACLE_FUNC(svsbclb,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svsbclb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sbclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsbclb_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sbclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svsbclb_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svsbclb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sbclb.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsbclb'}} // expected-warning@+1 {{implicit declaration of function 'svsbclb_u64'}} return SVE_ACLE_FUNC(svsbclb,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svsbclb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsbclb_n_u32u12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svsbclb_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svsbclb_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sbclb.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsbclb'}} // expected-warning@+1 {{implicit declaration of function 'svsbclb_n_u32'}} return SVE_ACLE_FUNC(svsbclb,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svsbclb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsbclb_n_u64u12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svsbclb_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svsbclb_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sbclb.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsbclb'}} // expected-warning@+1 {{implicit declaration of function 'svsbclb_n_u64'}} return SVE_ACLE_FUNC(svsbclb,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c index 85d62531288c..a9c1f3a48251 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sbclt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,73 +14,43 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsbclt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sbclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsbclt_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sbclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svsbclt_u32(svuint32_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svsbclt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sbclt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsbclt'}} // expected-warning@+1 {{implicit declaration of function 'svsbclt_u32'}} return SVE_ACLE_FUNC(svsbclt,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svsbclt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sbclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsbclt_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sbclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svsbclt_u64(svuint64_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svsbclt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sbclt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsbclt'}} // expected-warning@+1 {{implicit declaration of function 'svsbclt_u64'}} return SVE_ACLE_FUNC(svsbclt,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svsbclt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsbclt_n_u32u12__SVUint32_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svsbclt_n_u32(svuint32_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svsbclt_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sbclt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsbclt'}} // expected-warning@+1 {{implicit declaration of function 'svsbclt_n_u32'}} return SVE_ACLE_FUNC(svsbclt,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svsbclt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsbclt_n_u64u12__SVUint64_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sbclt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svsbclt_n_u64(svuint64_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svsbclt_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sbclt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsbclt'}} // expected-warning@+1 {{implicit declaration of function 'svsbclt_n_u64'}} return SVE_ACLE_FUNC(svsbclt,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllb.c index de856500200b..4d457aab44e1 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,205 +14,121 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svshllb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv8i16( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshllb_n_s16u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv8i16( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svshllb_n_s16(svint8_t op1) { + // CHECK-LABEL: test_svshllb_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sshllb.nxv8i16( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllb'}} // expected-warning@+1 {{implicit declaration of function 'svshllb_n_s16'}} return SVE_ACLE_FUNC(svshllb,_n_s16,,)(op1, 0); } -// CHECK-LABEL: @test_svshllb_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv8i16( [[OP1:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshllb_n_s16_1u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv8i16( [[OP1:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svshllb_n_s16_1(svint8_t op1) { + // CHECK-LABEL: test_svshllb_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sshllb.nxv8i16( %op1, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllb'}} // expected-warning@+1 {{implicit declaration of function 'svshllb_n_s16'}} return SVE_ACLE_FUNC(svshllb,_n_s16,,)(op1, 7); } -// CHECK-LABEL: @test_svshllb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv4i32( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshllb_n_s32u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv4i32( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svshllb_n_s32(svint16_t op1) { + // CHECK-LABEL: test_svshllb_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sshllb.nxv4i32( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllb'}} // expected-warning@+1 {{implicit declaration of function 'svshllb_n_s32'}} return SVE_ACLE_FUNC(svshllb,_n_s32,,)(op1, 0); } -// CHECK-LABEL: @test_svshllb_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv4i32( [[OP1:%.*]], i32 15) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshllb_n_s32_1u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv4i32( [[OP1:%.*]], i32 15) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svshllb_n_s32_1(svint16_t op1) { + // CHECK-LABEL: test_svshllb_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sshllb.nxv4i32( %op1, i32 15) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllb'}} // expected-warning@+1 {{implicit declaration of function 'svshllb_n_s32'}} return SVE_ACLE_FUNC(svshllb,_n_s32,,)(op1, 15); } -// CHECK-LABEL: @test_svshllb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv2i64( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshllb_n_s64u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv2i64( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svshllb_n_s64(svint32_t op1) { + // CHECK-LABEL: test_svshllb_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sshllb.nxv2i64( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllb'}} // expected-warning@+1 {{implicit declaration of function 'svshllb_n_s64'}} return SVE_ACLE_FUNC(svshllb,_n_s64,,)(op1, 0); } -// CHECK-LABEL: @test_svshllb_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv2i64( [[OP1:%.*]], i32 31) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshllb_n_s64_1u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllb.nxv2i64( [[OP1:%.*]], i32 31) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svshllb_n_s64_1(svint32_t op1) { + // CHECK-LABEL: test_svshllb_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sshllb.nxv2i64( %op1, i32 31) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllb'}} // expected-warning@+1 {{implicit declaration of function 'svshllb_n_s64'}} return SVE_ACLE_FUNC(svshllb,_n_s64,,)(op1, 31); } -// CHECK-LABEL: @test_svshllb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv8i16( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshllb_n_u16u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv8i16( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svshllb_n_u16(svuint8_t op1) { + // CHECK-LABEL: test_svshllb_n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ushllb.nxv8i16( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllb'}} // expected-warning@+1 {{implicit declaration of function 'svshllb_n_u16'}} return SVE_ACLE_FUNC(svshllb,_n_u16,,)(op1, 0); } -// CHECK-LABEL: @test_svshllb_n_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv8i16( [[OP1:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshllb_n_u16_1u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv8i16( [[OP1:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svshllb_n_u16_1(svuint8_t op1) { + // CHECK-LABEL: test_svshllb_n_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ushllb.nxv8i16( %op1, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllb'}} // expected-warning@+1 {{implicit declaration of function 'svshllb_n_u16'}} return SVE_ACLE_FUNC(svshllb,_n_u16,,)(op1, 7); } -// CHECK-LABEL: @test_svshllb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv4i32( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshllb_n_u32u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv4i32( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svshllb_n_u32(svuint16_t op1) { + // CHECK-LABEL: test_svshllb_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ushllb.nxv4i32( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllb'}} // expected-warning@+1 {{implicit declaration of function 'svshllb_n_u32'}} return SVE_ACLE_FUNC(svshllb,_n_u32,,)(op1, 0); } -// CHECK-LABEL: @test_svshllb_n_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv4i32( [[OP1:%.*]], i32 15) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshllb_n_u32_1u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv4i32( [[OP1:%.*]], i32 15) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svshllb_n_u32_1(svuint16_t op1) { + // CHECK-LABEL: test_svshllb_n_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ushllb.nxv4i32( %op1, i32 15) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllb'}} // expected-warning@+1 {{implicit declaration of function 'svshllb_n_u32'}} return SVE_ACLE_FUNC(svshllb,_n_u32,,)(op1, 15); } -// CHECK-LABEL: @test_svshllb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv2i64( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshllb_n_u64u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv2i64( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svshllb_n_u64(svuint32_t op1) { + // CHECK-LABEL: test_svshllb_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ushllb.nxv2i64( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllb'}} // expected-warning@+1 {{implicit declaration of function 'svshllb_n_u64'}} return SVE_ACLE_FUNC(svshllb,_n_u64,,)(op1, 0); } -// CHECK-LABEL: @test_svshllb_n_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv2i64( [[OP1:%.*]], i32 31) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshllb_n_u64_1u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllb.nxv2i64( [[OP1:%.*]], i32 31) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svshllb_n_u64_1(svuint32_t op1) { + // CHECK-LABEL: test_svshllb_n_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ushllb.nxv2i64( %op1, i32 31) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllb'}} // expected-warning@+1 {{implicit declaration of function 'svshllb_n_u64'}} return SVE_ACLE_FUNC(svshllb,_n_u64,,)(op1, 31); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllt.c index fcf31d60e33b..2f78ad61545e 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shllt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,205 +14,121 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svshllt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv8i16( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshllt_n_s16u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv8i16( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svshllt_n_s16(svint8_t op1) { + // CHECK-LABEL: test_svshllt_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sshllt.nxv8i16( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllt'}} // expected-warning@+1 {{implicit declaration of function 'svshllt_n_s16'}} return SVE_ACLE_FUNC(svshllt,_n_s16,,)(op1, 0); } -// CHECK-LABEL: @test_svshllt_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv8i16( [[OP1:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshllt_n_s16_1u10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv8i16( [[OP1:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svshllt_n_s16_1(svint8_t op1) { + // CHECK-LABEL: test_svshllt_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sshllt.nxv8i16( %op1, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllt'}} // expected-warning@+1 {{implicit declaration of function 'svshllt_n_s16'}} return SVE_ACLE_FUNC(svshllt,_n_s16,,)(op1, 7); } -// CHECK-LABEL: @test_svshllt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv4i32( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshllt_n_s32u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv4i32( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svshllt_n_s32(svint16_t op1) { + // CHECK-LABEL: test_svshllt_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sshllt.nxv4i32( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllt'}} // expected-warning@+1 {{implicit declaration of function 'svshllt_n_s32'}} return SVE_ACLE_FUNC(svshllt,_n_s32,,)(op1, 0); } -// CHECK-LABEL: @test_svshllt_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv4i32( [[OP1:%.*]], i32 15) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshllt_n_s32_1u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv4i32( [[OP1:%.*]], i32 15) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svshllt_n_s32_1(svint16_t op1) { + // CHECK-LABEL: test_svshllt_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sshllt.nxv4i32( %op1, i32 15) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllt'}} // expected-warning@+1 {{implicit declaration of function 'svshllt_n_s32'}} return SVE_ACLE_FUNC(svshllt,_n_s32,,)(op1, 15); } -// CHECK-LABEL: @test_svshllt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv2i64( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshllt_n_s64u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv2i64( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svshllt_n_s64(svint32_t op1) { + // CHECK-LABEL: test_svshllt_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sshllt.nxv2i64( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllt'}} // expected-warning@+1 {{implicit declaration of function 'svshllt_n_s64'}} return SVE_ACLE_FUNC(svshllt,_n_s64,,)(op1, 0); } -// CHECK-LABEL: @test_svshllt_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv2i64( [[OP1:%.*]], i32 31) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshllt_n_s64_1u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sshllt.nxv2i64( [[OP1:%.*]], i32 31) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svshllt_n_s64_1(svint32_t op1) { + // CHECK-LABEL: test_svshllt_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sshllt.nxv2i64( %op1, i32 31) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllt'}} // expected-warning@+1 {{implicit declaration of function 'svshllt_n_s64'}} return SVE_ACLE_FUNC(svshllt,_n_s64,,)(op1, 31); } -// CHECK-LABEL: @test_svshllt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv8i16( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshllt_n_u16u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv8i16( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svshllt_n_u16(svuint8_t op1) { + // CHECK-LABEL: test_svshllt_n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ushllt.nxv8i16( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllt'}} // expected-warning@+1 {{implicit declaration of function 'svshllt_n_u16'}} return SVE_ACLE_FUNC(svshllt,_n_u16,,)(op1, 0); } -// CHECK-LABEL: @test_svshllt_n_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv8i16( [[OP1:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshllt_n_u16_1u11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv8i16( [[OP1:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svshllt_n_u16_1(svuint8_t op1) { + // CHECK-LABEL: test_svshllt_n_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ushllt.nxv8i16( %op1, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllt'}} // expected-warning@+1 {{implicit declaration of function 'svshllt_n_u16'}} return SVE_ACLE_FUNC(svshllt,_n_u16,,)(op1, 7); } -// CHECK-LABEL: @test_svshllt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv4i32( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshllt_n_u32u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv4i32( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svshllt_n_u32(svuint16_t op1) { + // CHECK-LABEL: test_svshllt_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ushllt.nxv4i32( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllt'}} // expected-warning@+1 {{implicit declaration of function 'svshllt_n_u32'}} return SVE_ACLE_FUNC(svshllt,_n_u32,,)(op1, 0); } -// CHECK-LABEL: @test_svshllt_n_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv4i32( [[OP1:%.*]], i32 15) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshllt_n_u32_1u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv4i32( [[OP1:%.*]], i32 15) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svshllt_n_u32_1(svuint16_t op1) { + // CHECK-LABEL: test_svshllt_n_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ushllt.nxv4i32( %op1, i32 15) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllt'}} // expected-warning@+1 {{implicit declaration of function 'svshllt_n_u32'}} return SVE_ACLE_FUNC(svshllt,_n_u32,,)(op1, 15); } -// CHECK-LABEL: @test_svshllt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv2i64( [[OP1:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshllt_n_u64u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv2i64( [[OP1:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svshllt_n_u64(svuint32_t op1) { + // CHECK-LABEL: test_svshllt_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ushllt.nxv2i64( %op1, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllt'}} // expected-warning@+1 {{implicit declaration of function 'svshllt_n_u64'}} return SVE_ACLE_FUNC(svshllt,_n_u64,,)(op1, 0); } -// CHECK-LABEL: @test_svshllt_n_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv2i64( [[OP1:%.*]], i32 31) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshllt_n_u64_1u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ushllt.nxv2i64( [[OP1:%.*]], i32 31) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svshllt_n_u64_1(svuint32_t op1) { + // CHECK-LABEL: test_svshllt_n_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ushllt.nxv2i64( %op1, i32 31) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshllt'}} // expected-warning@+1 {{implicit declaration of function 'svshllt_n_u64'}} return SVE_ACLE_FUNC(svshllt,_n_u64,,)(op1, 31); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnb.c index dec3e379bcb9..92837b904fc5 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,205 +14,121 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svshrnb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshrnb_n_s16u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svshrnb_n_s16(svint16_t op1) { + // CHECK-LABEL: test_svshrnb_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svshrnb_n_s16'}} return SVE_ACLE_FUNC(svshrnb,_n_s16,,)(op1, 1); } -// CHECK-LABEL: @test_svshrnb_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshrnb_n_s16_1u11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svshrnb_n_s16_1(svint16_t op1) { + // CHECK-LABEL: test_svshrnb_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svshrnb_n_s16'}} return SVE_ACLE_FUNC(svshrnb,_n_s16,,)(op1, 8); } -// CHECK-LABEL: @test_svshrnb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshrnb_n_s32u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svshrnb_n_s32(svint32_t op1) { + // CHECK-LABEL: test_svshrnb_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svshrnb_n_s32'}} return SVE_ACLE_FUNC(svshrnb,_n_s32,,)(op1, 1); } -// CHECK-LABEL: @test_svshrnb_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshrnb_n_s32_1u11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svshrnb_n_s32_1(svint32_t op1) { + // CHECK-LABEL: test_svshrnb_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svshrnb_n_s32'}} return SVE_ACLE_FUNC(svshrnb,_n_s32,,)(op1, 16); } -// CHECK-LABEL: @test_svshrnb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshrnb_n_s64u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svshrnb_n_s64(svint64_t op1) { + // CHECK-LABEL: test_svshrnb_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svshrnb_n_s64'}} return SVE_ACLE_FUNC(svshrnb,_n_s64,,)(op1, 1); } -// CHECK-LABEL: @test_svshrnb_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshrnb_n_s64_1u11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svshrnb_n_s64_1(svint64_t op1) { + // CHECK-LABEL: test_svshrnb_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svshrnb_n_s64'}} return SVE_ACLE_FUNC(svshrnb,_n_s64,,)(op1, 32); } -// CHECK-LABEL: @test_svshrnb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshrnb_n_u16u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svshrnb_n_u16(svuint16_t op1) { + // CHECK-LABEL: test_svshrnb_n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svshrnb_n_u16'}} return SVE_ACLE_FUNC(svshrnb,_n_u16,,)(op1, 1); } -// CHECK-LABEL: @test_svshrnb_n_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshrnb_n_u16_1u12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svshrnb_n_u16_1(svuint16_t op1) { + // CHECK-LABEL: test_svshrnb_n_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnb.nxv8i16( %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svshrnb_n_u16'}} return SVE_ACLE_FUNC(svshrnb,_n_u16,,)(op1, 8); } -// CHECK-LABEL: @test_svshrnb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshrnb_n_u32u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svshrnb_n_u32(svuint32_t op1) { + // CHECK-LABEL: test_svshrnb_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svshrnb_n_u32'}} return SVE_ACLE_FUNC(svshrnb,_n_u32,,)(op1, 1); } -// CHECK-LABEL: @test_svshrnb_n_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshrnb_n_u32_1u12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svshrnb_n_u32_1(svuint32_t op1) { + // CHECK-LABEL: test_svshrnb_n_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnb.nxv4i32( %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svshrnb_n_u32'}} return SVE_ACLE_FUNC(svshrnb,_n_u32,,)(op1, 16); } -// CHECK-LABEL: @test_svshrnb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshrnb_n_u64u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svshrnb_n_u64(svuint64_t op1) { + // CHECK-LABEL: test_svshrnb_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svshrnb_n_u64'}} return SVE_ACLE_FUNC(svshrnb,_n_u64,,)(op1, 1); } -// CHECK-LABEL: @test_svshrnb_n_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshrnb_n_u64_1u12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svshrnb_n_u64_1(svuint64_t op1) { + // CHECK-LABEL: test_svshrnb_n_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnb.nxv2i64( %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnb'}} // expected-warning@+1 {{implicit declaration of function 'svshrnb_n_u64'}} return SVE_ACLE_FUNC(svshrnb,_n_u64,,)(op1, 32); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnt.c index 8adddd82efe1..cd412035e8b9 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_shrnt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,205 +14,121 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svshrnt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshrnt_n_s16u10__SVInt8_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svshrnt_n_s16(svint8_t op, svint16_t op1) { + // CHECK-LABEL: test_svshrnt_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svshrnt_n_s16'}} return SVE_ACLE_FUNC(svshrnt,_n_s16,,)(op, op1, 1); } -// CHECK-LABEL: @test_svshrnt_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshrnt_n_s16_1u10__SVInt8_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svshrnt_n_s16_1(svint8_t op, svint16_t op1) { + // CHECK-LABEL: test_svshrnt_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( %op, %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svshrnt_n_s16'}} return SVE_ACLE_FUNC(svshrnt,_n_s16,,)(op, op1, 8); } -// CHECK-LABEL: @test_svshrnt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshrnt_n_s32u11__SVInt16_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svshrnt_n_s32(svint16_t op, svint32_t op1) { + // CHECK-LABEL: test_svshrnt_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svshrnt_n_s32'}} return SVE_ACLE_FUNC(svshrnt,_n_s32,,)(op, op1, 1); } -// CHECK-LABEL: @test_svshrnt_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshrnt_n_s32_1u11__SVInt16_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svshrnt_n_s32_1(svint16_t op, svint32_t op1) { + // CHECK-LABEL: test_svshrnt_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( %op, %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svshrnt_n_s32'}} return SVE_ACLE_FUNC(svshrnt,_n_s32,,)(op, op1, 16); } -// CHECK-LABEL: @test_svshrnt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshrnt_n_s64u11__SVInt32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svshrnt_n_s64(svint32_t op, svint64_t op1) { + // CHECK-LABEL: test_svshrnt_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svshrnt_n_s64'}} return SVE_ACLE_FUNC(svshrnt,_n_s64,,)(op, op1, 1); } -// CHECK-LABEL: @test_svshrnt_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshrnt_n_s64_1u11__SVInt32_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svshrnt_n_s64_1(svint32_t op, svint64_t op1) { + // CHECK-LABEL: test_svshrnt_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( %op, %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svshrnt_n_s64'}} return SVE_ACLE_FUNC(svshrnt,_n_s64,,)(op, op1, 32); } -// CHECK-LABEL: @test_svshrnt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshrnt_n_u16u11__SVUint8_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svshrnt_n_u16(svuint8_t op, svuint16_t op1) { + // CHECK-LABEL: test_svshrnt_n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svshrnt_n_u16'}} return SVE_ACLE_FUNC(svshrnt,_n_u16,,)(op, op1, 1); } -// CHECK-LABEL: @test_svshrnt_n_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshrnt_n_u16_1u11__SVUint8_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( [[OP:%.*]], [[OP1:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svshrnt_n_u16_1(svuint8_t op, svuint16_t op1) { + // CHECK-LABEL: test_svshrnt_n_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnt.nxv8i16( %op, %op1, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svshrnt_n_u16'}} return SVE_ACLE_FUNC(svshrnt,_n_u16,,)(op, op1, 8); } -// CHECK-LABEL: @test_svshrnt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshrnt_n_u32u12__SVUint16_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svshrnt_n_u32(svuint16_t op, svuint32_t op1) { + // CHECK-LABEL: test_svshrnt_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svshrnt_n_u32'}} return SVE_ACLE_FUNC(svshrnt,_n_u32,,)(op, op1, 1); } -// CHECK-LABEL: @test_svshrnt_n_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshrnt_n_u32_1u12__SVUint16_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( [[OP:%.*]], [[OP1:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svshrnt_n_u32_1(svuint16_t op, svuint32_t op1) { + // CHECK-LABEL: test_svshrnt_n_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnt.nxv4i32( %op, %op1, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svshrnt_n_u32'}} return SVE_ACLE_FUNC(svshrnt,_n_u32,,)(op, op1, 16); } -// CHECK-LABEL: @test_svshrnt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svshrnt_n_u64u12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svshrnt_n_u64(svuint32_t op, svuint64_t op1) { + // CHECK-LABEL: test_svshrnt_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( %op, %op1, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svshrnt_n_u64'}} return SVE_ACLE_FUNC(svshrnt,_n_u64,,)(op, op1, 1); } -// CHECK-LABEL: @test_svshrnt_n_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z20test_svshrnt_n_u64_1u12__SVUint32_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( [[OP:%.*]], [[OP1:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svshrnt_n_u64_1(svuint32_t op, svuint64_t op1) { + // CHECK-LABEL: test_svshrnt_n_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.shrnt.nxv2i64( %op, %op1, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svshrnt'}} // expected-warning@+1 {{implicit declaration of function 'svshrnt_n_u64'}} return SVE_ACLE_FUNC(svshrnt,_n_u64,,)(op, op1, 32); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sli.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sli.c index 49989bdde745..e30fa18f5a50 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sli.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sli.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,273 +14,161 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsli_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svsli_n_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svsli_n_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsli_n_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sli.nxv16i8( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsli'}} // expected-warning@+1 {{implicit declaration of function 'svsli_n_s8'}} return SVE_ACLE_FUNC(svsli,_n_s8,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svsli_n_s8_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsli_n_s8_1u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svsli_n_s8_1(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsli_n_s8_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sli.nxv16i8( %op1, %op2, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsli'}} // expected-warning@+1 {{implicit declaration of function 'svsli_n_s8'}} return SVE_ACLE_FUNC(svsli,_n_s8,,)(op1, op2, 7); } -// CHECK-LABEL: @test_svsli_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsli_n_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svsli_n_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsli_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sli.nxv8i16( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsli'}} // expected-warning@+1 {{implicit declaration of function 'svsli_n_s16'}} return SVE_ACLE_FUNC(svsli,_n_s16,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svsli_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 15) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsli_n_s16_1u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 15) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svsli_n_s16_1(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsli_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sli.nxv8i16( %op1, %op2, i32 15) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsli'}} // expected-warning@+1 {{implicit declaration of function 'svsli_n_s16'}} return SVE_ACLE_FUNC(svsli,_n_s16,,)(op1, op2, 15); } -// CHECK-LABEL: @test_svsli_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsli_n_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsli_n_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsli_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sli.nxv4i32( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsli'}} // expected-warning@+1 {{implicit declaration of function 'svsli_n_s32'}} return SVE_ACLE_FUNC(svsli,_n_s32,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svsli_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 31) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsli_n_s32_1u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 31) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsli_n_s32_1(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsli_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sli.nxv4i32( %op1, %op2, i32 31) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsli'}} // expected-warning@+1 {{implicit declaration of function 'svsli_n_s32'}} return SVE_ACLE_FUNC(svsli,_n_s32,,)(op1, op2, 31); } -// CHECK-LABEL: @test_svsli_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsli_n_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svsli_n_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svsli_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sli.nxv2i64( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsli'}} // expected-warning@+1 {{implicit declaration of function 'svsli_n_s64'}} return SVE_ACLE_FUNC(svsli,_n_s64,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svsli_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 63) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsli_n_s64_1u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 63) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svsli_n_s64_1(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svsli_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sli.nxv2i64( %op1, %op2, i32 63) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsli'}} // expected-warning@+1 {{implicit declaration of function 'svsli_n_s64'}} return SVE_ACLE_FUNC(svsli,_n_s64,,)(op1, op2, 63); } -// CHECK-LABEL: @test_svsli_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svsli_n_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svsli_n_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svsli_n_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sli.nxv16i8( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsli'}} // expected-warning@+1 {{implicit declaration of function 'svsli_n_u8'}} return SVE_ACLE_FUNC(svsli,_n_u8,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svsli_n_u8_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsli_n_u8_1u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 7) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svsli_n_u8_1(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svsli_n_u8_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sli.nxv16i8( %op1, %op2, i32 7) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsli'}} // expected-warning@+1 {{implicit declaration of function 'svsli_n_u8'}} return SVE_ACLE_FUNC(svsli,_n_u8,,)(op1, op2, 7); } -// CHECK-LABEL: @test_svsli_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsli_n_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svsli_n_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsli_n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sli.nxv8i16( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsli'}} // expected-warning@+1 {{implicit declaration of function 'svsli_n_u16'}} return SVE_ACLE_FUNC(svsli,_n_u16,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svsli_n_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 15) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsli_n_u16_1u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 15) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svsli_n_u16_1(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsli_n_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sli.nxv8i16( %op1, %op2, i32 15) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsli'}} // expected-warning@+1 {{implicit declaration of function 'svsli_n_u16'}} return SVE_ACLE_FUNC(svsli,_n_u16,,)(op1, op2, 15); } -// CHECK-LABEL: @test_svsli_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsli_n_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svsli_n_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsli_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sli.nxv4i32( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsli'}} // expected-warning@+1 {{implicit declaration of function 'svsli_n_u32'}} return SVE_ACLE_FUNC(svsli,_n_u32,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svsli_n_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 31) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsli_n_u32_1u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 31) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svsli_n_u32_1(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsli_n_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sli.nxv4i32( %op1, %op2, i32 31) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsli'}} // expected-warning@+1 {{implicit declaration of function 'svsli_n_u32'}} return SVE_ACLE_FUNC(svsli,_n_u32,,)(op1, op2, 31); } -// CHECK-LABEL: @test_svsli_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsli_n_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 0) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svsli_n_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svsli_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sli.nxv2i64( %op1, %op2, i32 0) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsli'}} // expected-warning@+1 {{implicit declaration of function 'svsli_n_u64'}} return SVE_ACLE_FUNC(svsli,_n_u64,,)(op1, op2, 0); } -// CHECK-LABEL: @test_svsli_n_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 63) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsli_n_u64_1u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sli.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 63) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svsli_n_u64_1(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svsli_n_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sli.nxv2i64( %op1, %op2, i32 63) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsli'}} // expected-warning@+1 {{implicit declaration of function 'svsli_n_u64'}} return SVE_ACLE_FUNC(svsli,_n_u64,,)(op1, op2, 63); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4e.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4e.c index 3ab3a2453d5e..b43b014cbee9 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4e.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4e.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-sm4 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-sm4 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-sm4 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-sm4 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-sm4 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-sm4 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,18 +14,11 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsm4e_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sm4e( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svsm4e_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sm4e( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svsm4e_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsm4e_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sm4e( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsm4e'}} // expected-warning@+1 {{implicit declaration of function 'svsm4e_u32'}} return SVE_ACLE_FUNC(svsm4e,_u32,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4ekey.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4ekey.c index d99aef16ee46..488e74e3b7b0 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4ekey.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sm4ekey.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-sm4 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-sm4 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2-sm4 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-sm4 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-sm4 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2-sm4 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,18 +14,11 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsm4ekey_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sm4ekey( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsm4ekey_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sm4ekey( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svsm4ekey_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsm4ekey_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sm4ekey( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsm4ekey'}} // expected-warning@+1 {{implicit declaration of function 'svsm4ekey_u32'}} return SVE_ACLE_FUNC(svsm4ekey,_u32,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c index bf162093c7de..fcb023320040 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sqadd.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s #include @@ -14,487 +13,278 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsqadd_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsqadd_u8_mu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svsqadd_u8_m(svbool_t pg, svuint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsqadd_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_u8_m'}} return SVE_ACLE_FUNC(svsqadd,_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsqadd_u16_mu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svsqadd_u16_m(svbool_t pg, svuint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsqadd_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_u16_m'}} return SVE_ACLE_FUNC(svsqadd,_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsqadd_u32_mu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svsqadd_u32_m(svbool_t pg, svuint32_t op1, svint32_t op2) { // CHECKA-LABEL: test_svsqadd_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_u32_m'}} return SVE_ACLE_FUNC(svsqadd,_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsqadd_u64_mu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svsqadd_u64_m(svbool_t pg, svuint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svsqadd_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_u64_m'}} return SVE_ACLE_FUNC(svsqadd,_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_n_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsqadd_n_u8_mu10__SVBool_tu11__SVUint8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svsqadd_n_u8_m(svbool_t pg, svuint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svsqadd_n_u8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_n_u8_m'}} return SVE_ACLE_FUNC(svsqadd,_n_u8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_n_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u16_mu10__SVBool_tu12__SVUint16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svsqadd_n_u16_m(svbool_t pg, svuint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svsqadd_n_u16_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_n_u16_m'}} return SVE_ACLE_FUNC(svsqadd,_n_u16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_n_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u32_mu10__SVBool_tu12__SVUint32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svsqadd_n_u32_m(svbool_t pg, svuint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svsqadd_n_u32_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_n_u32_m'}} return SVE_ACLE_FUNC(svsqadd,_n_u32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_n_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u64_mu10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svsqadd_n_u64_m(svbool_t pg, svuint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svsqadd_n_u64_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_n_u64_m'}} return SVE_ACLE_FUNC(svsqadd,_n_u64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svsqadd_u8_zu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svsqadd_u8_z(svbool_t pg, svuint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsqadd_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_u8_z'}} return SVE_ACLE_FUNC(svsqadd,_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsqadd_u16_zu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svsqadd_u16_z(svbool_t pg, svuint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsqadd_u16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_u16_z'}} return SVE_ACLE_FUNC(svsqadd,_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsqadd_u32_zu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svsqadd_u32_z(svbool_t pg, svuint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsqadd_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_u32_z'}} return SVE_ACLE_FUNC(svsqadd,_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svsqadd_u64_zu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svsqadd_u64_z(svbool_t pg, svuint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svsqadd_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_u64_z'}} return SVE_ACLE_FUNC(svsqadd,_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_n_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svsqadd_n_u8_zu10__SVBool_tu11__SVUint8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svsqadd_n_u8_z(svbool_t pg, svuint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svsqadd_n_u8_z + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_n_u8_z'}} return SVE_ACLE_FUNC(svsqadd,_n_u8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_n_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u16_zu10__SVBool_tu12__SVUint16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint16_t test_svsqadd_n_u16_z(svbool_t pg, svuint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svsqadd_n_u16_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_n_u16_z'}} return SVE_ACLE_FUNC(svsqadd,_n_u16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_n_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u32_zu10__SVBool_tu12__SVUint32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint32_t test_svsqadd_n_u32_z(svbool_t pg, svuint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svsqadd_n_u32_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_n_u32_z'}} return SVE_ACLE_FUNC(svsqadd,_n_u32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_n_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u64_zu10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svuint64_t test_svsqadd_n_u64_z(svbool_t pg, svuint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svsqadd_n_u64_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_n_u64_z'}} return SVE_ACLE_FUNC(svsqadd,_n_u64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsqadd_u8_xu10__SVBool_tu11__SVUint8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svsqadd_u8_x(svbool_t pg, svuint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsqadd_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_u8_x'}} return SVE_ACLE_FUNC(svsqadd,_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsqadd_u16_xu10__SVBool_tu12__SVUint16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svsqadd_u16_x(svbool_t pg, svuint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsqadd_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_u16_x'}} return SVE_ACLE_FUNC(svsqadd,_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsqadd_u32_xu10__SVBool_tu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svsqadd_u32_x(svbool_t pg, svuint32_t op1, svint32_t op2) { // CHECKA-LABEL: test_svsqadd_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_u32_x'}} return SVE_ACLE_FUNC(svsqadd,_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsqadd_u64_xu10__SVBool_tu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svsqadd_u64_x(svbool_t pg, svuint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svsqadd_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_u64_x'}} return SVE_ACLE_FUNC(svsqadd,_u64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_n_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsqadd_n_u8_xu10__SVBool_tu11__SVUint8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svsqadd_n_u8_x(svbool_t pg, svuint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svsqadd_n_u8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_n_u8_x'}} return SVE_ACLE_FUNC(svsqadd,_n_u8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_n_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u16_xu10__SVBool_tu12__SVUint16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svsqadd_n_u16_x(svbool_t pg, svuint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svsqadd_n_u16_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_n_u16_x'}} return SVE_ACLE_FUNC(svsqadd,_n_u16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_n_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u32_xu10__SVBool_tu12__SVUint32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svsqadd_n_u32_x(svbool_t pg, svuint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svsqadd_n_u32_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_n_u32_x'}} return SVE_ACLE_FUNC(svsqadd,_n_u32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svsqadd_n_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svsqadd_n_u64_xu10__SVBool_tu12__SVUint64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svsqadd_n_u64_x(svbool_t pg, svuint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svsqadd_n_u64_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usqadd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svsqadd_n_u64_x'}} return SVE_ACLE_FUNC(svsqadd,_n_u64,_x,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sra.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sra.c index 26805003303d..f99fce73698c 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sra.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sra.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,273 +14,161 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsra_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svsra_n_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svsra_n_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsra_n_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssra.nxv16i8( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsra'}} // expected-warning@+1 {{implicit declaration of function 'svsra_n_s8'}} return SVE_ACLE_FUNC(svsra,_n_s8,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svsra_n_s8_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsra_n_s8_1u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svsra_n_s8_1(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsra_n_s8_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssra.nxv16i8( %op1, %op2, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsra'}} // expected-warning@+1 {{implicit declaration of function 'svsra_n_s8'}} return SVE_ACLE_FUNC(svsra,_n_s8,,)(op1, op2, 8); } -// CHECK-LABEL: @test_svsra_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsra_n_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svsra_n_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsra_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssra.nxv8i16( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsra'}} // expected-warning@+1 {{implicit declaration of function 'svsra_n_s16'}} return SVE_ACLE_FUNC(svsra,_n_s16,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svsra_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsra_n_s16_1u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svsra_n_s16_1(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsra_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssra.nxv8i16( %op1, %op2, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsra'}} // expected-warning@+1 {{implicit declaration of function 'svsra_n_s16'}} return SVE_ACLE_FUNC(svsra,_n_s16,,)(op1, op2, 16); } -// CHECK-LABEL: @test_svsra_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsra_n_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsra_n_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsra_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssra.nxv4i32( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsra'}} // expected-warning@+1 {{implicit declaration of function 'svsra_n_s32'}} return SVE_ACLE_FUNC(svsra,_n_s32,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svsra_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsra_n_s32_1u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsra_n_s32_1(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsra_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssra.nxv4i32( %op1, %op2, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsra'}} // expected-warning@+1 {{implicit declaration of function 'svsra_n_s32'}} return SVE_ACLE_FUNC(svsra,_n_s32,,)(op1, op2, 32); } -// CHECK-LABEL: @test_svsra_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsra_n_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svsra_n_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svsra_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssra.nxv2i64( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsra'}} // expected-warning@+1 {{implicit declaration of function 'svsra_n_s64'}} return SVE_ACLE_FUNC(svsra,_n_s64,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svsra_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsra_n_s64_1u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svsra_n_s64_1(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svsra_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssra.nxv2i64( %op1, %op2, i32 64) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsra'}} // expected-warning@+1 {{implicit declaration of function 'svsra_n_s64'}} return SVE_ACLE_FUNC(svsra,_n_s64,,)(op1, op2, 64); } -// CHECK-LABEL: @test_svsra_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svsra_n_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svsra_n_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svsra_n_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usra.nxv16i8( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsra'}} // expected-warning@+1 {{implicit declaration of function 'svsra_n_u8'}} return SVE_ACLE_FUNC(svsra,_n_u8,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svsra_n_u8_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsra_n_u8_1u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svsra_n_u8_1(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svsra_n_u8_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usra.nxv16i8( %op1, %op2, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsra'}} // expected-warning@+1 {{implicit declaration of function 'svsra_n_u8'}} return SVE_ACLE_FUNC(svsra,_n_u8,,)(op1, op2, 8); } -// CHECK-LABEL: @test_svsra_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsra_n_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svsra_n_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsra_n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usra.nxv8i16( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsra'}} // expected-warning@+1 {{implicit declaration of function 'svsra_n_u16'}} return SVE_ACLE_FUNC(svsra,_n_u16,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svsra_n_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsra_n_u16_1u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svsra_n_u16_1(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsra_n_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usra.nxv8i16( %op1, %op2, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsra'}} // expected-warning@+1 {{implicit declaration of function 'svsra_n_u16'}} return SVE_ACLE_FUNC(svsra,_n_u16,,)(op1, op2, 16); } -// CHECK-LABEL: @test_svsra_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsra_n_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svsra_n_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsra_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usra.nxv4i32( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsra'}} // expected-warning@+1 {{implicit declaration of function 'svsra_n_u32'}} return SVE_ACLE_FUNC(svsra,_n_u32,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svsra_n_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsra_n_u32_1u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svsra_n_u32_1(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsra_n_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usra.nxv4i32( %op1, %op2, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsra'}} // expected-warning@+1 {{implicit declaration of function 'svsra_n_u32'}} return SVE_ACLE_FUNC(svsra,_n_u32,,)(op1, op2, 32); } -// CHECK-LABEL: @test_svsra_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsra_n_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svsra_n_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svsra_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usra.nxv2i64( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsra'}} // expected-warning@+1 {{implicit declaration of function 'svsra_n_u64'}} return SVE_ACLE_FUNC(svsra,_n_u64,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svsra_n_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsra_n_u64_1u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usra.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svsra_n_u64_1(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svsra_n_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usra.nxv2i64( %op1, %op2, i32 64) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsra'}} // expected-warning@+1 {{implicit declaration of function 'svsra_n_u64'}} return SVE_ACLE_FUNC(svsra,_n_u64,,)(op1, op2, 64); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sri.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sri.c index f6e0fe4d3885..5fd74b88c337 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sri.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sri.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,273 +14,161 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsri_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svsri_n_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svsri_n_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsri_n_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sri.nxv16i8( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsri'}} // expected-warning@+1 {{implicit declaration of function 'svsri_n_s8'}} return SVE_ACLE_FUNC(svsri,_n_s8,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svsri_n_s8_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsri_n_s8_1u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svsri_n_s8_1(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsri_n_s8_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sri.nxv16i8( %op1, %op2, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsri'}} // expected-warning@+1 {{implicit declaration of function 'svsri_n_s8'}} return SVE_ACLE_FUNC(svsri,_n_s8,,)(op1, op2, 8); } -// CHECK-LABEL: @test_svsri_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsri_n_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svsri_n_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsri_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sri.nxv8i16( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsri'}} // expected-warning@+1 {{implicit declaration of function 'svsri_n_s16'}} return SVE_ACLE_FUNC(svsri,_n_s16,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svsri_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsri_n_s16_1u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svsri_n_s16_1(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsri_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sri.nxv8i16( %op1, %op2, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsri'}} // expected-warning@+1 {{implicit declaration of function 'svsri_n_s16'}} return SVE_ACLE_FUNC(svsri,_n_s16,,)(op1, op2, 16); } -// CHECK-LABEL: @test_svsri_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsri_n_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsri_n_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsri_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sri.nxv4i32( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsri'}} // expected-warning@+1 {{implicit declaration of function 'svsri_n_s32'}} return SVE_ACLE_FUNC(svsri,_n_s32,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svsri_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsri_n_s32_1u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsri_n_s32_1(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsri_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sri.nxv4i32( %op1, %op2, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsri'}} // expected-warning@+1 {{implicit declaration of function 'svsri_n_s32'}} return SVE_ACLE_FUNC(svsri,_n_s32,,)(op1, op2, 32); } -// CHECK-LABEL: @test_svsri_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsri_n_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svsri_n_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svsri_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sri.nxv2i64( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsri'}} // expected-warning@+1 {{implicit declaration of function 'svsri_n_s64'}} return SVE_ACLE_FUNC(svsri,_n_s64,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svsri_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsri_n_s64_1u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svsri_n_s64_1(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svsri_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sri.nxv2i64( %op1, %op2, i32 64) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsri'}} // expected-warning@+1 {{implicit declaration of function 'svsri_n_s64'}} return SVE_ACLE_FUNC(svsri,_n_s64,,)(op1, op2, 64); } -// CHECK-LABEL: @test_svsri_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svsri_n_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svsri_n_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svsri_n_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sri.nxv16i8( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsri'}} // expected-warning@+1 {{implicit declaration of function 'svsri_n_u8'}} return SVE_ACLE_FUNC(svsri,_n_u8,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svsri_n_u8_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsri_n_u8_1u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svsri_n_u8_1(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svsri_n_u8_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sri.nxv16i8( %op1, %op2, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsri'}} // expected-warning@+1 {{implicit declaration of function 'svsri_n_u8'}} return SVE_ACLE_FUNC(svsri,_n_u8,,)(op1, op2, 8); } -// CHECK-LABEL: @test_svsri_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsri_n_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svsri_n_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsri_n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sri.nxv8i16( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsri'}} // expected-warning@+1 {{implicit declaration of function 'svsri_n_u16'}} return SVE_ACLE_FUNC(svsri,_n_u16,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svsri_n_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsri_n_u16_1u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svsri_n_u16_1(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsri_n_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sri.nxv8i16( %op1, %op2, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsri'}} // expected-warning@+1 {{implicit declaration of function 'svsri_n_u16'}} return SVE_ACLE_FUNC(svsri,_n_u16,,)(op1, op2, 16); } -// CHECK-LABEL: @test_svsri_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsri_n_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svsri_n_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsri_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sri.nxv4i32( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsri'}} // expected-warning@+1 {{implicit declaration of function 'svsri_n_u32'}} return SVE_ACLE_FUNC(svsri,_n_u32,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svsri_n_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsri_n_u32_1u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svsri_n_u32_1(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsri_n_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sri.nxv4i32( %op1, %op2, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsri'}} // expected-warning@+1 {{implicit declaration of function 'svsri_n_u32'}} return SVE_ACLE_FUNC(svsri,_n_u32,,)(op1, op2, 32); } -// CHECK-LABEL: @test_svsri_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsri_n_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svsri_n_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svsri_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sri.nxv2i64( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsri'}} // expected-warning@+1 {{implicit declaration of function 'svsri_n_u64'}} return SVE_ACLE_FUNC(svsri,_n_u64,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svsri_n_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svsri_n_u64_1u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sri.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svsri_n_u64_1(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svsri_n_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.sri.nxv2i64( %op1, %op2, i32 64) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsri'}} // expected-warning@+1 {{implicit declaration of function 'svsri_n_u64'}} return SVE_ACLE_FUNC(svsri,_n_u64,,)(op1, op2, 64); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1.c index df6f6c8578c5..6d24e3f272be 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,607 +14,337 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svstnt1_scatter_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svstnt1_scatter_u32base_s32u10__SVBool_tu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u32base_s32(svbool_t pg, svuint32_t bases, svint32_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u32base_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( %data, [[PG]], %bases, i64 0) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32base_s32'}} return SVE_ACLE_FUNC(svstnt1_scatter, _u32base, , _s32)(pg, bases, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svstnt1_scatter_u64base_s64u10__SVBool_tu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u64base_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( %data, [[PG]], %bases, i64 0) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64base_s64'}} return SVE_ACLE_FUNC(svstnt1_scatter, _u64base, , _s64)(pg, bases, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svstnt1_scatter_u32base_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u32base_u32(svbool_t pg, svuint32_t bases, svuint32_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u32base_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( %data, [[PG]], %bases, i64 0) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32base_u32'}} return SVE_ACLE_FUNC(svstnt1_scatter, _u32base, , _u32)(pg, bases, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svstnt1_scatter_u64base_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u64base_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( %data, [[PG]], %bases, i64 0) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64base_u64'}} return SVE_ACLE_FUNC(svstnt1_scatter, _u64base, , _u64)(pg, bases, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u32base_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svstnt1_scatter_u32base_f32u10__SVBool_tu12__SVUint32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u32base_f32(svbool_t pg, svuint32_t bases, svfloat32_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u32base_f32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( %data, [[PG]], %bases, i64 0) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32base_f32'}} return SVE_ACLE_FUNC(svstnt1_scatter, _u32base, , _f32)(pg, bases, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u64base_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z32test_svstnt1_scatter_u64base_f64u10__SVBool_tu12__SVUint64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u64base_f64(svbool_t pg, svuint64_t bases, svfloat64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u64base_f64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( %data, [[PG]], %bases, i64 0) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64base_f64'}} return SVE_ACLE_FUNC(svstnt1_scatter, _u64base, , _f64)(pg, bases, data); } -// CHECK-LABEL: @test_svstnt1_scatter_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z34test_svstnt1_scatter_s64offset_s64u10__SVBool_tPlu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_s64offset_s64(svbool_t pg, int64_t *base, svint64_t offsets, svint64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_s64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( %data, [[PG]], i64* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_s64offset_s64'}} return SVE_ACLE_FUNC(svstnt1_scatter_, s64, offset, _s64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1_scatter_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z34test_svstnt1_scatter_s64offset_u64u10__SVBool_tPmu11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_s64offset_u64(svbool_t pg, uint64_t *base, svint64_t offsets, svuint64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_s64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( %data, [[PG]], i64* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_s64offset_u64'}} return SVE_ACLE_FUNC(svstnt1_scatter_, s64, offset, _u64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1_scatter_s64offset_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z34test_svstnt1_scatter_s64offset_f64u10__SVBool_tPdu11__SVInt64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_s64offset_f64(svbool_t pg, float64_t *base, svint64_t offsets, svfloat64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_s64offset_f64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2f64( %data, [[PG]], double* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_s64offset_f64'}} return SVE_ACLE_FUNC(svstnt1_scatter_, s64, offset, _f64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z34test_svstnt1_scatter_u32offset_s32u10__SVBool_tPiu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u32offset_s32(svbool_t pg, int32_t *base, svuint32_t offsets, svint32_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u32offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i32( %data, [[PG]], i32* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32offset_s32'}} return SVE_ACLE_FUNC(svstnt1_scatter_, u32, offset, _s32)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z34test_svstnt1_scatter_u64offset_s64u10__SVBool_tPlu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u64offset_s64(svbool_t pg, int64_t *base, svuint64_t offsets, svint64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u64offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( %data, [[PG]], i64* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64offset_s64'}} return SVE_ACLE_FUNC(svstnt1_scatter_, u64, offset, _s64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z34test_svstnt1_scatter_u32offset_u32u10__SVBool_tPju12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i32( [[DATA:%.*]], [[TMP0]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u32offset_u32(svbool_t pg, uint32_t *base, svuint32_t offsets, svuint32_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u32offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i32( %data, [[PG]], i32* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32offset_u32'}} return SVE_ACLE_FUNC(svstnt1_scatter_, u32, offset, _u32)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z34test_svstnt1_scatter_u64offset_u64u10__SVBool_tPmu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u64offset_u64(svbool_t pg, uint64_t *base, svuint64_t offsets, svuint64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u64offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i64( %data, [[PG]], i64* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64offset_u64'}} return SVE_ACLE_FUNC(svstnt1_scatter_, u64, offset, _u64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u32offset_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z34test_svstnt1_scatter_u32offset_f32u10__SVBool_tPfu12__SVUint32_tu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4f32( [[DATA:%.*]], [[TMP0]], float* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u32offset_f32(svbool_t pg, float32_t *base, svuint32_t offsets, svfloat32_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u32offset_f32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4f32( %data, [[PG]], float* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32offset_f32'}} return SVE_ACLE_FUNC(svstnt1_scatter_, u32, offset, _f32)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u64offset_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z34test_svstnt1_scatter_u64offset_f64u10__SVBool_tPdu12__SVUint64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u64offset_f64(svbool_t pg, float64_t *base, svuint64_t offsets, svfloat64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u64offset_f64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2f64( %data, [[PG]], double* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64offset_f64'}} return SVE_ACLE_FUNC(svstnt1_scatter_, u64, offset, _f64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z39test_svstnt1_scatter_u32base_offset_s32u10__SVBool_tu12__SVUint32_tlu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset, svint32_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u32base_offset_s32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( %data, [[PG]], %bases, i64 %offset) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32base_offset_s32'}} return SVE_ACLE_FUNC(svstnt1_scatter, _u32base, _offset, _s32)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z39test_svstnt1_scatter_u64base_offset_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset, svint64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u64base_offset_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( %data, [[PG]], %bases, i64 %offset) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64base_offset_s64'}} return SVE_ACLE_FUNC(svstnt1_scatter, _u64base, _offset, _s64)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z39test_svstnt1_scatter_u32base_offset_u32u10__SVBool_tu12__SVUint32_tlu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset, svuint32_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u32base_offset_u32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( %data, [[PG]], %bases, i64 %offset) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32base_offset_u32'}} return SVE_ACLE_FUNC(svstnt1_scatter, _u32base, _offset, _u32)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z39test_svstnt1_scatter_u64base_offset_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset, svuint64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u64base_offset_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( %data, [[PG]], %bases, i64 %offset) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64base_offset_u64'}} return SVE_ACLE_FUNC(svstnt1_scatter, _u64base, _offset, _u64)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u32base_offset_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z39test_svstnt1_scatter_u32base_offset_f32u10__SVBool_tu12__SVUint32_tlu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u32base_offset_f32(svbool_t pg, svuint32_t bases, int64_t offset, svfloat32_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u32base_offset_f32 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( %data, [[PG]], %bases, i64 %offset) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32base_offset_f32'}} return SVE_ACLE_FUNC(svstnt1_scatter, _u32base, _offset, _f32)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u64base_offset_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z39test_svstnt1_scatter_u64base_offset_f64u10__SVBool_tu12__SVUint64_tlu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u64base_offset_f64(svbool_t pg, svuint64_t bases, int64_t offset, svfloat64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u64base_offset_f64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( %data, [[PG]], %bases, i64 %offset) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64base_offset_f64'}} return SVE_ACLE_FUNC(svstnt1_scatter, _u64base, _offset, _f64)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svstnt1_scatter_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z33test_svstnt1_scatter_s64index_s64u10__SVBool_tPlu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_s64index_s64(svbool_t pg, int64_t *base, svint64_t indices, svint64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_s64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( %data, [[PG]], i64* %base, %indices) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_s64index_s64'}} return SVE_ACLE_FUNC(svstnt1_scatter_, s64, index, _s64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svstnt1_scatter_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z33test_svstnt1_scatter_s64index_u64u10__SVBool_tPmu11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_s64index_u64(svbool_t pg, uint64_t *base, svint64_t indices, svuint64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_s64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( %data, [[PG]], i64* %base, %indices) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_s64index_u64'}} return SVE_ACLE_FUNC(svstnt1_scatter_, s64, index, _u64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svstnt1_scatter_s64index_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z33test_svstnt1_scatter_s64index_f64u10__SVBool_tPdu11__SVInt64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_s64index_f64(svbool_t pg, float64_t *base, svint64_t indices, svfloat64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_s64index_f64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2f64( %data, [[PG]], double* %base, %indices) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_s64index_f64'}} return SVE_ACLE_FUNC(svstnt1_scatter_, s64, index, _f64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z33test_svstnt1_scatter_u64index_s64u10__SVBool_tPlu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u64index_s64(svbool_t pg, int64_t *base, svuint64_t indices, svint64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u64index_s64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( %data, [[PG]], i64* %base, %indices) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64index_s64'}} return SVE_ACLE_FUNC(svstnt1_scatter_, u64, index, _s64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z33test_svstnt1_scatter_u64index_u64u10__SVBool_tPmu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( [[DATA:%.*]], [[TMP0]], i64* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u64index_u64(svbool_t pg, uint64_t *base, svuint64_t indices, svuint64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u64index_u64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i64( %data, [[PG]], i64* %base, %indices) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64index_u64'}} return SVE_ACLE_FUNC(svstnt1_scatter_, u64, index, _u64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u64index_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z33test_svstnt1_scatter_u64index_f64u10__SVBool_tPdu12__SVUint64_tu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2f64( [[DATA:%.*]], [[TMP0]], double* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u64index_f64(svbool_t pg, float64_t *base, svuint64_t indices, svfloat64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u64index_f64 + // CHECK: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2f64( %data, [[PG]], double* %base, %indices) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64index_f64'}} return SVE_ACLE_FUNC(svstnt1_scatter_, u64, index, _f64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u32base_index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z38test_svstnt1_scatter_u32base_index_s32u10__SVBool_tu12__SVUint32_tlu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index, svint32_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u32base_index_s32 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( %data, [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32base_index_s32'}} return SVE_ACLE_FUNC(svstnt1_scatter, _u32base, _index, _s32)(pg, bases, index, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z38test_svstnt1_scatter_u64base_index_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index, svint64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u64base_index_s64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 3 + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( %data, [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64base_index_s64'}} return SVE_ACLE_FUNC(svstnt1_scatter, _u64base, _index, _s64)(pg, bases, index, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u32base_index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z38test_svstnt1_scatter_u32base_index_u32u10__SVBool_tu12__SVUint32_tlu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index, svuint32_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u32base_index_u32 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i32.nxv4i32( %data, [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32base_index_u32'}} return SVE_ACLE_FUNC(svstnt1_scatter, _u32base, _index, _u32)(pg, bases, index, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z38test_svstnt1_scatter_u64base_index_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index, svuint64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u64base_index_u64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 3 + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i64.nxv2i64( %data, [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64base_index_u64'}} return SVE_ACLE_FUNC(svstnt1_scatter, _u64base, _index, _u64)(pg, bases, index, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u32base_index_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z38test_svstnt1_scatter_u32base_index_f32u10__SVBool_tu12__SVUint32_tlu13__SVFloat32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u32base_index_f32(svbool_t pg, svuint32_t bases, int64_t index, svfloat32_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u32base_index_f32 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4f32.nxv4i32( %data, [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u32base_index_f32'}} return SVE_ACLE_FUNC(svstnt1_scatter, _u32base, _index, _f32)(pg, bases, index, data); } -// CHECK-LABEL: @test_svstnt1_scatter_u64base_index_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z38test_svstnt1_scatter_u64base_index_f64u10__SVBool_tu12__SVUint64_tlu13__SVFloat64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = shl i64 [[INDEX:%.*]], 3 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( [[DATA:%.*]], [[TMP0]], [[BASES:%.*]], i64 [[TMP1]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1_scatter_u64base_index_f64(svbool_t pg, svuint64_t bases, int64_t index, svfloat64_t data) { + // CHECK-LABEL: test_svstnt1_scatter_u64base_index_f64 + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 3 + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2f64.nxv2i64( %data, [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1_scatter_u64base_index_f64'}} return SVE_ACLE_FUNC(svstnt1_scatter, _u64base, _index, _f64)(pg, bases, index, data); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1b.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1b.c index d118ff9997b7..e8ec536916de 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1b.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1b.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,281 +14,155 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svstnt1b_scatter_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z33test_svstnt1b_scatter_u32base_s32u10__SVBool_tu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1b_scatter_u32base_s32(svbool_t pg, svuint32_t bases, svint32_t data) { + // CHECK-LABEL: test_svstnt1b_scatter_u32base_s32 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TRUNC]], [[PG]], %bases, i64 0) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u32base_s32'}} return SVE_ACLE_FUNC(svstnt1b_scatter, _u32base, , _s32)(pg, bases, data); } -// CHECK-LABEL: @test_svstnt1b_scatter_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z33test_svstnt1b_scatter_u64base_s64u10__SVBool_tu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1b_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t data) { + // CHECK-LABEL: test_svstnt1b_scatter_u64base_s64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TRUNC]], [[PG]], %bases, i64 0) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u64base_s64'}} return SVE_ACLE_FUNC(svstnt1b_scatter, _u64base, , _s64)(pg, bases, data); } -// CHECK-LABEL: @test_svstnt1b_scatter_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z33test_svstnt1b_scatter_u32base_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1b_scatter_u32base_u32(svbool_t pg, svuint32_t bases, svuint32_t data) { + // CHECK-LABEL: test_svstnt1b_scatter_u32base_u32 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TRUNC]], [[PG]], %bases, i64 0) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u32base_u32'}} return SVE_ACLE_FUNC(svstnt1b_scatter, _u32base, , _u32)(pg, bases, data); } -// CHECK-LABEL: @test_svstnt1b_scatter_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z33test_svstnt1b_scatter_u64base_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1b_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t data) { + // CHECK-LABEL: test_svstnt1b_scatter_u64base_u64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TRUNC]], [[PG]], %bases, i64 0) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u64base_u64'}} return SVE_ACLE_FUNC(svstnt1b_scatter, _u64base, , _u64)(pg, bases, data); } -// CHECK-LABEL: @test_svstnt1b_scatter_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z35test_svstnt1b_scatter_s64offset_s64u10__SVBool_tPau11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1b_scatter_s64offset_s64(svbool_t pg, int8_t *base, svint64_t offsets, svint64_t data) { + // CHECK-LABEL: test_svstnt1b_scatter_s64offset_s64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TRUNC]], [[PG]], i8* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_s64offset_s64'}} return SVE_ACLE_FUNC(svstnt1b_scatter_, s64, offset, _s64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1b_scatter_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z35test_svstnt1b_scatter_s64offset_u64u10__SVBool_tPhu11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1b_scatter_s64offset_u64(svbool_t pg, uint8_t *base, svint64_t offsets, svuint64_t data) { + // CHECK-LABEL: test_svstnt1b_scatter_s64offset_u64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TRUNC]], [[PG]], i8* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_s64offset_u64'}} return SVE_ACLE_FUNC(svstnt1b_scatter_, s64, offset, _u64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1b_scatter_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z35test_svstnt1b_scatter_u32offset_s32u10__SVBool_tPau12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1b_scatter_u32offset_s32(svbool_t pg, int8_t *base, svuint32_t offsets, svint32_t data) { + // CHECK-LABEL: test_svstnt1b_scatter_u32offset_s32 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i8( [[TRUNC]], [[PG]], i8* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u32offset_s32'}} return SVE_ACLE_FUNC(svstnt1b_scatter_, u32, offset, _s32)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1b_scatter_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z35test_svstnt1b_scatter_u64offset_s64u10__SVBool_tPau12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1b_scatter_u64offset_s64(svbool_t pg, int8_t *base, svuint64_t offsets, svint64_t data) { + // CHECK-LABEL: test_svstnt1b_scatter_u64offset_s64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TRUNC]], [[PG]], i8* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u64offset_s64'}} return SVE_ACLE_FUNC(svstnt1b_scatter_, u64, offset, _s64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1b_scatter_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z35test_svstnt1b_scatter_u32offset_u32u10__SVBool_tPhu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1b_scatter_u32offset_u32(svbool_t pg, uint8_t *base, svuint32_t offsets, svuint32_t data) { + // CHECK-LABEL: test_svstnt1b_scatter_u32offset_u32 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i8( [[TRUNC]], [[PG]], i8* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u32offset_u32'}} return SVE_ACLE_FUNC(svstnt1b_scatter_, u32, offset, _u32)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1b_scatter_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z35test_svstnt1b_scatter_u64offset_u64u10__SVBool_tPhu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TMP0]], [[TMP1]], i8* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1b_scatter_u64offset_u64(svbool_t pg, uint8_t *base, svuint64_t offsets, svuint64_t data) { + // CHECK-LABEL: test_svstnt1b_scatter_u64offset_u64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i8( [[TRUNC]], [[PG]], i8* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u64offset_u64'}} return SVE_ACLE_FUNC(svstnt1b_scatter_, u64, offset, _u64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1b_scatter_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z40test_svstnt1b_scatter_u32base_offset_s32u10__SVBool_tu12__SVUint32_tlu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1b_scatter_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset, svint32_t data) { + // CHECK-LABEL: test_svstnt1b_scatter_u32base_offset_s32 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TRUNC]], [[PG]], %bases, i64 %offset) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u32base_offset_s32'}} return SVE_ACLE_FUNC(svstnt1b_scatter, _u32base, _offset, _s32)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svstnt1b_scatter_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z40test_svstnt1b_scatter_u64base_offset_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1b_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset, svint64_t data) { + // CHECK-LABEL: test_svstnt1b_scatter_u64base_offset_s64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TRUNC]], [[PG]], %bases, i64 %offset) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u64base_offset_s64'}} return SVE_ACLE_FUNC(svstnt1b_scatter, _u64base, _offset, _s64)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svstnt1b_scatter_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z40test_svstnt1b_scatter_u32base_offset_u32u10__SVBool_tu12__SVUint32_tlu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1b_scatter_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset, svuint32_t data) { + // CHECK-LABEL: test_svstnt1b_scatter_u32base_offset_u32 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i8.nxv4i32( [[TRUNC]], [[PG]], %bases, i64 %offset) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u32base_offset_u32'}} return SVE_ACLE_FUNC(svstnt1b_scatter, _u32base, _offset, _u32)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svstnt1b_scatter_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z40test_svstnt1b_scatter_u64base_offset_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1b_scatter_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset, svuint64_t data) { + // CHECK-LABEL: test_svstnt1b_scatter_u64base_offset_u64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i8.nxv2i64( [[TRUNC]], [[PG]], %bases, i64 %offset) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1b_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1b_scatter_u64base_offset_u64'}} return SVE_ACLE_FUNC(svstnt1b_scatter, _u64base, _offset, _u64)(pg, bases, offset, data); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1h.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1h.c index 498e7a9ef5b2..8463b55dcad4 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1h.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1h.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,449 +14,247 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svstnt1h_scatter_u32base_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z33test_svstnt1h_scatter_u32base_s32u10__SVBool_tu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_u32base_s32(svbool_t pg, svuint32_t bases, svint32_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_u32base_s32 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TRUNC]], [[PG]], %bases, i64 0) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u32base_s32'}} return SVE_ACLE_FUNC(svstnt1h_scatter, _u32base, , _s32)(pg, bases, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z33test_svstnt1h_scatter_u64base_s64u10__SVBool_tu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_u64base_s64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TRUNC]], [[PG]], %bases, i64 0) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64base_s64'}} return SVE_ACLE_FUNC(svstnt1h_scatter, _u64base, , _s64)(pg, bases, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_u32base_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z33test_svstnt1h_scatter_u32base_u32u10__SVBool_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_u32base_u32(svbool_t pg, svuint32_t bases, svuint32_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_u32base_u32 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TRUNC]], [[PG]], %bases, i64 0) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u32base_u32'}} return SVE_ACLE_FUNC(svstnt1h_scatter, _u32base, , _u32)(pg, bases, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z33test_svstnt1h_scatter_u64base_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_u64base_u64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TRUNC]], [[PG]], %bases, i64 0) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64base_u64'}} return SVE_ACLE_FUNC(svstnt1h_scatter, _u64base, , _u64)(pg, bases, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z35test_svstnt1h_scatter_s64offset_s64u10__SVBool_tPsu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_s64offset_s64(svbool_t pg, int16_t *base, svint64_t offsets, svint64_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_s64offset_s64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TRUNC]], [[PG]], i16* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_s64offset_s64'}} return SVE_ACLE_FUNC(svstnt1h_scatter_, s64, offset, _s64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z35test_svstnt1h_scatter_s64offset_u64u10__SVBool_tPtu11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_s64offset_u64(svbool_t pg, uint16_t *base, svint64_t offsets, svuint64_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_s64offset_u64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TRUNC]], [[PG]], i16* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_s64offset_u64'}} return SVE_ACLE_FUNC(svstnt1h_scatter_, s64, offset, _u64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_u32offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z35test_svstnt1h_scatter_u32offset_s32u10__SVBool_tPsu12__SVUint32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_u32offset_s32(svbool_t pg, int16_t *base, svuint32_t offsets, svint32_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_u32offset_s32 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i16( [[TRUNC]], [[PG]], i16* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u32offset_s32'}} return SVE_ACLE_FUNC(svstnt1h_scatter_, u32, offset, _s32)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z35test_svstnt1h_scatter_u64offset_s64u10__SVBool_tPsu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_u64offset_s64(svbool_t pg, int16_t *base, svuint64_t offsets, svint64_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_u64offset_s64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TRUNC]], [[PG]], i16* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64offset_s64'}} return SVE_ACLE_FUNC(svstnt1h_scatter_, u64, offset, _s64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_u32offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z35test_svstnt1h_scatter_u32offset_u32u10__SVBool_tPtu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_u32offset_u32(svbool_t pg, uint16_t *base, svuint32_t offsets, svuint32_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_u32offset_u32 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.uxtw.nxv4i16( [[TRUNC]], [[PG]], i16* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u32offset_u32'}} return SVE_ACLE_FUNC(svstnt1h_scatter_, u32, offset, _u32)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z35test_svstnt1h_scatter_u64offset_u64u10__SVBool_tPtu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_u64offset_u64(svbool_t pg, uint16_t *base, svuint64_t offsets, svuint64_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_u64offset_u64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i16( [[TRUNC]], [[PG]], i16* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64offset_u64'}} return SVE_ACLE_FUNC(svstnt1h_scatter_, u64, offset, _u64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_u32base_offset_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z40test_svstnt1h_scatter_u32base_offset_s32u10__SVBool_tu12__SVUint32_tlu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_u32base_offset_s32(svbool_t pg, svuint32_t bases, int64_t offset, svint32_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_u32base_offset_s32 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TRUNC]], [[PG]], %bases, i64 %offset) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u32base_offset_s32'}} return SVE_ACLE_FUNC(svstnt1h_scatter, _u32base, _offset, _s32)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z40test_svstnt1h_scatter_u64base_offset_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset, svint64_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_u64base_offset_s64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TRUNC]], [[PG]], %bases, i64 %offset) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64base_offset_s64'}} return SVE_ACLE_FUNC(svstnt1h_scatter, _u64base, _offset, _s64)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_u32base_offset_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z40test_svstnt1h_scatter_u32base_offset_u32u10__SVBool_tu12__SVUint32_tlu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_u32base_offset_u32(svbool_t pg, svuint32_t bases, int64_t offset, svuint32_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_u32base_offset_u32 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TRUNC]], [[PG]], %bases, i64 %offset) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u32base_offset_u32'}} return SVE_ACLE_FUNC(svstnt1h_scatter, _u32base, _offset, _u32)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z40test_svstnt1h_scatter_u64base_offset_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset, svuint64_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_u64base_offset_u64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TRUNC]], [[PG]], %bases, i64 %offset) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64base_offset_u64'}} return SVE_ACLE_FUNC(svstnt1h_scatter, _u64base, _offset, _u64)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z34test_svstnt1h_scatter_s64index_s64u10__SVBool_tPsu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_s64index_s64(svbool_t pg, int16_t *base, svint64_t indices, svint64_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_s64index_s64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TRUNC]], [[PG]], i16* %base, %indices) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_s64index_s64'}} return SVE_ACLE_FUNC(svstnt1h_scatter_, s64, index, _s64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z34test_svstnt1h_scatter_s64index_u64u10__SVBool_tPtu11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_s64index_u64(svbool_t pg, uint16_t *base, svint64_t indices, svuint64_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_s64index_u64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TRUNC]], [[PG]], i16* %base, %indices) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_s64index_u64'}} return SVE_ACLE_FUNC(svstnt1h_scatter_, s64, index, _u64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z34test_svstnt1h_scatter_u64index_s64u10__SVBool_tPsu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_u64index_s64(svbool_t pg, int16_t *base, svuint64_t indices, svint64_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_u64index_s64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TRUNC]], [[PG]], i16* %base, %indices) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64index_s64'}} return SVE_ACLE_FUNC(svstnt1h_scatter_, u64, index, _s64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z34test_svstnt1h_scatter_u64index_u64u10__SVBool_tPtu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TMP0]], [[TMP1]], i16* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_u64index_u64(svbool_t pg, uint16_t *base, svuint64_t indices, svuint64_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_u64index_u64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i16( [[TRUNC]], [[PG]], i16* %base, %indices) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64index_u64'}} return SVE_ACLE_FUNC(svstnt1h_scatter_, u64, index, _u64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_u32base_index_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z39test_svstnt1h_scatter_u32base_index_s32u10__SVBool_tu12__SVUint32_tlu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_u32base_index_s32(svbool_t pg, svuint32_t bases, int64_t index, svint32_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_u32base_index_s32 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TRUNC]], [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u32base_index_s32'}} return SVE_ACLE_FUNC(svstnt1h_scatter, _u32base, _index, _s32)(pg, bases, index, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z39test_svstnt1h_scatter_u64base_index_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index, svint64_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_u64base_index_s64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TRUNC]], [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64base_index_s64'}} return SVE_ACLE_FUNC(svstnt1h_scatter, _u64base, _index, _s64)(pg, bases, index, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_u32base_index_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z39test_svstnt1h_scatter_u32base_index_u32u10__SVBool_tu12__SVUint32_tlu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_u32base_index_u32(svbool_t pg, svuint32_t bases, int64_t index, svuint32_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_u32base_index_u32 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv4i16.nxv4i32( [[TRUNC]], [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u32base_index_u32'}} return SVE_ACLE_FUNC(svstnt1h_scatter, _u32base, _index, _u32)(pg, bases, index, data); } -// CHECK-LABEL: @test_svstnt1h_scatter_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z39test_svstnt1h_scatter_u64base_index_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 1 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1h_scatter_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index, svuint64_t data) { + // CHECK-LABEL: test_svstnt1h_scatter_u64base_index_u64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 1 + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i16.nxv2i64( [[TRUNC]], [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1h_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1h_scatter_u64base_index_u64'}} return SVE_ACLE_FUNC(svstnt1h_scatter, _u64base, _index, _u64)(pg, bases, index, data); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1w.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1w.c index 8ddba85d6f7d..561c3e14c1a3 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1w.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_stnt1w.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,285 +14,157 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svstnt1w_scatter_u64base_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z33test_svstnt1w_scatter_u64base_s64u10__SVBool_tu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1w_scatter_u64base_s64(svbool_t pg, svuint64_t bases, svint64_t data) { + // CHECK-LABEL: test_svstnt1w_scatter_u64base_s64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc [[DATA:%.*]] to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TRUNC]], [[PG]], %bases, i64 0) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64base_s64'}} return SVE_ACLE_FUNC(svstnt1w_scatter, _u64base, , _s64)(pg, bases, data); } -// CHECK-LABEL: @test_svstnt1w_scatter_u64base_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z33test_svstnt1w_scatter_u64base_u64u10__SVBool_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 0) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1w_scatter_u64base_u64(svbool_t pg, svuint64_t bases, svuint64_t data) { + // CHECK-LABEL: test_svstnt1w_scatter_u64base_u64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TRUNC]], [[PG]], %bases, i64 0) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64base_u64'}} return SVE_ACLE_FUNC(svstnt1w_scatter, _u64base, , _u64)(pg, bases, data); } -// CHECK-LABEL: @test_svstnt1w_scatter_s64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z35test_svstnt1w_scatter_s64offset_s64u10__SVBool_tPiu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1w_scatter_s64offset_s64(svbool_t pg, int32_t *base, svint64_t offsets, svint64_t data) { + // CHECK-LABEL: test_svstnt1w_scatter_s64offset_s64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TRUNC]], [[PG]], i32* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_s64offset_s64'}} return SVE_ACLE_FUNC(svstnt1w_scatter_, s64, offset, _s64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1w_scatter_s64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z35test_svstnt1w_scatter_s64offset_u64u10__SVBool_tPju11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1w_scatter_s64offset_u64(svbool_t pg, uint32_t *base, svint64_t offsets, svuint64_t data) { + // CHECK-LABEL: test_svstnt1w_scatter_s64offset_u64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TRUNC]], [[PG]], i32* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_s64offset_u64'}} return SVE_ACLE_FUNC(svstnt1w_scatter_, s64, offset, _u64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1w_scatter_u64offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z35test_svstnt1w_scatter_u64offset_s64u10__SVBool_tPiu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1w_scatter_u64offset_s64(svbool_t pg, int32_t *base, svuint64_t offsets, svint64_t data) { + // CHECK-LABEL: test_svstnt1w_scatter_u64offset_s64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TRUNC]], [[PG]], i32* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64offset_s64'}} return SVE_ACLE_FUNC(svstnt1w_scatter_, u64, offset, _s64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1w_scatter_u64offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z35test_svstnt1w_scatter_u64offset_u64u10__SVBool_tPju12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[OFFSETS:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1w_scatter_u64offset_u64(svbool_t pg, uint32_t *base, svuint64_t offsets, svuint64_t data) { + // CHECK-LABEL: test_svstnt1w_scatter_u64offset_u64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.nxv2i32( [[TRUNC]], [[PG]], i32* %base, %offsets) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64offset_u64'}} return SVE_ACLE_FUNC(svstnt1w_scatter_, u64, offset, _u64)(pg, base, offsets, data); } -// CHECK-LABEL: @test_svstnt1w_scatter_u64base_offset_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z40test_svstnt1w_scatter_u64base_offset_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1w_scatter_u64base_offset_s64(svbool_t pg, svuint64_t bases, int64_t offset, svint64_t data) { + // CHECK-LABEL: test_svstnt1w_scatter_u64base_offset_s64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TRUNC]], [[PG]], %bases, i64 %offset) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64base_offset_s64'}} return SVE_ACLE_FUNC(svstnt1w_scatter, _u64base, _offset, _s64)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svstnt1w_scatter_u64base_offset_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z40test_svstnt1w_scatter_u64base_offset_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[OFFSET:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1w_scatter_u64base_offset_u64(svbool_t pg, svuint64_t bases, int64_t offset, svuint64_t data) { + // CHECK-LABEL: test_svstnt1w_scatter_u64base_offset_u64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TRUNC]], [[PG]], %bases, i64 %offset) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_offset'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64base_offset_u64'}} return SVE_ACLE_FUNC(svstnt1w_scatter, _u64base, _offset, _u64)(pg, bases, offset, data); } -// CHECK-LABEL: @test_svstnt1w_scatter_s64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z34test_svstnt1w_scatter_s64index_s64u10__SVBool_tPiu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1w_scatter_s64index_s64(svbool_t pg, int32_t *base, svint64_t indices, svint64_t data) { + // CHECK-LABEL: test_svstnt1w_scatter_s64index_s64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TRUNC]], [[PG]], i32* %base, %indices) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_s64index_s64'}} return SVE_ACLE_FUNC(svstnt1w_scatter_, s64, index, _s64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svstnt1w_scatter_s64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z34test_svstnt1w_scatter_s64index_u64u10__SVBool_tPju11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1w_scatter_s64index_u64(svbool_t pg, uint32_t *base, svint64_t indices, svuint64_t data) { + // CHECK-LABEL: test_svstnt1w_scatter_s64index_u64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TRUNC]], [[PG]], i32* %base, %indices) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_s64index_u64'}} return SVE_ACLE_FUNC(svstnt1w_scatter_, s64, index, _u64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svstnt1w_scatter_u64index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z34test_svstnt1w_scatter_u64index_s64u10__SVBool_tPiu12__SVUint64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1w_scatter_u64index_s64(svbool_t pg, int32_t *base, svuint64_t indices, svint64_t data) { + // CHECK-LABEL: test_svstnt1w_scatter_u64index_s64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TRUNC]], [[PG]], i32* %base, %indices) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64index_s64'}} return SVE_ACLE_FUNC(svstnt1w_scatter_, u64, index, _s64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svstnt1w_scatter_u64index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z34test_svstnt1w_scatter_u64index_u64u10__SVBool_tPju12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TMP0]], [[TMP1]], i32* [[BASE:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1w_scatter_u64index_u64(svbool_t pg, uint32_t *base, svuint64_t indices, svuint64_t data) { + // CHECK-LABEL: test_svstnt1w_scatter_u64index_u64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.index.nxv2i32( [[TRUNC]], [[PG]], i32* %base, %indices) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64index_u64'}} return SVE_ACLE_FUNC(svstnt1w_scatter_, u64, index, _u64)(pg, base, indices, data); } -// CHECK-LABEL: @test_svstnt1w_scatter_u64base_index_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z39test_svstnt1w_scatter_u64base_index_s64u10__SVBool_tu12__SVUint64_tlu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1w_scatter_u64base_index_s64(svbool_t pg, svuint64_t bases, int64_t index, svint64_t data) { + // CHECK-LABEL: test_svstnt1w_scatter_u64base_index_s64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TRUNC]], [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64base_index_s64'}} return SVE_ACLE_FUNC(svstnt1w_scatter, _u64base, _index, _s64)(pg, bases, index, data); } -// CHECK-LABEL: @test_svstnt1w_scatter_u64base_index_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) -// CHECK-NEXT: ret void -// -// CPP-CHECK-LABEL: @_Z39test_svstnt1w_scatter_u64base_index_u64u10__SVBool_tu12__SVUint64_tlu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = trunc [[DATA:%.*]] to -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = shl i64 [[INDEX:%.*]], 2 -// CPP-CHECK-NEXT: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TMP0]], [[TMP1]], [[BASES:%.*]], i64 [[TMP2]]) -// CPP-CHECK-NEXT: ret void -// void test_svstnt1w_scatter_u64base_index_u64(svbool_t pg, svuint64_t bases, int64_t index, svuint64_t data) { + // CHECK-LABEL: test_svstnt1w_scatter_u64base_index_u64 + // CHECK-DAG: [[TRUNC:%.*]] = trunc %data to + // CHECK-DAG: [[PG:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: [[SHL:%.*]] = shl i64 %index, 2 + // CHECK: call void @llvm.aarch64.sve.stnt1.scatter.scalar.offset.nxv2i32.nxv2i64( [[TRUNC]], [[PG]], %bases, i64 [[SHL]]) + // CHECK: ret void // overload-warning@+2 {{implicit declaration of function 'svstnt1w_scatter_index'}} // expected-warning@+1 {{implicit declaration of function 'svstnt1w_scatter_u64base_index_u64'}} return SVE_ACLE_FUNC(svstnt1w_scatter, _u64base, _index, _u64)(pg, bases, index, data); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c index 6aac7783901e..c56d5d0f710e 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsubhnb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubhnb_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svsubhnb_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsubhnb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnb_s16'}} return SVE_ACLE_FUNC(svsubhnb,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svsubhnb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubhnb_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svsubhnb_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsubhnb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnb_s32'}} return SVE_ACLE_FUNC(svsubhnb,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svsubhnb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubhnb_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsubhnb_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svsubhnb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnb_s64'}} return SVE_ACLE_FUNC(svsubhnb,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svsubhnb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubhnb_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svsubhnb_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsubhnb_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnb_u16'}} return SVE_ACLE_FUNC(svsubhnb,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svsubhnb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubhnb_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svsubhnb_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsubhnb_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnb_u32'}} return SVE_ACLE_FUNC(svsubhnb,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svsubhnb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubhnb_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svsubhnb_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svsubhnb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnb_u64'}} return SVE_ACLE_FUNC(svsubhnb,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svsubhnb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubhnb_n_s16u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svsubhnb_n_s16(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svsubhnb_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnb_n_s16'}} return SVE_ACLE_FUNC(svsubhnb,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svsubhnb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubhnb_n_s32u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svsubhnb_n_s32(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svsubhnb_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnb_n_s32'}} return SVE_ACLE_FUNC(svsubhnb,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svsubhnb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubhnb_n_s64u11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svsubhnb_n_s64(svint64_t op1, int64_t op2) { + // CHECK-LABEL: test_svsubhnb_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnb_n_s64'}} return SVE_ACLE_FUNC(svsubhnb,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svsubhnb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubhnb_n_u16u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svsubhnb_n_u16(svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svsubhnb_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnb_n_u16'}} return SVE_ACLE_FUNC(svsubhnb,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svsubhnb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubhnb_n_u32u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svsubhnb_n_u32(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svsubhnb_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnb_n_u32'}} return SVE_ACLE_FUNC(svsubhnb,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svsubhnb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubhnb_n_u64u12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svsubhnb_n_u64(svuint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svsubhnb_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnb'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnb_n_u64'}} return SVE_ACLE_FUNC(svsubhnb,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c index 8a00938b6aab..4864fb940182 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subhnt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsubhnt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubhnt_s16u10__SVInt8_tu11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svsubhnt_s16(svint8_t op1, svint16_t op2, svint16_t op3) { + // CHECK-LABEL: test_svsubhnt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnt_s16'}} return SVE_ACLE_FUNC(svsubhnt,_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svsubhnt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubhnt_s32u11__SVInt16_tu11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svsubhnt_s32(svint16_t op1, svint32_t op2, svint32_t op3) { + // CHECK-LABEL: test_svsubhnt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnt_s32'}} return SVE_ACLE_FUNC(svsubhnt,_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svsubhnt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubhnt_s64u11__SVInt32_tu11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsubhnt_s64(svint32_t op1, svint64_t op2, svint64_t op3) { + // CHECK-LABEL: test_svsubhnt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnt_s64'}} return SVE_ACLE_FUNC(svsubhnt,_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svsubhnt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubhnt_u16u11__SVUint8_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svsubhnt_u16(svuint8_t op1, svuint16_t op2, svuint16_t op3) { + // CHECK-LABEL: test_svsubhnt_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnt_u16'}} return SVE_ACLE_FUNC(svsubhnt,_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svsubhnt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubhnt_u32u12__SVUint16_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svsubhnt_u32(svuint16_t op1, svuint32_t op2, svuint32_t op3) { + // CHECK-LABEL: test_svsubhnt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnt_u32'}} return SVE_ACLE_FUNC(svsubhnt,_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svsubhnt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubhnt_u64u12__SVUint32_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[OP3:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svsubhnt_u64(svuint32_t op1, svuint64_t op2, svuint64_t op3) { + // CHECK-LABEL: test_svsubhnt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( %op1, %op2, %op3) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnt_u64'}} return SVE_ACLE_FUNC(svsubhnt,_u64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svsubhnt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubhnt_n_s16u10__SVInt8_tu11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svsubhnt_n_s16(svint8_t op1, svint16_t op2, int16_t op3) { + // CHECK-LABEL: test_svsubhnt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnt_n_s16'}} return SVE_ACLE_FUNC(svsubhnt,_n_s16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svsubhnt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubhnt_n_s32u11__SVInt16_tu11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svsubhnt_n_s32(svint16_t op1, svint32_t op2, int32_t op3) { + // CHECK-LABEL: test_svsubhnt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnt_n_s32'}} return SVE_ACLE_FUNC(svsubhnt,_n_s32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svsubhnt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubhnt_n_s64u11__SVInt32_tu11__SVInt64_tl( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svsubhnt_n_s64(svint32_t op1, svint64_t op2, int64_t op3) { + // CHECK-LABEL: test_svsubhnt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnt_n_s64'}} return SVE_ACLE_FUNC(svsubhnt,_n_s64,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svsubhnt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubhnt_n_u16u11__SVUint8_tu12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint8_t test_svsubhnt_n_u16(svuint8_t op1, svuint16_t op2, uint16_t op3) { + // CHECK-LABEL: test_svsubhnt_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnt.nxv8i16( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnt_n_u16'}} return SVE_ACLE_FUNC(svsubhnt,_n_u16,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svsubhnt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubhnt_n_u32u12__SVUint16_tu12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svsubhnt_n_u32(svuint16_t op1, svuint32_t op2, uint32_t op3) { + // CHECK-LABEL: test_svsubhnt_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnt.nxv4i32( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnt_n_u32'}} return SVE_ACLE_FUNC(svsubhnt,_n_u32,,)(op1, op2, op3); } -// CHECK-LABEL: @test_svsubhnt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubhnt_n_u64u12__SVUint32_tu12__SVUint64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP3:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svsubhnt_n_u64(svuint32_t op1, svuint64_t op2, uint64_t op3) { + // CHECK-LABEL: test_svsubhnt_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op3) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.subhnt.nxv2i64( %op1, %op2, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubhnt'}} // expected-warning@+1 {{implicit declaration of function 'svsubhnt_n_u64'}} return SVE_ACLE_FUNC(svsubhnt,_n_u64,,)(op1, op2, op3); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c index 93845fcbf760..988be977ce2d 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsublb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsublb_s16u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svsublb_s16(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsublb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssublb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublb'}} // expected-warning@+1 {{implicit declaration of function 'svsublb_s16'}} return SVE_ACLE_FUNC(svsublb,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svsublb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsublb_s32u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsublb_s32(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsublb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssublb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublb'}} // expected-warning@+1 {{implicit declaration of function 'svsublb_s32'}} return SVE_ACLE_FUNC(svsublb,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svsublb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsublb_s64u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svsublb_s64(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsublb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssublb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublb'}} // expected-warning@+1 {{implicit declaration of function 'svsublb_s64'}} return SVE_ACLE_FUNC(svsublb,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svsublb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsublb_u16u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svsublb_u16(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svsublb_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usublb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublb'}} // expected-warning@+1 {{implicit declaration of function 'svsublb_u16'}} return SVE_ACLE_FUNC(svsublb,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svsublb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsublb_u32u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svsublb_u32(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsublb_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usublb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublb'}} // expected-warning@+1 {{implicit declaration of function 'svsublb_u32'}} return SVE_ACLE_FUNC(svsublb,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svsublb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsublb_u64u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svsublb_u64(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsublb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usublb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublb'}} // expected-warning@+1 {{implicit declaration of function 'svsublb_u64'}} return SVE_ACLE_FUNC(svsublb,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svsublb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsublb_n_s16u10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svsublb_n_s16(svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svsublb_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssublb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublb'}} // expected-warning@+1 {{implicit declaration of function 'svsublb_n_s16'}} return SVE_ACLE_FUNC(svsublb,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svsublb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsublb_n_s32u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svsublb_n_s32(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svsublb_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssublb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublb'}} // expected-warning@+1 {{implicit declaration of function 'svsublb_n_s32'}} return SVE_ACLE_FUNC(svsublb,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svsublb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsublb_n_s64u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svsublb_n_s64(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svsublb_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssublb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublb'}} // expected-warning@+1 {{implicit declaration of function 'svsublb_n_s64'}} return SVE_ACLE_FUNC(svsublb,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svsublb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsublb_n_u16u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svsublb_n_u16(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svsublb_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usublb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublb'}} // expected-warning@+1 {{implicit declaration of function 'svsublb_n_u16'}} return SVE_ACLE_FUNC(svsublb,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svsublb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsublb_n_u32u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svsublb_n_u32(svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svsublb_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usublb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublb'}} // expected-warning@+1 {{implicit declaration of function 'svsublb_n_u32'}} return SVE_ACLE_FUNC(svsublb,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svsublb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsublb_n_u64u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svsublb_n_u64(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svsublb_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usublb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublb'}} // expected-warning@+1 {{implicit declaration of function 'svsublb_n_u64'}} return SVE_ACLE_FUNC(svsublb,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c index 674b2f7c64b5..02afe3e0cbcb 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublbt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,109 +14,64 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsublbt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsublbt_s16u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svsublbt_s16(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsublbt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssublbt.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublbt'}} // expected-warning@+1 {{implicit declaration of function 'svsublbt_s16'}} return SVE_ACLE_FUNC(svsublbt,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svsublbt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsublbt_s32u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsublbt_s32(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsublbt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssublbt.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublbt'}} // expected-warning@+1 {{implicit declaration of function 'svsublbt_s32'}} return SVE_ACLE_FUNC(svsublbt,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svsublbt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsublbt_s64u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svsublbt_s64(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsublbt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssublbt.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublbt'}} // expected-warning@+1 {{implicit declaration of function 'svsublbt_s64'}} return SVE_ACLE_FUNC(svsublbt,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svsublbt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsublbt_n_s16u10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svsublbt_n_s16(svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svsublbt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssublbt.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublbt'}} // expected-warning@+1 {{implicit declaration of function 'svsublbt_n_s16'}} return SVE_ACLE_FUNC(svsublbt,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svsublbt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsublbt_n_s32u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svsublbt_n_s32(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svsublbt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssublbt.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublbt'}} // expected-warning@+1 {{implicit declaration of function 'svsublbt_n_s32'}} return SVE_ACLE_FUNC(svsublbt,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svsublbt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsublbt_n_s64u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublbt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svsublbt_n_s64(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svsublbt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssublbt.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublbt'}} // expected-warning@+1 {{implicit declaration of function 'svsublbt_n_s64'}} return SVE_ACLE_FUNC(svsublbt,_n_s64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c index 25742e28ff14..4a8bd9635043 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_sublt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsublt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsublt_s16u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svsublt_s16(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsublt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssublt.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublt'}} // expected-warning@+1 {{implicit declaration of function 'svsublt_s16'}} return SVE_ACLE_FUNC(svsublt,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svsublt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsublt_s32u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsublt_s32(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsublt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssublt.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublt'}} // expected-warning@+1 {{implicit declaration of function 'svsublt_s32'}} return SVE_ACLE_FUNC(svsublt,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svsublt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsublt_s64u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssublt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svsublt_s64(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsublt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssublt.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublt'}} // expected-warning@+1 {{implicit declaration of function 'svsublt_s64'}} return SVE_ACLE_FUNC(svsublt,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svsublt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsublt_u16u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svsublt_u16(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svsublt_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usublt.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublt'}} // expected-warning@+1 {{implicit declaration of function 'svsublt_u16'}} return SVE_ACLE_FUNC(svsublt,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svsublt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsublt_u32u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svsublt_u32(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsublt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usublt.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublt'}} // expected-warning@+1 {{implicit declaration of function 'svsublt_u32'}} return SVE_ACLE_FUNC(svsublt,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svsublt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsublt_u64u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usublt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svsublt_u64(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsublt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usublt.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublt'}} // expected-warning@+1 {{implicit declaration of function 'svsublt_u64'}} return SVE_ACLE_FUNC(svsublt,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svsublt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsublt_n_s16u10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svsublt_n_s16(svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svsublt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssublt.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublt'}} // expected-warning@+1 {{implicit declaration of function 'svsublt_n_s16'}} return SVE_ACLE_FUNC(svsublt,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svsublt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsublt_n_s32u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svsublt_n_s32(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svsublt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssublt.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublt'}} // expected-warning@+1 {{implicit declaration of function 'svsublt_n_s32'}} return SVE_ACLE_FUNC(svsublt,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svsublt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsublt_n_s64u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssublt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svsublt_n_s64(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svsublt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssublt.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublt'}} // expected-warning@+1 {{implicit declaration of function 'svsublt_n_s64'}} return SVE_ACLE_FUNC(svsublt,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svsublt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsublt_n_u16u11__SVUint8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svsublt_n_u16(svuint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svsublt_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usublt.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublt'}} // expected-warning@+1 {{implicit declaration of function 'svsublt_n_u16'}} return SVE_ACLE_FUNC(svsublt,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svsublt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsublt_n_u32u12__SVUint16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svsublt_n_u32(svuint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svsublt_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usublt.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublt'}} // expected-warning@+1 {{implicit declaration of function 'svsublt_n_u32'}} return SVE_ACLE_FUNC(svsublt,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svsublt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsublt_n_u64u12__SVUint32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usublt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svsublt_n_u64(svuint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svsublt_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usublt.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsublt'}} // expected-warning@+1 {{implicit declaration of function 'svsublt_n_u64'}} return SVE_ACLE_FUNC(svsublt,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c index 89cb511ca668..36c756114566 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subltb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,109 +14,64 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsubltb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubltb_s16u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svsubltb_s16(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsubltb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssubltb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubltb'}} // expected-warning@+1 {{implicit declaration of function 'svsubltb_s16'}} return SVE_ACLE_FUNC(svsubltb,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svsubltb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubltb_s32u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsubltb_s32(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsubltb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssubltb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubltb'}} // expected-warning@+1 {{implicit declaration of function 'svsubltb_s32'}} return SVE_ACLE_FUNC(svsubltb,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svsubltb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svsubltb_s64u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svsubltb_s64(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsubltb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssubltb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubltb'}} // expected-warning@+1 {{implicit declaration of function 'svsubltb_s64'}} return SVE_ACLE_FUNC(svsubltb,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svsubltb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubltb_n_s16u10__SVInt8_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svsubltb_n_s16(svint8_t op1, int8_t op2) { + // CHECK-LABEL: test_svsubltb_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssubltb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubltb'}} // expected-warning@+1 {{implicit declaration of function 'svsubltb_n_s16'}} return SVE_ACLE_FUNC(svsubltb,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svsubltb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubltb_n_s32u11__SVInt16_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svsubltb_n_s32(svint16_t op1, int16_t op2) { + // CHECK-LABEL: test_svsubltb_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssubltb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubltb'}} // expected-warning@+1 {{implicit declaration of function 'svsubltb_n_s32'}} return SVE_ACLE_FUNC(svsubltb,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svsubltb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svsubltb_n_s64u11__SVInt32_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubltb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svsubltb_n_s64(svint32_t op1, int32_t op2) { + // CHECK-LABEL: test_svsubltb_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssubltb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubltb'}} // expected-warning@+1 {{implicit declaration of function 'svsubltb_n_s64'}} return SVE_ACLE_FUNC(svsubltb,_n_s64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c index b3519e4110b2..1f86b5edb252 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwb.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsubwb_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsubwb_s16u11__SVInt16_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svsubwb_s16(svint16_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsubwb_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssubwb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwb'}} // expected-warning@+1 {{implicit declaration of function 'svsubwb_s16'}} return SVE_ACLE_FUNC(svsubwb,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwb_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsubwb_s32u11__SVInt32_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsubwb_s32(svint32_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsubwb_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssubwb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwb'}} // expected-warning@+1 {{implicit declaration of function 'svsubwb_s32'}} return SVE_ACLE_FUNC(svsubwb,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwb_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsubwb_s64u11__SVInt64_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svsubwb_s64(svint64_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsubwb_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssubwb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwb'}} // expected-warning@+1 {{implicit declaration of function 'svsubwb_s64'}} return SVE_ACLE_FUNC(svsubwb,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwb_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsubwb_u16u12__SVUint16_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwb.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svsubwb_u16(svuint16_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svsubwb_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usubwb.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwb'}} // expected-warning@+1 {{implicit declaration of function 'svsubwb_u16'}} return SVE_ACLE_FUNC(svsubwb,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwb_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsubwb_u32u12__SVUint32_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwb.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svsubwb_u32(svuint32_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsubwb_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usubwb.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwb'}} // expected-warning@+1 {{implicit declaration of function 'svsubwb_u32'}} return SVE_ACLE_FUNC(svsubwb,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwb_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsubwb_u64u12__SVUint64_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwb.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svsubwb_u64(svuint64_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsubwb_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usubwb.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwb'}} // expected-warning@+1 {{implicit declaration of function 'svsubwb_u64'}} return SVE_ACLE_FUNC(svsubwb,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwb_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsubwb_n_s16u11__SVInt16_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svsubwb_n_s16(svint16_t op1, int8_t op2) { + // CHECK-LABEL: test_svsubwb_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssubwb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwb'}} // expected-warning@+1 {{implicit declaration of function 'svsubwb_n_s16'}} return SVE_ACLE_FUNC(svsubwb,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwb_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsubwb_n_s32u11__SVInt32_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svsubwb_n_s32(svint32_t op1, int16_t op2) { + // CHECK-LABEL: test_svsubwb_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssubwb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwb'}} // expected-warning@+1 {{implicit declaration of function 'svsubwb_n_s32'}} return SVE_ACLE_FUNC(svsubwb,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwb_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsubwb_n_s64u11__SVInt64_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svsubwb_n_s64(svint64_t op1, int32_t op2) { + // CHECK-LABEL: test_svsubwb_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssubwb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwb'}} // expected-warning@+1 {{implicit declaration of function 'svsubwb_n_s64'}} return SVE_ACLE_FUNC(svsubwb,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwb_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsubwb_n_u16u12__SVUint16_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwb.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svsubwb_n_u16(svuint16_t op1, uint8_t op2) { + // CHECK-LABEL: test_svsubwb_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usubwb.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwb'}} // expected-warning@+1 {{implicit declaration of function 'svsubwb_n_u16'}} return SVE_ACLE_FUNC(svsubwb,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwb_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsubwb_n_u32u12__SVUint32_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwb.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svsubwb_n_u32(svuint32_t op1, uint16_t op2) { + // CHECK-LABEL: test_svsubwb_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usubwb.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwb'}} // expected-warning@+1 {{implicit declaration of function 'svsubwb_n_u32'}} return SVE_ACLE_FUNC(svsubwb,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwb_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsubwb_n_u64u12__SVUint64_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwb.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svsubwb_n_u64(svuint64_t op1, uint32_t op2) { + // CHECK-LABEL: test_svsubwb_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usubwb.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwb'}} // expected-warning@+1 {{implicit declaration of function 'svsubwb_n_u64'}} return SVE_ACLE_FUNC(svsubwb,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c index 3b2a2da7710c..9e72444ce958 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_subwt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,217 +14,127 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svsubwt_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsubwt_s16u11__SVInt16_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svsubwt_s16(svint16_t op1, svint8_t op2) { + // CHECK-LABEL: test_svsubwt_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssubwt.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwt'}} // expected-warning@+1 {{implicit declaration of function 'svsubwt_s16'}} return SVE_ACLE_FUNC(svsubwt,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwt_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsubwt_s32u11__SVInt32_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svsubwt_s32(svint32_t op1, svint16_t op2) { + // CHECK-LABEL: test_svsubwt_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssubwt.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwt'}} // expected-warning@+1 {{implicit declaration of function 'svsubwt_s32'}} return SVE_ACLE_FUNC(svsubwt,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwt_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsubwt_s64u11__SVInt64_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svsubwt_s64(svint64_t op1, svint32_t op2) { + // CHECK-LABEL: test_svsubwt_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssubwt.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwt'}} // expected-warning@+1 {{implicit declaration of function 'svsubwt_s64'}} return SVE_ACLE_FUNC(svsubwt,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwt_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsubwt_u16u12__SVUint16_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwt.nxv8i16( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svsubwt_u16(svuint16_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svsubwt_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usubwt.nxv8i16( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwt'}} // expected-warning@+1 {{implicit declaration of function 'svsubwt_u16'}} return SVE_ACLE_FUNC(svsubwt,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwt_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsubwt_u32u12__SVUint32_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwt.nxv4i32( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svsubwt_u32(svuint32_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svsubwt_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usubwt.nxv4i32( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwt'}} // expected-warning@+1 {{implicit declaration of function 'svsubwt_u32'}} return SVE_ACLE_FUNC(svsubwt,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwt_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svsubwt_u64u12__SVUint64_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.usubwt.nxv2i64( [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svsubwt_u64(svuint64_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svsubwt_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usubwt.nxv2i64( %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwt'}} // expected-warning@+1 {{implicit declaration of function 'svsubwt_u64'}} return SVE_ACLE_FUNC(svsubwt,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwt_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsubwt_n_s16u11__SVInt16_ta( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svsubwt_n_s16(svint16_t op1, int8_t op2) { + // CHECK-LABEL: test_svsubwt_n_s16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssubwt.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwt'}} // expected-warning@+1 {{implicit declaration of function 'svsubwt_n_s16'}} return SVE_ACLE_FUNC(svsubwt,_n_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwt_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsubwt_n_s32u11__SVInt32_ts( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svsubwt_n_s32(svint32_t op1, int16_t op2) { + // CHECK-LABEL: test_svsubwt_n_s32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssubwt.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwt'}} // expected-warning@+1 {{implicit declaration of function 'svsubwt_n_s32'}} return SVE_ACLE_FUNC(svsubwt,_n_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwt_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsubwt_n_s64u11__SVInt64_ti( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.ssubwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svsubwt_n_s64(svint64_t op1, int32_t op2) { + // CHECK-LABEL: test_svsubwt_n_s64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.ssubwt.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwt'}} // expected-warning@+1 {{implicit declaration of function 'svsubwt_n_s64'}} return SVE_ACLE_FUNC(svsubwt,_n_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwt_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsubwt_n_u16u12__SVUint16_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwt.nxv8i16( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint16_t test_svsubwt_n_u16(svuint16_t op1, uint8_t op2) { + // CHECK-LABEL: test_svsubwt_n_u16 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usubwt.nxv8i16( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwt'}} // expected-warning@+1 {{implicit declaration of function 'svsubwt_n_u16'}} return SVE_ACLE_FUNC(svsubwt,_n_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwt_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsubwt_n_u32u12__SVUint32_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwt.nxv4i32( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint32_t test_svsubwt_n_u32(svuint32_t op1, uint16_t op2) { + // CHECK-LABEL: test_svsubwt_n_u32 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usubwt.nxv4i32( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwt'}} // expected-warning@+1 {{implicit declaration of function 'svsubwt_n_u32'}} return SVE_ACLE_FUNC(svsubwt,_n_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svsubwt_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svsubwt_n_u64u12__SVUint64_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.usubwt.nxv2i64( [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svuint64_t test_svsubwt_n_u64(svuint64_t op1, uint32_t op2) { + // CHECK-LABEL: test_svsubwt_n_u64 + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.usubwt.nxv2i64( %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svsubwt'}} // expected-warning@+1 {{implicit declaration of function 'svsubwt_n_u64'}} return SVE_ACLE_FUNC(svsubwt,_n_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c index db4ad45a3177..0e3434c15f22 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2-bfloat.c @@ -1,9 +1,8 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s @@ -17,21 +16,12 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svtbl2_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv8bf16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z16test_svtbl2_bf1614svbfloat16x2_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv8bf16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svbfloat16_t test_svtbl2_bf16(svbfloat16x2_t data, svuint16_t indices) { + // CHECK-LABEL: test_svtbl2_bf16 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8bf16.nxv16bf16( %data, i32 1) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl2.nxv8bf16( %[[V0]], %[[V1]], %indices) + // CHECK-NEXT: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbl2'}} // expected-warning@+1 {{implicit declaration of function 'svtbl2_bf16'}} return SVE_ACLE_FUNC(svtbl2, _bf16, , )(data, indices); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2.c index 920de4c28650..936ffedd0086 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbl2.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,232 +14,133 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svtbl2_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv16i8( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbl2_s810svint8x2_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv16i8( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svtbl2_s8(svint8x2_t data, svuint8_t indices) { + // CHECK-LABEL: test_svtbl2_s8 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( %data, i32 1) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl2.nxv16i8( %[[V0]], %[[V1]], %indices) + // CHECK-NEXT: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbl2'}} // expected-warning@+1 {{implicit declaration of function 'svtbl2_s8'}} return SVE_ACLE_FUNC(svtbl2,_s8,,)(data, indices); } -// CHECK-LABEL: @test_svtbl2_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv8i16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svtbl2_s1611svint16x2_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv8i16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svtbl2_s16(svint16x2_t data, svuint16_t indices) { + // CHECK-LABEL: test_svtbl2_s16 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( %data, i32 1) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl2.nxv8i16( %[[V0]], %[[V1]], %indices) + // CHECK-NEXT: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbl2'}} // expected-warning@+1 {{implicit declaration of function 'svtbl2_s16'}} return SVE_ACLE_FUNC(svtbl2,_s16,,)(data, indices); } -// CHECK-LABEL: @test_svtbl2_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv4i32( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svtbl2_s3211svint32x2_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv4i32( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svtbl2_s32(svint32x2_t data, svuint32_t indices) { + // CHECK-LABEL: test_svtbl2_s32 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( %data, i32 1) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl2.nxv4i32( %[[V0]], %[[V1]], %indices) + // CHECK-NEXT: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbl2'}} // expected-warning@+1 {{implicit declaration of function 'svtbl2_s32'}} return SVE_ACLE_FUNC(svtbl2,_s32,,)(data, indices); } -// CHECK-LABEL: @test_svtbl2_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv2i64( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svtbl2_s6411svint64x2_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv2i64( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svtbl2_s64(svint64x2_t data, svuint64_t indices) { + // CHECK-LABEL: test_svtbl2_s64 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( %data, i32 1) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl2.nxv2i64( %[[V0]], %[[V1]], %indices) + // CHECK-NEXT: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbl2'}} // expected-warning@+1 {{implicit declaration of function 'svtbl2_s64'}} return SVE_ACLE_FUNC(svtbl2,_s64,,)(data, indices); } -// CHECK-LABEL: @test_svtbl2_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv16i8( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbl2_u811svuint8x2_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv16i8( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint8_t test_svtbl2_u8(svuint8x2_t data, svuint8_t indices) { + // CHECK-LABEL: test_svtbl2_u8 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv16i8.nxv32i8( %data, i32 1) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl2.nxv16i8( %[[V0]], %[[V1]], %indices) + // CHECK-NEXT: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbl2'}} // expected-warning@+1 {{implicit declaration of function 'svtbl2_u8'}} return SVE_ACLE_FUNC(svtbl2,_u8,,)(data, indices); } -// CHECK-LABEL: @test_svtbl2_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv8i16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svtbl2_u1612svuint16x2_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv8i16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint16_t test_svtbl2_u16(svuint16x2_t data, svuint16_t indices) { + // CHECK-LABEL: test_svtbl2_u16 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8i16.nxv16i16( %data, i32 1) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl2.nxv8i16( %[[V0]], %[[V1]], %indices) + // CHECK-NEXT: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbl2'}} // expected-warning@+1 {{implicit declaration of function 'svtbl2_u16'}} return SVE_ACLE_FUNC(svtbl2,_u16,,)(data, indices); } -// CHECK-LABEL: @test_svtbl2_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv4i32( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svtbl2_u3212svuint32x2_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv4i32( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint32_t test_svtbl2_u32(svuint32x2_t data, svuint32_t indices) { + // CHECK-LABEL: test_svtbl2_u32 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4i32.nxv8i32( %data, i32 1) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl2.nxv4i32( %[[V0]], %[[V1]], %indices) + // CHECK-NEXT: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbl2'}} // expected-warning@+1 {{implicit declaration of function 'svtbl2_u32'}} return SVE_ACLE_FUNC(svtbl2,_u32,,)(data, indices); } -// CHECK-LABEL: @test_svtbl2_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv2i64( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svtbl2_u6412svuint64x2_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv2i64( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svuint64_t test_svtbl2_u64(svuint64x2_t data, svuint64_t indices) { + // CHECK-LABEL: test_svtbl2_u64 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2i64.nxv4i64( %data, i32 1) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl2.nxv2i64( %[[V0]], %[[V1]], %indices) + // CHECK-NEXT: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbl2'}} // expected-warning@+1 {{implicit declaration of function 'svtbl2_u64'}} return SVE_ACLE_FUNC(svtbl2,_u64,,)(data, indices); } -// CHECK-LABEL: @test_svtbl2_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv8f16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svtbl2_f1613svfloat16x2_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv8f16( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat16_t test_svtbl2_f16(svfloat16x2_t data, svuint16_t indices) { + // CHECK-LABEL: test_svtbl2_f16 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv8f16.nxv16f16( %data, i32 1) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl2.nxv8f16( %[[V0]], %[[V1]], %indices) + // CHECK-NEXT: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbl2'}} // expected-warning@+1 {{implicit declaration of function 'svtbl2_f16'}} return SVE_ACLE_FUNC(svtbl2,_f16,,)(data, indices); } -// CHECK-LABEL: @test_svtbl2_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv4f32( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svtbl2_f3213svfloat32x2_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv4f32( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat32_t test_svtbl2_f32(svfloat32x2_t data, svuint32_t indices) { + // CHECK-LABEL: test_svtbl2_f32 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv4f32.nxv8f32( %data, i32 1) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl2.nxv4f32( %[[V0]], %[[V1]], %indices) + // CHECK-NEXT: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbl2'}} // expected-warning@+1 {{implicit declaration of function 'svtbl2_f32'}} return SVE_ACLE_FUNC(svtbl2,_f32,,)(data, indices); } -// CHECK-LABEL: @test_svtbl2_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA:%.*]], i32 0) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA]], i32 1) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv2f64( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z15test_svtbl2_f6413svfloat64x2_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA:%.*]], i32 0) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( [[DATA]], i32 1) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.tbl2.nxv2f64( [[TMP0]], [[TMP1]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svfloat64_t test_svtbl2_f64(svfloat64x2_t data, svuint64_t indices) { + // CHECK-LABEL: test_svtbl2_f64 + // CHECK-DAG: %[[V0:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( %data, i32 0) + // CHECK-DAG: %[[V1:.*]] = call @llvm.aarch64.sve.tuple.get.nxv2f64.nxv4f64( %data, i32 1) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbl2.nxv2f64( %[[V0]], %[[V1]], %indices) + // CHECK-NEXT: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbl2'}} // expected-warning@+1 {{implicit declaration of function 'svtbl2_f64'}} return SVE_ACLE_FUNC(svtbl2,_f64,,)(data, indices); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c index 480e7e427309..127910279b1d 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx-bfloat.c @@ -1,9 +1,8 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // REQUIRES: aarch64-registered-target // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +bf16 -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error -verify-ignore-unexpected=note %s @@ -17,17 +16,10 @@ #define SVE_ACLE_FUNC(A1, A2, A3, A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svtbx_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv8bf16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svtbx_bf16u14__SVBFloat16_tu14__SVBFloat16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv8bf16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbfloat16_t test_svtbx_bf16(svbfloat16_t fallback, svbfloat16_t data, svuint16_t indices) { + // CHECK-LABEL: test_svtbx_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbx.nxv8bf16( %fallback, %data, %indices) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbx'}} // expected-warning@+1 {{implicit declaration of function 'svtbx_bf16'}} return SVE_ACLE_FUNC(svtbx, _bf16, , )(fallback, data, indices); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx.c index 61ad99478f77..c31918dbfaaf 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_tbx.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,188 +14,111 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svtbx_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv16i8( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svtbx_s8u10__SVInt8_tu10__SVInt8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv16i8( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svtbx_s8(svint8_t fallback, svint8_t data, svuint8_t indices) { + // CHECK-LABEL: test_svtbx_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbx.nxv16i8( %fallback, %data, %indices) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbx'}} // expected-warning@+1 {{implicit declaration of function 'svtbx_s8'}} return SVE_ACLE_FUNC(svtbx,_s8,,)(fallback, data, indices); } -// CHECK-LABEL: @test_svtbx_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv8i16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbx_s16u11__SVInt16_tu11__SVInt16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv8i16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svtbx_s16(svint16_t fallback, svint16_t data, svuint16_t indices) { + // CHECK-LABEL: test_svtbx_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbx.nxv8i16( %fallback, %data, %indices) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbx'}} // expected-warning@+1 {{implicit declaration of function 'svtbx_s16'}} return SVE_ACLE_FUNC(svtbx,_s16,,)(fallback, data, indices); } -// CHECK-LABEL: @test_svtbx_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv4i32( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbx_s32u11__SVInt32_tu11__SVInt32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv4i32( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svtbx_s32(svint32_t fallback, svint32_t data, svuint32_t indices) { + // CHECK-LABEL: test_svtbx_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbx.nxv4i32( %fallback, %data, %indices) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbx'}} // expected-warning@+1 {{implicit declaration of function 'svtbx_s32'}} return SVE_ACLE_FUNC(svtbx,_s32,,)(fallback, data, indices); } -// CHECK-LABEL: @test_svtbx_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv2i64( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbx_s64u11__SVInt64_tu11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv2i64( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svtbx_s64(svint64_t fallback, svint64_t data, svuint64_t indices) { + // CHECK-LABEL: test_svtbx_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbx.nxv2i64( %fallback, %data, %indices) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbx'}} // expected-warning@+1 {{implicit declaration of function 'svtbx_s64'}} return SVE_ACLE_FUNC(svtbx,_s64,,)(fallback, data, indices); } -// CHECK-LABEL: @test_svtbx_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv16i8( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z13test_svtbx_u8u11__SVUint8_tu11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv16i8( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svtbx_u8(svuint8_t fallback, svuint8_t data, svuint8_t indices) { + // CHECK-LABEL: test_svtbx_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbx.nxv16i8( %fallback, %data, %indices) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbx'}} // expected-warning@+1 {{implicit declaration of function 'svtbx_u8'}} return SVE_ACLE_FUNC(svtbx,_u8,,)(fallback, data, indices); } -// CHECK-LABEL: @test_svtbx_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv8i16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbx_u16u12__SVUint16_tu12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv8i16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svtbx_u16(svuint16_t fallback, svuint16_t data, svuint16_t indices) { + // CHECK-LABEL: test_svtbx_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbx.nxv8i16( %fallback, %data, %indices) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbx'}} // expected-warning@+1 {{implicit declaration of function 'svtbx_u16'}} return SVE_ACLE_FUNC(svtbx,_u16,,)(fallback, data, indices); } -// CHECK-LABEL: @test_svtbx_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv4i32( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbx_u32u12__SVUint32_tu12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv4i32( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svtbx_u32(svuint32_t fallback, svuint32_t data, svuint32_t indices) { + // CHECK-LABEL: test_svtbx_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbx.nxv4i32( %fallback, %data, %indices) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbx'}} // expected-warning@+1 {{implicit declaration of function 'svtbx_u32'}} return SVE_ACLE_FUNC(svtbx,_u32,,)(fallback, data, indices); } -// CHECK-LABEL: @test_svtbx_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv2i64( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbx_u64u12__SVUint64_tu12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv2i64( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svtbx_u64(svuint64_t fallback, svuint64_t data, svuint64_t indices) { + // CHECK-LABEL: test_svtbx_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbx.nxv2i64( %fallback, %data, %indices) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbx'}} // expected-warning@+1 {{implicit declaration of function 'svtbx_u64'}} return SVE_ACLE_FUNC(svtbx,_u64,,)(fallback, data, indices); } -// CHECK-LABEL: @test_svtbx_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv8f16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbx_f16u13__SVFloat16_tu13__SVFloat16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv8f16( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat16_t test_svtbx_f16(svfloat16_t fallback, svfloat16_t data, svuint16_t indices) { + // CHECK-LABEL: test_svtbx_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbx.nxv8f16( %fallback, %data, %indices) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbx'}} // expected-warning@+1 {{implicit declaration of function 'svtbx_f16'}} return SVE_ACLE_FUNC(svtbx,_f16,,)(fallback, data, indices); } -// CHECK-LABEL: @test_svtbx_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv4f32( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbx_f32u13__SVFloat32_tu13__SVFloat32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv4f32( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat32_t test_svtbx_f32(svfloat32_t fallback, svfloat32_t data, svuint32_t indices) { + // CHECK-LABEL: test_svtbx_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbx.nxv4f32( %fallback, %data, %indices) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbx'}} // expected-warning@+1 {{implicit declaration of function 'svtbx_f32'}} return SVE_ACLE_FUNC(svtbx,_f32,,)(fallback, data, indices); } -// CHECK-LABEL: @test_svtbx_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv2f64( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z14test_svtbx_f64u13__SVFloat64_tu13__SVFloat64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.tbx.nxv2f64( [[FALLBACK:%.*]], [[DATA:%.*]], [[INDICES:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svfloat64_t test_svtbx_f64(svfloat64_t fallback, svfloat64_t data, svuint64_t indices) { + // CHECK-LABEL: test_svtbx_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.tbx.nxv2f64( %fallback, %data, %indices) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svtbx'}} // expected-warning@+1 {{implicit declaration of function 'svtbx_f64'}} return SVE_ACLE_FUNC(svtbx,_f64,,)(fallback, data, indices); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c index 35fc04b81191..72b96cfc8453 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_uqadd.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s #include @@ -14,487 +13,278 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svuqadd_u8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svuqadd_u8_mu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svuqadd_u8_m(svbool_t pg, svint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svuqadd_u8_m + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_s8_m'}} return SVE_ACLE_FUNC(svuqadd,_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_u16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svuqadd_u16_mu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svuqadd_u16_m(svbool_t pg, svint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svuqadd_u16_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_s16_m'}} return SVE_ACLE_FUNC(svuqadd,_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_u32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svuqadd_u32_mu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svuqadd_u32_m(svbool_t pg, svint32_t op1, svuint32_t op2) { // CHECKA-LABEL: test_svuqadd_u32_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_s32_m'}} return SVE_ACLE_FUNC(svuqadd,_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_u64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svuqadd_u64_mu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svuqadd_u64_m(svbool_t pg, svint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svuqadd_u64_m + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_s64_m'}} return SVE_ACLE_FUNC(svuqadd,_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_n_s8_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svuqadd_n_s8_mu10__SVBool_tu10__SVInt8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svuqadd_n_s8_m(svbool_t pg, svint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svuqadd_n_s8_m + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_n_s8_m'}} return SVE_ACLE_FUNC(svuqadd,_n_s8,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_n_s16_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s16_mu10__SVBool_tu11__SVInt16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svuqadd_n_s16_m(svbool_t pg, svint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svuqadd_n_s16_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_n_s16_m'}} return SVE_ACLE_FUNC(svuqadd,_n_s16,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_n_s32_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s32_mu10__SVBool_tu11__SVInt32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svuqadd_n_s32_m(svbool_t pg, svint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svuqadd_n_s32_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_n_s32_m'}} return SVE_ACLE_FUNC(svuqadd,_n_s32,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_n_s64_m( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s64_mu10__SVBool_tu11__SVInt64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svuqadd_n_s64_m(svbool_t pg, svint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svuqadd_n_s64_m + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_m'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_n_s64_m'}} return SVE_ACLE_FUNC(svuqadd,_n_s64,_m,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_u8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z17test_svuqadd_u8_zu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG]], [[TMP0]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svuqadd_u8_z(svbool_t pg, svint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svuqadd_u8_z + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv16i8( %pg, %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( %pg, %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_s8_z'}} return SVE_ACLE_FUNC(svuqadd,_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_u16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svuqadd_u16_zu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svuqadd_u16_z(svbool_t pg, svint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svuqadd_u16_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_s16_z'}} return SVE_ACLE_FUNC(svuqadd,_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_u32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svuqadd_u32_zu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svuqadd_u32_z(svbool_t pg, svint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svuqadd_u32_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_s32_z'}} return SVE_ACLE_FUNC(svuqadd,_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_u64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z18test_svuqadd_u64_zu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[TMP1]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svuqadd_u64_z(svbool_t pg, svint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svuqadd_u64_z + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( %[[PG]], %[[SEL]], %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_s64_z'}} return SVE_ACLE_FUNC(svuqadd,_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_n_s8_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z19test_svuqadd_n_s8_zu10__SVBool_tu10__SVInt8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.sel.nxv16i8( [[PG:%.*]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG]], [[TMP1]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint8_t test_svuqadd_n_s8_z(svbool_t pg, svint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svuqadd_n_s8_z + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( %pg, %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_n_s8_z'}} return SVE_ACLE_FUNC(svuqadd,_n_s8,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_n_s16_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s16_zu10__SVBool_tu11__SVInt16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv8i16( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint16_t test_svuqadd_n_s16_z(svbool_t pg, svint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svuqadd_n_s16_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv8i16( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_n_s16_z'}} return SVE_ACLE_FUNC(svuqadd,_n_s16,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_n_s32_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s32_zu10__SVBool_tu11__SVInt32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv4i32( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint32_t test_svuqadd_n_s32_z(svbool_t pg, svint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svuqadd_n_s32_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv4i32( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_n_s32_z'}} return SVE_ACLE_FUNC(svuqadd,_n_s32,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_n_s64_z( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP3]] -// -// CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s64_zu10__SVBool_tu11__SVInt64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.sel.nxv2i64( [[TMP0]], [[OP1:%.*]], zeroinitializer) -// CPP-CHECK-NEXT: [[TMP3:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[TMP2]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP3]] -// svint64_t test_svuqadd_n_s64_z(svbool_t pg, svint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svuqadd_n_s64_z + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK-DAG: %[[SEL:.*]] = call @llvm.aarch64.sve.sel.nxv2i64( %[[PG]], %op1, zeroinitializer) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( %[[PG]], %[[SEL]], %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_z'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_n_s64_z'}} return SVE_ACLE_FUNC(svuqadd,_n_s64,_z,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_u8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svuqadd_u8_xu10__SVBool_tu10__SVInt8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svuqadd_u8_x(svbool_t pg, svint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svuqadd_u8_x + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( %pg, %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_s8_x'}} return SVE_ACLE_FUNC(svuqadd,_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_u16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svuqadd_u16_xu10__SVBool_tu11__SVInt16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint16_t test_svuqadd_u16_x(svbool_t pg, svint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svuqadd_u16_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_s16_x'}} return SVE_ACLE_FUNC(svuqadd,_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_u32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svuqadd_u32_xu10__SVBool_tu11__SVInt32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint32_t test_svuqadd_u32_x(svbool_t pg, svint32_t op1, svuint32_t op2) { // CHECKA-LABEL: test_svuqadd_u32_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_s32_x'}} return SVE_ACLE_FUNC(svuqadd,_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_u64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svuqadd_u64_xu10__SVBool_tu11__SVInt64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint64_t test_svuqadd_u64_x(svbool_t pg, svint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svuqadd_u64_x + // CHECK: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( %[[PG]], %op1, %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_s64_x'}} return SVE_ACLE_FUNC(svuqadd,_s64,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_n_s8_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svuqadd_n_s8_xu10__SVBool_tu10__SVInt8_th( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( [[PG:%.*]], [[OP1:%.*]], [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svint8_t test_svuqadd_n_s8_x(svbool_t pg, svint8_t op1, uint8_t op2) { + // CHECK-LABEL: test_svuqadd_n_s8_x + // CHECK: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv16i8(i8 %op2) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv16i8( %pg, %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_n_s8_x'}} return SVE_ACLE_FUNC(svuqadd,_n_s8,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_n_s16_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s16_xu10__SVBool_tu11__SVInt16_tt( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint16_t test_svuqadd_n_s16_x(svbool_t pg, svint16_t op1, uint16_t op2) { + // CHECK-LABEL: test_svuqadd_n_s16_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv8i16(i16 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv8i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv8i16( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_n_s16_x'}} return SVE_ACLE_FUNC(svuqadd,_n_s16,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_n_s32_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s32_xu10__SVBool_tu11__SVInt32_tj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint32_t test_svuqadd_n_s32_x(svbool_t pg, svint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svuqadd_n_s32_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv4i32(i32 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv4i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv4i32( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_n_s32_x'}} return SVE_ACLE_FUNC(svuqadd,_n_s32,_x,)(pg, op1, op2); } -// CHECK-LABEL: @test_svuqadd_n_s64_x( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CHECK-NEXT: ret [[TMP2]] -// -// CPP-CHECK-LABEL: @_Z20test_svuqadd_n_s64_xu10__SVBool_tu11__SVInt64_tm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( [[PG:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP2:%.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( [[TMP0]], [[OP1:%.*]], [[TMP1]]) -// CPP-CHECK-NEXT: ret [[TMP2]] -// svint64_t test_svuqadd_n_s64_x(svbool_t pg, svint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svuqadd_n_s64_x + // CHECK-DAG: %[[DUP:.*]] = call @llvm.aarch64.sve.dup.x.nxv2i64(i64 %op2) + // CHECK-DAG: %[[PG:.*]] = call @llvm.aarch64.sve.convert.from.svbool.nxv2i1( %pg) + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.suqadd.nxv2i64( %[[PG]], %op1, %[[DUP]]) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svuqadd_x'}} // expected-warning@+1 {{implicit declaration of function 'svuqadd_n_s64_x'}} return SVE_ACLE_FUNC(svuqadd,_n_s64,_x,)(pg, op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilege.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilege.c index d9d1897f8910..ac37dbdfc0b1 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilege.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilege.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,297 +14,173 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svwhilege_b8_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svwhilege_b8_s32ii( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilege_b8_s32(int32_t op1, int32_t op2) { + // CHECK-LABEL: test_svwhilege_b8_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilege.nxv16i1.i32(i32 %op1, i32 %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svwhilege_b8'}} // expected-warning@+1 {{implicit declaration of function 'svwhilege_b8_s32'}} return SVE_ACLE_FUNC(svwhilege_b8,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilege_b16_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilege_b16_s32ii( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilege_b16_s32(int32_t op1, int32_t op2) { + // CHECK-LABEL: test_svwhilege_b16_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilege.nxv8i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilege_b16'}} // expected-warning@+1 {{implicit declaration of function 'svwhilege_b16_s32'}} return SVE_ACLE_FUNC(svwhilege_b16,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilege_b32_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilege_b32_s32ii( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilege_b32_s32(int32_t op1, int32_t op2) { + // CHECK-LABEL: test_svwhilege_b32_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilege.nxv4i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilege_b32'}} // expected-warning@+1 {{implicit declaration of function 'svwhilege_b32_s32'}} return SVE_ACLE_FUNC(svwhilege_b32,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilege_b64_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilege_b64_s32ii( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilege_b64_s32(int32_t op1, int32_t op2) { + // CHECK-LABEL: test_svwhilege_b64_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilege.nxv2i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilege_b64'}} // expected-warning@+1 {{implicit declaration of function 'svwhilege_b64_s32'}} return SVE_ACLE_FUNC(svwhilege_b64,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilege_b8_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svwhilege_b8_u32jj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilege_b8_u32(uint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svwhilege_b8_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilehs.nxv16i1.i32(i32 %op1, i32 %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svwhilege_b8'}} // expected-warning@+1 {{implicit declaration of function 'svwhilege_b8_u32'}} return SVE_ACLE_FUNC(svwhilege_b8,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilege_b16_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilege_b16_u32jj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilege_b16_u32(uint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svwhilege_b16_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilehs.nxv8i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilege_b16'}} // expected-warning@+1 {{implicit declaration of function 'svwhilege_b16_u32'}} return SVE_ACLE_FUNC(svwhilege_b16,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilege_b32_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilege_b32_u32jj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilege_b32_u32(uint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svwhilege_b32_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilehs.nxv4i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilege_b32'}} // expected-warning@+1 {{implicit declaration of function 'svwhilege_b32_u32'}} return SVE_ACLE_FUNC(svwhilege_b32,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilege_b64_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilege_b64_u32jj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilege_b64_u32(uint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svwhilege_b64_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilehs.nxv2i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilege_b64'}} // expected-warning@+1 {{implicit declaration of function 'svwhilege_b64_u32'}} return SVE_ACLE_FUNC(svwhilege_b64,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilege_b8_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svwhilege_b8_s64ll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilege_b8_s64(int64_t op1, int64_t op2) { + // CHECK-LABEL: test_svwhilege_b8_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilege.nxv16i1.i64(i64 %op1, i64 %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svwhilege_b8'}} // expected-warning@+1 {{implicit declaration of function 'svwhilege_b8_s64'}} return SVE_ACLE_FUNC(svwhilege_b8,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilege_b16_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilege_b16_s64ll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilege_b16_s64(int64_t op1, int64_t op2) { + // CHECK-LABEL: test_svwhilege_b16_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilege.nxv8i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilege_b16'}} // expected-warning@+1 {{implicit declaration of function 'svwhilege_b16_s64'}} return SVE_ACLE_FUNC(svwhilege_b16,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilege_b32_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilege_b32_s64ll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilege_b32_s64(int64_t op1, int64_t op2) { + // CHECK-LABEL: test_svwhilege_b32_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilege.nxv4i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilege_b32'}} // expected-warning@+1 {{implicit declaration of function 'svwhilege_b32_s64'}} return SVE_ACLE_FUNC(svwhilege_b32,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilege_b64_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilege_b64_s64ll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilege.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilege_b64_s64(int64_t op1, int64_t op2) { + // CHECK-LABEL: test_svwhilege_b64_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilege.nxv2i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilege_b64'}} // expected-warning@+1 {{implicit declaration of function 'svwhilege_b64_s64'}} return SVE_ACLE_FUNC(svwhilege_b64,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilege_b8_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svwhilege_b8_u64mm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilege_b8_u64(uint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svwhilege_b8_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilehs.nxv16i1.i64(i64 %op1, i64 %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svwhilege_b8'}} // expected-warning@+1 {{implicit declaration of function 'svwhilege_b8_u64'}} return SVE_ACLE_FUNC(svwhilege_b8,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilege_b16_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilege_b16_u64mm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilege_b16_u64(uint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svwhilege_b16_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilehs.nxv8i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilege_b16'}} // expected-warning@+1 {{implicit declaration of function 'svwhilege_b16_u64'}} return SVE_ACLE_FUNC(svwhilege_b16,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilege_b32_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilege_b32_u64mm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilege_b32_u64(uint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svwhilege_b32_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilehs.nxv4i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilege_b32'}} // expected-warning@+1 {{implicit declaration of function 'svwhilege_b32_u64'}} return SVE_ACLE_FUNC(svwhilege_b32,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilege_b64_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilege_b64_u64mm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehs.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilege_b64_u64(uint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svwhilege_b64_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilehs.nxv2i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilege_b64'}} // expected-warning@+1 {{implicit declaration of function 'svwhilege_b64_u64'}} return SVE_ACLE_FUNC(svwhilege_b64,_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilegt.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilegt.c index 0c7d3bb062ab..0186ad1f7584 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilegt.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilegt.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,297 +14,173 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svwhilegt_b8_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svwhilegt_b8_s32ii( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilegt_b8_s32(int32_t op1, int32_t op2) { + // CHECK-LABEL: test_svwhilegt_b8_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilegt.nxv16i1.i32(i32 %op1, i32 %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svwhilegt_b8'}} // expected-warning@+1 {{implicit declaration of function 'svwhilegt_b8_s32'}} return SVE_ACLE_FUNC(svwhilegt_b8,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilegt_b16_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilegt_b16_s32ii( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilegt_b16_s32(int32_t op1, int32_t op2) { + // CHECK-LABEL: test_svwhilegt_b16_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilegt.nxv8i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilegt_b16'}} // expected-warning@+1 {{implicit declaration of function 'svwhilegt_b16_s32'}} return SVE_ACLE_FUNC(svwhilegt_b16,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilegt_b32_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilegt_b32_s32ii( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilegt_b32_s32(int32_t op1, int32_t op2) { + // CHECK-LABEL: test_svwhilegt_b32_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilegt.nxv4i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilegt_b32'}} // expected-warning@+1 {{implicit declaration of function 'svwhilegt_b32_s32'}} return SVE_ACLE_FUNC(svwhilegt_b32,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilegt_b64_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilegt_b64_s32ii( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilegt_b64_s32(int32_t op1, int32_t op2) { + // CHECK-LABEL: test_svwhilegt_b64_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilegt.nxv2i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilegt_b64'}} // expected-warning@+1 {{implicit declaration of function 'svwhilegt_b64_s32'}} return SVE_ACLE_FUNC(svwhilegt_b64,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilegt_b8_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svwhilegt_b8_u32jj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv16i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilegt_b8_u32(uint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svwhilegt_b8_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilehi.nxv16i1.i32(i32 %op1, i32 %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svwhilegt_b8'}} // expected-warning@+1 {{implicit declaration of function 'svwhilegt_b8_u32'}} return SVE_ACLE_FUNC(svwhilegt_b8,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilegt_b16_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilegt_b16_u32jj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv8i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilegt_b16_u32(uint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svwhilegt_b16_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilehi.nxv8i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilegt_b16'}} // expected-warning@+1 {{implicit declaration of function 'svwhilegt_b16_u32'}} return SVE_ACLE_FUNC(svwhilegt_b16,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilegt_b32_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilegt_b32_u32jj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv4i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilegt_b32_u32(uint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svwhilegt_b32_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilehi.nxv4i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilegt_b32'}} // expected-warning@+1 {{implicit declaration of function 'svwhilegt_b32_u32'}} return SVE_ACLE_FUNC(svwhilegt_b32,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilegt_b64_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilegt_b64_u32jj( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv2i1.i32(i32 [[OP1:%.*]], i32 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilegt_b64_u32(uint32_t op1, uint32_t op2) { + // CHECK-LABEL: test_svwhilegt_b64_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilehi.nxv2i1.i32(i32 %op1, i32 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilegt_b64'}} // expected-warning@+1 {{implicit declaration of function 'svwhilegt_b64_u32'}} return SVE_ACLE_FUNC(svwhilegt_b64,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilegt_b8_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svwhilegt_b8_s64ll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilegt_b8_s64(int64_t op1, int64_t op2) { + // CHECK-LABEL: test_svwhilegt_b8_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilegt.nxv16i1.i64(i64 %op1, i64 %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svwhilegt_b8'}} // expected-warning@+1 {{implicit declaration of function 'svwhilegt_b8_s64'}} return SVE_ACLE_FUNC(svwhilegt_b8,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilegt_b16_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilegt_b16_s64ll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilegt_b16_s64(int64_t op1, int64_t op2) { + // CHECK-LABEL: test_svwhilegt_b16_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilegt.nxv8i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilegt_b16'}} // expected-warning@+1 {{implicit declaration of function 'svwhilegt_b16_s64'}} return SVE_ACLE_FUNC(svwhilegt_b16,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilegt_b32_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilegt_b32_s64ll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilegt_b32_s64(int64_t op1, int64_t op2) { + // CHECK-LABEL: test_svwhilegt_b32_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilegt.nxv4i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilegt_b32'}} // expected-warning@+1 {{implicit declaration of function 'svwhilegt_b32_s64'}} return SVE_ACLE_FUNC(svwhilegt_b32,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilegt_b64_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilegt_b64_s64ll( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilegt.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilegt_b64_s64(int64_t op1, int64_t op2) { + // CHECK-LABEL: test_svwhilegt_b64_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilegt.nxv2i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilegt_b64'}} // expected-warning@+1 {{implicit declaration of function 'svwhilegt_b64_s64'}} return SVE_ACLE_FUNC(svwhilegt_b64,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilegt_b8_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z21test_svwhilegt_b8_u64mm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv16i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilegt_b8_u64(uint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svwhilegt_b8_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilehi.nxv16i1.i64(i64 %op1, i64 %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svwhilegt_b8'}} // expected-warning@+1 {{implicit declaration of function 'svwhilegt_b8_u64'}} return SVE_ACLE_FUNC(svwhilegt_b8,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilegt_b16_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilegt_b16_u64mm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv8i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilegt_b16_u64(uint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svwhilegt_b16_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilehi.nxv8i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilegt_b16'}} // expected-warning@+1 {{implicit declaration of function 'svwhilegt_b16_u64'}} return SVE_ACLE_FUNC(svwhilegt_b16,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilegt_b32_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilegt_b32_u64mm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv4i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilegt_b32_u64(uint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svwhilegt_b32_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilehi.nxv4i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilegt_b32'}} // expected-warning@+1 {{implicit declaration of function 'svwhilegt_b32_u64'}} return SVE_ACLE_FUNC(svwhilegt_b32,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilegt_b64_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z22test_svwhilegt_b64_u64mm( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilehi.nxv2i1.i64(i64 [[OP1:%.*]], i64 [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilegt_b64_u64(uint64_t op1, uint64_t op2) { + // CHECK-LABEL: test_svwhilegt_b64_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilehi.nxv2i1.i64(i64 %op1, i64 %op2) + // CHECK: %[[CAST:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[CAST]] // overload-warning@+2 {{implicit declaration of function 'svwhilegt_b64'}} // expected-warning@+1 {{implicit declaration of function 'svwhilegt_b64_u64'}} return SVE_ACLE_FUNC(svwhilegt_b64,_u64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw-bfloat.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw-bfloat.c index 7ad27588ee7e..bebd40a0dbd3 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,20 +14,12 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svwhilerw_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0bf16(bfloat* [[OP1:%.*]], bfloat* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svwhilerw_bf16PKu6__bf16S0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0bf16(bfloat* [[OP1:%.*]], bfloat* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilerw_bf16(const bfloat16_t *op1, const bfloat16_t *op2) { + // CHECK-LABEL: test_svwhilerw_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0bf16(bfloat* %op1, bfloat* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[INTRINSIC_REINT]] // overload-warning@+2 {{implicit declaration of function 'svwhilerw'}} // expected-warning@+1 {{implicit declaration of function 'svwhilerw_bf16'}} return SVE_ACLE_FUNC(svwhilerw,_bf16,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw.c index 9aa97f2a3983..1bd486d74627 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilerw.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,206 +14,119 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svwhilerw_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svwhilerw_s8PKaS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilerw_s8(const int8_t *op1, const int8_t *op2) { + // CHECK-LABEL: test_svwhilerw_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilerw.b.nxv16i1.p0i8(i8* %op1, i8* %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svwhilerw'}} // expected-warning@+1 {{implicit declaration of function 'svwhilerw_s8'}} return SVE_ACLE_FUNC(svwhilerw,_s8,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilerw_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svwhilerw_s16PKsS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilerw_s16(const int16_t *op1, const int16_t *op2) { + // CHECK-LABEL: test_svwhilerw_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0i16(i16* %op1, i16* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[INTRINSIC_REINT]] // overload-warning@+2 {{implicit declaration of function 'svwhilerw'}} // expected-warning@+1 {{implicit declaration of function 'svwhilerw_s16'}} return SVE_ACLE_FUNC(svwhilerw,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilerw_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svwhilerw_s32PKiS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilerw_s32(const int32_t *op1, const int32_t *op2) { + // CHECK-LABEL: test_svwhilerw_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0i32(i32* %op1, i32* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[INTRINSIC_REINT]] // overload-warning@+2 {{implicit declaration of function 'svwhilerw'}} // expected-warning@+1 {{implicit declaration of function 'svwhilerw_s32'}} return SVE_ACLE_FUNC(svwhilerw,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilerw_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svwhilerw_s64PKlS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilerw_s64(const int64_t *op1, const int64_t *op2) { + // CHECK-LABEL: test_svwhilerw_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0i64(i64* %op1, i64* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[INTRINSIC_REINT]] // overload-warning@+2 {{implicit declaration of function 'svwhilerw'}} // expected-warning@+1 {{implicit declaration of function 'svwhilerw_s64'}} return SVE_ACLE_FUNC(svwhilerw,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilerw_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svwhilerw_u8PKhS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilerw_u8(const uint8_t *op1, const uint8_t *op2) { + // CHECK-LABEL: test_svwhilerw_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilerw.b.nxv16i1.p0i8(i8* %op1, i8* %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svwhilerw'}} // expected-warning@+1 {{implicit declaration of function 'svwhilerw_u8'}} return SVE_ACLE_FUNC(svwhilerw,_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilerw_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svwhilerw_u16PKtS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilerw_u16(const uint16_t *op1, const uint16_t *op2) { + // CHECK-LABEL: test_svwhilerw_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0i16(i16* %op1, i16* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[INTRINSIC_REINT]] // overload-warning@+2 {{implicit declaration of function 'svwhilerw'}} // expected-warning@+1 {{implicit declaration of function 'svwhilerw_u16'}} return SVE_ACLE_FUNC(svwhilerw,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilerw_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svwhilerw_u32PKjS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilerw_u32(const uint32_t *op1, const uint32_t *op2) { + // CHECK-LABEL: test_svwhilerw_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0i32(i32* %op1, i32* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[INTRINSIC_REINT]] // overload-warning@+2 {{implicit declaration of function 'svwhilerw'}} // expected-warning@+1 {{implicit declaration of function 'svwhilerw_u32'}} return SVE_ACLE_FUNC(svwhilerw,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilerw_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svwhilerw_u64PKmS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilerw_u64(const uint64_t *op1, const uint64_t *op2) { + // CHECK-LABEL: test_svwhilerw_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0i64(i64* %op1, i64* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[INTRINSIC_REINT]] // overload-warning@+2 {{implicit declaration of function 'svwhilerw'}} // expected-warning@+1 {{implicit declaration of function 'svwhilerw_u64'}} return SVE_ACLE_FUNC(svwhilerw,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilerw_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0f16(half* [[OP1:%.*]], half* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svwhilerw_f16PKDhS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0f16(half* [[OP1:%.*]], half* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilerw_f16(const float16_t *op1, const float16_t *op2) { + // CHECK-LABEL: test_svwhilerw_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilerw.h.nxv8i1.p0f16(half* %op1, half* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[INTRINSIC_REINT]] // overload-warning@+2 {{implicit declaration of function 'svwhilerw'}} // expected-warning@+1 {{implicit declaration of function 'svwhilerw_f16'}} return SVE_ACLE_FUNC(svwhilerw,_f16,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilerw_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0f32(float* [[OP1:%.*]], float* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svwhilerw_f32PKfS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0f32(float* [[OP1:%.*]], float* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilerw_f32(const float32_t *op1, const float32_t *op2) { + // CHECK-LABEL: test_svwhilerw_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilerw.s.nxv4i1.p0f32(float* %op1, float* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[INTRINSIC_REINT]] // overload-warning@+2 {{implicit declaration of function 'svwhilerw'}} // expected-warning@+1 {{implicit declaration of function 'svwhilerw_f32'}} return SVE_ACLE_FUNC(svwhilerw,_f32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilerw_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0f64(double* [[OP1:%.*]], double* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svwhilerw_f64PKdS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0f64(double* [[OP1:%.*]], double* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilerw_f64(const float64_t *op1, const float64_t *op2) { + // CHECK-LABEL: test_svwhilerw_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilerw.d.nxv2i1.p0f64(double* %op1, double* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) // overload-warning@+2 {{implicit declaration of function 'svwhilerw'}} // expected-warning@+1 {{implicit declaration of function 'svwhilerw_f64'}} return SVE_ACLE_FUNC(svwhilerw,_f64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr-bfloat.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr-bfloat.c index 0a9702610a4a..c2ed031ae08b 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr-bfloat.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr-bfloat.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_SVE2 -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -target-feature +bf16 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -D__ARM_FEATURE_SVE -D__ARM_FEATURE_BF16_SCALAR_ARITHMETIC -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -target-feature +bf16 -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,20 +14,12 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svwhilewr_bf16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0bf16(bfloat* [[OP1:%.*]], bfloat* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z19test_svwhilewr_bf16PKu6__bf16S0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0bf16(bfloat* [[OP1:%.*]], bfloat* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilewr_bf16(const bfloat16_t *op1, const bfloat16_t *op2) { + // CHECK-LABEL: test_svwhilewr_bf16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0bf16(bfloat* %op1, bfloat* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[INTRINSIC_REINT]] // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} // expected-warning@+1 {{implicit declaration of function 'svwhilewr_bf16'}} return SVE_ACLE_FUNC(svwhilewr,_bf16,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr.c index d58eb127b8b7..84f4c1560608 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_whilewr.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,206 +14,119 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svwhilewr_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svwhilewr_s8PKaS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilewr_s8(const int8_t *op1, const int8_t *op2) { + // CHECK-LABEL: test_svwhilewr_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilewr.b.nxv16i1.p0i8(i8* %op1, i8* %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} // expected-warning@+1 {{implicit declaration of function 'svwhilewr_s8'}} return SVE_ACLE_FUNC(svwhilewr,_s8,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilewr_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svwhilewr_s16PKsS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilewr_s16(const int16_t *op1, const int16_t *op2) { + // CHECK-LABEL: test_svwhilewr_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0i16(i16* %op1, i16* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[INTRINSIC_REINT]] // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} // expected-warning@+1 {{implicit declaration of function 'svwhilewr_s16'}} return SVE_ACLE_FUNC(svwhilewr,_s16,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilewr_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svwhilewr_s32PKiS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilewr_s32(const int32_t *op1, const int32_t *op2) { + // CHECK-LABEL: test_svwhilewr_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0i32(i32* %op1, i32* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[INTRINSIC_REINT]] // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} // expected-warning@+1 {{implicit declaration of function 'svwhilewr_s32'}} return SVE_ACLE_FUNC(svwhilewr,_s32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilewr_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svwhilewr_s64PKlS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilewr_s64(const int64_t *op1, const int64_t *op2) { + // CHECK-LABEL: test_svwhilewr_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0i64(i64* %op1, i64* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[INTRINSIC_REINT]] // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} // expected-warning@+1 {{implicit declaration of function 'svwhilewr_s64'}} return SVE_ACLE_FUNC(svwhilewr,_s64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilewr_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svwhilewr_u8PKhS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.b.nxv16i1.p0i8(i8* [[OP1:%.*]], i8* [[OP2:%.*]]) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svbool_t test_svwhilewr_u8(const uint8_t *op1, const uint8_t *op2) { + // CHECK-LABEL: test_svwhilewr_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilewr.b.nxv16i1.p0i8(i8* %op1, i8* %op2) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} // expected-warning@+1 {{implicit declaration of function 'svwhilewr_u8'}} return SVE_ACLE_FUNC(svwhilewr,_u8,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilewr_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svwhilewr_u16PKtS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0i16(i16* [[OP1:%.*]], i16* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilewr_u16(const uint16_t *op1, const uint16_t *op2) { + // CHECK-LABEL: test_svwhilewr_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0i16(i16* %op1, i16* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[INTRINSIC_REINT]] // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} // expected-warning@+1 {{implicit declaration of function 'svwhilewr_u16'}} return SVE_ACLE_FUNC(svwhilewr,_u16,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilewr_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svwhilewr_u32PKjS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0i32(i32* [[OP1:%.*]], i32* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilewr_u32(const uint32_t *op1, const uint32_t *op2) { + // CHECK-LABEL: test_svwhilewr_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0i32(i32* %op1, i32* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[INTRINSIC_REINT]] // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} // expected-warning@+1 {{implicit declaration of function 'svwhilewr_u32'}} return SVE_ACLE_FUNC(svwhilewr,_u32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilewr_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svwhilewr_u64PKmS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0i64(i64* [[OP1:%.*]], i64* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilewr_u64(const uint64_t *op1, const uint64_t *op2) { + // CHECK-LABEL: test_svwhilewr_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0i64(i64* %op1, i64* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) + // CHECK: ret %[[INTRINSIC_REINT]] // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} // expected-warning@+1 {{implicit declaration of function 'svwhilewr_u64'}} return SVE_ACLE_FUNC(svwhilewr,_u64,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilewr_f16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0f16(half* [[OP1:%.*]], half* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svwhilewr_f16PKDhS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0f16(half* [[OP1:%.*]], half* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilewr_f16(const float16_t *op1, const float16_t *op2) { + // CHECK-LABEL: test_svwhilewr_f16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilewr.h.nxv8i1.p0f16(half* %op1, half* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv8i1( %[[INTRINSIC]]) + // CHECK: ret %[[INTRINSIC_REINT]] // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} // expected-warning@+1 {{implicit declaration of function 'svwhilewr_f16'}} return SVE_ACLE_FUNC(svwhilewr,_f16,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilewr_f32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0f32(float* [[OP1:%.*]], float* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svwhilewr_f32PKfS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0f32(float* [[OP1:%.*]], float* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilewr_f32(const float32_t *op1, const float32_t *op2) { + // CHECK-LABEL: test_svwhilewr_f32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilewr.s.nxv4i1.p0f32(float* %op1, float* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv4i1( %[[INTRINSIC]]) + // CHECK: ret %[[INTRINSIC_REINT]] // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} // expected-warning@+1 {{implicit declaration of function 'svwhilewr_f32'}} return SVE_ACLE_FUNC(svwhilewr,_f32,,)(op1, op2); } -// CHECK-LABEL: @test_svwhilewr_f64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0f64(double* [[OP1:%.*]], double* [[OP2:%.*]]) -// CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CHECK-NEXT: ret [[TMP1]] -// -// CPP-CHECK-LABEL: @_Z18test_svwhilewr_f64PKdS0_( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0f64(double* [[OP1:%.*]], double* [[OP2:%.*]]) -// CPP-CHECK-NEXT: [[TMP1:%.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( [[TMP0]]) -// CPP-CHECK-NEXT: ret [[TMP1]] -// svbool_t test_svwhilewr_f64(const float64_t *op1, const float64_t *op2) { + // CHECK-LABEL: test_svwhilewr_f64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.whilewr.d.nxv2i1.p0f64(double* %op1, double* %op2) + // CHECK: %[[INTRINSIC_REINT:.*]] = call @llvm.aarch64.sve.convert.to.svbool.nxv2i1( %[[INTRINSIC]]) // overload-warning@+2 {{implicit declaration of function 'svwhilewr'}} // expected-warning@+1 {{implicit declaration of function 'svwhilewr_f64'}} return SVE_ACLE_FUNC(svwhilewr,_f64,,)(op1, op2); diff --git a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_xar.c b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_xar.c index 534752b870b7..e235f37e386a 100644 --- a/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_xar.c +++ b/clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_xar.c @@ -1,8 +1,7 @@ -// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefix=CPP-CHECK +// RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve2 -fallow-half-arguments-and-returns -S -O1 -Werror -Wall -emit-llvm -o - -x c++ %s | FileCheck %s // RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify -verify-ignore-unexpected=error %s // RUN: %clang_cc1 -DSVE_OVERLOADED_FORMS -triple aarch64-none-linux-gnu -target-feature +sve -fallow-half-arguments-and-returns -fsyntax-only -verify=overload -verify-ignore-unexpected=error %s @@ -15,273 +14,161 @@ #define SVE_ACLE_FUNC(A1,A2,A3,A4) A1##A2##A3##A4 #endif -// CHECK-LABEL: @test_svxar_n_s8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svxar_n_s8u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svxar_n_s8(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svxar_n_s8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.xar.nxv16i8( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svxar'}} // expected-warning@+1 {{implicit declaration of function 'svxar_n_s8'}} return SVE_ACLE_FUNC(svxar,_n_s8,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svxar_n_s8_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svxar_n_s8_1u10__SVInt8_tu10__SVInt8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint8_t test_svxar_n_s8_1(svint8_t op1, svint8_t op2) { + // CHECK-LABEL: test_svxar_n_s8_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.xar.nxv16i8( %op1, %op2, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svxar'}} // expected-warning@+1 {{implicit declaration of function 'svxar_n_s8'}} return SVE_ACLE_FUNC(svxar,_n_s8,,)(op1, op2, 8); } -// CHECK-LABEL: @test_svxar_n_s16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svxar_n_s16u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svxar_n_s16(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svxar_n_s16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.xar.nxv8i16( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svxar'}} // expected-warning@+1 {{implicit declaration of function 'svxar_n_s16'}} return SVE_ACLE_FUNC(svxar,_n_s16,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svxar_n_s16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svxar_n_s16_1u11__SVInt16_tu11__SVInt16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint16_t test_svxar_n_s16_1(svint16_t op1, svint16_t op2) { + // CHECK-LABEL: test_svxar_n_s16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.xar.nxv8i16( %op1, %op2, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svxar'}} // expected-warning@+1 {{implicit declaration of function 'svxar_n_s16'}} return SVE_ACLE_FUNC(svxar,_n_s16,,)(op1, op2, 16); } -// CHECK-LABEL: @test_svxar_n_s32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svxar_n_s32u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svxar_n_s32(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svxar_n_s32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.xar.nxv4i32( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svxar'}} // expected-warning@+1 {{implicit declaration of function 'svxar_n_s32'}} return SVE_ACLE_FUNC(svxar,_n_s32,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svxar_n_s32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svxar_n_s32_1u11__SVInt32_tu11__SVInt32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint32_t test_svxar_n_s32_1(svint32_t op1, svint32_t op2) { + // CHECK-LABEL: test_svxar_n_s32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.xar.nxv4i32( %op1, %op2, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svxar'}} // expected-warning@+1 {{implicit declaration of function 'svxar_n_s32'}} return SVE_ACLE_FUNC(svxar,_n_s32,,)(op1, op2, 32); } -// CHECK-LABEL: @test_svxar_n_s64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svxar_n_s64u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svxar_n_s64(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svxar_n_s64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.xar.nxv2i64( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svxar'}} // expected-warning@+1 {{implicit declaration of function 'svxar_n_s64'}} return SVE_ACLE_FUNC(svxar,_n_s64,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svxar_n_s64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svxar_n_s64_1u11__SVInt64_tu11__SVInt64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svint64_t test_svxar_n_s64_1(svint64_t op1, svint64_t op2) { + // CHECK-LABEL: test_svxar_n_s64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.xar.nxv2i64( %op1, %op2, i32 64) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svxar'}} // expected-warning@+1 {{implicit declaration of function 'svxar_n_s64'}} return SVE_ACLE_FUNC(svxar,_n_s64,,)(op1, op2, 64); } -// CHECK-LABEL: @test_svxar_n_u8( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z15test_svxar_n_u8u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svxar_n_u8(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svxar_n_u8 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.xar.nxv16i8( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svxar'}} // expected-warning@+1 {{implicit declaration of function 'svxar_n_u8'}} return SVE_ACLE_FUNC(svxar,_n_u8,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svxar_n_u8_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z17test_svxar_n_u8_1u11__SVUint8_tu11__SVUint8_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv16i8( [[OP1:%.*]], [[OP2:%.*]], i32 8) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint8_t test_svxar_n_u8_1(svuint8_t op1, svuint8_t op2) { + // CHECK-LABEL: test_svxar_n_u8_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.xar.nxv16i8( %op1, %op2, i32 8) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svxar'}} // expected-warning@+1 {{implicit declaration of function 'svxar_n_u8'}} return SVE_ACLE_FUNC(svxar,_n_u8,,)(op1, op2, 8); } -// CHECK-LABEL: @test_svxar_n_u16( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svxar_n_u16u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svxar_n_u16(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svxar_n_u16 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.xar.nxv8i16( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svxar'}} // expected-warning@+1 {{implicit declaration of function 'svxar_n_u16'}} return SVE_ACLE_FUNC(svxar,_n_u16,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svxar_n_u16_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svxar_n_u16_1u12__SVUint16_tu12__SVUint16_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv8i16( [[OP1:%.*]], [[OP2:%.*]], i32 16) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint16_t test_svxar_n_u16_1(svuint16_t op1, svuint16_t op2) { + // CHECK-LABEL: test_svxar_n_u16_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.xar.nxv8i16( %op1, %op2, i32 16) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svxar'}} // expected-warning@+1 {{implicit declaration of function 'svxar_n_u16'}} return SVE_ACLE_FUNC(svxar,_n_u16,,)(op1, op2, 16); } -// CHECK-LABEL: @test_svxar_n_u32( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svxar_n_u32u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svxar_n_u32(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svxar_n_u32 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.xar.nxv4i32( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svxar'}} // expected-warning@+1 {{implicit declaration of function 'svxar_n_u32'}} return SVE_ACLE_FUNC(svxar,_n_u32,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svxar_n_u32_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svxar_n_u32_1u12__SVUint32_tu12__SVUint32_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv4i32( [[OP1:%.*]], [[OP2:%.*]], i32 32) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint32_t test_svxar_n_u32_1(svuint32_t op1, svuint32_t op2) { + // CHECK-LABEL: test_svxar_n_u32_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.xar.nxv4i32( %op1, %op2, i32 32) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svxar'}} // expected-warning@+1 {{implicit declaration of function 'svxar_n_u32'}} return SVE_ACLE_FUNC(svxar,_n_u32,,)(op1, op2, 32); } -// CHECK-LABEL: @test_svxar_n_u64( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z16test_svxar_n_u64u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 1) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svxar_n_u64(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svxar_n_u64 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.xar.nxv2i64( %op1, %op2, i32 1) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svxar'}} // expected-warning@+1 {{implicit declaration of function 'svxar_n_u64'}} return SVE_ACLE_FUNC(svxar,_n_u64,,)(op1, op2, 1); } -// CHECK-LABEL: @test_svxar_n_u64_1( -// CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) -// CHECK-NEXT: ret [[TMP0]] -// -// CPP-CHECK-LABEL: @_Z18test_svxar_n_u64_1u12__SVUint64_tu12__SVUint64_t( -// CPP-CHECK-NEXT: entry: -// CPP-CHECK-NEXT: [[TMP0:%.*]] = call @llvm.aarch64.sve.xar.nxv2i64( [[OP1:%.*]], [[OP2:%.*]], i32 64) -// CPP-CHECK-NEXT: ret [[TMP0]] -// svuint64_t test_svxar_n_u64_1(svuint64_t op1, svuint64_t op2) { + // CHECK-LABEL: test_svxar_n_u64_1 + // CHECK: %[[INTRINSIC:.*]] = call @llvm.aarch64.sve.xar.nxv2i64( %op1, %op2, i32 64) + // CHECK: ret %[[INTRINSIC]] // overload-warning@+2 {{implicit declaration of function 'svxar'}} // expected-warning@+1 {{implicit declaration of function 'svxar_n_u64'}} return SVE_ACLE_FUNC(svxar,_n_u64,,)(op1, op2, 64); -- GitLab