- Jun 13, 2019
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Philip Reames authored
This contains fixes for two cases where we might invalidate inbounds and leave it stale in the IR (a miscompile). Case 1 is when switching to an IV with no dynamically live uses, and case 2 is when doing pre-to-post conversion on the same pointer type IV. The basic scheme used is to prove that using the given IV (pre or post increment forms) would have to already trigger UB on the path to the test we're modifying. As such, our potential UB triggering use does not change the semantics of the original program. As was pointed out in the review thread by Nikita, this is defending against a separate issue from the hasConcreteDef case. This is about poison, that's about undef. Unfortunately, the two are different, see Nikita's comment for a fuller explanation, he explains it well. (Note: I'm going to address Nikita's last style comment in a separate commit just to minimize chance of subtle bugs being introduced due to typos.) Differential Revision: https://reviews.llvm.org/D62939 llvm-svn: 363289
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Erich Keane authored
-fno-use-cxx-atexit is used This matches the GCC behavior, __cxa_thread_atexit should be permissible even though cxa_atexit is disabled. Differential Revision: https://reviews.llvm.org/D63283/ llvm-svn: 363288
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Leonard Chan authored
Add an AssumptionCache callback to the InlineFuntionInfo used for the AlwaysInlinerPass to match codegen of the AlwaysInlinerLegacyPass to generate llvm.assume. This fixes CodeGen/builtin-movdir.c when new PM is enabled by default. Differential Revision: https://reviews.llvm.org/D63170 llvm-svn: 363287
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Sanjay Patel authored
llvm-svn: 363286
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David Bolvansky authored
llvm-svn: 363285
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David Bolvansky authored
Summary: I found the following case having tail blocks with no successors merging opportunities after block placement. Before block placement: bb0: ... bne a0, 0, bb2: bb1: mv a0, 1 ret bb2: ... bb3: mv a0, 1 ret bb4: mv a0, -1 ret The conditional branch bne in bb0 is opposite to beq. After block placement: bb0: ... beq a0, 0, bb1 bb2: ... bb4: mv a0, -1 ret bb1: mv a0, 1 ret bb3: mv a0, 1 ret After block placement, that appears new tail merging opportunity, bb1 and bb3 can be merged as one block. So the conditional constraint for merging tail blocks with no successors should be removed. In my experiment for RISC-V, it decreases code size. Author of original patch: Jim Lin Reviewers: haicheng, aheejin, craig.topper, rnk, RKSimon, Jim, dmgreen Reviewed By: Jim, dmgreen Subscribers: xbolva00, dschuff, javed.absar, sbc100, jgravelle-google, aheejin, kito-cheng, dmgreen, PkmX, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D54411 llvm-svn: 363284
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Leonard Chan authored
This contains the part of D62225 which fixes CodeGen/split-debug-single-file.c by not placing .dwo sections when using -enable-split-dwarf=split. Differential Revision: https://reviews.llvm.org/D63168 llvm-svn: 363281
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Stefan Granitz authored
Other generators honor the `LIBRARY_OUTPUT_DIRECTORY` target property, but apparently Xcode doesn't. So we call `set_output_directory()` as `llvm_add_library()` would do and this works. Note that `LIBRARY_OUTPUT_DIRECTORY` is still necessary, because it's used to store and read the target's absolute build directory (while `LLDB_FRAMEWORK_BUILD_DIR` is relative!). llvm-svn: 363280
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Stefan Granitz authored
Differential Revision: https://reviews.llvm.org/D62859 llvm-svn: 363279
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Leonard Chan authored
This contains the part of D62225 which fixes Profile/gcc-flag-compatibility.c by adding the pass that allows default profile generation to work under the new PM. It seems that ./default.profraw was not being generated with new PM enabled. Differential Revision: https://reviews.llvm.org/D63155 llvm-svn: 363278
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Leonard Chan authored
This contains the part of D62225 which prevents insertion of lifetime intrinsics when creating the AlwaysInliner. This fixes the following tests when the new PM is enabled by default: Clang :: CodeGen/aarch64-neon-across.c Clang :: CodeGen/aarch64-neon-fcvt-intrinsics.c Clang :: CodeGen/aarch64-neon-fma.c Clang :: CodeGen/aarch64-neon-perm.c Clang :: CodeGen/aarch64-neon-tbl.c Clang :: CodeGen/aarch64-poly128.c Clang :: CodeGen/aarch64-v8.2a-neon-intrinsics.c Clang :: CodeGen/arm-neon-fma.c Clang :: CodeGen/arm-neon-numeric-maxmin.c Clang :: CodeGen/arm-neon-vcvtX.c Clang :: CodeGen/avx-builtins.c Clang :: CodeGen/builtins-ppc-p9vector.c Clang :: CodeGen/builtins-ppc-vsx.c Clang :: CodeGen/lifetime.c Clang :: CodeGen/sse-builtins.c Clang :: CodeGen/sse2-builtins.c Differential Revision: https://reviews.llvm.org/D63153 llvm-svn: 363277
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Stanislav Mekhanoshin authored
Added missing ImmArg and SourceOfDivergence to the crosslane intrinsics. Differential Revision: https://reviews.llvm.org/D63216 llvm-svn: 363276
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Cameron McInally authored
Patch 2 of n. llvm-svn: 363275
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Joseph Tremoulet authored
Summary: The logic in EarlyCSE that looks through 'not' operations in the predicate recognizes e.g. that `select (not (cmp sgt X, Y)), X, Y` is equivalent to `select (cmp sgt X, Y), Y, X`. Without this change, however, only the latter is recognized as a form of `smin X, Y`, so the two expressions receive different hash codes. This leads to missed optimization opportunities when the quadratic probing for the two hashes doesn't happen to collide, and assertion failures when probing doesn't collide on insertion but does collide on a subsequent table grow operation. This change inverts the order of some of the pattern matching, checking first for the optional `not` and then for the min/max/abs patterns, so that e.g. both expressions above are recognized as a form of `smin X, Y`. It also adds an assertion to isEqual verifying that it implies equal hash codes; this fires when there's a collision during insertion, not just grow, and so will make it easier to notice if these functions fall out of sync again. A new flag --earlycse-debug-hash is added which can be used when changing the hash function; it forces hash collisions so that any pair of values inserted which compare as equal but hash differently will be caught by the isEqual assertion. Reviewers: spatel, nikic Reviewed By: spatel, nikic Subscribers: lebedev.ri, arsenm, craig.topper, efriedma, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62644 llvm-svn: 363274
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Dmitri Gribenko authored
Reviewers: hokein, gribozavr Reviewed By: hokein, gribozavr Subscribers: xazax.hun, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D63253 Patch by Johan Vikström. llvm-svn: 363273
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Dmitri Gribenko authored
Summary: Fixed abseil-time-subtraction to work on C++17 Reviewers: hokein, gribozavr Subscribers: xazax.hun, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D63261 Patch by Johan Vikström. llvm-svn: 363272
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Stefan Granitz authored
llvm-svn: 363271
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Dmitri Gribenko authored
Summary: Made abseil-upgrade-duration-conversions tests pass on c++17 Reviewers: hokein, gribozavr Reviewed By: gribozavr Subscribers: xazax.hun, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D63262 Patch by Johan Vikström. llvm-svn: 363270
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Michael Liao authored
llvm-svn: 363269
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Simon Pilgrim authored
Previously it copied over MachineMemOperands verbatim which caused MOV32rm to have store flags set, and MOV32mr to have load flags set. This fixes some assertions being thrown with EXPENSIVE_CHECKS on. Committed on behalf of @luke (Luke Lau) Differential Revision: https://reviews.llvm.org/D62726 llvm-svn: 363268
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David Stenberg authored
llvm-svn: 363267
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James Henderson authored
Reviewed by: rupprecht Differential Revision: https://reviews.llvm.org/D63195 llvm-svn: 363266
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Diogo N. Sampaio authored
Summary: Relate bug: https://bugs.llvm.org/show_bug.cgi?id=37472 The shrink wrapping pass prematurally restores the stack, at a point where the stack might still be accessed. Taking an exception can cause the stack to be corrupted. As a first approach, this patch is overly conservative, assuming that any instruction that may load or store could access the stack. Reviewers: dmgreen, qcolombet Reviewed By: qcolombet Subscribers: simpal01, efriedma, eli.friedman, javed.absar, llvm-commits, eugenis, chill, carwil, thegameg Tags: #llvm Differential Revision: https://reviews.llvm.org/D63152 llvm-svn: 363265
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James Henderson authored
This fixes https://bugs.llvm.org/show_bug.cgi?id=42185. llvm-dwarfdump's documentation was missing a number of options and other behaviours. This change tries to fix up the documentation by adding these missing items. Reviewed by: JDevlieghere Differential Revision: https://reviews.llvm.org/D63217 llvm-svn: 363264
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Dmitri Gribenko authored
Summary: Fixed abseil-duration-unnecessary-conversion tests for c++17 Reviewers: hokein, gribozavr Reviewed By: gribozavr Subscribers: xazax.hun, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D63263 Patch by Johan Vikström. llvm-svn: 363263
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Dmitri Gribenko authored
Summary: Added AST matcher for ignoring elidable move constructors Reviewers: hokein, gribozavr Reviewed By: hokein, gribozavr Subscribers: cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D63149 Patch by Johan Vikström. llvm-svn: 363262
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Eugene Leviant authored
Differential revision: https://reviews.llvm.org/D63191 llvm-svn: 363261
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Eugene Leviant authored
The patch checks for subsection length as discussed in D63191 llvm-svn: 363260
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Jeremy Morse authored
This was requested in D62904, which I successfully missed. This is just a refactor and shouldn't change any behaviour. llvm-svn: 363259
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Simon Tatham authored
This commit prepares the way to start adding the main collection of MVE instructions, which operate on the 128-bit vector registers. The most obvious thing that's needed, and the simplest, is to add the MQPR register class, which is like the existing QPR except that it has fewer registers in it. The more complicated part: MVE defines a system of vector predication, in which instructions operating on 128-bit vector registers can be constrained to operate on only a subset of the lanes, using a system of prefix instructions similar to the existing Thumb IT, in that you have one prefix instruction which designates up to 4 following instructions as subject to predication, and within that sequence, the predicate can be inverted by means of T/E suffixes ('Then' / 'Else'). To support instructions of this type, we've added two new Tablegen classes `vpred_n` and `vpred_r` for standard clusters of MC operands to add to a predicated instruction. Both include a flag indicating how the instruction is predicated at all (options are T, E and 'not predicated'), and an input register field for the register controlling the set of active lanes. They differ from each other in that `vpred_r` also includes an input operand for the previous value of the output register, for instructions that leave inactive lanes unchanged. `vpred_n` lacks that extra operand; it will be used for instructions that don't preserve inactive lanes in their output register (either because inactive lanes are zeroed, as the MVE load instructions do, or because the output register isn't a vector at all). This commit also adds the family of prefix instructions themselves (VPT / VPST), and all the machinery needed to work with them in assembly and disassembly (e.g. generating the 't' and 'e' mnemonic suffixes on disassembled instructions within a predicated block) I've added a couple of demo instructions that derive from the new Tablegen base classes and use those two operand clusters. The bulk of the vector instructions will come in followup commits small enough to be manageable. (One exception is that I've added the full version of `isMnemonicVPTPredicable` in the AsmParser, because it seemed pointless to carefully split it up.) Reviewers: dmgreen, samparker, SjoerdMeijer, t.p.northover Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D62669 llvm-svn: 363258
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Simon Pilgrim authored
Pre-commit for D62726 on behalf of @luke (Luke Lau) llvm-svn: 363257
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Jeremy Morse authored
This patch makes the LiveDebugValues pass consider fragments when propagating DBG_VALUE insts between blocks, fixing PR41979. Fragment info for a variable location is added to the open-ranges key, which allows distinct fragments to be tracked separately. To handle overlapping fragments things become slightly funkier. To avoid excessive searching for overlaps in the data-flow part of LiveDebugValues, this patch: * Pre-computes pairings of fragments that overlap, for each DILocalVariable * During data-flow, whenever something happens that causes an open range to be terminated (via erase), any fragments pre-determined to overlap are also terminated. The effect of which is that when encountering a DBG_VALUE fragment that overlaps others, the overlapped fragments do not get propagated to other blocks. We still rely on later location-list building to correctly handle overlapping fragments within blocks. It's unclear whether a mixture of DBG_VALUEs with and without fragmented expressions are legitimate. To avoid suprises, this patch interprets a DBG_VALUE with no fragment as overlapping any DBG_VALUE _with_ a fragment. Differential Revision: https://reviews.llvm.org/D62904 llvm-svn: 363256
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Dmitry Preobrazhensky authored
See bug 40820: https://bugs.llvm.org/show_bug.cgi?id=40820 Reviewers: artem.tamazov, arsenm Differential Revision: https://reviews.llvm.org/D61125 llvm-svn: 363255
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Eugene Leviant authored
Differential revision: https://reviews.llvm.org/D63078 llvm-svn: 363254
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Kadir Cetinkaya authored
Summary: - Fixed diagnostics where zero width inserted ranges were being used instead of the whole token - Added unit tests Patch by @SureYeaah ! Reviewers: sammccall, kadircet Reviewed By: kadircet Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits Tags: #clang-tools-extra, #clang Differential Revision: https://reviews.llvm.org/D63222 llvm-svn: 363253
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Simon Pilgrim authored
llvm-svn: 363252
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Simon Pilgrim authored
Based on fuzz test from @craig.topper llvm-svn: 363251
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Pavel Labath authored
Summary: Type units don't represent actual compilations and a lot of the operations that we do with lldb compile units (getting their line tables, variables, etc.) don't make sense for them. There is also a lot more of them (sometimes over 100x), so making them more lightweight pays off. The main change in this patch is that we stop creating lldb CompileUnits for DWARF type units. The trickiest part here is that the SymbolFile interface requires that we assign consecutive sequence IDs to the compile units we create. As DWARF type and compile units can come in any order (in v5), this means we can no longer use 1-1 mapping between DWARF and lldb compile units. Instead I build a translation table between the two indices. To avoid pessimizing the case where there are no type units, I build the translation table only in case we have at least one type unit. Additionaly, I also tried to strenghted type safete by replacing DWARFUnit with DWARFCompileUnit where applicable. Though that was not stricly necessary, I found it a good way to ensure that the transformations I am doing here make sense. In the places where I was changing the function signatures, and where it was obvious that the objects being handled were not null, I also replaced pointers with references. There shouldn't be any major functional change with this patch. The only change I observed is that now the types in the type units will not be parsed when one calls Module::ParseAllDebugSymbols, unless they are referenced from other compile units. This makes sense, given how ParseAllDebugSymbols is implemented (it iterates over all compile units), and it only matters for one hand-writted test where I did not bother to reference the types from the compile units (which I now do). Reviewers: clayborg, JDevlieghere, aprantl Subscribers: jdoerfert, lldb-commits Differential Revision: https://reviews.llvm.org/D63005 llvm-svn: 363250
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Simon Pilgrim authored
Test both 'unaligned' (which we should scalarize) and 'subvector aligned' (which we should split) llvm-svn: 363249
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Chris Jackson authored
Differential Revision: https://reviews.llvm.org/D62955 llvm-svn: 363248
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