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Commit 0fba6d98 authored by Jim Grosbach's avatar Jim Grosbach
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ARM64: [su]xtw use W regs as inputs, not X regs. 

Update the SXT[BHW]/UXTW instruction aliases and the shifted reg addressing
mode handling.

PR19455 and rdar://16650642

llvm-svn: 206495
parent 4b600d3f
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