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Commit 1786047b authored by Simon Pilgrim's avatar Simon Pilgrim
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[X86] Fix SLM v2i64 ADD/Sub/CMPEQ instruction schedules 

Noticed while fixing the reduction costs for D59710 - the SLM model doesn't account for the poor throughput of v2i64 ops.

Numbers taken from Intel AOM (+ checked against Agner)
parent ad70d5f3
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