Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q',... (18fe4581) · Commits · Lorenzo Albano / LLVM bpEVL

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Commit 18fe4581 authored Jul 17, 2009 by Evan Cheng

Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q',...

Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q', i.e. EAX, EDX, ECX, EBX. In 64-bit mode, it just means all the i64r registers. Yeah, that makes sense.

llvm-svn: 76248

parent 72060b97

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