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Commit 3521ecf1 authored by Simon Pilgrim's avatar Simon Pilgrim
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[X86] Add vector support to targetShrinkDemandedConstant for OR/XOR opcodes

If a constant is only allsignbits in the demanded/active bits, then sign extend it to an allsignbits bool pattern for OR/XOR ops.

This also requires SimplifyDemandedBits XOR handling to be modified to call ShrinkDemandedConstant on any (non-NOT) XOR pattern to account for non-splat cases.

Next step towards fixing PR45808 - with this patch we now get a <-1,-1,0,0> v4i64 constant instead of <1,1,0,0>.

Differential Revision: https://reviews.llvm.org/D82257
parent 7f3d9cc1
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