[llvm-mca] Fix handling of zero-latency instructions.

This patch fixes a problem found when testing zero latency instructions on
target AArch64 -mcpu=exynos-m3 / -mcpu=exynos-m1.

On Exynos-m3/m1, direct branches are zero-latency instructions that don't consume
any processor resources.  The DispatchUnit marks zero-latency instructions as
"executed", so that no scheduling is required.  The event of instruction
executed is then notified to all the listeners, and the reorder buffer (managed
by the RetireControlUnit) is updated. In particular, the entry associated to the
zero-latency instruction in the reorder buffer is marked as executed.

Before this patch, the DispatchUnit forgot to assign a retire control unit token
(RCUToken) to the zero-latency instruction. As a consequence, the RCUToken was
used uninitialized. This was causing a crash in the RetireControlUnit logic.

Fixes PR36650.

llvm-svn: 327056