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Commit 4b5462f1 authored by Simon Pilgrim's avatar Simon Pilgrim
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[InstCombine][SSE] Reduce DIVSS/DIVSD to FDIV if only first element is required 

As discussed on D19318, if we only demand the first element of a DIVSS/DIVSD intrinsic, then reduce to a FDIV call. This matches the existing FADD/FSUB/FMUL patterns.

llvm-svn: 267359
parent bfccefd5
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