[RISCV] Do a sign-extension in a compare-and-swap of 32 bit in RV64A

AtomicCmpSwapWithSuccess is legalised into an AtomicCmpSwap plus a comparison.
This requires an extension of the value which, by default, is a
zero-extension. When we later lower AtomicCmpSwap into a PseudoCmpXchg32 and then expanded in
RISCVExpandPseudoInsts.cpp, the lr.w instruction does a sign-extension.

This mismatch of extensions causes the comparison to fail when the compared
value is negative. This change overrides TargetLowering::getExtendForAtomicOps
for RISC-V so it does a sign-extension instead.

Differential Revision: https://reviews.llvm.org/D58829
Patch by Ferran Pallarès Roca.

llvm-svn: 355869