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Commit 4df19b75 authored by Anton Korobeynikov's avatar Anton Korobeynikov
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[MSP430] Optimize srl/sra in case of A >> (8 + N)

There is no variable-length shifts on MSP430. Therefore
"eat" 8 bits of shift via bswap & ext.

Path by Kristina Bessonova!

Differential Revision: https://reviews.llvm.org/D54623

llvm-svn: 347187
parent 12c7a960
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