Skip to content
Commit 502592c1 authored by Alexandros Lamprineas's avatar Alexandros Lamprineas
Browse files

ARM v8.1a adds Advanced SIMD instructions for Rounding Double Multiply

Add/Subtract.

The following instructions are added to AArch32 instruction set:

- VQRDMLAH: Vector Saturating Rounding Doubling Multiply Accumulate
            Returning High Half
- VQRDMLSH: Vector Saturating Rounding Doubling Multiply Subtract
            Returning High Half

The following instructions are added to AArch64 instruction set:

- SQRDMLAH: Signed Saturating Rounding Doubling Multiply Accumulate
            Returning High Half
- SQRDMLSH: Signed Saturating Rounding Doubling Multiply Subtract
            Returning High Half

This patch adds intrinsic and ACLE macro support for these instructions,
as well as corresponding tests.

Differential Revision: http://reviews.llvm.org/D14982

llvm-svn: 254250
parent e14261a4
Loading
Loading
Loading
Loading
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment