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Lorenzo Albano
LLVM bpEVL
Commits
5d909be9
Commit
5d909be9
authored
7 years ago
by
Simon Pilgrim
Browse files
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[InstCombine] Check for out of range ashr values using APInt before calling getZExtValue
Reduced from oss-fuzz #5032 test case llvm-svn: 322078
parent
65956031
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2 changed files
llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+5
-3
5 additions, 3 deletions
llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
llvm/test/Transforms/InstCombine/shift.ll
+23
-0
23 additions, 0 deletions
llvm/test/Transforms/InstCombine/shift.ll
with
28 additions
and
3 deletions
llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
+
5
−
3
View file @
5d909be9
...
@@ -818,7 +818,7 @@ Instruction *InstCombiner::visitAShr(BinaryOperator &I) {
...
@@ -818,7 +818,7 @@ Instruction *InstCombiner::visitAShr(BinaryOperator &I) {
Type
*
Ty
=
I
.
getType
();
Type
*
Ty
=
I
.
getType
();
unsigned
BitWidth
=
Ty
->
getScalarSizeInBits
();
unsigned
BitWidth
=
Ty
->
getScalarSizeInBits
();
const
APInt
*
ShAmtAPInt
;
const
APInt
*
ShAmtAPInt
;
if
(
match
(
Op1
,
m_APInt
(
ShAmtAPInt
)))
{
if
(
match
(
Op1
,
m_APInt
(
ShAmtAPInt
))
&&
ShAmtAPInt
->
ult
(
BitWidth
)
)
{
unsigned
ShAmt
=
ShAmtAPInt
->
getZExtValue
();
unsigned
ShAmt
=
ShAmtAPInt
->
getZExtValue
();
// If the shift amount equals the difference in width of the destination
// If the shift amount equals the difference in width of the destination
...
@@ -832,7 +832,8 @@ Instruction *InstCombiner::visitAShr(BinaryOperator &I) {
...
@@ -832,7 +832,8 @@ Instruction *InstCombiner::visitAShr(BinaryOperator &I) {
// We can't handle (X << C1) >>s C2. It shifts arbitrary bits in. However,
// We can't handle (X << C1) >>s C2. It shifts arbitrary bits in. However,
// we can handle (X <<nsw C1) >>s C2 since it only shifts in sign bits.
// we can handle (X <<nsw C1) >>s C2 since it only shifts in sign bits.
const
APInt
*
ShOp1
;
const
APInt
*
ShOp1
;
if
(
match
(
Op0
,
m_NSWShl
(
m_Value
(
X
),
m_APInt
(
ShOp1
))))
{
if
(
match
(
Op0
,
m_NSWShl
(
m_Value
(
X
),
m_APInt
(
ShOp1
)))
&&
ShOp1
->
ult
(
BitWidth
))
{
unsigned
ShlAmt
=
ShOp1
->
getZExtValue
();
unsigned
ShlAmt
=
ShOp1
->
getZExtValue
();
if
(
ShlAmt
<
ShAmt
)
{
if
(
ShlAmt
<
ShAmt
)
{
// (X <<nsw C1) >>s C2 --> X >>s (C2 - C1)
// (X <<nsw C1) >>s C2 --> X >>s (C2 - C1)
...
@@ -850,7 +851,8 @@ Instruction *InstCombiner::visitAShr(BinaryOperator &I) {
...
@@ -850,7 +851,8 @@ Instruction *InstCombiner::visitAShr(BinaryOperator &I) {
}
}
}
}
if
(
match
(
Op0
,
m_AShr
(
m_Value
(
X
),
m_APInt
(
ShOp1
))))
{
if
(
match
(
Op0
,
m_AShr
(
m_Value
(
X
),
m_APInt
(
ShOp1
)))
&&
ShOp1
->
ult
(
BitWidth
))
{
unsigned
AmtSum
=
ShAmt
+
ShOp1
->
getZExtValue
();
unsigned
AmtSum
=
ShAmt
+
ShOp1
->
getZExtValue
();
// Oversized arithmetic shifts replicate the sign bit.
// Oversized arithmetic shifts replicate the sign bit.
AmtSum
=
std
::
min
(
AmtSum
,
BitWidth
-
1
);
AmtSum
=
std
::
min
(
AmtSum
,
BitWidth
-
1
);
...
...
This diff is collapsed.
Click to expand it.
llvm/test/Transforms/InstCombine/shift.ll
+
23
−
0
View file @
5d909be9
...
@@ -1613,3 +1613,26 @@ define i177 @lshr_out_of_range(i177 %Y, i177** %A2) {
...
@@ -1613,3 +1613,26 @@ define i177 @lshr_out_of_range(i177 %Y, i177** %A2) {
%B1
=
udiv
i177
%B10
,
%B6
%B1
=
udiv
i177
%B10
,
%B6
ret
i177
%B1
ret
i177
%B1
}
}
; OSS Fuzz #5032
; https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=5032
define
void
@ashr_out_of_range
(
i177
*
%A
)
{
; CHECK-LABEL: @ashr_out_of_range(
; CHECK-NEXT: ret void
;
%L
=
load
i177
,
i177
*
%A
%B5
=
udiv
i177
%L
,
-1
%B4
=
add
i177
%B5
,
-1
%B2
=
add
i177
%B4
,
-1
%G11
=
getelementptr
i177
,
i177
*
%A
,
i177
%B2
%L7
=
load
i177
,
i177
*
%G11
%B6
=
mul
i177
%B5
,
%B2
%B24
=
ashr
i177
%L7
,
%B6
%B36
=
and
i177
%L7
,
%B4
%C17
=
icmp
sgt
i177
%B36
,
%B24
%G62
=
getelementptr
i177
,
i177
*
%G11
,
i1
%C17
%B28
=
urem
i177
%B24
,
%B6
store
i177
%B28
,
i177
*
%G62
ret
void
}
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