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Commit 5fedbd5b authored by Simon Pilgrim's avatar Simon Pilgrim
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[DAG] SimplifyDemandedVectorElts - zero_extend_vector_inreg(and(x,c)) -> and(x,c') 

If we've only demanded the 0'th element, and it comes from a (one-use) AND, try to convert the zero_extend_vector_inreg into a mask and constant fold it with the AND.
parent 964536cf
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