[ELF][AArch64] Correct relocation codes for R_<CLS>_PLT32

The relocation codes for R_<CLS>_PLT32 are incorrectly in the dynamic
relocation range that starts at 1024 for AArch64 and 180 for AArch64_32.

Correct these so that they start at the next available static relocation
code in the non-TLS range. The R_<CLS>_PLT32 description is currently in
unpublished so this change corrects LLVM to match the values that will
appear in the final ELF for the 64-bit Arm Architecture document.

Differential Revision: https://reviews.llvm.org/D81410