[AArch64] Enable RAS 1.1 system registers in all AArch64
Some use cases (e.g. kernel devs) have strict requirements to only enable features available with -march=armv8-a, e.g. no armv8.1-a. Enabling RAS 1.1 in all AArch64 means they can consider to support it. Bear in mind that the first versions of the Armv8 architecture still do not support RAS 1.1. This patch only lets devs write code with the user-friendly register mnemonic instead of the ugly generic S<op0>_<op1>_<Cn>_<Cm>_<op2>. They still need to place runtime checks to make sure that the CPU to run on supports RAS 1.1. Differential Revision: https://reviews.llvm.org/D90594
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