Skip to content
Commit 6b0fc1f3 authored by Craig Topper's avatar Craig Topper
Browse files

[RISCV] Add MemOperand to the instruction created by storeRegToStackSlot/loadRegFromStackSlot 

Differential Revision: https://reviews.llvm.org/D91730
parent bd106d74
Hide whitespace changes
Inline Side-by-side
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment