The llvm Triple for an armv6m now comes back as llvm::Triple::thumb.

This was breaking disassembly for arm machines that we force to be
thumb mode all the time because we were only checking for llvm::Triple::arm.
i.e.

armv6m (ARM Cortex-M0)
armv7m (ARM Cortex-M3)
armv7em (ARM Cortex-M4)

<rdar://problem/22334522>

llvm-svn: 245645