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Commit 97e33feb authored by Hsiangkai Wang's avatar Hsiangkai Wang
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[RISCV] Implement vloxseg/vluxseg intrinsics.

Define vloxseg/vluxseg intrinsics and pseudo instructions.
Lower vloxseg/vluxseg intrinsics to pseudo instructions in RISCVDAGToDAGISel.

Differential Revision: https://reviews.llvm.org/D94903
parent ef51eed3
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