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Commit 98d5359e authored by Sjoerd Meijer's avatar Sjoerd Meijer
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[ARM] Armv8.2-A FP16 code generation (part 2/3)

Half-precision arguments and return values are passed as if it were an int or
float for ARM. This results in truncates and bitcasts to/from i16 and f16
values, which are legalized very early to stack stores/loads. When FullFP16 is
enabled, we want to avoid codegen for these bitcasts as it is unnecessary and
inefficient.

Differential Revision: https://reviews.llvm.org/D42580

llvm-svn: 323861
parent c2091808
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