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Commit c9861f72 authored by Craig Topper's avatar Craig Topper
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[RISCV] Correct the output chain in lowerFixedLengthVectorMaskedLoadToRVV

We returned the input chain instead of the output chain from the
new load. This bypasses the load in the chain. I haven't found a
good way to test this yet. IR order prevents my initial attempts
at causing reordering.
parent d10f173f
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