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Commit dd8fca51 authored by Tim Northover's avatar Tim Northover
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ARM64: add correct vector registers during asm parsing

Previously, we ignored the difference between V64 and V128 when parsing
assembly: they both got mapped to registers in the FPR128 class. This is
basically harmless at the moment because they both print and encode the same
way. However, it will affect the printing of aliases.

llvm-svn: 208866
parent dd2d84a2
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