[InstCombine] Eliminate vector reverse if all inputs/outputs to an instruction are reverses
Differential Revision: https://reviews.llvm.org/D109808 Change-Id: I1a10d2bc33acbe0ea353c6cb3d077851391fe73e
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- llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp 40 additions, 0 deletionsllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
- llvm/test/Transforms/InstCombine/vector-reverse.ll 62 additions, 0 deletionsllvm/test/Transforms/InstCombine/vector-reverse.ll
- llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll 2 additions, 4 deletions...nsforms/LoopVectorize/AArch64/sve-vector-reverse-mask4.ll
- llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll 8 additions, 12 deletions...st/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll
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