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Commit f526c600 authored by Matt Devereau's avatar Matt Devereau
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[AArch64][SVE] Instcombine SVE LD1/ST1 to stock LLVM IR 

InstCombine AArch64 LD1/ST1 to llvm.masked.load/llvm.masked.store
and LD1/ST1 to load/store when a ptrue all predicate pattern operand
is present.

This allows existing IR optimizations such as dead-load removal to
occur.

Differential Revision: https://reviews.llvm.org/D113489
parent 3f3d4e8a
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