Commits · 07944f891c48bfa7dad3add97d533dec4bc48afb · Lorenzo Albano / LLVM bpEVL · GitLab

Apr 03, 2017
- [InstCombine] Remove a And transform that should be handled by... · 07944f89
  Craig Topper authored Apr 03, 2017
  07944f89
Apr 02, 2017
- [InstCombine] Make InstCombiner::OptAndOp take a BinaryOperator instead of an Instruction. · 70e4f434
  Craig Topper authored Apr 02, 2017
  70e4f434
- [InstCombine] Remove redundant combine from visitAnd · d133591a
  Craig Topper authored Apr 02, 2017
  d133591a
- NewGVN: Handle coercion of constant stores, loads, memory insts. · 07daac8a
  Daniel Berlin authored Apr 02, 2017
  07daac8a
- [BypassSlowDivision] Do not bypass division of hash-like values · fca527af
  Nikolai Bozhenov authored Apr 02, 2017
  fca527af
- MemorySSA: Add support for caching clobbering access in stores · 8a002708
  Daniel Berlin authored Apr 02, 2017
  8a002708
Apr 01, 2017
- NewGVN: Don't try to kill off the stored value of stores when · 9a9c9ff2
  Daniel Berlin authored Apr 01, 2017
  9a9c9ff2
- NewGVN: Clean up GVNExpression memory hierarchy, restructure hash computation... · 9b498492
  Daniel Berlin authored Apr 01, 2017
  9b498492
- NewGVN: Use def_chain iterator in singleReachablePhiPath instead of recursion · 871ecd90
  Daniel Berlin authored Apr 01, 2017
  871ecd90
- Move def_chain iterator to MemorySSA.h so it can be reused · 07275c30
  Daniel Berlin authored Apr 01, 2017
  07275c30
- MemorySSA: Push const correctness further. · d042031f
  Daniel Berlin authored Apr 01, 2017
  d042031f
- MemorySSA: Kill the WalkTargetCache now that we have getBlockDefs. · 7500c564
  Daniel Berlin authored Apr 01, 2017
  7500c564
- [APInt] Fix bugs in isShiftedMask to match behavior of the similar function in MathExtras.h · 47fd2de3
  Craig Topper authored Mar 31, 2017
  47fd2de3
Mar 31, 2017
- [InstCombine] When adding an Instruction and its Users to the worklist at the... · e625d742
  Craig Topper authored Mar 31, 2017
  e625d742
- [APInt] Remove shift functions from APIntOps namespace. Replace the few users... · 885fa12e
  Craig Topper authored Mar 31, 2017
  885fa12e
- Do not translate rint into nearbyint, but truncate it like nearbyint. · 28bed106
  Joerg Sonnenberger authored Mar 31, 2017
  28bed106
- Fix the InstCombine to reserve the VP metadata and sets correct call count. · fed890ea
  Dehao Chen authored Mar 31, 2017
  fed890ea
- [Scalarizer] Handle scalar arguments in vector GEP · 79235bd4
  Mikael Holmen authored Mar 31, 2017
  79235bd4
- ThinLTOBitcodeWriter: Use Module::global_values(). NFCI. · 6b193966
  Peter Collingbourne authored Mar 30, 2017
  6b193966
- [InstCombine] Fix typo last->least. NFC · 79e5bc52
  Craig Topper authored Mar 30, 2017
  79e5bc52
- AMDGPU: Add all atomicrmw fields to atomic.inc/dec · 79f837c2
  Matt Arsenault authored Mar 30, 2017
  79f837c2
Mar 30, 2017
- [SimplifyIndvar] Replace the sdiv used by IV if we can prove both of its operands are non-negative · bfd7c38d
  Hongbin Zheng authored Mar 30, 2017
  bfd7c38d
- Spelling mistakes in comments. NFCI. · 68168d17
  Simon Pilgrim authored Mar 30, 2017
  68168d17
Mar 29, 2017
- [InstCombine] Correct the check for vector GEPs · c8f0aecc
  Matthew Simpson authored Mar 29, 2017
  c8f0aecc
- Cleanup in preparation for D30703. NFCI · 8b94273f
  Filipe Cabecinhas authored Mar 29, 2017
  8b94273f
Mar 28, 2017
- [InstCombine] For select rule, use positive check of constant int for select operand. NFCI · 923e574b
  Anna Thomas authored Mar 28, 2017
  923e574b
- Revert "[asan] Delay creation of asan ctor." · bbd5cc63
  Alex Shlyapnikov authored Mar 27, 2017
  bbd5cc63
- Revert "[asan] Put ctor/dtor in comdat." · 09171aa3
  Alex Shlyapnikov authored Mar 27, 2017
  09171aa3
Mar 27, 2017
- [LV] Transform truncations of non-primary induction variables · b8ff4a4a
  Matthew Simpson authored Mar 27, 2017
  b8ff4a4a
- [InstCombine] Avoid incorrect folding of select into phi nodes when incoming... · f57ae333
  Anna Thomas authored Mar 27, 2017
  f57ae333
Mar 26, 2017
- [LoopUnroll] Remap references in peeled iteration · b71bb80c
  Serge Pavlov authored Mar 26, 2017
  b71bb80c
- Split the SimplifyCFG pass into two variants. · fa736742
  Joerg Sonnenberger authored Mar 26, 2017
  fa736742
- [IR] Make SwitchInst::CaseIt almost a normal iterator. · 0d256c0f
  Chandler Carruth authored Mar 26, 2017
  0d256c0f
Mar 25, 2017
- [InstCombine] Change the interface of SimplifyDemandedBits so that it takes... · 47596dd4
  Craig Topper authored Mar 25, 2017
  47596dd4
- [NewGVN] Adjust NDEBUG markers. · e9781e7b
  Davide Italiano authored Mar 25, 2017
  e9781e7b
- [asan] Put ctor/dtor in comdat. · 71bb8f1a
  Evgeniy Stepanov authored Mar 25, 2017
  71bb8f1a
Mar 24, 2017
- Revert r298711 "[InstCombine] Provide a way to calculate KnownZero/One for... · 8fbb74b5
  Craig Topper authored Mar 24, 2017
  8fbb74b5
- Revert r298620: [LV] Vectorize GEPs · c2124e18
  Ivan Krasin authored Mar 24, 2017
  c2124e18
- [asan] Delay creation of asan ctor. · 64e872a9
  Evgeniy Stepanov authored Mar 24, 2017
  64e872a9
- AMDGPU: Fold rcp/rsq of undef to undef · 4c7795dd
  Matt Arsenault authored Mar 24, 2017
  4c7795dd