Commits · 1187077f81fdf2371a171101eabaea7ab81ec94a · Lorenzo Albano / LLVM bpEVL · GitLab

Aug 10, 2012
- Add some missing includes for the build against stdcxx. · aa2f801c
  Joerg Sonnenberger authored Aug 10, 2012
  aa2f801c
- [ms-inline asm] Extend the MC AsmParser API to match MCInsts (but not emit). · 9cb988f3
  Chad Rosier authored Aug 09, 2012
  9cb988f3
Aug 08, 2012
- X86: enable CSE between CMP and SUB · 1be131ba
  Manman Ren authored Aug 08, 2012
  1be131ba
- Don't scan physreg use-def chains looking for a PIC base. · 3b9a4428
  Jakob Stoklund Olesen authored Aug 08, 2012
  3b9a4428
- X86 cmp lowering is looking past truncate on the condition node. It should only · fbdd25c1
  Evan Cheng authored Aug 07, 2012
  fbdd25c1
Aug 07, 2012
- Allow x86 subtargets to use the GenericModel defined in X86Schedule.td. · e0c83b1f
  Andrew Trick authored Aug 07, 2012
  e0c83b1f
Aug 06, 2012
- Add support for the OpenBSD for Bitrig. · 22738d00
  Eric Christopher authored Aug 06, 2012
  22738d00
- Implement proper handling for pcmpistri/pcmpestri intrinsics. Requires custom... · ab47fe4e
  Craig Topper authored Aug 06, 2012
  ab47fe4e
Aug 05, 2012
- Remove custom inserter for MWAIT. It doesn't do anything that couldn't be represented in a pattern. · 6d0408d3
  Craig Topper authored Aug 05, 2012
  6d0408d3
- Use a COPY node instead of an explicit MOVA opcode in the custom insterter for... · 43ee9fae
  Craig Topper authored Aug 05, 2012
  43ee9fae
Aug 03, 2012
- Fall back to selection DAG isel for calls to builtin functions. · 3e6fa462
  Bob Wilson authored Aug 03, 2012
  3e6fa462
Aug 02, 2012
- X86 Peephole: fold loads to the source register operand if possible. · ba8122cc
  Manman Ren authored Aug 02, 2012
  ba8122cc
- X86 Peephole: fold loads to the source register operand if possible. · 5759d012
  Manman Ren authored Aug 02, 2012
  5759d012
- X86: mark GATHER instructios as mayLoad · 40591453
  Manman Ren authored Aug 01, 2012
  40591453
Aug 01, 2012
- Whitespace. · 24c19d20
  Chad Rosier authored Aug 01, 2012
  24c19d20
- Added FMA functionality to X86 target. · 3cb3b004
  Elena Demikhovsky authored Aug 01, 2012
  3cb3b004
- Add more indirection to the disassembler tables to reduce amount of space used... · b8aec088
  Craig Topper authored Aug 01, 2012
  b8aec088
Jul 31, 2012
- [x86 frame lowering] In 32-bit mode, use ESI as the base pointer. · 710be7df
  Chad Rosier authored Jul 31, 2012
  710be7df
- Make INSTRUCTION_SPECIFIER_FIELDS match X86DisassemblerCommon.h. Also remove trailing whitespace. · c2efce40
  Craig Topper authored Jul 31, 2012
  c2efce40
- Tidy up trailing whitespace · fb39f97d
  Craig Topper authored Jul 31, 2012
  fb39f97d
- Tidy up trailing whitespace · 5f33d902
  Craig Topper authored Jul 31, 2012
  5f33d902
Jul 30, 2012
- Mark MOVZX16/MOVSX16 as neverHasSideEffects/mayLoad · efd97044
  Craig Topper authored Jul 30, 2012
  efd97044
- Mark MOVZX32_NOREX as isCodeGenOnly and neverHasSideEffects. The isCodeGenOnly... · c6b7ef61
  Craig Topper authored Jul 30, 2012
  c6b7ef61
- Give VCVTTPD2DQ priority over CVTTPD2DQ. · 14eac5dd
  Craig Topper authored Jul 30, 2012
  14eac5dd
- Fix patterns for CVTTPS2DQ to specify SSE2 instead of SSE1. · f881d385
  Craig Topper authored Jul 30, 2012
  f881d385
- Fix up patterns for VCVTSS2SD. Specifically give it priority over SSE form.... · 415b3586
  Craig Topper authored Jul 30, 2012
  415b3586
- Fix load types on intrinsic forms of SS2SD and SD2SS AVX/SSE convert instruction patterns. · 28402efc
  Craig Topper authored Jul 29, 2012
  28402efc
- Move more SSE/AVX convert instruction patterns into their definitions. · b6767f3a
  Craig Topper authored Jul 29, 2012
  b6767f3a
Jul 29, 2012
- Revert r160920 and r160919 due to dragonegg and clang selfhost failure · f87dd7c0
  Manman Ren authored Jul 29, 2012
  f87dd7c0
Jul 28, 2012
- Fold patterns for some of the SSE/AVX convert instructions into their instruction definitions. · fc93281c
  Craig Topper authored Jul 28, 2012
  fc93281c
- Mark some of the SSE/AVX convert instructions as mayLoad/neverHasSideEffects. · 024797b9
  Craig Topper authored Jul 28, 2012
  024797b9
- X86 Peephole: fold loads to the source register operand if possible. · 0fa3ab88
  Manman Ren authored Jul 28, 2012
  0fa3ab88
- Make CVTSS2SI instruction definition consistent with CVTSD2SI. · 44f9b534
  Craig Topper authored Jul 28, 2012
  44f9b534
- Fix up memory load types for SSE scalar convert intrinsic patterns. · 1c1aef07
  Craig Topper authored Jul 28, 2012
  1c1aef07
- X86 Peephole: fix PR13475 in optimizeCompare. · 32367c06
  Manman Ren authored Jul 28, 2012
  32367c06
Jul 27, 2012
- Remove the X86 sub_ss and sub_sd sub-register indexes completely. · 7cd08536
  Jakob Stoklund Olesen authored Jul 26, 2012
  7cd08536
- Remove the last mentions of sub_ss and sub_sd from patterns. · 77cd55b4
  Jakob Stoklund Olesen authored Jul 26, 2012
  77cd55b4
- Eliminate sub_ss, sub_sd from broadcast patterns. · b96d0b4e
  Jakob Stoklund Olesen authored Jul 26, 2012
  b96d0b4e
- Eliminate more sub_ss / sub_sd patterns. · 206b825f
  Jakob Stoklund Olesen authored Jul 26, 2012
  206b825f
- Eliminate some SUBREG_TO_REG patterns with sub_ss and sub_sd. · 75d17b05
  Jakob Stoklund Olesen authored Jul 26, 2012
  75d17b05