switch statements in the constructors and simplifies the
implementation of the getUseType() member function. You will have to
specify defs using MachineOperand::Def instead of MOTy::Def though
(similarly for Use and UseAndDef).

llvm-svn: 11715

Also, make an assertion actually fireable!

llvm-svn: 11713

AFTER the GEP that was emitted.  :(

llvm-svn: 11712

(minor) benefits right now:

1. An extra dummy MOVrr32 is gone.  This move would often be coallesced by
   both allocators anyway.
2. The code now uses the gep_type_iterator to walk the gep, which should future
   proof it a bit.  It still assumes that array indexes are Longs though.

These don't really justify rewriting the code.  The big benefit will come later
though.

llvm-svn: 11710

leave register operands with the same use/def flags as the original
instruction.

llvm-svn: 11709

this should be folded into it.

llvm-svn: 11705

value is a physreg and one is a virtreg.  For this reason, disable copy folding
entirely for physregs.  Also, use the new isMoveInstr target hook which gives us
folding of FP moves as well.

llvm-svn: 11700

llvm-svn: 11576

llvm-svn: 11560

llvm-svn: 11558

llvm-svn: 11556

representation.. duh!

llvm-svn: 11554

llvm-svn: 11552

llvm-svn: 11550

llvm-svn: 11549

bits wide.

llvm-svn: 11548

llvm-svn: 11547

MOVSX, and MOVZX.

llvm-svn: 11546

and DECm{8,16,32} instructions.

llvm-svn: 11545

llvm-svn: 11544

llvm-svn: 11543

llvm-svn: 11541

llvm-svn: 11540

like compares and test's would be the next huge win...

llvm-svn: 11539

llvm-svn: 11538

llvm-svn: 11537

but the memory reference is full sized.

llvm-svn: 11536

llvm-svn: 11531

order in the correct sense!! Arg!

llvm-svn: 11530

'ri' ordering instead... no it's not possible to store a register into an
immediate!

llvm-svn: 11529

llvm-svn: 11528

llvm-svn: 11527

llvm-svn: 11526

llvm-svn: 11525

llvm-svn: 11523

llvm-svn: 11522

llvm-svn: 11521

llvm-svn: 11519

instructions.  Add forms of these instructions that read from memory

llvm-svn: 11518

llvm-svn: 11511