This CPU definition is redundant. The Cortex-A9 is defined as
supporting multiprocessing extensions. Remove its definition and
update appropriate tests.

LLVM defines both a cortex-a9 CPU and a cortex-a9-mp CPU. The only
difference between the two CPU definitions in ARM.td is that
cortex-a9-mp contains the feature FeatureMP for multiprocessing
extensions.

This is redundant since the Cortex-A9 is defined as having
multiprocessing extensions in the TRMs. armcc also defines the
Cortex-A9 as having multiprocessing extensions by default.

Change-Id: Ifcadaa6c322be0a33d9d2a39cfdd7da1d75981a7
llvm-svn: 221166

It should be on for every target that supports unaligned accesses (e.g. not
v6m).

Patch by Charlie Turner.

llvm-svn: 220912

Patch by Matthew Wahab.

llvm-svn: 219606

Patch by Charlie Turner.

llvm-svn: 219301

The Cortex-M7 has 3 options for its FPU: none, FPv5-SP-D16 and
FPv5-DP-D16. FPv5 has the same instructions as FP-ARMv8, so it can be
modelled using the same target feature, and all double-precision
operations are already disabled by the fp-only-sp target features.

llvm-svn: 218747

Patch by Ben Foster!

Differential Revision: http://reviews.llvm.org/D4657

llvm-svn: 213944

Patch by Asiri Rathnayake.

llvm-svn: 209656

llvm-svn: 201479

[ARM] Do not generate Tag_DIV_use=AllowDIVExt when hardware div is non-optional: it should have the default value of AllowDIVIfExists

llvm-svn: 199638

Update names for the names as per the current ABI errata.  Mark deprecated tags
as such.

llvm-svn: 199576

The encoding of build attributes is already tested in CodeGen/ARM/build-attributes-encoding.s

llvm-svn: 199393

llvm-svn: 198945

Patch by Oliver Stannard.

llvm-svn: 195640

Patch by Oliver Stannard!

llvm-svn: 195448

llvm-svn: 195365

llvm-svn: 194470

Add a Virtualization ARM subtarget feature along with adding proper build
attribute emission for Tag_Virtualization_use (encodes Virtualization and
TrustZone) and Tag_MPextension_use.

Also rework test/CodeGen/ARM/2010-10-19-mc-elf-objheader.ll testcase to
something that is more maintainable. This changes the focus of this
testcase away from testing CPU defaults (which is tested elsewhere), onto
specifically testing that attributes are encoded correctly.

llvm-svn: 193859

Fix Tag_ABI_HardFP_use build attribute to handle single precision FP,
replace deprecated Tag_ABI_HardFP_use value of 3 with 0 and also add
some tests for Tag_ABI_VFP_args.

llvm-svn: 193856

This commit allows the ARM integrated assembler to parse
and assemble the code with .eabi_attribute, .cpu, and
.fpu directives.

To implement the feature, this commit moves the code from
AttrEmitter to ARMTargetStreamers, and several new test
cases related to cortex-m4, cortex-r5, and cortex-a15 are
added.

Besides, this commit also change the Subtarget->isFPOnlySP()
to Subtarget->hasD16() to match the usage of .fpu directive.

This commit changes the test cases:

* Several .eabi_attribute directives in
  2010-09-29-mc-asm-header-test.ll are removed because the .fpu
  directive already cover the functionality.

* In the Cortex-A15 test case, the value for
  Tag_Advanced_SIMD_arch has be changed from 1 to 2,
  which is more precise.

llvm-svn: 193524

llvm-svn: 192591

Some previous implicit defaults have changed, for example FP and NEON
are now on by default.

llvm-svn: 192590

llvm-svn: 192458

llvm-svn: 192111

llvm-svn: 191891

to be more consistent.

llvm-svn: 190692

Patch by Bradley Smith!

llvm-svn: 190683

llvm-svn: 185073

This allows for targeting the ARMv8 AArch32 variant.

llvm-svn: 184967

Unified EmitTextAttribute for both Asm and Obj emission (.cpu only)
Added necessary cortex-A8 related attrs for codegen compat tests.

llvm-svn: 124995

Small test for sanity check of resulting ARM .s file.
Tested against -r115129.

llvm-svn: 115133