cannot be directly interchanged for comparisons against negated values.
Disable the CMN instructions for the time being.

llvm-svn: 94119

llvm-svn: 86494

llvm-svn: 86330

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instruction. This makes it re-materializable.

Thumb2 will split it back out into two instructions so IT pass will generate the
right mask. Also, this expose opportunies to optimize the movw to a 16-bit move.

llvm-svn: 82982

llvm-svn: 77598

Disable my constant island pass optimization (to make use soimm more effectively). It caused infinite looping on lencod.

llvm-svn: 76995

llvm-svn: 76711

After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.

llvm-svn: 74420

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This is still a work in progress but most of the NEON instruction set
is supported.

llvm-svn: 73919

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scavenging todo item, since it is now implemented.

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from README.
When no water available, use end of block if in range.  (More to do here.)

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llvm-svn: 33778

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