llvm-svn: 11728

Implement cast Type::ULongTy -> double

llvm-svn: 11726

use FP instructions.  This reduces the number of instructions inserted in
176.gcc (for example) from 58074 to 101 (it doesn't use much FP, which
is typical).  This reduction speeds up the entire code generator.  In the
case of 176.gcc, llc went from taking 31.38s to 24.78s.  The passes that
sped up the most are the register allocator and the 2 live variable analysis
passes, which sped up 2.3, 1.3, and 1.5s respectively.  The asmprinter
pass also sped up because it doesn't print the instructions in comments :)

Note that this patch is likely to expose latent bugs in machine code passes,
because now basicblock can be empty, where they were never empty before.  I
cleaned out regalloclocal, but who knows about linscan :)

llvm-svn: 11717

switch statements in the constructors and simplifies the
implementation of the getUseType() member function. You will have to
specify defs using MachineOperand::Def instead of MOTy::Def though
(similarly for Use and UseAndDef).

llvm-svn: 11715

Also, make an assertion actually fireable!

llvm-svn: 11713

AFTER the GEP that was emitted.  :(

llvm-svn: 11712

(minor) benefits right now:

1. An extra dummy MOVrr32 is gone.  This move would often be coallesced by
   both allocators anyway.
2. The code now uses the gep_type_iterator to walk the gep, which should future
   proof it a bit.  It still assumes that array indexes are Longs though.

These don't really justify rewriting the code.  The big benefit will come later
though.

llvm-svn: 11710

order in the correct sense!! Arg!

llvm-svn: 11530

'ri' ordering instead... no it's not possible to store a register into an
immediate!

llvm-svn: 11529

llvm-svn: 11527

instructions.  Add forms of these instructions that read from memory

llvm-svn: 11518

applications

llvm-svn: 11459

llvm-svn: 11445

llvm-svn: 11442

llvm-svn: 11420

generating the llvm.memcpy intrinsic.

llvm-svn: 11351

ilist of MachineInstr objects. This allows constant time removal and
insertion of MachineInstr instances from anywhere in each
MachineBasicBlock. It also allows for constant time splicing of
MachineInstrs into or out of MachineBasicBlocks.

llvm-svn: 11340

llvm-svn: 11228

llvm-svn: 11098

llvm-svn: 11078

llvm-svn: 11070

FP_REG_KILL instructions at the end of blocks involved with critical edges.

Fix a bug where FP_REG_KILL instructions weren't inserted in fall through
unconditional branches.  Perhaps this will fix some linscan problems?

llvm-svn: 11019

register so that LiveVariable analysis is not confused.

llvm-svn: 10773

implementation from the TargetMachine directly.

llvm-svn: 10636

llvm-svn: 10632

llvm-svn: 10629

llvm-svn: 10567

llvm-svn: 10563

instruction selector by adding a new pseudo-instruction
FP_REG_KILL. This instruction implicitly defines all x86 fp registers
and is a terminator so that passes which add machine code at the end
of basic blocks (like phi elimination) do not add instructions between
it and the branch or return instruction.

llvm-svn: 10562

llvm-svn: 10170

llvm-svn: 10168

llvm-svn: 10069

llvm-svn: 9903

Implement mul/div/rem constant expressions

llvm-svn: 9424

* Convert tabs to spaces
* Make code fit within 80 columns

llvm-svn: 9416

Header files will be on the way.

llvm-svn: 9298

llvm-svn: 9282

llvm-svn: 9281

* Implement R1 = R2 * C where R1 and R2 are 32 or 16 bits. This avoids an
  extra copy into a register, reducing register pressure.

llvm-svn: 9278

  getelementptr code path for use by other code paths (like malloc and alloca).
* Optimize comparisons with zero
* Generate neg, not, inc, and dec instructions, when possible.

This gives some code size wins, which might translate into performance.  We'll
see tommorow in the nightly tester.

llvm-svn: 9267